Linux kernel mirror (for testing)
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kernel
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __LINUX_GPIO_DRIVER_H
3#define __LINUX_GPIO_DRIVER_H
4
5#include <linux/bits.h>
6#include <linux/cleanup.h>
7#include <linux/err.h>
8#include <linux/irqchip/chained_irq.h>
9#include <linux/irqdomain.h>
10#include <linux/irqhandler.h>
11#include <linux/lockdep.h>
12#include <linux/pinctrl/pinconf-generic.h>
13#include <linux/pinctrl/pinctrl.h>
14#include <linux/property.h>
15#include <linux/spinlock_types.h>
16#include <linux/types.h>
17#include <linux/util_macros.h>
18
19#ifdef CONFIG_GENERIC_MSI_IRQ
20#include <asm/msi.h>
21#endif
22
23#include "defs.h"
24
25struct device;
26struct irq_chip;
27struct irq_data;
28struct module;
29struct of_phandle_args;
30struct pinctrl_dev;
31struct seq_file;
32
33struct gpio_chip;
34struct gpio_desc;
35struct gpio_device;
36
37enum gpio_lookup_flags;
38enum gpiod_flags;
39
40union gpio_irq_fwspec {
41 struct irq_fwspec fwspec;
42#ifdef CONFIG_GENERIC_MSI_IRQ
43 msi_alloc_info_t msiinfo;
44#endif
45};
46
47/**
48 * struct gpio_irq_chip - GPIO interrupt controller
49 */
50struct gpio_irq_chip {
51 /**
52 * @chip:
53 *
54 * GPIO IRQ chip implementation, provided by GPIO driver.
55 */
56 struct irq_chip *chip;
57
58 /**
59 * @domain:
60 *
61 * Interrupt translation domain; responsible for mapping between GPIO
62 * hwirq number and Linux IRQ number.
63 */
64 struct irq_domain *domain;
65
66#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
67 /**
68 * @fwnode:
69 *
70 * Firmware node corresponding to this gpiochip/irqchip, necessary
71 * for hierarchical irqdomain support.
72 */
73 struct fwnode_handle *fwnode;
74
75 /**
76 * @parent_domain:
77 *
78 * If non-NULL, will be set as the parent of this GPIO interrupt
79 * controller's IRQ domain to establish a hierarchical interrupt
80 * domain. The presence of this will activate the hierarchical
81 * interrupt support.
82 */
83 struct irq_domain *parent_domain;
84
85 /**
86 * @child_to_parent_hwirq:
87 *
88 * This callback translates a child hardware IRQ offset to a parent
89 * hardware IRQ offset on a hierarchical interrupt chip. The child
90 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
91 * ngpio field of struct gpio_chip) and the corresponding parent
92 * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by
93 * the driver. The driver can calculate this from an offset or using
94 * a lookup table or whatever method is best for this chip. Return
95 * 0 on successful translation in the driver.
96 *
97 * If some ranges of hardware IRQs do not have a corresponding parent
98 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
99 * @need_valid_mask to make these GPIO lines unavailable for
100 * translation.
101 */
102 int (*child_to_parent_hwirq)(struct gpio_chip *gc,
103 unsigned int child_hwirq,
104 unsigned int child_type,
105 unsigned int *parent_hwirq,
106 unsigned int *parent_type);
107
108 /**
109 * @populate_parent_alloc_arg :
110 *
111 * This optional callback allocates and populates the specific struct
112 * for the parent's IRQ domain. If this is not specified, then
113 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
114 * variant named &gpiochip_populate_parent_fwspec_fourcell is also
115 * available.
116 */
117 int (*populate_parent_alloc_arg)(struct gpio_chip *gc,
118 union gpio_irq_fwspec *fwspec,
119 unsigned int parent_hwirq,
120 unsigned int parent_type);
121
122 /**
123 * @child_offset_to_irq:
124 *
125 * This optional callback is used to translate the child's GPIO line
126 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
127 * callback. If this is not specified, then a default callback will be
128 * provided that returns the line offset.
129 */
130 unsigned int (*child_offset_to_irq)(struct gpio_chip *gc,
131 unsigned int pin);
132
133 /**
134 * @child_irq_domain_ops:
135 *
136 * The IRQ domain operations that will be used for this GPIO IRQ
137 * chip. If no operations are provided, then default callbacks will
138 * be populated to setup the IRQ hierarchy. Some drivers need to
139 * supply their own translate function.
140 */
141 struct irq_domain_ops child_irq_domain_ops;
142#endif
143
144 /**
145 * @handler:
146 *
147 * The IRQ handler to use (often a predefined IRQ core function) for
148 * GPIO IRQs, provided by GPIO driver.
149 */
150 irq_flow_handler_t handler;
151
152 /**
153 * @default_type:
154 *
155 * Default IRQ triggering type applied during GPIO driver
156 * initialization, provided by GPIO driver.
157 */
158 unsigned int default_type;
159
160 /**
161 * @lock_key:
162 *
163 * Per GPIO IRQ chip lockdep class for IRQ lock.
164 */
165 struct lock_class_key *lock_key;
166
167 /**
168 * @request_key:
169 *
170 * Per GPIO IRQ chip lockdep class for IRQ request.
171 */
172 struct lock_class_key *request_key;
173
174 /**
175 * @parent_handler:
176 *
177 * The interrupt handler for the GPIO chip's parent interrupts, may be
178 * NULL if the parent interrupts are nested rather than cascaded.
179 */
180 irq_flow_handler_t parent_handler;
181
182 union {
183 /**
184 * @parent_handler_data:
185 *
186 * If @per_parent_data is false, @parent_handler_data is a
187 * single pointer used as the data associated with every
188 * parent interrupt.
189 */
190 void *parent_handler_data;
191
192 /**
193 * @parent_handler_data_array:
194 *
195 * If @per_parent_data is true, @parent_handler_data_array is
196 * an array of @num_parents pointers, and is used to associate
197 * different data for each parent. This cannot be NULL if
198 * @per_parent_data is true.
199 */
200 void **parent_handler_data_array;
201 };
202
203 /**
204 * @num_parents:
205 *
206 * The number of interrupt parents of a GPIO chip.
207 */
208 unsigned int num_parents;
209
210 /**
211 * @parents:
212 *
213 * A list of interrupt parents of a GPIO chip. This is owned by the
214 * driver, so the core will only reference this list, not modify it.
215 */
216 unsigned int *parents;
217
218 /**
219 * @map:
220 *
221 * A list of interrupt parents for each line of a GPIO chip.
222 */
223 unsigned int *map;
224
225 /**
226 * @threaded:
227 *
228 * True if set the interrupt handling uses nested threads.
229 */
230 bool threaded;
231
232 /**
233 * @per_parent_data:
234 *
235 * True if parent_handler_data_array describes a @num_parents
236 * sized array to be used as parent data.
237 */
238 bool per_parent_data;
239
240 /**
241 * @initialized:
242 *
243 * Flag to track GPIO chip irq member's initialization.
244 * This flag will make sure GPIO chip irq members are not used
245 * before they are initialized.
246 */
247 bool initialized;
248
249 /**
250 * @domain_is_allocated_externally:
251 *
252 * True it the irq_domain was allocated outside of gpiolib, in which
253 * case gpiolib won't free the irq_domain itself.
254 */
255 bool domain_is_allocated_externally;
256
257 /**
258 * @init_hw: optional routine to initialize hardware before
259 * an IRQ chip will be added. This is quite useful when
260 * a particular driver wants to clear IRQ related registers
261 * in order to avoid undesired events.
262 */
263 int (*init_hw)(struct gpio_chip *gc);
264
265 /**
266 * @init_valid_mask: optional routine to initialize @valid_mask, to be
267 * used if not all GPIO lines are valid interrupts. Sometimes some
268 * lines just cannot fire interrupts, and this routine, when defined,
269 * is passed a bitmap in "valid_mask" and it will have ngpios
270 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
271 * then directly set some bits to "0" if they cannot be used for
272 * interrupts.
273 */
274 void (*init_valid_mask)(struct gpio_chip *gc,
275 unsigned long *valid_mask,
276 unsigned int ngpios);
277
278 /**
279 * @valid_mask:
280 *
281 * If not %NULL, holds bitmask of GPIOs which are valid to be included
282 * in IRQ domain of the chip.
283 */
284 unsigned long *valid_mask;
285
286 /**
287 * @first:
288 *
289 * Required for static IRQ allocation. If set,
290 * irq_domain_create_simple() will allocate and map all IRQs
291 * during initialization.
292 */
293 unsigned int first;
294
295 /**
296 * @irq_enable:
297 *
298 * Store old irq_chip irq_enable callback
299 */
300 void (*irq_enable)(struct irq_data *data);
301
302 /**
303 * @irq_disable:
304 *
305 * Store old irq_chip irq_disable callback
306 */
307 void (*irq_disable)(struct irq_data *data);
308 /**
309 * @irq_unmask:
310 *
311 * Store old irq_chip irq_unmask callback
312 */
313 void (*irq_unmask)(struct irq_data *data);
314
315 /**
316 * @irq_mask:
317 *
318 * Store old irq_chip irq_mask callback
319 */
320 void (*irq_mask)(struct irq_data *data);
321};
322
323/**
324 * struct gpio_chip - abstract a GPIO controller
325 * @label: a functional name for the GPIO device, such as a part
326 * number or the name of the SoC IP-block implementing it.
327 * @gpiodev: the internal state holder, opaque struct
328 * @parent: optional parent device providing the GPIOs
329 * @fwnode: optional fwnode providing this controller's properties
330 * @owner: helps prevent removal of modules exporting active GPIOs
331 * @request: optional hook for chip-specific activation, such as
332 * enabling module power and clock; may sleep; must return 0 on success
333 * or negative error number on failure
334 * @free: optional hook for chip-specific deactivation, such as
335 * disabling module power and clock; may sleep
336 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
337 * (same as GPIO_LINE_DIRECTION_OUT / GPIO_LINE_DIRECTION_IN),
338 * or negative error. It is recommended to always implement this
339 * function, even on input-only or output-only gpio chips.
340 * @direction_input: configures signal "offset" as input, returns 0 on success
341 * or a negative error number. This can be omitted on input-only or
342 * output-only gpio chips.
343 * @direction_output: configures signal "offset" as output, returns 0 on
344 * success or a negative error number. This can be omitted on input-only
345 * or output-only gpio chips.
346 * @get: returns value for signal "offset", 0=low, 1=high, or negative error.
347 * the low and high values are defined as physical low on the line
348 * in/out to the connector such as a physical pad, pin or rail. The GPIO
349 * library has internal logic to handle lines that are active low, such
350 * as indicated by overstrike or #name in a schematic, and the driver
351 * should not try to second-guess the logic value of a line.
352 * @get_multiple: reads values for multiple signals defined by "mask" and
353 * stores them in "bits", returns 0 on success or negative error
354 * @set: assigns output value for signal "offset", returns 0 on success or
355 * negative error value. The output value follows the same semantic
356 * rules as for @get.
357 * @set_multiple: assigns output values for multiple signals defined by
358 * "mask", returns 0 on success or negative error value
359 * @set_config: optional hook for all kinds of settings. Uses the same
360 * packed config format as generic pinconf. Must return 0 on success and
361 * a negative error number on failure.
362 * @to_irq: optional hook supporting non-static gpiod_to_irq() mappings;
363 * implementation may not sleep
364 * @dbg_show: optional routine to show contents in debugfs; default code
365 * will be used when this is omitted, but custom code can show extra
366 * state (such as pullup/pulldown configuration).
367 * @init_valid_mask: optional routine to initialize @valid_mask, to be used if
368 * not all GPIOs are valid.
369 * @add_pin_ranges: optional routine to initialize pin ranges, to be used when
370 * requires special mapping of the pins that provides GPIO functionality.
371 * It is called after adding GPIO chip and before adding IRQ chip.
372 * @en_hw_timestamp: Dependent on GPIO chip, an optional routine to
373 * enable hardware timestamp.
374 * @dis_hw_timestamp: Dependent on GPIO chip, an optional routine to
375 * disable hardware timestamp.
376 * @base: identifies the first GPIO number handled by this chip;
377 * or, if negative during registration, requests dynamic ID allocation.
378 * DEPRECATION: providing anything non-negative and nailing the base
379 * offset of GPIO chips is deprecated. Please pass -1 as base to
380 * let gpiolib select the chip base in all possible cases. We want to
381 * get rid of the static GPIO number space in the long run.
382 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
383 * handled is (base + ngpio - 1).
384 * @offset: when multiple gpio chips belong to the same device this
385 * can be used as offset within the device so friendly names can
386 * be properly assigned.
387 * @names: if set, must be an array of strings to use as alternative
388 * names for the GPIOs in this chip. Any entry in the array
389 * may be NULL if there is no alias for the GPIO, however the
390 * array must be @ngpio entries long.
391 * @can_sleep: flag must be set iff get()/set() methods sleep, as they
392 * must while accessing GPIO expander chips over I2C or SPI. This
393 * implies that if the chip supports IRQs, these IRQs need to be threaded
394 * as the chip access may sleep when e.g. reading out the IRQ status
395 * registers.
396 *
397 * A gpio_chip can help platforms abstract various sources of GPIOs so
398 * they can all be accessed through a common programming interface.
399 * Example sources would be SOC controllers, FPGAs, multifunction
400 * chips, dedicated GPIO expanders, and so on.
401 *
402 * Each chip controls a number of signals, identified in method calls
403 * by "offset" values in the range 0..(@ngpio - 1). When those signals
404 * are referenced through calls like gpio_get_value(gpio), the offset
405 * is calculated by subtracting @base from the gpio number.
406 */
407struct gpio_chip {
408 const char *label;
409 struct gpio_device *gpiodev;
410 struct device *parent;
411 struct fwnode_handle *fwnode;
412 struct module *owner;
413
414 int (*request)(struct gpio_chip *gc,
415 unsigned int offset);
416 void (*free)(struct gpio_chip *gc,
417 unsigned int offset);
418 int (*get_direction)(struct gpio_chip *gc,
419 unsigned int offset);
420 int (*direction_input)(struct gpio_chip *gc,
421 unsigned int offset);
422 int (*direction_output)(struct gpio_chip *gc,
423 unsigned int offset, int value);
424 int (*get)(struct gpio_chip *gc,
425 unsigned int offset);
426 int (*get_multiple)(struct gpio_chip *gc,
427 unsigned long *mask,
428 unsigned long *bits);
429 int (*set)(struct gpio_chip *gc,
430 unsigned int offset, int value);
431 int (*set_multiple)(struct gpio_chip *gc,
432 unsigned long *mask,
433 unsigned long *bits);
434 int (*set_config)(struct gpio_chip *gc,
435 unsigned int offset,
436 unsigned long config);
437 int (*to_irq)(struct gpio_chip *gc,
438 unsigned int offset);
439
440 void (*dbg_show)(struct seq_file *s,
441 struct gpio_chip *gc);
442
443 int (*init_valid_mask)(struct gpio_chip *gc,
444 unsigned long *valid_mask,
445 unsigned int ngpios);
446
447 int (*add_pin_ranges)(struct gpio_chip *gc);
448
449 int (*en_hw_timestamp)(struct gpio_chip *gc,
450 u32 offset,
451 unsigned long flags);
452 int (*dis_hw_timestamp)(struct gpio_chip *gc,
453 u32 offset,
454 unsigned long flags);
455 int base;
456 u16 ngpio;
457 u16 offset;
458 const char *const *names;
459 bool can_sleep;
460
461#ifdef CONFIG_GPIOLIB_IRQCHIP
462 /*
463 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
464 * to handle IRQs for most practical cases.
465 */
466
467 /**
468 * @irq:
469 *
470 * Integrates interrupt chip functionality with the GPIO chip. Can be
471 * used to handle IRQs for most practical cases.
472 */
473 struct gpio_irq_chip irq;
474#endif /* CONFIG_GPIOLIB_IRQCHIP */
475
476#if defined(CONFIG_OF_GPIO)
477 /*
478 * If CONFIG_OF_GPIO is enabled, then all GPIO controllers described in
479 * the device tree automatically may have an OF translation
480 */
481
482 /**
483 * @of_gpio_n_cells:
484 *
485 * Number of cells used to form the GPIO specifier. The standard is 2
486 * cells:
487 *
488 * gpios = <&gpio offset flags>;
489 *
490 * some complex GPIO controllers instantiate more than one chip per
491 * device tree node and have 3 cells:
492 *
493 * gpios = <&gpio instance offset flags>;
494 *
495 * Legacy GPIO controllers may even have 1 cell:
496 *
497 * gpios = <&gpio offset>;
498 */
499 unsigned int of_gpio_n_cells;
500
501 /**
502 * @of_node_instance_match:
503 *
504 * Determine if a chip is the right instance. Must be implemented by
505 * any driver using more than one gpio_chip per device tree node.
506 * Returns true if gc is the instance indicated by i (which is the
507 * first cell in the phandles for GPIO lines and gpio-ranges).
508 */
509 bool (*of_node_instance_match)(struct gpio_chip *gc, unsigned int i);
510
511 /**
512 * @of_xlate:
513 *
514 * Callback to translate a device tree GPIO specifier into a chip-
515 * relative GPIO number and flags.
516 */
517 int (*of_xlate)(struct gpio_chip *gc,
518 const struct of_phandle_args *gpiospec, u32 *flags);
519#endif /* CONFIG_OF_GPIO */
520};
521
522char *gpiochip_dup_line_label(struct gpio_chip *gc, unsigned int offset);
523
524
525struct _gpiochip_for_each_data {
526 const char **label;
527 unsigned int *i;
528};
529
530DEFINE_CLASS(_gpiochip_for_each_data,
531 struct _gpiochip_for_each_data,
532 if (*_T.label) kfree(*_T.label),
533 ({
534 struct _gpiochip_for_each_data _data = { label, i };
535 *_data.i = 0;
536 _data;
537 }),
538 const char **label, int *i)
539
540/**
541 * for_each_hwgpio_in_range - Iterates over all GPIOs in a given range
542 * @_chip: Chip to iterate over.
543 * @_i: Loop counter.
544 * @_base: First GPIO in the ranger.
545 * @_size: Amount of GPIOs to check starting from @base.
546 * @_label: Place to store the address of the label if the GPIO is requested.
547 * Set to NULL for unused GPIOs.
548 */
549#define for_each_hwgpio_in_range(_chip, _i, _base, _size, _label) \
550 for (CLASS(_gpiochip_for_each_data, _data)(&_label, &_i); \
551 _i < _size; \
552 _i++, kfree(_label), _label = NULL) \
553 for_each_if(!IS_ERR(_label = gpiochip_dup_line_label(_chip, _base + _i)))
554
555/**
556 * for_each_hwgpio - Iterates over all GPIOs for given chip.
557 * @_chip: Chip to iterate over.
558 * @_i: Loop counter.
559 * @_label: Place to store the address of the label if the GPIO is requested.
560 * Set to NULL for unused GPIOs.
561 */
562#define for_each_hwgpio(_chip, _i, _label) \
563 for_each_hwgpio_in_range(_chip, _i, 0, _chip->ngpio, _label)
564
565/**
566 * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
567 * @_chip: the chip to query
568 * @_i: loop variable
569 * @_base: first GPIO in the range
570 * @_size: amount of GPIOs to check starting from @base
571 * @_label: label of current GPIO
572 */
573#define for_each_requested_gpio_in_range(_chip, _i, _base, _size, _label) \
574 for_each_hwgpio_in_range(_chip, _i, _base, _size, _label) \
575 for_each_if(_label)
576
577/* Iterates over all requested GPIO of the given @chip */
578#define for_each_requested_gpio(chip, i, label) \
579 for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
580
581/* add/remove chips */
582int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
583 struct lock_class_key *lock_key,
584 struct lock_class_key *request_key);
585
586/**
587 * gpiochip_add_data() - register a gpio_chip
588 * @gc: the chip to register, with gc->base initialized
589 * @data: driver-private data associated with this chip
590 *
591 * Context: potentially before irqs will work
592 *
593 * When gpiochip_add_data() is called very early during boot, so that GPIOs
594 * can be freely used, the gc->parent device must be registered before
595 * the gpio framework's arch_initcall(). Otherwise sysfs initialization
596 * for GPIOs will fail rudely.
597 *
598 * gpiochip_add_data() must only be called after gpiolib initialization,
599 * i.e. after core_initcall().
600 *
601 * If gc->base is negative, this requests dynamic assignment of
602 * a range of valid GPIOs.
603 *
604 * Returns:
605 * A negative errno if the chip can't be registered, such as because the
606 * gc->base is invalid or already associated with a different chip.
607 * Otherwise it returns zero as a success code.
608 */
609#ifdef CONFIG_LOCKDEP
610#define gpiochip_add_data(gc, data) ({ \
611 static struct lock_class_key lock_key; \
612 static struct lock_class_key request_key; \
613 gpiochip_add_data_with_key(gc, data, &lock_key, \
614 &request_key); \
615 })
616#define devm_gpiochip_add_data(dev, gc, data) ({ \
617 static struct lock_class_key lock_key; \
618 static struct lock_class_key request_key; \
619 devm_gpiochip_add_data_with_key(dev, gc, data, &lock_key, \
620 &request_key); \
621 })
622#else
623#define gpiochip_add_data(gc, data) gpiochip_add_data_with_key(gc, data, NULL, NULL)
624#define devm_gpiochip_add_data(dev, gc, data) \
625 devm_gpiochip_add_data_with_key(dev, gc, data, NULL, NULL)
626#endif /* CONFIG_LOCKDEP */
627
628void gpiochip_remove(struct gpio_chip *gc);
629int devm_gpiochip_add_data_with_key(struct device *dev, struct gpio_chip *gc,
630 void *data, struct lock_class_key *lock_key,
631 struct lock_class_key *request_key);
632
633struct gpio_device *gpio_device_find(const void *data,
634 int (*match)(struct gpio_chip *gc,
635 const void *data));
636
637struct gpio_device *gpio_device_get(struct gpio_device *gdev);
638void gpio_device_put(struct gpio_device *gdev);
639
640DEFINE_FREE(gpio_device_put, struct gpio_device *,
641 if (!IS_ERR_OR_NULL(_T)) gpio_device_put(_T))
642
643struct device *gpio_device_to_device(struct gpio_device *gdev);
644
645bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset);
646int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset);
647void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset);
648void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset);
649void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset);
650
651/* irq_data versions of the above */
652int gpiochip_irq_reqres(struct irq_data *data);
653void gpiochip_irq_relres(struct irq_data *data);
654
655/* Paste this in your irq_chip structure */
656#define GPIOCHIP_IRQ_RESOURCE_HELPERS \
657 .irq_request_resources = gpiochip_irq_reqres, \
658 .irq_release_resources = gpiochip_irq_relres
659
660static inline void gpio_irq_chip_set_chip(struct gpio_irq_chip *girq,
661 const struct irq_chip *chip)
662{
663 /* Yes, dropping const is ugly, but it isn't like we have a choice */
664 girq->chip = (struct irq_chip *)chip;
665}
666
667/* Line status inquiry for drivers */
668bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset);
669bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset);
670
671/* Sleep persistence inquiry for drivers */
672bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset);
673bool gpiochip_line_is_valid(const struct gpio_chip *gc, unsigned int offset);
674const unsigned long *gpiochip_query_valid_mask(const struct gpio_chip *gc);
675
676/* get driver data */
677void *gpiochip_get_data(struct gpio_chip *gc);
678
679#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
680
681int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
682 union gpio_irq_fwspec *gfwspec,
683 unsigned int parent_hwirq,
684 unsigned int parent_type);
685int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
686 union gpio_irq_fwspec *gfwspec,
687 unsigned int parent_hwirq,
688 unsigned int parent_type);
689
690#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
691
692#ifdef CONFIG_GPIOLIB_IRQCHIP
693int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
694 struct irq_domain *domain);
695#else
696
697#include <asm/bug.h>
698
699static inline int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
700 struct irq_domain *domain)
701{
702 WARN_ON(1);
703 return -EINVAL;
704}
705#endif
706
707int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset);
708void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset);
709int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
710 unsigned long config);
711
712/**
713 * struct gpio_pin_range - pin range controlled by a gpio chip
714 * @node: list for maintaining set of pin ranges, used internally
715 * @pctldev: pinctrl device which handles corresponding pins
716 * @range: actual range of pins controlled by a gpio controller
717 */
718struct gpio_pin_range {
719 struct list_head node;
720 struct pinctrl_dev *pctldev;
721 struct pinctrl_gpio_range range;
722};
723
724#ifdef CONFIG_PINCTRL
725
726int gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
727 const char *pinctl_name,
728 unsigned int gpio_offset,
729 unsigned int pin_offset,
730 unsigned int const *pins,
731 unsigned int npins);
732int gpiochip_add_pingroup_range(struct gpio_chip *gc,
733 struct pinctrl_dev *pctldev,
734 unsigned int gpio_offset, const char *pin_group);
735void gpiochip_remove_pin_ranges(struct gpio_chip *gc);
736
737static inline int
738gpiochip_add_pin_range(struct gpio_chip *gc,
739 const char *pinctl_name,
740 unsigned int gpio_offset,
741 unsigned int pin_offset,
742 unsigned int npins)
743{
744 return gpiochip_add_pin_range_with_pins(gc, pinctl_name, gpio_offset,
745 pin_offset, NULL, npins);
746}
747
748static inline int
749gpiochip_add_sparse_pin_range(struct gpio_chip *gc,
750 const char *pinctl_name,
751 unsigned int gpio_offset,
752 unsigned int const *pins,
753 unsigned int npins)
754{
755 return gpiochip_add_pin_range_with_pins(gc, pinctl_name, gpio_offset, 0,
756 pins, npins);
757}
758#else /* ! CONFIG_PINCTRL */
759
760static inline int
761gpiochip_add_pin_range_with_pins(struct gpio_chip *gc,
762 const char *pinctl_name,
763 unsigned int gpio_offset,
764 unsigned int pin_offset,
765 unsigned int npins)
766{
767 return 0;
768}
769
770static inline int
771gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
772 unsigned int gpio_offset, unsigned int pin_offset,
773 unsigned int npins)
774{
775 return 0;
776}
777
778static inline int
779gpiochip_add_sparse_pin_range(struct gpio_chip *gc,
780 const char *pinctl_name,
781 unsigned int gpio_offset,
782 unsigned int const *pins,
783 unsigned int npins)
784{
785 return 0;
786}
787
788static inline int
789gpiochip_add_pingroup_range(struct gpio_chip *gc,
790 struct pinctrl_dev *pctldev,
791 unsigned int gpio_offset, const char *pin_group)
792{
793 return 0;
794}
795
796static inline void
797gpiochip_remove_pin_ranges(struct gpio_chip *gc)
798{
799}
800
801#endif /* CONFIG_PINCTRL */
802
803struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
804 unsigned int hwnum,
805 const char *label,
806 enum gpio_lookup_flags lflags,
807 enum gpiod_flags dflags);
808void gpiochip_free_own_desc(struct gpio_desc *desc);
809
810struct gpio_desc *
811gpio_device_get_desc(struct gpio_device *gdev, unsigned int hwnum);
812
813struct gpio_chip *gpio_device_get_chip(struct gpio_device *gdev);
814
815#ifdef CONFIG_GPIOLIB
816
817/* lock/unlock as IRQ */
818int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset);
819void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset);
820
821struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
822struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc);
823
824/* struct gpio_device getters */
825int gpio_device_get_base(struct gpio_device *gdev);
826const char *gpio_device_get_label(struct gpio_device *gdev);
827
828struct gpio_device *gpio_device_find_by_label(const char *label);
829struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode);
830
831#else /* CONFIG_GPIOLIB */
832
833#include <asm/bug.h>
834
835static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
836{
837 /* GPIO can never have been requested */
838 WARN_ON(1);
839 return ERR_PTR(-ENODEV);
840}
841
842static inline struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc)
843{
844 WARN_ON(1);
845 return ERR_PTR(-ENODEV);
846}
847
848static inline int gpio_device_get_base(struct gpio_device *gdev)
849{
850 WARN_ON(1);
851 return -ENODEV;
852}
853
854static inline const char *gpio_device_get_label(struct gpio_device *gdev)
855{
856 WARN_ON(1);
857 return NULL;
858}
859
860static inline struct gpio_device *gpio_device_find_by_label(const char *label)
861{
862 WARN_ON(1);
863 return NULL;
864}
865
866static inline struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode)
867{
868 WARN_ON(1);
869 return NULL;
870}
871
872static inline int gpiochip_lock_as_irq(struct gpio_chip *gc,
873 unsigned int offset)
874{
875 WARN_ON(1);
876 return -EINVAL;
877}
878
879static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc,
880 unsigned int offset)
881{
882 WARN_ON(1);
883}
884#endif /* CONFIG_GPIOLIB */
885
886#define for_each_gpiochip_node(dev, child) \
887 device_for_each_child_node(dev, child) \
888 for_each_if(fwnode_property_present(child, "gpio-controller"))
889
890static inline unsigned int gpiochip_node_count(struct device *dev)
891{
892 struct fwnode_handle *child;
893 unsigned int count = 0;
894
895 for_each_gpiochip_node(dev, child)
896 count++;
897
898 return count;
899}
900
901static inline struct fwnode_handle *gpiochip_node_get_first(struct device *dev)
902{
903 struct fwnode_handle *fwnode;
904
905 for_each_gpiochip_node(dev, fwnode)
906 return fwnode;
907
908 return NULL;
909}
910
911#endif /* __LINUX_GPIO_DRIVER_H */