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1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef LINUX_MSI_H 3#define LINUX_MSI_H 4 5/* 6 * This header file contains MSI data structures and functions which are 7 * only relevant for: 8 * - Interrupt core code 9 * - PCI/MSI core code 10 * - MSI interrupt domain implementations 11 * - IOMMU, low level VFIO, NTB and other justified exceptions 12 * dealing with low level MSI details. 13 * 14 * Regular device drivers have no business with any of these functions and 15 * especially storing MSI descriptor pointers in random code is considered 16 * abuse. 17 * 18 * Device driver relevant functions are available in <linux/msi_api.h> 19 */ 20 21#include <linux/irqdomain_defs.h> 22#include <linux/cpumask_types.h> 23#include <linux/msi_api.h> 24#include <linux/irq.h> 25 26#include <asm/msi.h> 27 28/* Dummy shadow structures if an architecture does not define them */ 29#ifndef arch_msi_msg_addr_lo 30typedef struct arch_msi_msg_addr_lo { 31 u32 address_lo; 32} __attribute__ ((packed)) arch_msi_msg_addr_lo_t; 33#endif 34 35#ifndef arch_msi_msg_addr_hi 36typedef struct arch_msi_msg_addr_hi { 37 u32 address_hi; 38} __attribute__ ((packed)) arch_msi_msg_addr_hi_t; 39#endif 40 41#ifndef arch_msi_msg_data 42typedef struct arch_msi_msg_data { 43 u32 data; 44} __attribute__ ((packed)) arch_msi_msg_data_t; 45#endif 46 47#ifndef arch_is_isolated_msi 48#define arch_is_isolated_msi() false 49#endif 50 51/** 52 * struct msi_msg - Representation of a MSI message 53 * @address_lo: Low 32 bits of msi message address 54 * @arch_addr_lo: Architecture specific shadow of @address_lo 55 * @address_hi: High 32 bits of msi message address 56 * (only used when device supports it) 57 * @arch_addr_hi: Architecture specific shadow of @address_hi 58 * @data: MSI message data (usually 16 bits) 59 * @arch_data: Architecture specific shadow of @data 60 */ 61struct msi_msg { 62 union { 63 u32 address_lo; 64 arch_msi_msg_addr_lo_t arch_addr_lo; 65 }; 66 union { 67 u32 address_hi; 68 arch_msi_msg_addr_hi_t arch_addr_hi; 69 }; 70 union { 71 u32 data; 72 arch_msi_msg_data_t arch_data; 73 }; 74}; 75 76/* Helper functions */ 77struct msi_desc; 78struct pci_dev; 79struct device_attribute; 80struct irq_domain; 81struct irq_affinity_desc; 82 83void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); 84#ifdef CONFIG_GENERIC_MSI_IRQ 85void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); 86#else 87static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { } 88#endif 89 90typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc, 91 struct msi_msg *msg); 92 93/** 94 * struct pci_msi_desc - PCI/MSI specific MSI descriptor data 95 * 96 * @msi_mask: [PCI MSI] MSI cached mask bits 97 * @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits 98 * @is_msix: [PCI MSI/X] True if MSI-X 99 * @multiple: [PCI MSI/X] log2 num of messages allocated 100 * @multi_cap: [PCI MSI/X] log2 num of messages supported 101 * @can_mask: [PCI MSI/X] Masking supported? 102 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit 103 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq 104 * @msi_attrib: [PCI MSI/X] Compound struct of MSI/X attributes 105 * @mask_pos: [PCI MSI] Mask register position 106 * @mask_base: [PCI MSI-X] Mask register base address 107 */ 108struct pci_msi_desc { 109 union { 110 u32 msi_mask; 111 u32 msix_ctrl; 112 }; 113 struct { 114 u8 is_msix : 1; 115 u8 multiple : 3; 116 u8 multi_cap : 3; 117 u8 can_mask : 1; 118 u8 is_64 : 1; 119 u8 is_virtual : 1; 120 unsigned default_irq; 121 } msi_attrib; 122 union { 123 u8 mask_pos; 124 void __iomem *mask_base; 125 }; 126}; 127 128/** 129 * union msi_domain_cookie - Opaque MSI domain specific data 130 * @value: u64 value store 131 * @ptr: Pointer to domain specific data 132 * @iobase: Domain specific IOmem pointer 133 * 134 * The content of this data is implementation defined and used by the MSI 135 * domain to store domain specific information which is requried for 136 * interrupt chip callbacks. 137 */ 138union msi_domain_cookie { 139 u64 value; 140 void *ptr; 141 void __iomem *iobase; 142}; 143 144/** 145 * struct msi_desc_data - Generic MSI descriptor data 146 * @dcookie: Cookie for MSI domain specific data which is required 147 * for irq_chip callbacks 148 * @icookie: Cookie for the MSI interrupt instance provided by 149 * the usage site to the allocation function 150 * 151 * The content of this data is implementation defined, e.g. PCI/IMS 152 * implementations define the meaning of the data. The MSI core ignores 153 * this data completely. 154 */ 155struct msi_desc_data { 156 union msi_domain_cookie dcookie; 157 union msi_instance_cookie icookie; 158}; 159 160#define MSI_MAX_INDEX ((unsigned int)USHRT_MAX) 161 162/** 163 * struct msi_desc - Descriptor structure for MSI based interrupts 164 * @irq: The base interrupt number 165 * @nvec_used: The number of vectors used 166 * @dev: Pointer to the device which uses this descriptor 167 * @msg: The last set MSI message cached for reuse 168 * @affinity: Optional pointer to a cpu affinity mask for this descriptor 169 * @iommu_msi_iova: Optional shifted IOVA from the IOMMU to override the msi_addr. 170 * Only used if iommu_msi_shift != 0 171 * @iommu_msi_shift: Indicates how many bits of the original address should be 172 * preserved when using iommu_msi_iova. 173 * @sysfs_attrs: Pointer to sysfs device attribute 174 * 175 * @write_msi_msg: Callback that may be called when the MSI message 176 * address or data changes 177 * @write_msi_msg_data: Data parameter for the callback. 178 * 179 * @msi_index: Index of the msi descriptor 180 * @pci: PCI specific msi descriptor data 181 * @data: Generic MSI descriptor data 182 */ 183struct msi_desc { 184 /* Shared device/bus type independent data */ 185 unsigned int irq; 186 unsigned int nvec_used; 187 struct device *dev; 188 struct msi_msg msg; 189 struct irq_affinity_desc *affinity; 190#ifdef CONFIG_IRQ_MSI_IOMMU 191 u64 iommu_msi_iova : 58; 192 u64 iommu_msi_shift : 6; 193#endif 194#ifdef CONFIG_SYSFS 195 struct device_attribute *sysfs_attrs; 196#endif 197 198 void (*write_msi_msg)(struct msi_desc *entry, void *data); 199 void *write_msi_msg_data; 200 201 u16 msi_index; 202 union { 203 struct pci_msi_desc pci; 204 struct msi_desc_data data; 205 }; 206}; 207 208/* 209 * Filter values for the MSI descriptor iterators and accessor functions. 210 */ 211enum msi_desc_filter { 212 /* All descriptors */ 213 MSI_DESC_ALL, 214 /* Descriptors which have no interrupt associated */ 215 MSI_DESC_NOTASSOCIATED, 216 /* Descriptors which have an interrupt associated */ 217 MSI_DESC_ASSOCIATED, 218}; 219 220 221/** 222 * struct msi_dev_domain - The internals of MSI domain info per device 223 * @store: Xarray for storing MSI descriptor pointers 224 * @domain: Pointer to a per device interrupt domain 225 */ 226struct msi_dev_domain { 227 struct xarray store; 228 struct irq_domain *domain; 229}; 230 231int msi_setup_device_data(struct device *dev); 232 233void __msi_lock_descs(struct device *dev); 234void __msi_unlock_descs(struct device *dev); 235 236DEFINE_LOCK_GUARD_1(msi_descs_lock, struct device, __msi_lock_descs(_T->lock), 237 __msi_unlock_descs(_T->lock)); 238 239struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid, 240 enum msi_desc_filter filter); 241 242/** 243 * msi_first_desc - Get the first MSI descriptor of the default irqdomain 244 * @dev: Device to operate on 245 * @filter: Descriptor state filter 246 * 247 * Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs() 248 * must be invoked before the call. 249 * 250 * Return: Pointer to the first MSI descriptor matching the search 251 * criteria, NULL if none found. 252 */ 253static inline struct msi_desc *msi_first_desc(struct device *dev, 254 enum msi_desc_filter filter) 255{ 256 return msi_domain_first_desc(dev, MSI_DEFAULT_DOMAIN, filter); 257} 258 259struct msi_desc *msi_next_desc(struct device *dev, unsigned int domid, 260 enum msi_desc_filter filter); 261 262/** 263 * msi_domain_for_each_desc - Iterate the MSI descriptors in a specific domain 264 * 265 * @desc: struct msi_desc pointer used as iterator 266 * @dev: struct device pointer - device to iterate 267 * @domid: The id of the interrupt domain which should be walked. 268 * @filter: Filter for descriptor selection 269 * 270 * Notes: 271 * - The loop must be protected with a msi_lock_descs()/msi_unlock_descs() 272 * pair. 273 * - It is safe to remove a retrieved MSI descriptor in the loop. 274 */ 275#define msi_domain_for_each_desc(desc, dev, domid, filter) \ 276 for ((desc) = msi_domain_first_desc((dev), (domid), (filter)); (desc); \ 277 (desc) = msi_next_desc((dev), (domid), (filter))) 278 279/** 280 * msi_for_each_desc - Iterate the MSI descriptors in the default irqdomain 281 * 282 * @desc: struct msi_desc pointer used as iterator 283 * @dev: struct device pointer - device to iterate 284 * @filter: Filter for descriptor selection 285 * 286 * Notes: 287 * - The loop must be protected with a msi_lock_descs()/msi_unlock_descs() 288 * pair. 289 * - It is safe to remove a retrieved MSI descriptor in the loop. 290 */ 291#define msi_for_each_desc(desc, dev, filter) \ 292 msi_domain_for_each_desc((desc), (dev), MSI_DEFAULT_DOMAIN, (filter)) 293 294#define msi_desc_to_dev(desc) ((desc)->dev) 295 296static inline void msi_desc_set_iommu_msi_iova(struct msi_desc *desc, u64 msi_iova, 297 unsigned int msi_shift) 298{ 299#ifdef CONFIG_IRQ_MSI_IOMMU 300 desc->iommu_msi_iova = msi_iova >> msi_shift; 301 desc->iommu_msi_shift = msi_shift; 302#endif 303} 304 305/** 306 * msi_msg_set_addr() - Set MSI address in an MSI message 307 * 308 * @desc: MSI descriptor that may carry an IOVA base address for MSI via @iommu_msi_iova/shift 309 * @msg: Target MSI message to set its address_hi and address_lo 310 * @msi_addr: Physical address to set the MSI message 311 * 312 * Notes: 313 * - Override @msi_addr using the IOVA base address in the @desc if @iommu_msi_shift is set 314 * - Otherwise, simply set @msi_addr to @msg 315 */ 316static inline void msi_msg_set_addr(struct msi_desc *desc, struct msi_msg *msg, 317 phys_addr_t msi_addr) 318{ 319#ifdef CONFIG_IRQ_MSI_IOMMU 320 if (desc->iommu_msi_shift) { 321 u64 msi_iova = desc->iommu_msi_iova << desc->iommu_msi_shift; 322 323 msg->address_hi = upper_32_bits(msi_iova); 324 msg->address_lo = lower_32_bits(msi_iova) | 325 (msi_addr & ((1 << desc->iommu_msi_shift) - 1)); 326 return; 327 } 328#endif 329 msg->address_hi = upper_32_bits(msi_addr); 330 msg->address_lo = lower_32_bits(msi_addr); 331} 332 333int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid, 334 struct msi_desc *init_desc); 335/** 336 * msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the 337 * default irqdomain and insert it at @init_desc->msi_index 338 * @dev: Pointer to the device for which the descriptor is allocated 339 * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor 340 * 341 * Return: 0 on success or an appropriate failure code. 342 */ 343static inline int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc) 344{ 345 return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc); 346} 347 348void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid, 349 unsigned int first, unsigned int last); 350 351/** 352 * msi_free_msi_descs_range - Free a range of MSI descriptors of a device 353 * in the default irqdomain 354 * 355 * @dev: Device for which to free the descriptors 356 * @first: Index to start freeing from (inclusive) 357 * @last: Last index to be freed (inclusive) 358 */ 359static inline void msi_free_msi_descs_range(struct device *dev, unsigned int first, 360 unsigned int last) 361{ 362 msi_domain_free_msi_descs_range(dev, MSI_DEFAULT_DOMAIN, first, last); 363} 364 365/** 366 * msi_free_msi_descs - Free all MSI descriptors of a device in the default irqdomain 367 * @dev: Device to free the descriptors 368 */ 369static inline void msi_free_msi_descs(struct device *dev) 370{ 371 msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX); 372} 373 374/* 375 * The arch hooks to setup up msi irqs. Default functions are implemented 376 * as weak symbols so that they /can/ be overriden by architecture specific 377 * code if needed. These hooks can only be enabled by the architecture. 378 * 379 * If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by 380 * stubs with warnings. 381 */ 382#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS 383int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); 384void arch_teardown_msi_irq(unsigned int irq); 385int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); 386void arch_teardown_msi_irqs(struct pci_dev *dev); 387#endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */ 388 389/* 390 * Xen uses non-default msi_domain_ops and hence needs a way to populate sysfs 391 * entries of MSI IRQs. 392 */ 393#if defined(CONFIG_PCI_XEN) || defined(CONFIG_PCI_MSI_ARCH_FALLBACKS) 394#ifdef CONFIG_SYSFS 395int msi_device_populate_sysfs(struct device *dev); 396void msi_device_destroy_sysfs(struct device *dev); 397#else /* CONFIG_SYSFS */ 398static inline int msi_device_populate_sysfs(struct device *dev) { return 0; } 399static inline void msi_device_destroy_sysfs(struct device *dev) { } 400#endif /* !CONFIG_SYSFS */ 401#endif /* CONFIG_PCI_XEN || CONFIG_PCI_MSI_ARCH_FALLBACKS */ 402 403/* 404 * The restore hook is still available even for fully irq domain based 405 * setups. Courtesy to XEN/X86. 406 */ 407bool arch_restore_msi_irqs(struct pci_dev *dev); 408 409#ifdef CONFIG_GENERIC_MSI_IRQ 410 411#include <linux/irqhandler.h> 412 413struct irq_domain; 414struct irq_domain_ops; 415struct irq_chip; 416struct irq_fwspec; 417struct device_node; 418struct fwnode_handle; 419struct msi_domain_info; 420 421/** 422 * struct msi_domain_ops - MSI interrupt domain callbacks 423 * @get_hwirq: Retrieve the resulting hw irq number 424 * @msi_init: Domain specific init function for MSI interrupts 425 * @msi_free: Domain specific function to free a MSI interrupts 426 * @msi_prepare: Prepare the allocation of the interrupts in the domain 427 * @msi_teardown: Reverse the effects of @msi_prepare 428 * @prepare_desc: Optional function to prepare the allocated MSI descriptor 429 * in the domain 430 * @set_desc: Set the msi descriptor for an interrupt 431 * @domain_alloc_irqs: Optional function to override the default allocation 432 * function. 433 * @domain_free_irqs: Optional function to override the default free 434 * function. 435 * @msi_translate: Optional translate callback to support the odd wire to 436 * MSI bridges, e.g. MBIGEN 437 * 438 * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying 439 * irqdomain. 440 * 441 * @msi_check, @msi_prepare, @msi_teardown, @prepare_desc and 442 * @set_desc are callbacks used by the msi_domain_alloc/free_irqs*() 443 * variants. 444 * 445 * @domain_alloc_irqs, @domain_free_irqs can be used to override the 446 * default allocation/free functions (__msi_domain_alloc/free_irqs). This 447 * is initially for a wrapper around XENs seperate MSI universe which can't 448 * be wrapped into the regular irq domains concepts by mere mortals. This 449 * allows to universally use msi_domain_alloc/free_irqs without having to 450 * special case XEN all over the place. 451 */ 452struct msi_domain_ops { 453 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, 454 msi_alloc_info_t *arg); 455 int (*msi_init)(struct irq_domain *domain, 456 struct msi_domain_info *info, 457 unsigned int virq, irq_hw_number_t hwirq, 458 msi_alloc_info_t *arg); 459 void (*msi_free)(struct irq_domain *domain, 460 struct msi_domain_info *info, 461 unsigned int virq); 462 int (*msi_prepare)(struct irq_domain *domain, 463 struct device *dev, int nvec, 464 msi_alloc_info_t *arg); 465 void (*msi_teardown)(struct irq_domain *domain, 466 msi_alloc_info_t *arg); 467 void (*prepare_desc)(struct irq_domain *domain, msi_alloc_info_t *arg, 468 struct msi_desc *desc); 469 void (*set_desc)(msi_alloc_info_t *arg, 470 struct msi_desc *desc); 471 int (*domain_alloc_irqs)(struct irq_domain *domain, 472 struct device *dev, int nvec); 473 void (*domain_free_irqs)(struct irq_domain *domain, 474 struct device *dev); 475 int (*msi_translate)(struct irq_domain *domain, struct irq_fwspec *fwspec, 476 irq_hw_number_t *hwirq, unsigned int *type); 477}; 478 479/** 480 * struct msi_domain_info - MSI interrupt domain data 481 * @flags: Flags to decribe features and capabilities 482 * @bus_token: The domain bus token 483 * @hwsize: The hardware table size or the software index limit. 484 * If 0 then the size is considered unlimited and 485 * gets initialized to the maximum software index limit 486 * by the domain creation code. 487 * @ops: The callback data structure 488 * @dev: Device which creates the domain 489 * @chip: Optional: associated interrupt chip 490 * @chip_data: Optional: associated interrupt chip data 491 * @handler: Optional: associated interrupt flow handler 492 * @handler_data: Optional: associated interrupt flow handler data 493 * @handler_name: Optional: associated interrupt flow handler name 494 * @alloc_data: Optional: associated interrupt allocation data 495 * @data: Optional: domain specific data 496 */ 497struct msi_domain_info { 498 u32 flags; 499 enum irq_domain_bus_token bus_token; 500 unsigned int hwsize; 501 struct msi_domain_ops *ops; 502 struct device *dev; 503 struct irq_chip *chip; 504 void *chip_data; 505 irq_flow_handler_t handler; 506 void *handler_data; 507 const char *handler_name; 508 msi_alloc_info_t *alloc_data; 509 void *data; 510}; 511 512/** 513 * struct msi_domain_template - Template for MSI device domains 514 * @name: Storage for the resulting name. Filled in by the core. 515 * @chip: Interrupt chip for this domain 516 * @ops: MSI domain ops 517 * @info: MSI domain info data 518 * @alloc_info: MSI domain allocation data (architecture specific) 519 */ 520struct msi_domain_template { 521 char name[48]; 522 struct irq_chip chip; 523 struct msi_domain_ops ops; 524 struct msi_domain_info info; 525 msi_alloc_info_t alloc_info; 526}; 527 528/* 529 * Flags for msi_domain_info 530 * 531 * Bit 0-15: Generic MSI functionality which is not subject to restriction 532 * by parent domains 533 * 534 * Bit 16-31: Functionality which depends on the underlying parent domain and 535 * can be masked out by msi_parent_ops::init_dev_msi_info() when 536 * a device MSI domain is initialized. 537 */ 538enum { 539 /* 540 * Init non implemented ops callbacks with default MSI domain 541 * callbacks. 542 */ 543 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0), 544 /* 545 * Init non implemented chip callbacks with default MSI chip 546 * callbacks. 547 */ 548 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1), 549 /* Needs early activate, required for PCI */ 550 MSI_FLAG_ACTIVATE_EARLY = (1 << 2), 551 /* 552 * Must reactivate when irq is started even when 553 * MSI_FLAG_ACTIVATE_EARLY has been set. 554 */ 555 MSI_FLAG_MUST_REACTIVATE = (1 << 3), 556 /* Populate sysfs on alloc() and destroy it on free() */ 557 MSI_FLAG_DEV_SYSFS = (1 << 4), 558 /* Allocate simple MSI descriptors */ 559 MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS = (1 << 5), 560 /* Free MSI descriptors */ 561 MSI_FLAG_FREE_MSI_DESCS = (1 << 6), 562 /* Use dev->fwnode for MSI device domain creation */ 563 MSI_FLAG_USE_DEV_FWNODE = (1 << 7), 564 /* Set parent->dev into domain->pm_dev on device domain creation */ 565 MSI_FLAG_PARENT_PM_DEV = (1 << 8), 566 /* Support for parent mask/unmask */ 567 MSI_FLAG_PCI_MSI_MASK_PARENT = (1 << 9), 568 /* Support for parent startup/shutdown */ 569 MSI_FLAG_PCI_MSI_STARTUP_PARENT = (1 << 10), 570 571 /* Mask for the generic functionality */ 572 MSI_GENERIC_FLAGS_MASK = GENMASK(15, 0), 573 574 /* Mask for the domain specific functionality */ 575 MSI_DOMAIN_FLAGS_MASK = GENMASK(31, 16), 576 577 /* Support multiple PCI MSI interrupts */ 578 MSI_FLAG_MULTI_PCI_MSI = (1 << 16), 579 /* Support PCI MSIX interrupts */ 580 MSI_FLAG_PCI_MSIX = (1 << 17), 581 /* Is level-triggered capable, using two messages */ 582 MSI_FLAG_LEVEL_CAPABLE = (1 << 18), 583 /* MSI-X entries must be contiguous */ 584 MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19), 585 /* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */ 586 MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20), 587 /* PCI MSIs cannot be steered separately to CPU cores */ 588 MSI_FLAG_NO_AFFINITY = (1 << 21), 589 /* Inhibit usage of entry masking */ 590 MSI_FLAG_NO_MASK = (1 << 22), 591}; 592 593/* 594 * Flags for msi_parent_ops::chip_flags 595 */ 596enum { 597 MSI_CHIP_FLAG_SET_EOI = (1 << 0), 598 MSI_CHIP_FLAG_SET_ACK = (1 << 1), 599}; 600 601/** 602 * struct msi_parent_ops - MSI parent domain callbacks and configuration info 603 * 604 * @supported_flags: Required: The supported MSI flags of the parent domain 605 * @required_flags: Optional: The required MSI flags of the parent MSI domain 606 * @chip_flags: Optional: Select MSI chip callbacks to update with defaults 607 * in msi_lib_init_dev_msi_info(). 608 * @bus_select_token: Optional: The bus token of the real parent domain for 609 * irq_domain::select() 610 * @bus_select_mask: Optional: A mask of supported BUS_DOMAINs for 611 * irq_domain::select() 612 * @prefix: Optional: Prefix for the domain and chip name 613 * @init_dev_msi_info: Required: Callback for MSI parent domains to setup parent 614 * domain specific domain flags, domain ops and interrupt chip 615 * callbacks when a per device domain is created. 616 */ 617struct msi_parent_ops { 618 u32 supported_flags; 619 u32 required_flags; 620 u32 chip_flags; 621 u32 bus_select_token; 622 u32 bus_select_mask; 623 const char *prefix; 624 bool (*init_dev_msi_info)(struct device *dev, struct irq_domain *domain, 625 struct irq_domain *msi_parent_domain, 626 struct msi_domain_info *msi_child_info); 627}; 628 629bool msi_parent_init_dev_msi_info(struct device *dev, struct irq_domain *domain, 630 struct irq_domain *msi_parent_domain, 631 struct msi_domain_info *msi_child_info); 632 633int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, 634 bool force); 635 636struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, 637 struct msi_domain_info *info, 638 struct irq_domain *parent); 639 640struct irq_domain_info; 641struct irq_domain *msi_create_parent_irq_domain(struct irq_domain_info *info, 642 const struct msi_parent_ops *msi_parent_ops); 643 644bool msi_create_device_irq_domain(struct device *dev, unsigned int domid, 645 const struct msi_domain_template *template, 646 unsigned int hwsize, void *domain_data, 647 void *chip_data); 648void msi_remove_device_irq_domain(struct device *dev, unsigned int domid); 649 650bool msi_match_device_irq_domain(struct device *dev, unsigned int domid, 651 enum irq_domain_bus_token bus_token); 652 653int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid, 654 unsigned int first, unsigned int last); 655int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid, 656 unsigned int first, unsigned int last); 657int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs); 658 659struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, unsigned int index, 660 const struct irq_affinity_desc *affdesc, 661 union msi_instance_cookie *cookie); 662 663void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid, 664 unsigned int first, unsigned int last); 665void msi_domain_free_irqs_range(struct device *dev, unsigned int domid, 666 unsigned int first, unsigned int last); 667void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid); 668void msi_domain_free_irqs_all(struct device *dev, unsigned int domid); 669 670struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); 671 672/* Per device platform MSI */ 673int platform_device_msi_init_and_alloc_irqs(struct device *dev, unsigned int nvec, 674 irq_write_msi_msg_t write_msi_msg); 675void platform_device_msi_free_irqs_all(struct device *dev); 676 677bool msi_device_has_isolated_msi(struct device *dev); 678 679static inline int msi_domain_alloc_irqs(struct device *dev, unsigned int domid, int nirqs) 680{ 681 return msi_domain_alloc_irqs_range(dev, domid, 0, nirqs - 1); 682} 683 684#else /* CONFIG_GENERIC_MSI_IRQ */ 685static inline bool msi_device_has_isolated_msi(struct device *dev) 686{ 687 /* 688 * Arguably if the platform does not enable MSI support then it has 689 * "isolated MSI", as an interrupt controller that cannot receive MSIs 690 * is inherently isolated by our definition. The default definition for 691 * arch_is_isolated_msi() is conservative and returns false anyhow. 692 */ 693 return arch_is_isolated_msi(); 694} 695#endif /* CONFIG_GENERIC_MSI_IRQ */ 696 697/* PCI specific interfaces */ 698#ifdef CONFIG_PCI_MSI 699struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc); 700void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); 701void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); 702void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); 703void pci_msi_mask_irq(struct irq_data *data); 704void pci_msi_unmask_irq(struct irq_data *data); 705u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev); 706u32 pci_msi_map_rid_ctlr_node(struct irq_domain *domain, struct pci_dev *pdev, 707 struct fwnode_handle **node); 708struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev); 709void pci_msix_prepare_desc(struct irq_domain *domain, msi_alloc_info_t *arg, 710 struct msi_desc *desc); 711#else /* CONFIG_PCI_MSI */ 712static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev) 713{ 714 return NULL; 715} 716static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) { } 717#endif /* !CONFIG_PCI_MSI */ 718 719#endif /* LINUX_MSI_H */