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1========================
2The Common Clk Framework
3========================
4
5:Author: Mike Turquette <mturquette@ti.com>
6
7This document endeavours to explain the common clk framework details,
8and how to port a platform over to this framework. It is not yet a
9detailed explanation of the clock api in include/linux/clk.h, but
10perhaps someday it will include that information.
11
12Introduction and interface split
13================================
14
15The common clk framework is an interface to control the clock nodes
16available on various devices today. This may come in the form of clock
17gating, rate adjustment, muxing or other operations. This framework is
18enabled with the CONFIG_COMMON_CLK option.
19
20The interface itself is divided into two halves, each shielded from the
21details of its counterpart. First is the common definition of struct
22clk which unifies the framework-level accounting and infrastructure that
23has traditionally been duplicated across a variety of platforms. Second
24is a common implementation of the clk.h api, defined in
25drivers/clk/clk.c. Finally there is struct clk_ops, whose operations
26are invoked by the clk api implementation.
27
28The second half of the interface is comprised of the hardware-specific
29callbacks registered with struct clk_ops and the corresponding
30hardware-specific structures needed to model a particular clock. For
31the remainder of this document any reference to a callback in struct
32clk_ops, such as .enable or .set_rate, implies the hardware-specific
33implementation of that code. Likewise, references to struct clk_foo
34serve as a convenient shorthand for the implementation of the
35hardware-specific bits for the hypothetical "foo" hardware.
36
37Tying the two halves of this interface together is struct clk_hw, which
38is defined in struct clk_foo and pointed to within struct clk_core. This
39allows for easy navigation between the two discrete halves of the common
40clock interface.
41
42Common data structures and api
43==============================
44
45Below is the common struct clk_core definition from
46drivers/clk/clk.c, modified for brevity::
47
48 struct clk_core {
49 const char *name;
50 const struct clk_ops *ops;
51 struct clk_hw *hw;
52 struct module *owner;
53 struct clk_core *parent;
54 const char **parent_names;
55 struct clk_core **parents;
56 u8 num_parents;
57 u8 new_parent_index;
58 ...
59 };
60
61The members above make up the core of the clk tree topology. The clk
62api itself defines several driver-facing functions which operate on
63struct clk. That api is documented in include/linux/clk.h.
64
65Platforms and devices utilizing the common struct clk_core use the struct
66clk_ops pointer in struct clk_core to perform the hardware-specific parts of
67the operations defined in clk-provider.h::
68
69 struct clk_ops {
70 int (*prepare)(struct clk_hw *hw);
71 void (*unprepare)(struct clk_hw *hw);
72 int (*is_prepared)(struct clk_hw *hw);
73 void (*unprepare_unused)(struct clk_hw *hw);
74 int (*enable)(struct clk_hw *hw);
75 void (*disable)(struct clk_hw *hw);
76 int (*is_enabled)(struct clk_hw *hw);
77 void (*disable_unused)(struct clk_hw *hw);
78 unsigned long (*recalc_rate)(struct clk_hw *hw,
79 unsigned long parent_rate);
80 int (*determine_rate)(struct clk_hw *hw,
81 struct clk_rate_request *req);
82 int (*set_parent)(struct clk_hw *hw, u8 index);
83 u8 (*get_parent)(struct clk_hw *hw);
84 int (*set_rate)(struct clk_hw *hw,
85 unsigned long rate,
86 unsigned long parent_rate);
87 int (*set_rate_and_parent)(struct clk_hw *hw,
88 unsigned long rate,
89 unsigned long parent_rate,
90 u8 index);
91 unsigned long (*recalc_accuracy)(struct clk_hw *hw,
92 unsigned long parent_accuracy);
93 int (*get_phase)(struct clk_hw *hw);
94 int (*set_phase)(struct clk_hw *hw, int degrees);
95 void (*init)(struct clk_hw *hw);
96 void (*debug_init)(struct clk_hw *hw,
97 struct dentry *dentry);
98 };
99
100Hardware clk implementations
101============================
102
103The strength of the common struct clk_core comes from its .ops and .hw pointers
104which abstract the details of struct clk from the hardware-specific bits, and
105vice versa. To illustrate consider the simple gateable clk implementation in
106drivers/clk/clk-gate.c::
107
108 struct clk_gate {
109 struct clk_hw hw;
110 void __iomem *reg;
111 u8 bit_idx;
112 ...
113 };
114
115struct clk_gate contains struct clk_hw hw as well as hardware-specific
116knowledge about which register and bit controls this clk's gating.
117Nothing about clock topology or accounting, such as enable_count or
118notifier_count, is needed here. That is all handled by the common
119framework code and struct clk_core.
120
121Let's walk through enabling this clk from driver code::
122
123 struct clk *clk;
124 clk = clk_get(NULL, "my_gateable_clk");
125
126 clk_prepare(clk);
127 clk_enable(clk);
128
129The call graph for clk_enable is very simple::
130
131 clk_enable(clk);
132 clk->ops->enable(clk->hw);
133 [resolves to...]
134 clk_gate_enable(hw);
135 [resolves struct clk gate with to_clk_gate(hw)]
136 clk_gate_set_bit(gate);
137
138And the definition of clk_gate_set_bit::
139
140 static void clk_gate_set_bit(struct clk_gate *gate)
141 {
142 u32 reg;
143
144 reg = __raw_readl(gate->reg);
145 reg |= BIT(gate->bit_idx);
146 writel(reg, gate->reg);
147 }
148
149Note that to_clk_gate is defined as::
150
151 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
152
153This pattern of abstraction is used for every clock hardware
154representation.
155
156Supporting your own clk hardware
157================================
158
159When implementing support for a new type of clock it is only necessary to
160include the following header::
161
162 #include <linux/clk-provider.h>
163
164To construct a clk hardware structure for your platform you must define
165the following::
166
167 struct clk_foo {
168 struct clk_hw hw;
169 ... hardware specific data goes here ...
170 };
171
172To take advantage of your data you'll need to support valid operations
173for your clk::
174
175 struct clk_ops clk_foo_ops = {
176 .enable = &clk_foo_enable,
177 .disable = &clk_foo_disable,
178 };
179
180Implement the above functions using container_of::
181
182 #define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)
183
184 int clk_foo_enable(struct clk_hw *hw)
185 {
186 struct clk_foo *foo;
187
188 foo = to_clk_foo(hw);
189
190 ... perform magic on foo ...
191
192 return 0;
193 };
194
195Below is a matrix detailing which clk_ops are mandatory based upon the
196hardware capabilities of that clock. A cell marked as "y" means
197mandatory, a cell marked as "n" implies that either including that
198callback is invalid or otherwise unnecessary. Empty cells are either
199optional or must be evaluated on a case-by-case basis.
200
201.. table:: clock hardware characteristics
202
203 +----------------+------+-------------+---------------+-------------+------+
204 | | gate | change rate | single parent | multiplexer | root |
205 +================+======+=============+===============+=============+======+
206 |.prepare | | | | | |
207 +----------------+------+-------------+---------------+-------------+------+
208 |.unprepare | | | | | |
209 +----------------+------+-------------+---------------+-------------+------+
210 +----------------+------+-------------+---------------+-------------+------+
211 |.enable | y | | | | |
212 +----------------+------+-------------+---------------+-------------+------+
213 |.disable | y | | | | |
214 +----------------+------+-------------+---------------+-------------+------+
215 |.is_enabled | y | | | | |
216 +----------------+------+-------------+---------------+-------------+------+
217 +----------------+------+-------------+---------------+-------------+------+
218 |.recalc_rate | | y | | | |
219 +----------------+------+-------------+---------------+-------------+------+
220 |.determine_rate | | y | | | |
221 +----------------+------+-------------+---------------+-------------+------+
222 |.set_rate | | y | | | |
223 +----------------+------+-------------+---------------+-------------+------+
224 +----------------+------+-------------+---------------+-------------+------+
225 |.set_parent | | | n | y | n |
226 +----------------+------+-------------+---------------+-------------+------+
227 |.get_parent | | | n | y | n |
228 +----------------+------+-------------+---------------+-------------+------+
229 +----------------+------+-------------+---------------+-------------+------+
230 |.recalc_accuracy| | | | | |
231 +----------------+------+-------------+---------------+-------------+------+
232 +----------------+------+-------------+---------------+-------------+------+
233 |.init | | | | | |
234 +----------------+------+-------------+---------------+-------------+------+
235
236Finally, register your clock at run-time with a hardware-specific
237registration function. This function simply populates struct clk_foo's
238data and then passes the common struct clk parameters to the framework
239with a call to::
240
241 clk_register(...)
242
243See the basic clock types in ``drivers/clk/clk-*.c`` for examples.
244
245Disabling clock gating of unused clocks
246=======================================
247
248Sometimes during development it can be useful to be able to bypass the
249default disabling of unused clocks. For example, if drivers aren't enabling
250clocks properly but rely on them being on from the bootloader, bypassing
251the disabling means that the driver will remain functional while the issues
252are sorted out.
253
254You can see which clocks have been disabled by booting your kernel with these
255parameters::
256
257 tp_printk trace_event=clk:clk_disable
258
259To bypass this disabling, include "clk_ignore_unused" in the bootargs to the
260kernel.
261
262Locking
263=======
264
265The common clock framework uses two global locks, the prepare lock and the
266enable lock.
267
268The enable lock is a spinlock and is held across calls to the .enable,
269.disable operations. Those operations are thus not allowed to sleep,
270and calls to the clk_enable(), clk_disable() API functions are allowed in
271atomic context.
272
273For clk_is_enabled() API, it is also designed to be allowed to be used in
274atomic context. However, it doesn't really make any sense to hold the enable
275lock in core, unless you want to do something else with the information of
276the enable state with that lock held. Otherwise, seeing if a clk is enabled is
277a one-shot read of the enabled state, which could just as easily change after
278the function returns because the lock is released. Thus the user of this API
279needs to handle synchronizing the read of the state with whatever they're
280using it for to make sure that the enable state doesn't change during that
281time.
282
283The prepare lock is a mutex and is held across calls to all other operations.
284All those operations are allowed to sleep, and calls to the corresponding API
285functions are not allowed in atomic context.
286
287This effectively divides operations in two groups from a locking perspective.
288
289Drivers don't need to manually protect resources shared between the operations
290of one group, regardless of whether those resources are shared by multiple
291clocks or not. However, access to resources that are shared between operations
292of the two groups needs to be protected by the drivers. An example of such a
293resource would be a register that controls both the clock rate and the clock
294enable/disable state.
295
296The clock framework is reentrant, in that a driver is allowed to call clock
297framework functions from within its implementation of clock operations. This
298can for instance cause a .set_rate operation of one clock being called from
299within the .set_rate operation of another clock. This case must be considered
300in the driver implementations, but the code flow is usually controlled by the
301driver in that case.
302
303Note that locking must also be considered when code outside of the common
304clock framework needs to access resources used by the clock operations. This
305is considered out of scope of this document.