Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * cacheinfo support - processor cache information via sysfs
4 *
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
6 * Author: Sudeep Holla <sudeep.holla@arm.com>
7 */
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/acpi.h>
11#include <linux/bitfield.h>
12#include <linux/bitops.h>
13#include <linux/cacheinfo.h>
14#include <linux/compiler.h>
15#include <linux/cpu.h>
16#include <linux/device.h>
17#include <linux/init.h>
18#include <linux/of.h>
19#include <linux/sched.h>
20#include <linux/slab.h>
21#include <linux/smp.h>
22#include <linux/sysfs.h>
23
24/* pointer to per cpu cacheinfo */
25static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
26#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
27#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
28#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
29#define per_cpu_cacheinfo_idx(cpu, idx) \
30 (per_cpu_cacheinfo(cpu) + (idx))
31
32/* Set if no cache information is found in DT/ACPI. */
33static bool use_arch_info;
34
35struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
36{
37 return ci_cacheinfo(cpu);
38}
39
40static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
41 struct cacheinfo *sib_leaf)
42{
43 /*
44 * For non DT/ACPI systems, assume unique level 1 caches,
45 * system-wide shared caches for all other levels.
46 */
47 if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)) ||
48 use_arch_info)
49 return (this_leaf->level != 1) && (sib_leaf->level != 1);
50
51 if ((sib_leaf->attributes & CACHE_ID) &&
52 (this_leaf->attributes & CACHE_ID))
53 return sib_leaf->id == this_leaf->id;
54
55 return sib_leaf->fw_token == this_leaf->fw_token;
56}
57
58bool last_level_cache_is_valid(unsigned int cpu)
59{
60 struct cacheinfo *llc;
61
62 if (!cache_leaves(cpu) || !per_cpu_cacheinfo(cpu))
63 return false;
64
65 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
66
67 return (llc->attributes & CACHE_ID) || !!llc->fw_token;
68
69}
70
71bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
72{
73 struct cacheinfo *llc_x, *llc_y;
74
75 if (!last_level_cache_is_valid(cpu_x) ||
76 !last_level_cache_is_valid(cpu_y))
77 return false;
78
79 llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1);
80 llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1);
81
82 return cache_leaves_are_shared(llc_x, llc_y);
83}
84
85#ifdef CONFIG_OF
86
87static bool of_check_cache_nodes(struct device_node *np);
88
89/* OF properties to query for a given cache type */
90struct cache_type_info {
91 const char *size_prop;
92 const char *line_size_props[2];
93 const char *nr_sets_prop;
94};
95
96static const struct cache_type_info cache_type_info[] = {
97 {
98 .size_prop = "cache-size",
99 .line_size_props = { "cache-line-size",
100 "cache-block-size", },
101 .nr_sets_prop = "cache-sets",
102 }, {
103 .size_prop = "i-cache-size",
104 .line_size_props = { "i-cache-line-size",
105 "i-cache-block-size", },
106 .nr_sets_prop = "i-cache-sets",
107 }, {
108 .size_prop = "d-cache-size",
109 .line_size_props = { "d-cache-line-size",
110 "d-cache-block-size", },
111 .nr_sets_prop = "d-cache-sets",
112 },
113};
114
115static inline int get_cacheinfo_idx(enum cache_type type)
116{
117 if (type == CACHE_TYPE_UNIFIED)
118 return 0;
119 return type;
120}
121
122static void cache_size(struct cacheinfo *this_leaf, struct device_node *np)
123{
124 const char *propname;
125 int ct_idx;
126
127 ct_idx = get_cacheinfo_idx(this_leaf->type);
128 propname = cache_type_info[ct_idx].size_prop;
129
130 of_property_read_u32(np, propname, &this_leaf->size);
131}
132
133/* not cache_line_size() because that's a macro in include/linux/cache.h */
134static void cache_get_line_size(struct cacheinfo *this_leaf,
135 struct device_node *np)
136{
137 int i, lim, ct_idx;
138
139 ct_idx = get_cacheinfo_idx(this_leaf->type);
140 lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props);
141
142 for (i = 0; i < lim; i++) {
143 int ret;
144 u32 line_size;
145 const char *propname;
146
147 propname = cache_type_info[ct_idx].line_size_props[i];
148 ret = of_property_read_u32(np, propname, &line_size);
149 if (!ret) {
150 this_leaf->coherency_line_size = line_size;
151 break;
152 }
153 }
154}
155
156static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np)
157{
158 const char *propname;
159 int ct_idx;
160
161 ct_idx = get_cacheinfo_idx(this_leaf->type);
162 propname = cache_type_info[ct_idx].nr_sets_prop;
163
164 of_property_read_u32(np, propname, &this_leaf->number_of_sets);
165}
166
167static void cache_associativity(struct cacheinfo *this_leaf)
168{
169 unsigned int line_size = this_leaf->coherency_line_size;
170 unsigned int nr_sets = this_leaf->number_of_sets;
171 unsigned int size = this_leaf->size;
172
173 /*
174 * If the cache is fully associative, there is no need to
175 * check the other properties.
176 */
177 if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0))
178 this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
179}
180
181static bool cache_node_is_unified(struct cacheinfo *this_leaf,
182 struct device_node *np)
183{
184 return of_property_read_bool(np, "cache-unified");
185}
186
187static bool match_cache_node(struct device_node *cpu,
188 const struct device_node *cache_node)
189{
190 struct device_node *prev, *cache = of_find_next_cache_node(cpu);
191
192 while (cache) {
193 if (cache == cache_node) {
194 of_node_put(cache);
195 return true;
196 }
197
198 prev = cache;
199 cache = of_find_next_cache_node(cache);
200 of_node_put(prev);
201 }
202
203 return false;
204}
205
206#ifndef arch_compact_of_hwid
207#define arch_compact_of_hwid(_x) (_x)
208#endif
209
210static void cache_of_set_id(struct cacheinfo *this_leaf,
211 struct device_node *cache_node)
212{
213 struct device_node *cpu;
214 u32 min_id = ~0;
215
216 for_each_of_cpu_node(cpu) {
217 u64 id = of_get_cpu_hwid(cpu, 0);
218
219 id = arch_compact_of_hwid(id);
220 if (FIELD_GET(GENMASK_ULL(63, 32), id)) {
221 of_node_put(cpu);
222 return;
223 }
224
225 if (match_cache_node(cpu, cache_node))
226 min_id = min(min_id, id);
227 }
228
229 if (min_id != ~0) {
230 this_leaf->id = min_id;
231 this_leaf->attributes |= CACHE_ID;
232 }
233}
234
235static void cache_of_set_props(struct cacheinfo *this_leaf,
236 struct device_node *np)
237{
238 /*
239 * init_cache_level must setup the cache level correctly
240 * overriding the architecturally specified levels, so
241 * if type is NONE at this stage, it should be unified
242 */
243 if (this_leaf->type == CACHE_TYPE_NOCACHE &&
244 cache_node_is_unified(this_leaf, np))
245 this_leaf->type = CACHE_TYPE_UNIFIED;
246 cache_size(this_leaf, np);
247 cache_get_line_size(this_leaf, np);
248 cache_nr_sets(this_leaf, np);
249 cache_associativity(this_leaf);
250 cache_of_set_id(this_leaf, np);
251}
252
253static int cache_setup_of_node(unsigned int cpu)
254{
255 struct cacheinfo *this_leaf;
256 unsigned int index = 0;
257
258 struct device_node *np __free(device_node) = of_cpu_device_node_get(cpu);
259 if (!np) {
260 pr_err("Failed to find cpu%d device node\n", cpu);
261 return -ENOENT;
262 }
263
264 if (!of_check_cache_nodes(np)) {
265 return -ENOENT;
266 }
267
268 while (index < cache_leaves(cpu)) {
269 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
270 if (this_leaf->level != 1) {
271 struct device_node *prev __free(device_node) = np;
272 np = of_find_next_cache_node(np);
273 if (!np)
274 break;
275 }
276 cache_of_set_props(this_leaf, np);
277 this_leaf->fw_token = np;
278 index++;
279 }
280
281 if (index != cache_leaves(cpu)) /* not all OF nodes populated */
282 return -ENOENT;
283
284 return 0;
285}
286
287static bool of_check_cache_nodes(struct device_node *np)
288{
289 if (of_property_present(np, "cache-size") ||
290 of_property_present(np, "i-cache-size") ||
291 of_property_present(np, "d-cache-size") ||
292 of_property_present(np, "cache-unified"))
293 return true;
294
295 struct device_node *next __free(device_node) = of_find_next_cache_node(np);
296 if (next) {
297 return true;
298 }
299
300 return false;
301}
302
303static int of_count_cache_leaves(struct device_node *np)
304{
305 unsigned int leaves = 0;
306
307 if (of_property_present(np, "cache-size"))
308 ++leaves;
309 if (of_property_present(np, "i-cache-size"))
310 ++leaves;
311 if (of_property_present(np, "d-cache-size"))
312 ++leaves;
313
314 if (!leaves) {
315 /* The '[i-|d-|]cache-size' property is required, but
316 * if absent, fallback on the 'cache-unified' property.
317 */
318 if (of_property_read_bool(np, "cache-unified"))
319 return 1;
320 else
321 return 2;
322 }
323
324 return leaves;
325}
326
327int init_of_cache_level(unsigned int cpu)
328{
329 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
330 struct device_node *np __free(device_node) = of_cpu_device_node_get(cpu);
331 unsigned int levels = 0, leaves, level;
332
333 if (!of_check_cache_nodes(np)) {
334 return -ENOENT;
335 }
336
337 leaves = of_count_cache_leaves(np);
338 if (leaves > 0)
339 levels = 1;
340
341 while (1) {
342 struct device_node *prev __free(device_node) = np;
343 np = of_find_next_cache_node(np);
344 if (!np)
345 break;
346
347 if (!of_device_is_compatible(np, "cache"))
348 return -EINVAL;
349 if (of_property_read_u32(np, "cache-level", &level))
350 return -EINVAL;
351 if (level <= levels)
352 return -EINVAL;
353
354 leaves += of_count_cache_leaves(np);
355 levels = level;
356 }
357
358 this_cpu_ci->num_levels = levels;
359 this_cpu_ci->num_leaves = leaves;
360
361 return 0;
362}
363
364#else
365static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
366int init_of_cache_level(unsigned int cpu) { return 0; }
367#endif
368
369int __weak cache_setup_acpi(unsigned int cpu)
370{
371 return -ENOTSUPP;
372}
373
374unsigned int coherency_max_size;
375
376static int cache_setup_properties(unsigned int cpu)
377{
378 int ret = 0;
379
380 if (of_have_populated_dt())
381 ret = cache_setup_of_node(cpu);
382 else if (!acpi_disabled)
383 ret = cache_setup_acpi(cpu);
384
385 // Assume there is no cache information available in DT/ACPI from now.
386 if (ret && use_arch_cache_info())
387 use_arch_info = true;
388
389 return ret;
390}
391
392static int cache_shared_cpu_map_setup(unsigned int cpu)
393{
394 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
395 struct cacheinfo *this_leaf, *sib_leaf;
396 unsigned int index, sib_index;
397 int ret = 0;
398
399 if (this_cpu_ci->cpu_map_populated)
400 return 0;
401
402 /*
403 * skip setting up cache properties if LLC is valid, just need
404 * to update the shared cpu_map if the cache attributes were
405 * populated early before all the cpus are brought online
406 */
407 if (!last_level_cache_is_valid(cpu) && !use_arch_info) {
408 ret = cache_setup_properties(cpu);
409 if (ret)
410 return ret;
411 }
412
413 for (index = 0; index < cache_leaves(cpu); index++) {
414 unsigned int i;
415
416 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
417
418 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
419 for_each_online_cpu(i) {
420 if (i == cpu || !per_cpu_cacheinfo(i))
421 continue;/* skip if itself or no cacheinfo */
422 for (sib_index = 0; sib_index < cache_leaves(i); sib_index++) {
423 sib_leaf = per_cpu_cacheinfo_idx(i, sib_index);
424
425 /*
426 * Comparing cache IDs only makes sense if the leaves
427 * belong to the same cache level of same type. Skip
428 * the check if level and type do not match.
429 */
430 if (sib_leaf->level != this_leaf->level ||
431 sib_leaf->type != this_leaf->type)
432 continue;
433
434 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
435 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
436 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
437 break;
438 }
439 }
440 }
441 /* record the maximum cache line size */
442 if (this_leaf->coherency_line_size > coherency_max_size)
443 coherency_max_size = this_leaf->coherency_line_size;
444 }
445
446 /* shared_cpu_map is now populated for the cpu */
447 this_cpu_ci->cpu_map_populated = true;
448 return 0;
449}
450
451static void cache_shared_cpu_map_remove(unsigned int cpu)
452{
453 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
454 struct cacheinfo *this_leaf, *sib_leaf;
455 unsigned int sibling, index, sib_index;
456
457 for (index = 0; index < cache_leaves(cpu); index++) {
458 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
459 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
460 if (sibling == cpu || !per_cpu_cacheinfo(sibling))
461 continue;/* skip if itself or no cacheinfo */
462
463 for (sib_index = 0; sib_index < cache_leaves(sibling); sib_index++) {
464 sib_leaf = per_cpu_cacheinfo_idx(sibling, sib_index);
465
466 /*
467 * Comparing cache IDs only makes sense if the leaves
468 * belong to the same cache level of same type. Skip
469 * the check if level and type do not match.
470 */
471 if (sib_leaf->level != this_leaf->level ||
472 sib_leaf->type != this_leaf->type)
473 continue;
474
475 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
476 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
477 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
478 break;
479 }
480 }
481 }
482 }
483
484 /* cpu is no longer populated in the shared map */
485 this_cpu_ci->cpu_map_populated = false;
486}
487
488static void free_cache_attributes(unsigned int cpu)
489{
490 if (!per_cpu_cacheinfo(cpu))
491 return;
492
493 cache_shared_cpu_map_remove(cpu);
494}
495
496int __weak early_cache_level(unsigned int cpu)
497{
498 return -ENOENT;
499}
500
501int __weak init_cache_level(unsigned int cpu)
502{
503 return -ENOENT;
504}
505
506int __weak populate_cache_leaves(unsigned int cpu)
507{
508 return -ENOENT;
509}
510
511static inline int allocate_cache_info(int cpu)
512{
513 per_cpu_cacheinfo(cpu) = kzalloc_objs(struct cacheinfo,
514 cache_leaves(cpu), GFP_ATOMIC);
515 if (!per_cpu_cacheinfo(cpu)) {
516 cache_leaves(cpu) = 0;
517 return -ENOMEM;
518 }
519
520 return 0;
521}
522
523int fetch_cache_info(unsigned int cpu)
524{
525 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
526 unsigned int levels = 0, split_levels = 0;
527 int ret;
528
529 if (acpi_disabled) {
530 ret = init_of_cache_level(cpu);
531 } else {
532 ret = acpi_get_cache_info(cpu, &levels, &split_levels);
533 if (!ret) {
534 this_cpu_ci->num_levels = levels;
535 /*
536 * This assumes that:
537 * - there cannot be any split caches (data/instruction)
538 * above a unified cache
539 * - data/instruction caches come by pair
540 */
541 this_cpu_ci->num_leaves = levels + split_levels;
542 }
543 }
544
545 if (ret || !cache_leaves(cpu)) {
546 ret = early_cache_level(cpu);
547 if (ret)
548 return ret;
549
550 if (!cache_leaves(cpu))
551 return -ENOENT;
552
553 this_cpu_ci->early_ci_levels = true;
554 }
555
556 return allocate_cache_info(cpu);
557}
558
559static inline int init_level_allocate_ci(unsigned int cpu)
560{
561 unsigned int early_leaves = cache_leaves(cpu);
562
563 /* Since early initialization/allocation of the cacheinfo is allowed
564 * via fetch_cache_info() and this also gets called as CPU hotplug
565 * callbacks via cacheinfo_cpu_online, the init/alloc can be skipped
566 * as it will happen only once (the cacheinfo memory is never freed).
567 * Just populate the cacheinfo. However, if the cacheinfo has been
568 * allocated early through the arch-specific early_cache_level() call,
569 * there is a chance the info is wrong (this can happen on arm64). In
570 * that case, call init_cache_level() anyway to give the arch-specific
571 * code a chance to make things right.
572 */
573 if (per_cpu_cacheinfo(cpu) && !ci_cacheinfo(cpu)->early_ci_levels)
574 return 0;
575
576 if (init_cache_level(cpu) || !cache_leaves(cpu))
577 return -ENOENT;
578
579 /*
580 * Now that we have properly initialized the cache level info, make
581 * sure we don't try to do that again the next time we are called
582 * (e.g. as CPU hotplug callbacks).
583 */
584 ci_cacheinfo(cpu)->early_ci_levels = false;
585
586 /*
587 * Some architectures (e.g., x86) do not use early initialization.
588 * Allocate memory now in such case.
589 */
590 if (cache_leaves(cpu) <= early_leaves && per_cpu_cacheinfo(cpu))
591 return 0;
592
593 kfree(per_cpu_cacheinfo(cpu));
594 return allocate_cache_info(cpu);
595}
596
597int detect_cache_attributes(unsigned int cpu)
598{
599 int ret;
600
601 ret = init_level_allocate_ci(cpu);
602 if (ret)
603 return ret;
604
605 /*
606 * If LLC is valid the cache leaves were already populated so just go to
607 * update the cpu map.
608 */
609 if (!last_level_cache_is_valid(cpu)) {
610 /*
611 * populate_cache_leaves() may completely setup the cache leaves and
612 * shared_cpu_map or it may leave it partially setup.
613 */
614 ret = populate_cache_leaves(cpu);
615 if (ret)
616 goto free_ci;
617 }
618
619 /*
620 * For systems using DT for cache hierarchy, fw_token
621 * and shared_cpu_map will be set up here only if they are
622 * not populated already
623 */
624 ret = cache_shared_cpu_map_setup(cpu);
625 if (ret) {
626 pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
627 goto free_ci;
628 }
629
630 return 0;
631
632free_ci:
633 free_cache_attributes(cpu);
634 return ret;
635}
636
637/* pointer to cpuX/cache device */
638static DEFINE_PER_CPU(struct device *, ci_cache_dev);
639#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
640
641static cpumask_t cache_dev_map;
642
643/* pointer to array of devices for cpuX/cache/indexY */
644static DEFINE_PER_CPU(struct device **, ci_index_dev);
645#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
646#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
647
648#define show_one(file_name, object) \
649static ssize_t file_name##_show(struct device *dev, \
650 struct device_attribute *attr, char *buf) \
651{ \
652 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
653 return sysfs_emit(buf, "%u\n", this_leaf->object); \
654}
655
656show_one(id, id);
657show_one(level, level);
658show_one(coherency_line_size, coherency_line_size);
659show_one(number_of_sets, number_of_sets);
660show_one(physical_line_partition, physical_line_partition);
661show_one(ways_of_associativity, ways_of_associativity);
662
663static ssize_t size_show(struct device *dev,
664 struct device_attribute *attr, char *buf)
665{
666 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
667
668 return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10);
669}
670
671static ssize_t shared_cpu_map_show(struct device *dev,
672 struct device_attribute *attr, char *buf)
673{
674 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
675 const struct cpumask *mask = &this_leaf->shared_cpu_map;
676
677 return sysfs_emit(buf, "%*pb\n", nr_cpu_ids, mask);
678}
679
680static ssize_t shared_cpu_list_show(struct device *dev,
681 struct device_attribute *attr, char *buf)
682{
683 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
684 const struct cpumask *mask = &this_leaf->shared_cpu_map;
685
686 return sysfs_emit(buf, "%*pbl\n", nr_cpu_ids, mask);
687}
688
689static ssize_t type_show(struct device *dev,
690 struct device_attribute *attr, char *buf)
691{
692 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
693 const char *output;
694
695 switch (this_leaf->type) {
696 case CACHE_TYPE_DATA:
697 output = "Data";
698 break;
699 case CACHE_TYPE_INST:
700 output = "Instruction";
701 break;
702 case CACHE_TYPE_UNIFIED:
703 output = "Unified";
704 break;
705 default:
706 return -EINVAL;
707 }
708
709 return sysfs_emit(buf, "%s\n", output);
710}
711
712static ssize_t allocation_policy_show(struct device *dev,
713 struct device_attribute *attr, char *buf)
714{
715 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
716 unsigned int ci_attr = this_leaf->attributes;
717 const char *output;
718
719 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
720 output = "ReadWriteAllocate";
721 else if (ci_attr & CACHE_READ_ALLOCATE)
722 output = "ReadAllocate";
723 else if (ci_attr & CACHE_WRITE_ALLOCATE)
724 output = "WriteAllocate";
725 else
726 return 0;
727
728 return sysfs_emit(buf, "%s\n", output);
729}
730
731static ssize_t write_policy_show(struct device *dev,
732 struct device_attribute *attr, char *buf)
733{
734 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
735 unsigned int ci_attr = this_leaf->attributes;
736 int n = 0;
737
738 if (ci_attr & CACHE_WRITE_THROUGH)
739 n = sysfs_emit(buf, "WriteThrough\n");
740 else if (ci_attr & CACHE_WRITE_BACK)
741 n = sysfs_emit(buf, "WriteBack\n");
742 return n;
743}
744
745static DEVICE_ATTR_RO(id);
746static DEVICE_ATTR_RO(level);
747static DEVICE_ATTR_RO(type);
748static DEVICE_ATTR_RO(coherency_line_size);
749static DEVICE_ATTR_RO(ways_of_associativity);
750static DEVICE_ATTR_RO(number_of_sets);
751static DEVICE_ATTR_RO(size);
752static DEVICE_ATTR_RO(allocation_policy);
753static DEVICE_ATTR_RO(write_policy);
754static DEVICE_ATTR_RO(shared_cpu_map);
755static DEVICE_ATTR_RO(shared_cpu_list);
756static DEVICE_ATTR_RO(physical_line_partition);
757
758static struct attribute *cache_default_attrs[] = {
759 &dev_attr_id.attr,
760 &dev_attr_type.attr,
761 &dev_attr_level.attr,
762 &dev_attr_shared_cpu_map.attr,
763 &dev_attr_shared_cpu_list.attr,
764 &dev_attr_coherency_line_size.attr,
765 &dev_attr_ways_of_associativity.attr,
766 &dev_attr_number_of_sets.attr,
767 &dev_attr_size.attr,
768 &dev_attr_allocation_policy.attr,
769 &dev_attr_write_policy.attr,
770 &dev_attr_physical_line_partition.attr,
771 NULL
772};
773
774static umode_t
775cache_default_attrs_is_visible(struct kobject *kobj,
776 struct attribute *attr, int unused)
777{
778 struct device *dev = kobj_to_dev(kobj);
779 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
780 const struct cpumask *mask = &this_leaf->shared_cpu_map;
781 umode_t mode = attr->mode;
782
783 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
784 return mode;
785 if ((attr == &dev_attr_type.attr) && this_leaf->type)
786 return mode;
787 if ((attr == &dev_attr_level.attr) && this_leaf->level)
788 return mode;
789 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
790 return mode;
791 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
792 return mode;
793 if ((attr == &dev_attr_coherency_line_size.attr) &&
794 this_leaf->coherency_line_size)
795 return mode;
796 if ((attr == &dev_attr_ways_of_associativity.attr) &&
797 this_leaf->size) /* allow 0 = full associativity */
798 return mode;
799 if ((attr == &dev_attr_number_of_sets.attr) &&
800 this_leaf->number_of_sets)
801 return mode;
802 if ((attr == &dev_attr_size.attr) && this_leaf->size)
803 return mode;
804 if ((attr == &dev_attr_write_policy.attr) &&
805 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
806 return mode;
807 if ((attr == &dev_attr_allocation_policy.attr) &&
808 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
809 return mode;
810 if ((attr == &dev_attr_physical_line_partition.attr) &&
811 this_leaf->physical_line_partition)
812 return mode;
813
814 return 0;
815}
816
817static const struct attribute_group cache_default_group = {
818 .attrs = cache_default_attrs,
819 .is_visible = cache_default_attrs_is_visible,
820};
821
822static const struct attribute_group *cache_default_groups[] = {
823 &cache_default_group,
824 NULL,
825};
826
827static const struct attribute_group *cache_private_groups[] = {
828 &cache_default_group,
829 NULL, /* Place holder for private group */
830 NULL,
831};
832
833const struct attribute_group *
834__weak cache_get_priv_group(struct cacheinfo *this_leaf)
835{
836 return NULL;
837}
838
839static const struct attribute_group **
840cache_get_attribute_groups(struct cacheinfo *this_leaf)
841{
842 const struct attribute_group *priv_group =
843 cache_get_priv_group(this_leaf);
844
845 if (!priv_group)
846 return cache_default_groups;
847
848 if (!cache_private_groups[1])
849 cache_private_groups[1] = priv_group;
850
851 return cache_private_groups;
852}
853
854/* Add/Remove cache interface for CPU device */
855static void cpu_cache_sysfs_exit(unsigned int cpu)
856{
857 int i;
858 struct device *ci_dev;
859
860 if (per_cpu_index_dev(cpu)) {
861 for (i = 0; i < cache_leaves(cpu); i++) {
862 ci_dev = per_cache_index_dev(cpu, i);
863 if (!ci_dev)
864 continue;
865 device_unregister(ci_dev);
866 }
867 kfree(per_cpu_index_dev(cpu));
868 per_cpu_index_dev(cpu) = NULL;
869 }
870 device_unregister(per_cpu_cache_dev(cpu));
871 per_cpu_cache_dev(cpu) = NULL;
872}
873
874static int cpu_cache_sysfs_init(unsigned int cpu)
875{
876 struct device *dev = get_cpu_device(cpu);
877
878 if (per_cpu_cacheinfo(cpu) == NULL)
879 return -ENOENT;
880
881 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
882 if (IS_ERR(per_cpu_cache_dev(cpu)))
883 return PTR_ERR(per_cpu_cache_dev(cpu));
884
885 /* Allocate all required memory */
886 per_cpu_index_dev(cpu) = kzalloc_objs(struct device *,
887 cache_leaves(cpu));
888 if (unlikely(per_cpu_index_dev(cpu) == NULL))
889 goto err_out;
890
891 return 0;
892
893err_out:
894 cpu_cache_sysfs_exit(cpu);
895 return -ENOMEM;
896}
897
898static int cache_add_dev(unsigned int cpu)
899{
900 unsigned int i;
901 int rc;
902 struct device *ci_dev, *parent;
903 struct cacheinfo *this_leaf;
904 const struct attribute_group **cache_groups;
905
906 rc = cpu_cache_sysfs_init(cpu);
907 if (unlikely(rc < 0))
908 return rc;
909
910 parent = per_cpu_cache_dev(cpu);
911 for (i = 0; i < cache_leaves(cpu); i++) {
912 this_leaf = per_cpu_cacheinfo_idx(cpu, i);
913 if (this_leaf->disable_sysfs)
914 continue;
915 if (this_leaf->type == CACHE_TYPE_NOCACHE)
916 break;
917 cache_groups = cache_get_attribute_groups(this_leaf);
918 ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
919 "index%1u", i);
920 if (IS_ERR(ci_dev)) {
921 rc = PTR_ERR(ci_dev);
922 goto err;
923 }
924 per_cache_index_dev(cpu, i) = ci_dev;
925 }
926 cpumask_set_cpu(cpu, &cache_dev_map);
927
928 return 0;
929err:
930 cpu_cache_sysfs_exit(cpu);
931 return rc;
932}
933
934static unsigned int cpu_map_shared_cache(bool online, unsigned int cpu,
935 cpumask_t **map)
936{
937 struct cacheinfo *llc, *sib_llc;
938 unsigned int sibling;
939
940 if (!last_level_cache_is_valid(cpu))
941 return 0;
942
943 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
944
945 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
946 return 0;
947
948 if (online) {
949 *map = &llc->shared_cpu_map;
950 return cpumask_weight(*map);
951 }
952
953 /* shared_cpu_map of offlined CPU will be cleared, so use sibling map */
954 for_each_cpu(sibling, &llc->shared_cpu_map) {
955 if (sibling == cpu || !last_level_cache_is_valid(sibling))
956 continue;
957 sib_llc = per_cpu_cacheinfo_idx(sibling, cache_leaves(sibling) - 1);
958 *map = &sib_llc->shared_cpu_map;
959 return cpumask_weight(*map);
960 }
961
962 return 0;
963}
964
965/*
966 * Calculate the size of the per-CPU data cache slice. This can be
967 * used to estimate the size of the data cache slice that can be used
968 * by one CPU under ideal circumstances. UNIFIED caches are counted
969 * in addition to DATA caches. So, please consider code cache usage
970 * when use the result.
971 *
972 * Because the cache inclusive/non-inclusive information isn't
973 * available, we just use the size of the per-CPU slice of LLC to make
974 * the result more predictable across architectures.
975 */
976static void update_per_cpu_data_slice_size_cpu(unsigned int cpu)
977{
978 struct cpu_cacheinfo *ci;
979 struct cacheinfo *llc;
980 unsigned int nr_shared;
981
982 if (!last_level_cache_is_valid(cpu))
983 return;
984
985 ci = ci_cacheinfo(cpu);
986 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
987
988 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
989 return;
990
991 nr_shared = cpumask_weight(&llc->shared_cpu_map);
992 if (nr_shared)
993 ci->per_cpu_data_slice_size = llc->size / nr_shared;
994}
995
996static void update_per_cpu_data_slice_size(bool cpu_online, unsigned int cpu,
997 cpumask_t *cpu_map)
998{
999 unsigned int icpu;
1000
1001 for_each_cpu(icpu, cpu_map) {
1002 if (!cpu_online && icpu == cpu)
1003 continue;
1004 update_per_cpu_data_slice_size_cpu(icpu);
1005 setup_pcp_cacheinfo(icpu);
1006 }
1007}
1008
1009static int cacheinfo_cpu_online(unsigned int cpu)
1010{
1011 int rc = detect_cache_attributes(cpu);
1012 cpumask_t *cpu_map;
1013
1014 if (rc)
1015 return rc;
1016 rc = cache_add_dev(cpu);
1017 if (rc)
1018 goto err;
1019 if (cpu_map_shared_cache(true, cpu, &cpu_map))
1020 update_per_cpu_data_slice_size(true, cpu, cpu_map);
1021 return 0;
1022err:
1023 free_cache_attributes(cpu);
1024 return rc;
1025}
1026
1027static int cacheinfo_cpu_pre_down(unsigned int cpu)
1028{
1029 cpumask_t *cpu_map;
1030 unsigned int nr_shared;
1031
1032 nr_shared = cpu_map_shared_cache(false, cpu, &cpu_map);
1033 if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map))
1034 cpu_cache_sysfs_exit(cpu);
1035
1036 free_cache_attributes(cpu);
1037 if (nr_shared > 1)
1038 update_per_cpu_data_slice_size(false, cpu, cpu_map);
1039 return 0;
1040}
1041
1042static int __init cacheinfo_sysfs_init(void)
1043{
1044 return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE,
1045 "base/cacheinfo:online",
1046 cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
1047}
1048device_initcall(cacheinfo_sysfs_init);