Linux kernel mirror (for testing)
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linux
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Raspberry Pi driver for firmware controlled clocks
4 *
5 * Even though clk-bcm2835 provides an interface to the hardware registers for
6 * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
7 * We're not allowed to change it directly as we might race with the
8 * over-temperature and under-voltage protections provided by the firmware.
9 *
10 * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
11 */
12
13#include <linux/clkdev.h>
14#include <linux/clk-provider.h>
15#include <linux/io.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18
19#include <soc/bcm2835/raspberrypi-firmware.h>
20
21static char *rpi_firmware_clk_names[] = {
22 [RPI_FIRMWARE_EMMC_CLK_ID] = "emmc",
23 [RPI_FIRMWARE_UART_CLK_ID] = "uart",
24 [RPI_FIRMWARE_ARM_CLK_ID] = "arm",
25 [RPI_FIRMWARE_CORE_CLK_ID] = "core",
26 [RPI_FIRMWARE_V3D_CLK_ID] = "v3d",
27 [RPI_FIRMWARE_H264_CLK_ID] = "h264",
28 [RPI_FIRMWARE_ISP_CLK_ID] = "isp",
29 [RPI_FIRMWARE_SDRAM_CLK_ID] = "sdram",
30 [RPI_FIRMWARE_PIXEL_CLK_ID] = "pixel",
31 [RPI_FIRMWARE_PWM_CLK_ID] = "pwm",
32 [RPI_FIRMWARE_HEVC_CLK_ID] = "hevc",
33 [RPI_FIRMWARE_EMMC2_CLK_ID] = "emmc2",
34 [RPI_FIRMWARE_M2MC_CLK_ID] = "m2mc",
35 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
36 [RPI_FIRMWARE_VEC_CLK_ID] = "vec",
37 [RPI_FIRMWARE_DISP_CLK_ID] = "disp",
38};
39
40#define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0)
41#define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1)
42
43struct raspberrypi_clk_variant;
44
45struct raspberrypi_clk {
46 struct device *dev;
47 struct rpi_firmware *firmware;
48 struct platform_device *cpufreq;
49};
50
51struct raspberrypi_clk_data {
52 struct clk_hw hw;
53
54 unsigned int id;
55 struct raspberrypi_clk_variant *variant;
56
57 struct raspberrypi_clk *rpi;
58};
59
60static inline
61const struct raspberrypi_clk_data *clk_hw_to_data(const struct clk_hw *hw)
62{
63 return container_of(hw, struct raspberrypi_clk_data, hw);
64}
65
66struct raspberrypi_clk_variant {
67 bool export;
68 char *clkdev;
69 unsigned long min_rate;
70 bool minimize;
71 bool maximize;
72 u32 flags;
73};
74
75static struct raspberrypi_clk_variant
76raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
77 [RPI_FIRMWARE_ARM_CLK_ID] = {
78 .export = true,
79 .clkdev = "cpu0",
80 .flags = CLK_IS_CRITICAL,
81 },
82 [RPI_FIRMWARE_CORE_CLK_ID] = {
83 .export = true,
84
85 /*
86 * The clock is shared between the HVS and the CSI
87 * controllers, on the BCM2711 and will change depending
88 * on the pixels composited on the HVS and the capture
89 * resolution on Unicam.
90 *
91 * Since the rate can get quite large, and we need to
92 * coordinate between both driver instances, let's
93 * always use the minimum the drivers will let us.
94 */
95 .minimize = true,
96
97 /*
98 * It should never be disabled as it drives the bus for
99 * everything else.
100 */
101 .flags = CLK_IS_CRITICAL,
102 },
103 [RPI_FIRMWARE_M2MC_CLK_ID] = {
104 .export = true,
105
106 /*
107 * If we boot without any cable connected to any of the
108 * HDMI connector, the firmware will skip the HSM
109 * initialization and leave it with a rate of 0,
110 * resulting in a bus lockup when we're accessing the
111 * registers even if it's enabled.
112 *
113 * Let's put a sensible default so that we don't end up
114 * in this situation.
115 */
116 .min_rate = 120000000,
117
118 /*
119 * The clock is shared between the two HDMI controllers
120 * on the BCM2711 and will change depending on the
121 * resolution output on each. Since the rate can get
122 * quite large, and we need to coordinate between both
123 * driver instances, let's always use the minimum the
124 * drivers will let us.
125 */
126 .minimize = true,
127
128 /*
129 * As mentioned above, this clock is disabled during boot,
130 * the firmware will skip the HSM initialization, resulting
131 * in a bus lockup. Therefore, make sure it's enabled
132 * during boot, but after it, it can be enabled/disabled
133 * by the driver.
134 */
135 .flags = CLK_IGNORE_UNUSED,
136 },
137 [RPI_FIRMWARE_V3D_CLK_ID] = {
138 .export = true,
139 .maximize = true,
140 },
141 [RPI_FIRMWARE_PIXEL_CLK_ID] = {
142 .export = true,
143 .minimize = true,
144 .flags = CLK_IS_CRITICAL,
145 },
146 [RPI_FIRMWARE_HEVC_CLK_ID] = {
147 .export = true,
148 .minimize = true,
149 .flags = CLK_IS_CRITICAL,
150 },
151 [RPI_FIRMWARE_ISP_CLK_ID] = {
152 .export = true,
153 .minimize = true,
154 },
155 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
156 .export = true,
157 .minimize = true,
158 .flags = CLK_IS_CRITICAL,
159 },
160 [RPI_FIRMWARE_VEC_CLK_ID] = {
161 .export = true,
162 .minimize = true,
163
164 /*
165 * If this clock is disabled during boot, it causes a bus
166 * lockup in RPi 3B. Therefore, make sure it's left enabled
167 * during boot.
168 */
169 .flags = CLK_IGNORE_UNUSED,
170 },
171 [RPI_FIRMWARE_DISP_CLK_ID] = {
172 .export = true,
173 .minimize = true,
174 },
175};
176
177/*
178 * Structure of the message passed to Raspberry Pi's firmware in order to
179 * change clock rates. The 'disable_turbo' option is only available to the ARM
180 * clock (pllb) which we enable by default as turbo mode will alter multiple
181 * clocks at once.
182 *
183 * Even though we're able to access the clock registers directly we're bound to
184 * use the firmware interface as the firmware ultimately takes care of
185 * mitigating overheating/undervoltage situations and we would be changing
186 * frequencies behind his back.
187 *
188 * For more information on the firmware interface check:
189 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
190 */
191struct raspberrypi_firmware_prop {
192 __le32 id;
193 __le32 val;
194 __le32 disable_turbo;
195} __packed;
196
197static int raspberrypi_clock_property(struct rpi_firmware *firmware,
198 const struct raspberrypi_clk_data *data,
199 u32 tag, u32 *val)
200{
201 struct raspberrypi_firmware_prop msg = {
202 .id = cpu_to_le32(data->id),
203 .val = cpu_to_le32(*val),
204 };
205 int ret;
206
207 ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
208 if (ret)
209 return ret;
210
211 *val = le32_to_cpu(msg.val);
212
213 return 0;
214}
215
216static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
217{
218 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
219 struct raspberrypi_clk *rpi = data->rpi;
220 u32 val = 0;
221 int ret;
222
223 ret = raspberrypi_clock_property(rpi->firmware, data,
224 RPI_FIRMWARE_GET_CLOCK_STATE, &val);
225 if (ret) {
226 dev_err_ratelimited(rpi->dev, "Failed to get %s state: %d\n",
227 clk_hw_get_name(hw), ret);
228 return 0;
229 }
230
231 return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
232}
233
234
235static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
236 unsigned long parent_rate)
237{
238 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
239 struct raspberrypi_clk *rpi = data->rpi;
240 u32 val = 0;
241 int ret;
242
243 ret = raspberrypi_clock_property(rpi->firmware, data,
244 RPI_FIRMWARE_GET_CLOCK_RATE, &val);
245 if (ret) {
246 dev_err_ratelimited(rpi->dev, "Failed to get %s frequency: %d\n",
247 clk_hw_get_name(hw), ret);
248 return 0;
249 }
250
251 return val;
252}
253
254static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
255 unsigned long parent_rate)
256{
257 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
258 struct raspberrypi_clk *rpi = data->rpi;
259 u32 _rate = rate;
260 int ret;
261
262 ret = raspberrypi_clock_property(rpi->firmware, data,
263 RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
264 if (ret)
265 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n",
266 clk_hw_get_name(hw), ret);
267
268 return ret;
269}
270
271static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
272 struct clk_rate_request *req)
273{
274 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
275 struct raspberrypi_clk_variant *variant = data->variant;
276
277 /*
278 * The firmware will do the rounding but that isn't part of
279 * the interface with the firmware, so we just do our best
280 * here.
281 */
282
283 req->rate = clamp(req->rate, req->min_rate, req->max_rate);
284
285 /*
286 * We want to aggressively reduce the clock rate here, so let's
287 * just ignore the requested rate and return the bare minimum
288 * rate we can get away with.
289 */
290 if (variant->minimize && req->min_rate > 0)
291 req->rate = req->min_rate;
292
293 return 0;
294}
295
296static int raspberrypi_fw_prepare(struct clk_hw *hw)
297{
298 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
299 struct raspberrypi_clk_variant *variant = data->variant;
300 struct raspberrypi_clk *rpi = data->rpi;
301 u32 state = RPI_FIRMWARE_STATE_ENABLE_BIT;
302 int ret;
303
304 ret = raspberrypi_clock_property(rpi->firmware, data,
305 RPI_FIRMWARE_SET_CLOCK_STATE, &state);
306 if (ret) {
307 dev_err_ratelimited(rpi->dev,
308 "Failed to set clock %s state to on: %d\n",
309 clk_hw_get_name(hw), ret);
310 return ret;
311 }
312
313 /*
314 * For clocks marked with 'maximize', restore the rate to the
315 * maximum after enabling. This compensates for the rate being
316 * set to minimum during unprepare (see raspberrypi_fw_unprepare).
317 */
318 if (variant->maximize) {
319 unsigned long min_rate, max_rate;
320
321 clk_hw_get_rate_range(hw, &min_rate, &max_rate);
322 ret = raspberrypi_fw_set_rate(hw, max_rate, 0);
323 }
324
325 return ret;
326}
327
328static void raspberrypi_fw_unprepare(struct clk_hw *hw)
329{
330 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
331 struct raspberrypi_clk *rpi = data->rpi;
332 unsigned long min_rate, max_rate;
333 u32 state = 0;
334 int ret;
335
336 clk_hw_get_rate_range(hw, &min_rate, &max_rate);
337
338 /*
339 * Setting the rate in unprepare is a deviation from the usual CCF
340 * behavior, where unprepare only gates the clock. However, this is
341 * needed, as RPI_FIRMWARE_SET_CLOCK_STATE doesn't actually power off
342 * the clock on current firmware versions. Setting the rate to minimum
343 * before disabling the clock is the only way to achieve meaningful
344 * power savings.
345 *
346 * This is safe because no consumer should rely on the rate of an
347 * unprepared clock. Any consumer must call clk_prepare() before use,
348 * at which point the rate is either restored to maximum (for clocks
349 * with the 'maximize' flag) or re-established by the consumer.
350 */
351 raspberrypi_fw_set_rate(hw, min_rate, 0);
352
353 ret = raspberrypi_clock_property(rpi->firmware, data,
354 RPI_FIRMWARE_SET_CLOCK_STATE, &state);
355 if (ret)
356 dev_err_ratelimited(rpi->dev,
357 "Failed to set clock %s state to off: %d\n",
358 clk_hw_get_name(hw), ret);
359}
360
361static const struct clk_ops raspberrypi_firmware_clk_ops = {
362 .prepare = raspberrypi_fw_prepare,
363 .unprepare = raspberrypi_fw_unprepare,
364 .is_prepared = raspberrypi_fw_is_prepared,
365 .recalc_rate = raspberrypi_fw_get_rate,
366 .determine_rate = raspberrypi_fw_dumb_determine_rate,
367 .set_rate = raspberrypi_fw_set_rate,
368};
369
370static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
371 unsigned int parent,
372 unsigned int id,
373 struct raspberrypi_clk_variant *variant)
374{
375 struct raspberrypi_clk_data *data;
376 struct clk_init_data init = {};
377 u32 min_rate, max_rate;
378 int ret;
379
380 data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
381 if (!data)
382 return ERR_PTR(-ENOMEM);
383 data->rpi = rpi;
384 data->id = id;
385 data->variant = variant;
386
387 init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
388 "fw-clk-%s",
389 rpi_firmware_clk_names[id]);
390 if (!init.name)
391 return ERR_PTR(-ENOMEM);
392 init.ops = &raspberrypi_firmware_clk_ops;
393 init.flags = variant->flags | CLK_GET_RATE_NOCACHE;
394
395 data->hw.init = &init;
396
397 ret = raspberrypi_clock_property(rpi->firmware, data,
398 RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
399 &min_rate);
400 if (ret) {
401 dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n",
402 id, ret);
403 return ERR_PTR(ret);
404 }
405
406 ret = raspberrypi_clock_property(rpi->firmware, data,
407 RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
408 &max_rate);
409 if (ret) {
410 dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
411 id, ret);
412 return ERR_PTR(ret);
413 }
414
415 ret = devm_clk_hw_register(rpi->dev, &data->hw);
416 if (ret)
417 return ERR_PTR(ret);
418
419 clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
420
421 if (variant->clkdev) {
422 ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
423 NULL, variant->clkdev);
424 if (ret) {
425 dev_err(rpi->dev, "Failed to initialize clkdev\n");
426 return ERR_PTR(ret);
427 }
428 }
429
430 if (variant->min_rate) {
431 unsigned long rate;
432
433 clk_hw_set_rate_range(&data->hw, variant->min_rate, max_rate);
434
435 rate = raspberrypi_fw_get_rate(&data->hw, 0);
436 if (rate < variant->min_rate) {
437 ret = raspberrypi_fw_set_rate(&data->hw, variant->min_rate, 0);
438 if (ret)
439 return ERR_PTR(ret);
440 }
441 }
442
443 return &data->hw;
444}
445
446struct rpi_firmware_get_clocks_response {
447 u32 parent;
448 u32 id;
449};
450
451static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
452 struct clk_hw_onecell_data *data)
453{
454 struct rpi_firmware_get_clocks_response *clks;
455 int ret;
456
457 /*
458 * The firmware doesn't guarantee that the last element of
459 * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional
460 * zero element as sentinel.
461 */
462 clks = devm_kcalloc(rpi->dev,
463 RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks),
464 GFP_KERNEL);
465 if (!clks)
466 return -ENOMEM;
467
468 ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
469 clks,
470 sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
471 if (ret)
472 return ret;
473
474 while (clks->id) {
475 struct raspberrypi_clk_variant *variant;
476
477 if (clks->id >= RPI_FIRMWARE_NUM_CLK_ID) {
478 dev_err(rpi->dev, "Unknown clock id: %u (max: %u)\n",
479 clks->id, RPI_FIRMWARE_NUM_CLK_ID - 1);
480 return -EINVAL;
481 }
482
483 variant = &raspberrypi_clk_variants[clks->id];
484 if (variant->export) {
485 struct clk_hw *hw;
486
487 hw = raspberrypi_clk_register(rpi, clks->parent,
488 clks->id, variant);
489 if (IS_ERR(hw))
490 return PTR_ERR(hw);
491
492 data->num = clks->id + 1;
493 data->hws[clks->id] = hw;
494 }
495
496 clks++;
497 }
498
499 return 0;
500}
501
502static int raspberrypi_clk_probe(struct platform_device *pdev)
503{
504 struct clk_hw_onecell_data *clk_data;
505 struct device_node *firmware_node;
506 struct device *dev = &pdev->dev;
507 struct rpi_firmware *firmware;
508 struct raspberrypi_clk *rpi;
509 int ret;
510
511 /*
512 * We can be probed either through the an old-fashioned
513 * platform device registration or through a DT node that is a
514 * child of the firmware node. Handle both cases.
515 */
516 if (dev->of_node)
517 firmware_node = of_get_parent(dev->of_node);
518 else
519 firmware_node = of_find_compatible_node(NULL, NULL,
520 "raspberrypi,bcm2835-firmware");
521 if (!firmware_node) {
522 dev_err(dev, "Missing firmware node\n");
523 return -ENOENT;
524 }
525
526 firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
527 of_node_put(firmware_node);
528 if (!firmware)
529 return -EPROBE_DEFER;
530
531 rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
532 if (!rpi)
533 return -ENOMEM;
534
535 rpi->dev = dev;
536 rpi->firmware = firmware;
537 platform_set_drvdata(pdev, rpi);
538
539 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
540 RPI_FIRMWARE_NUM_CLK_ID),
541 GFP_KERNEL);
542 if (!clk_data)
543 return -ENOMEM;
544
545 ret = raspberrypi_discover_clocks(rpi, clk_data);
546 if (ret)
547 return ret;
548
549 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
550 clk_data);
551 if (ret)
552 return ret;
553
554 rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
555 -1, NULL, 0);
556
557 return 0;
558}
559
560static void raspberrypi_clk_remove(struct platform_device *pdev)
561{
562 struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
563
564 platform_device_unregister(rpi->cpufreq);
565}
566
567static const struct of_device_id raspberrypi_clk_match[] = {
568 { .compatible = "raspberrypi,firmware-clocks" },
569 { },
570};
571MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
572
573static struct platform_driver raspberrypi_clk_driver = {
574 .driver = {
575 .name = "raspberrypi-clk",
576 .of_match_table = raspberrypi_clk_match,
577 },
578 .probe = raspberrypi_clk_probe,
579 .remove = raspberrypi_clk_remove,
580};
581module_platform_driver(raspberrypi_clk_driver);
582
583MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
584MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
585MODULE_LICENSE("GPL");