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1/* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26/* 27 * Authors: 28 * Christian König <deathsimple@vodafone.de> 29 */ 30 31#include <linux/sort.h> 32#include <linux/uaccess.h> 33 34#include "amdgpu.h" 35#include "amdgpu_trace.h" 36 37#define AMDGPU_BO_LIST_MAX_PRIORITY 32u 38#define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1) 39#define AMDGPU_BO_LIST_MAX_ENTRIES (128 * 1024) 40 41static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu) 42{ 43 struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list, 44 rhead); 45 mutex_destroy(&list->bo_list_mutex); 46 kvfree(list); 47} 48 49static void amdgpu_bo_list_free(struct kref *ref) 50{ 51 struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list, 52 refcount); 53 struct amdgpu_bo_list_entry *e; 54 55 amdgpu_bo_list_for_each_entry(e, list) 56 amdgpu_bo_unref(&e->bo); 57 call_rcu(&list->rhead, amdgpu_bo_list_free_rcu); 58} 59 60static int amdgpu_bo_list_entry_cmp(const void *_a, const void *_b) 61{ 62 const struct amdgpu_bo_list_entry *a = _a, *b = _b; 63 64 BUILD_BUG_ON(AMDGPU_BO_LIST_MAX_PRIORITY >= INT_MAX); 65 66 return (int)a->priority - (int)b->priority; 67} 68 69int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp, 70 struct drm_amdgpu_bo_list_entry *info, 71 size_t num_entries, struct amdgpu_bo_list **result) 72{ 73 unsigned last_entry = 0, first_userptr = num_entries; 74 struct amdgpu_bo_list_entry *array; 75 struct amdgpu_bo_list *list; 76 uint64_t total_size = 0; 77 unsigned i; 78 int r; 79 80 list = kvzalloc_flex(*list, entries, num_entries); 81 if (!list) 82 return -ENOMEM; 83 84 kref_init(&list->refcount); 85 86 list->num_entries = num_entries; 87 array = list->entries; 88 89 for (i = 0; i < num_entries; ++i) { 90 struct amdgpu_bo_list_entry *entry; 91 struct drm_gem_object *gobj; 92 struct amdgpu_bo *bo; 93 struct mm_struct *usermm; 94 95 gobj = drm_gem_object_lookup(filp, info[i].bo_handle); 96 if (!gobj) { 97 r = -ENOENT; 98 goto error_free; 99 } 100 101 bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj)); 102 drm_gem_object_put(gobj); 103 104 usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm); 105 if (usermm) { 106 if (usermm != current->mm) { 107 amdgpu_bo_unref(&bo); 108 r = -EPERM; 109 goto error_free; 110 } 111 entry = &array[--first_userptr]; 112 } else { 113 entry = &array[last_entry++]; 114 } 115 116 entry->priority = min(info[i].bo_priority, 117 AMDGPU_BO_LIST_MAX_PRIORITY); 118 entry->bo = bo; 119 120 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS) 121 list->gds_obj = bo; 122 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS) 123 list->gws_obj = bo; 124 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA) 125 list->oa_obj = bo; 126 127 total_size += amdgpu_bo_size(bo); 128 trace_amdgpu_bo_list_set(list, bo); 129 } 130 131 list->first_userptr = first_userptr; 132 sort(array, last_entry, sizeof(struct amdgpu_bo_list_entry), 133 amdgpu_bo_list_entry_cmp, NULL); 134 135 trace_amdgpu_cs_bo_status(list->num_entries, total_size); 136 137 mutex_init(&list->bo_list_mutex); 138 *result = list; 139 return 0; 140 141error_free: 142 for (i = 0; i < last_entry; ++i) 143 amdgpu_bo_unref(&array[i].bo); 144 for (i = first_userptr; i < num_entries; ++i) 145 amdgpu_bo_unref(&array[i].bo); 146 kvfree(list); 147 return r; 148 149} 150 151static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id) 152{ 153 struct amdgpu_bo_list *list; 154 155 mutex_lock(&fpriv->bo_list_lock); 156 list = idr_remove(&fpriv->bo_list_handles, id); 157 mutex_unlock(&fpriv->bo_list_lock); 158 if (list) 159 kref_put(&list->refcount, amdgpu_bo_list_free); 160} 161 162int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id, 163 struct amdgpu_bo_list **result) 164{ 165 rcu_read_lock(); 166 *result = idr_find(&fpriv->bo_list_handles, id); 167 168 if (*result && kref_get_unless_zero(&(*result)->refcount)) { 169 rcu_read_unlock(); 170 return 0; 171 } 172 173 rcu_read_unlock(); 174 *result = NULL; 175 return -ENOENT; 176} 177 178void amdgpu_bo_list_put(struct amdgpu_bo_list *list) 179{ 180 kref_put(&list->refcount, amdgpu_bo_list_free); 181} 182 183int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in, 184 struct drm_amdgpu_bo_list_entry **info_param) 185{ 186 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry); 187 const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr); 188 const uint32_t bo_info_size = in->bo_info_size; 189 const uint32_t bo_number = in->bo_number; 190 struct drm_amdgpu_bo_list_entry *info; 191 192 if (bo_number > AMDGPU_BO_LIST_MAX_ENTRIES) 193 return -EINVAL; 194 195 /* copy the handle array from userspace to a kernel buffer */ 196 if (likely(info_size == bo_info_size)) { 197 info = vmemdup_array_user(uptr, bo_number, info_size); 198 if (IS_ERR(info)) 199 return PTR_ERR(info); 200 } else { 201 const uint32_t bytes = min(bo_info_size, info_size); 202 unsigned i; 203 204 info = kvmalloc_array(bo_number, info_size, GFP_KERNEL); 205 if (!info) 206 return -ENOMEM; 207 208 memset(info, 0, bo_number * info_size); 209 for (i = 0; i < bo_number; ++i, uptr += bo_info_size) { 210 if (copy_from_user(&info[i], uptr, bytes)) { 211 kvfree(info); 212 return -EFAULT; 213 } 214 } 215 } 216 217 *info_param = info; 218 return 0; 219} 220 221int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, 222 struct drm_file *filp) 223{ 224 struct amdgpu_device *adev = drm_to_adev(dev); 225 struct amdgpu_fpriv *fpriv = filp->driver_priv; 226 union drm_amdgpu_bo_list *args = data; 227 uint32_t handle = args->in.list_handle; 228 struct drm_amdgpu_bo_list_entry *info = NULL; 229 struct amdgpu_bo_list *list, *old; 230 int r; 231 232 r = amdgpu_bo_create_list_entry_array(&args->in, &info); 233 if (r) 234 return r; 235 236 switch (args->in.operation) { 237 case AMDGPU_BO_LIST_OP_CREATE: 238 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number, 239 &list); 240 if (r) 241 goto error_free; 242 243 mutex_lock(&fpriv->bo_list_lock); 244 r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL); 245 mutex_unlock(&fpriv->bo_list_lock); 246 if (r < 0) { 247 goto error_put_list; 248 } 249 250 handle = r; 251 break; 252 253 case AMDGPU_BO_LIST_OP_DESTROY: 254 amdgpu_bo_list_destroy(fpriv, handle); 255 handle = 0; 256 break; 257 258 case AMDGPU_BO_LIST_OP_UPDATE: 259 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number, 260 &list); 261 if (r) 262 goto error_free; 263 264 mutex_lock(&fpriv->bo_list_lock); 265 old = idr_replace(&fpriv->bo_list_handles, list, handle); 266 mutex_unlock(&fpriv->bo_list_lock); 267 268 if (IS_ERR(old)) { 269 r = PTR_ERR(old); 270 goto error_put_list; 271 } 272 273 amdgpu_bo_list_put(old); 274 break; 275 276 default: 277 r = -EINVAL; 278 goto error_free; 279 } 280 281 memset(args, 0, sizeof(*args)); 282 args->out.list_handle = handle; 283 kvfree(info); 284 285 return 0; 286 287error_put_list: 288 amdgpu_bo_list_put(list); 289 290error_free: 291 kvfree(info); 292 return r; 293}