Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
4 *
5 * Based on sun4i_layer.h, which is:
6 * Copyright (C) 2015 Free Electrons
7 * Copyright (C) 2015 NextThing Co
8 *
9 * Maxime Ripard <maxime.ripard@free-electrons.com>
10 */
11
12#include <drm/drm_atomic.h>
13#include <drm/drm_atomic_helper.h>
14#include <drm/drm_blend.h>
15#include <drm/drm_crtc.h>
16#include <drm/drm_fb_dma_helper.h>
17#include <drm/drm_fourcc.h>
18#include <drm/drm_framebuffer.h>
19#include <drm/drm_gem_atomic_helper.h>
20#include <drm/drm_gem_dma_helper.h>
21#include <drm/drm_print.h>
22#include <drm/drm_probe_helper.h>
23
24#include "sun8i_mixer.h"
25#include "sun8i_ui_layer.h"
26#include "sun8i_ui_scaler.h"
27#include "sun8i_vi_scaler.h"
28
29static void sun8i_ui_layer_disable(struct sun8i_layer *layer)
30{
31 u32 ch_base = sun8i_channel_base(layer);
32
33 regmap_write(layer->regs,
34 SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), 0);
35}
36
37static void sun8i_ui_layer_update_attributes(struct sun8i_layer *layer,
38 struct drm_plane *plane)
39{
40 struct drm_plane_state *state = plane->state;
41 const struct drm_format_info *fmt;
42 u32 val, ch_base, hw_fmt;
43
44 ch_base = sun8i_channel_base(layer);
45 fmt = state->fb->format;
46 sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
47
48 val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(state->alpha >> 8);
49 val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?
50 SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_PIXEL :
51 SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_COMBINED;
52 val |= hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
53 val |= SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN;
54
55 regmap_write(layer->regs,
56 SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), val);
57}
58
59static void sun8i_ui_layer_update_coord(struct sun8i_layer *layer,
60 struct drm_plane *plane)
61{
62 struct drm_plane_state *state = plane->state;
63 u32 src_w, src_h, dst_w, dst_h;
64 u32 outsize, insize;
65 u32 hphase, vphase;
66 u32 ch_base;
67
68 DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n",
69 layer->channel, layer->overlay);
70
71 ch_base = sun8i_channel_base(layer);
72
73 src_w = drm_rect_width(&state->src) >> 16;
74 src_h = drm_rect_height(&state->src) >> 16;
75 dst_w = drm_rect_width(&state->dst);
76 dst_h = drm_rect_height(&state->dst);
77
78 hphase = state->src.x1 & 0xffff;
79 vphase = state->src.y1 & 0xffff;
80
81 insize = SUN8I_MIXER_SIZE(src_w, src_h);
82 outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
83
84 /* Set height and width */
85 DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
86 state->src.x1 >> 16, state->src.y1 >> 16);
87 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
88 regmap_write(layer->regs,
89 SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, layer->overlay),
90 insize);
91 regmap_write(layer->regs,
92 SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch_base),
93 insize);
94
95 if (insize != outsize || hphase || vphase) {
96 u32 hscale, vscale;
97
98 DRM_DEBUG_DRIVER("HW scaling is enabled\n");
99
100 hscale = state->src_w / state->crtc_w;
101 vscale = state->src_h / state->crtc_h;
102
103 if (layer->cfg->de_type == SUN8I_MIXER_DE33) {
104 sun8i_vi_scaler_setup(layer, src_w, src_h, dst_w, dst_h,
105 hscale, vscale, hphase, vphase,
106 state->fb->format);
107 sun8i_vi_scaler_enable(layer, true);
108 } else {
109 sun8i_ui_scaler_setup(layer, src_w, src_h, dst_w, dst_h,
110 hscale, vscale, hphase, vphase);
111 sun8i_ui_scaler_enable(layer, true);
112 }
113 } else {
114 DRM_DEBUG_DRIVER("HW scaling is not needed\n");
115 if (layer->cfg->de_type == SUN8I_MIXER_DE33)
116 sun8i_vi_scaler_enable(layer, false);
117 else
118 sun8i_ui_scaler_enable(layer, false);
119 }
120}
121
122static void sun8i_ui_layer_update_buffer(struct sun8i_layer *layer,
123 struct drm_plane *plane)
124{
125 struct drm_plane_state *state = plane->state;
126 struct drm_framebuffer *fb = state->fb;
127 dma_addr_t dma_addr;
128 u32 ch_base;
129
130 ch_base = sun8i_channel_base(layer);
131
132 /* Get the start of the displayed memory */
133 dma_addr = drm_fb_dma_get_gem_addr(fb, state, 0);
134
135 /* Set the line width */
136 DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]);
137 regmap_write(layer->regs,
138 SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, layer->overlay),
139 fb->pitches[0]);
140
141 DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr);
142
143 regmap_write(layer->regs,
144 SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, layer->overlay),
145 lower_32_bits(dma_addr));
146}
147
148static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,
149 struct drm_atomic_state *state)
150{
151 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
152 plane);
153 struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
154 struct drm_crtc *crtc = new_plane_state->crtc;
155 struct drm_crtc_state *crtc_state;
156 const struct drm_format_info *fmt;
157 int min_scale, max_scale, ret;
158 u32 hw_fmt;
159
160 if (!crtc)
161 return 0;
162
163 crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
164 if (WARN_ON(!crtc_state))
165 return -EINVAL;
166
167 fmt = new_plane_state->fb->format;
168 ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
169 if (ret || fmt->is_yuv) {
170 DRM_DEBUG_DRIVER("Invalid plane format\n");
171 return -EINVAL;
172 }
173
174 min_scale = DRM_PLANE_NO_SCALING;
175 max_scale = DRM_PLANE_NO_SCALING;
176
177 if (layer->cfg->scaler_mask & BIT(layer->channel)) {
178 min_scale = SUN8I_UI_SCALER_SCALE_MIN;
179 max_scale = SUN8I_UI_SCALER_SCALE_MAX;
180 }
181
182 return drm_atomic_helper_check_plane_state(new_plane_state,
183 crtc_state,
184 min_scale, max_scale,
185 true, true);
186}
187
188
189static void sun8i_ui_layer_atomic_update(struct drm_plane *plane,
190 struct drm_atomic_state *state)
191{
192 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
193 plane);
194 struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
195
196 if (!new_state->crtc || !new_state->visible) {
197 sun8i_ui_layer_disable(layer);
198 return;
199 }
200
201 sun8i_ui_layer_update_attributes(layer, plane);
202 sun8i_ui_layer_update_coord(layer, plane);
203 sun8i_ui_layer_update_buffer(layer, plane);
204}
205
206static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
207 .atomic_check = sun8i_ui_layer_atomic_check,
208 .atomic_update = sun8i_ui_layer_atomic_update,
209};
210
211static const struct drm_plane_funcs sun8i_ui_layer_funcs = {
212 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
213 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
214 .destroy = drm_plane_cleanup,
215 .disable_plane = drm_atomic_helper_disable_plane,
216 .reset = drm_atomic_helper_plane_reset,
217 .update_plane = drm_atomic_helper_update_plane,
218};
219
220static const u32 sun8i_ui_layer_formats[] = {
221 DRM_FORMAT_ABGR1555,
222 DRM_FORMAT_ABGR4444,
223 DRM_FORMAT_ABGR8888,
224 DRM_FORMAT_ARGB1555,
225 DRM_FORMAT_ARGB4444,
226 DRM_FORMAT_ARGB8888,
227 DRM_FORMAT_BGR565,
228 DRM_FORMAT_BGR888,
229 DRM_FORMAT_BGRA5551,
230 DRM_FORMAT_BGRA4444,
231 DRM_FORMAT_BGRA8888,
232 DRM_FORMAT_BGRX8888,
233 DRM_FORMAT_RGB565,
234 DRM_FORMAT_RGB888,
235 DRM_FORMAT_RGBA4444,
236 DRM_FORMAT_RGBA5551,
237 DRM_FORMAT_RGBA8888,
238 DRM_FORMAT_RGBX8888,
239 DRM_FORMAT_XBGR8888,
240 DRM_FORMAT_XRGB8888,
241};
242
243static const uint64_t sun8i_layer_modifiers[] = {
244 DRM_FORMAT_MOD_LINEAR,
245 DRM_FORMAT_MOD_INVALID
246};
247
248struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm,
249 enum drm_plane_type type,
250 struct regmap *regs,
251 int index, int phy_index,
252 int plane_cnt,
253 const struct sun8i_layer_cfg *cfg)
254{
255 struct sun8i_layer *layer;
256 int ret;
257
258 layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL);
259 if (!layer)
260 return ERR_PTR(-ENOMEM);
261
262 layer->type = SUN8I_LAYER_TYPE_UI;
263 layer->index = index;
264 layer->channel = phy_index;
265 layer->overlay = 0;
266 layer->regs = regs;
267 layer->cfg = cfg;
268
269 /* possible crtcs are set later */
270 ret = drm_universal_plane_init(drm, &layer->plane, 0,
271 &sun8i_ui_layer_funcs,
272 sun8i_ui_layer_formats,
273 ARRAY_SIZE(sun8i_ui_layer_formats),
274 sun8i_layer_modifiers, type, NULL);
275 if (ret) {
276 dev_err(drm->dev, "Couldn't initialize layer\n");
277 return ERR_PTR(ret);
278 }
279
280 ret = drm_plane_create_alpha_property(&layer->plane);
281 if (ret) {
282 dev_err(drm->dev, "Couldn't add alpha property\n");
283 return ERR_PTR(ret);
284 }
285
286 ret = drm_plane_create_zpos_property(&layer->plane, index,
287 0, plane_cnt - 1);
288 if (ret) {
289 dev_err(drm->dev, "Couldn't add zpos property\n");
290 return ERR_PTR(ret);
291 }
292
293 drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs);
294
295 return layer;
296}