Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2024 Intel Corporation */
3
4#ifndef _QUICKI2C_DEV_H_
5#define _QUICKI2C_DEV_H_
6
7#include <linux/hid-over-i2c.h>
8#include <linux/workqueue.h>
9
10#define PCI_DEVICE_ID_INTEL_THC_LNL_DEVICE_ID_I2C_PORT1 0xA848
11#define PCI_DEVICE_ID_INTEL_THC_LNL_DEVICE_ID_I2C_PORT2 0xA84A
12#define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT1 0xE348
13#define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT2 0xE34A
14#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT1 0xE448
15#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT2 0xE44A
16#define PCI_DEVICE_ID_INTEL_THC_WCL_DEVICE_ID_I2C_PORT1 0x4D48
17#define PCI_DEVICE_ID_INTEL_THC_WCL_DEVICE_ID_I2C_PORT2 0x4D4A
18#define PCI_DEVICE_ID_INTEL_THC_NVL_H_DEVICE_ID_I2C_PORT1 0xD348
19#define PCI_DEVICE_ID_INTEL_THC_NVL_H_DEVICE_ID_I2C_PORT2 0xD34A
20
21/* Packet size value, the unit is 16 bytes */
22#define MAX_PACKET_SIZE_VALUE_LNL 256
23
24/* HIDI2C special ACPI parameters DSD name */
25#define QUICKI2C_ACPI_METHOD_NAME_ICRS "ICRS"
26#define QUICKI2C_ACPI_METHOD_NAME_ISUB "ISUB"
27
28/* HIDI2C special ACPI parameters DSM methods */
29#define QUICKI2C_ACPI_REVISION_NUM 1
30#define QUICKI2C_ACPI_FUNC_NUM_HID_DESC_ADDR 1
31#define QUICKI2C_ACPI_FUNC_NUM_ACTIVE_LTR_VAL 1
32#define QUICKI2C_ACPI_FUNC_NUM_LP_LTR_VAL 2
33
34#define QUICKI2C_SUBIP_STANDARD_MODE_MAX_SPEED 100000
35#define QUICKI2C_SUBIP_FAST_MODE_MAX_SPEED 400000
36#define QUICKI2C_SUBIP_FASTPLUS_MODE_MAX_SPEED 1000000
37#define QUICKI2C_SUBIP_HIGH_SPEED_MODE_MAX_SPEED 3400000
38
39#define QUICKI2C_DEFAULT_ACTIVE_LTR_VALUE 5
40#define QUICKI2C_DEFAULT_LP_LTR_VALUE 500
41#define QUICKI2C_RPM_TIMEOUT_MS 500
42
43/* PTL Max packet size detection capability is 255 Bytes */
44#define MAX_RX_DETECT_SIZE_PTL 255
45/* NVL Max packet size detection capability is 64K Bytes */
46#define MAX_RX_DETECT_SIZE_NVL 65535
47/* Max interrupt delay capability is 2.56ms */
48#define MAX_RX_INTERRUPT_DELAY 256
49
50/* Default interrupt delay is 1ms, suitable for most devices */
51#define DEFAULT_INTERRUPT_DELAY_US (1 * USEC_PER_MSEC)
52
53/*
54 * THC uses runtime auto suspend to dynamically switch between THC active LTR
55 * and low power LTR to save CPU power.
56 * Default value is 5000ms, that means if no touch event in this time, THC will
57 * change to low power LTR mode.
58 */
59#define DEFAULT_AUTO_SUSPEND_DELAY_MS 5000
60
61enum quicki2c_dev_state {
62 QUICKI2C_NONE,
63 QUICKI2C_RESETING,
64 QUICKI2C_RESETED,
65 QUICKI2C_INITED,
66 QUICKI2C_ENABLED,
67 QUICKI2C_DISABLED,
68};
69
70enum {
71 HIDI2C_ADDRESSING_MODE_7BIT,
72 HIDI2C_ADDRESSING_MODE_10BIT,
73};
74
75/**
76 * struct quicki2c_subip_acpi_parameter - QuickI2C ACPI DSD parameters
77 * @device_address: I2C device slave address
78 * @connection_speed: I2C device expected connection speed
79 * @addressing_mode: I2C device slave address mode, 7bit or 10bit
80 *
81 * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ICRS method, used for
82 * Bus parameter.
83 */
84struct quicki2c_subip_acpi_parameter {
85 u16 device_address;
86 u64 connection_speed;
87 u8 addressing_mode;
88 u8 reserved;
89} __packed;
90
91/**
92 * struct quicki2c_subip_acpi_config - QuickI2C ACPI DSD parameters
93 * @SMHX: Standard Mode (100 kbit/s) Serial Clock Line HIGH Period
94 * @SMLX: Standard Mode (100 kbit/s) Serial Clock Line LOW Period
95 * @SMTD: Standard Mode (100 kbit/s) Serial Data Line Transmit Hold Period
96 * @SMRD: Standard Mode (100 kbit/s) Serial Data Receive Hold Period
97 * @FMHX: Fast Mode (400 kbit/s) Serial Clock Line HIGH Period
98 * @FMLX: Fast Mode (400 kbit/s) Serial Clock Line LOW Period
99 * @FMTD: Fast Mode (400 kbit/s) Serial Data Line Transmit Hold Period
100 * @FMRD: Fast Mode (400 kbit/s) Serial Data Line Receive Hold Period
101 * @FMSL: Maximum length (in ic_clk_cycles) of suppressed spikes
102 * in Standard Mode, Fast Mode and Fast Mode Plus
103 * @FPHX: Fast Mode Plus (1Mbit/sec) Serial Clock Line HIGH Period
104 * @FPLX: Fast Mode Plus (1Mbit/sec) Serial Clock Line LOW Period
105 * @FPTD: Fast Mode Plus (1Mbit/sec) Serial Data Line Transmit HOLD Period
106 * @FPRD: Fast Mode Plus (1Mbit/sec) Serial Data Line Receive HOLD Period
107 * @HMHX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line HIGH Period
108 * @HMLX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line LOW Period
109 * @HMTD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Transmit HOLD Period
110 * @HMRD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Receive HOLD Period
111 * @HMSL: Maximum length (in ic_clk_cycles) of suppressed spikes in High Speed Mode
112 * @FSEN: Maximum Frame Size Feature Enable Control
113 * @FSVL: Maximum Frame Size Value (unit in Bytes)
114 * @INDE: Interrupt Delay Feature Enable Control
115 * @INDV: Interrupt Delay Value (unit in 10 us)
116 *
117 * Those properties get from QUICKI2C_ACPI_METHOD_NAME_ISUB method, used for
118 * I2C timing configure.
119 */
120struct quicki2c_subip_acpi_config {
121 u64 SMHX;
122 u64 SMLX;
123 u64 SMTD;
124 u64 SMRD;
125
126 u64 FMHX;
127 u64 FMLX;
128 u64 FMTD;
129 u64 FMRD;
130 u64 FMSL;
131
132 u64 FPHX;
133 u64 FPLX;
134 u64 FPTD;
135 u64 FPRD;
136
137 u64 HMHX;
138 u64 HMLX;
139 u64 HMTD;
140 u64 HMRD;
141 u64 HMSL;
142
143 u64 FSEN;
144 u64 FSVL;
145 u64 INDE;
146 u64 INDV;
147 u8 reserved;
148};
149
150/**
151 * struct quicki2c_ddata - Driver specific data for quicki2c device
152 * @max_detect_size: Identify max packet size detect for rx
153 * @interrupt_delay: Identify max interrupt detect delay for rx
154 */
155struct quicki2c_ddata {
156 u32 max_detect_size;
157 u32 max_interrupt_delay;
158};
159
160struct device;
161struct pci_dev;
162struct thc_device;
163struct hid_device;
164struct acpi_device;
165
166/**
167 * struct quicki2c_device - THC QuickI2C device struct
168 * @dev: Point to kernel device
169 * @pdev: Point to PCI device
170 * @thc_hw: Point to THC device
171 * @hid_dev: Point to HID device
172 * @acpi_dev: Point to ACPI device
173 * @ddata: Point to QuickI2C platform specific driver data
174 * @state: THC I2C device state
175 * @mem_addr: MMIO memory address
176 * @dev_desc: Device descriptor for HIDI2C protocol
177 * @i2c_slave_addr: HIDI2C device slave address
178 * @hid_desc_addr: Register address for retrieve HID device descriptor
179 * @active_ltr_val: THC active LTR value
180 * @low_power_ltr_val: THC low power LTR value
181 * @i2c_speed_mode: 0 - standard mode, 1 - fast mode, 2 - fast mode plus
182 * @i2c_clock_hcnt: I2C CLK high period time (unit in cycle count)
183 * @i2c_clock_lcnt: I2C CLK low period time (unit in cycle count)
184 * @report_descriptor: Store a copy of device report descriptor
185 * @input_buf: Store a copy of latest input report data
186 * @report_buf: Store a copy of latest input/output report packet from set/get feature
187 * @report_len: The length of input/output report packet
188 * @reset_ack_wq: Workqueue for waiting reset response from device
189 * @reset_ack: Indicate reset response received or not
190 * @i2c_max_frame_size_enable: Indicate max frame size feature enabled or not
191 * @i2c_max_frame_size: Max RX frame size (unit in Bytes)
192 * @i2c_int_delay_enable: Indicate interrupt delay feature enabled or not
193 * @i2c_int_delay: Interrupt detection delay value (unit in 10 us)
194 */
195struct quicki2c_device {
196 struct device *dev;
197 struct pci_dev *pdev;
198 struct thc_device *thc_hw;
199 struct hid_device *hid_dev;
200 struct acpi_device *acpi_dev;
201 const struct quicki2c_ddata *ddata;
202 enum quicki2c_dev_state state;
203
204 void __iomem *mem_addr;
205
206 struct hidi2c_dev_descriptor dev_desc;
207 u8 i2c_slave_addr;
208 u16 hid_desc_addr;
209
210 u32 active_ltr_val;
211 u32 low_power_ltr_val;
212
213 u32 i2c_speed_mode;
214 u32 i2c_clock_hcnt;
215 u32 i2c_clock_lcnt;
216
217 u8 *report_descriptor;
218 u8 *input_buf;
219 u8 *report_buf;
220 size_t report_len;
221
222 wait_queue_head_t reset_ack_wq;
223 bool reset_ack;
224
225 u32 i2c_max_frame_size_enable;
226 u32 i2c_max_frame_size;
227 u32 i2c_int_delay_enable;
228 u32 i2c_int_delay;
229};
230
231#endif /* _QUICKI2C_DEV_H_ */