Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * drd.c - DesignWare USB3 DRD Controller Dual-role support
4 *
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com
6 *
7 * Authors: Roger Quadros <rogerq@ti.com>
8 */
9
10#include <linux/extcon.h>
11#include <linux/of_platform.h>
12#include <linux/platform_device.h>
13#include <linux/property.h>
14
15#include "debug.h"
16#include "core.h"
17#include "gadget.h"
18
19static void dwc3_otg_disable_events(struct dwc3 *dwc, u32 disable_mask)
20{
21 u32 reg = dwc3_readl(dwc, DWC3_OEVTEN);
22
23 reg &= ~(disable_mask);
24 dwc3_writel(dwc, DWC3_OEVTEN, reg);
25}
26
27static void dwc3_otg_enable_events(struct dwc3 *dwc, u32 enable_mask)
28{
29 u32 reg = dwc3_readl(dwc, DWC3_OEVTEN);
30
31 reg |= (enable_mask);
32 dwc3_writel(dwc, DWC3_OEVTEN, reg);
33}
34
35static void dwc3_otg_clear_events(struct dwc3 *dwc)
36{
37 u32 reg = dwc3_readl(dwc, DWC3_OEVT);
38
39 dwc3_writel(dwc, DWC3_OEVTEN, reg);
40}
41
42#define DWC3_OTG_ALL_EVENTS (DWC3_OEVTEN_XHCIRUNSTPSETEN | \
43 DWC3_OEVTEN_DEVRUNSTPSETEN | DWC3_OEVTEN_HIBENTRYEN | \
44 DWC3_OEVTEN_CONIDSTSCHNGEN | DWC3_OEVTEN_HRRCONFNOTIFEN | \
45 DWC3_OEVTEN_HRRINITNOTIFEN | DWC3_OEVTEN_ADEVIDLEEN | \
46 DWC3_OEVTEN_ADEVBHOSTENDEN | DWC3_OEVTEN_ADEVHOSTEN | \
47 DWC3_OEVTEN_ADEVHNPCHNGEN | DWC3_OEVTEN_ADEVSRPDETEN | \
48 DWC3_OEVTEN_ADEVSESSENDDETEN | DWC3_OEVTEN_BDEVBHOSTENDEN | \
49 DWC3_OEVTEN_BDEVHNPCHNGEN | DWC3_OEVTEN_BDEVSESSVLDDETEN | \
50 DWC3_OEVTEN_BDEVVBUSCHNGEN)
51
52static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc)
53{
54 struct dwc3 *dwc = _dwc;
55
56 spin_lock(&dwc->lock);
57 if (dwc->otg_restart_host) {
58 dwc3_otg_host_init(dwc);
59 dwc->otg_restart_host = false;
60 }
61
62 spin_unlock(&dwc->lock);
63
64 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
65
66 return IRQ_HANDLED;
67}
68
69static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
70{
71 u32 reg;
72 struct dwc3 *dwc = _dwc;
73 irqreturn_t ret = IRQ_NONE;
74
75 reg = dwc3_readl(dwc, DWC3_OEVT);
76 if (reg) {
77 /* ignore non OTG events, we can't disable them in OEVTEN */
78 if (!(reg & DWC3_OTG_ALL_EVENTS)) {
79 dwc3_writel(dwc, DWC3_OEVT, reg);
80 return IRQ_NONE;
81 }
82
83 if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST &&
84 !(reg & DWC3_OEVT_DEVICEMODE))
85 dwc->otg_restart_host = true;
86 dwc3_writel(dwc, DWC3_OEVT, reg);
87 ret = IRQ_WAKE_THREAD;
88 }
89
90 return ret;
91}
92
93static void dwc3_otgregs_init(struct dwc3 *dwc)
94{
95 u32 reg;
96
97 /*
98 * Prevent host/device reset from resetting OTG core.
99 * If we don't do this then xhci_reset (USBCMD.HCRST) will reset
100 * the signal outputs sent to the PHY, the OTG FSM logic of the
101 * core and also the resets to the VBUS filters inside the core.
102 */
103 reg = dwc3_readl(dwc, DWC3_OCFG);
104 reg |= DWC3_OCFG_SFTRSTMASK;
105 dwc3_writel(dwc, DWC3_OCFG, reg);
106
107 /* Disable hibernation for simplicity */
108 reg = dwc3_readl(dwc, DWC3_GCTL);
109 reg &= ~DWC3_GCTL_GBLHIBERNATIONEN;
110 dwc3_writel(dwc, DWC3_GCTL, reg);
111
112 /*
113 * Initialize OTG registers as per
114 * Figure 11-4 OTG Driver Overall Programming Flow
115 */
116 /* OCFG.SRPCap = 0, OCFG.HNPCap = 0 */
117 reg = dwc3_readl(dwc, DWC3_OCFG);
118 reg &= ~(DWC3_OCFG_SRPCAP | DWC3_OCFG_HNPCAP);
119 dwc3_writel(dwc, DWC3_OCFG, reg);
120 /* OEVT = FFFF */
121 dwc3_otg_clear_events(dwc);
122 /* OEVTEN = 0 */
123 dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS);
124 /* OEVTEN.ConIDStsChngEn = 1. Instead we enable all events */
125 dwc3_otg_enable_events(dwc, DWC3_OTG_ALL_EVENTS);
126 /*
127 * OCTL.PeriMode = 1, OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0,
128 * OCTL.HNPReq = 0
129 */
130 reg = dwc3_readl(dwc, DWC3_OCTL);
131 reg |= DWC3_OCTL_PERIMODE;
132 reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN |
133 DWC3_OCTL_HNPREQ);
134 dwc3_writel(dwc, DWC3_OCTL, reg);
135}
136
137static int dwc3_otg_get_irq(struct dwc3 *dwc)
138{
139 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
140 int irq;
141
142 irq = platform_get_irq_byname_optional(dwc3_pdev, "otg");
143 if (irq > 0)
144 goto out;
145
146 if (irq == -EPROBE_DEFER)
147 goto out;
148
149 irq = platform_get_irq_byname_optional(dwc3_pdev, "dwc_usb3");
150 if (irq > 0)
151 goto out;
152
153 if (irq == -EPROBE_DEFER)
154 goto out;
155
156 irq = platform_get_irq(dwc3_pdev, 0);
157 if (irq > 0)
158 goto out;
159
160 if (!irq)
161 irq = -EINVAL;
162
163out:
164 return irq;
165}
166
167void dwc3_otg_init(struct dwc3 *dwc)
168{
169 u32 reg;
170
171 /*
172 * As per Figure 11-4 OTG Driver Overall Programming Flow,
173 * block "Initialize GCTL for OTG operation".
174 */
175 /* GCTL.PrtCapDir=2'b11 */
176 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG, true);
177 /* GUSB2PHYCFG0.SusPHY=0 */
178 reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
179 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
180 dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
181
182 /* Initialize OTG registers */
183 dwc3_otgregs_init(dwc);
184}
185
186void dwc3_otg_exit(struct dwc3 *dwc)
187{
188 /* disable all OTG IRQs */
189 dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS);
190 /* clear all events */
191 dwc3_otg_clear_events(dwc);
192}
193
194/* should be called before Host controller driver is started */
195void dwc3_otg_host_init(struct dwc3 *dwc)
196{
197 u32 reg;
198
199 /* As per Figure 11-10 A-Device Flow Diagram */
200 /* OCFG.HNPCap = 0, OCFG.SRPCap = 0. Already 0 */
201
202 /*
203 * OCTL.PeriMode=0, OCTL.TermSelDLPulse = 0,
204 * OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0
205 */
206 reg = dwc3_readl(dwc, DWC3_OCTL);
207 reg &= ~(DWC3_OCTL_PERIMODE | DWC3_OCTL_TERMSELIDPULSE |
208 DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN);
209 dwc3_writel(dwc, DWC3_OCTL, reg);
210
211 /*
212 * OCFG.DisPrtPwrCutoff = 0/1
213 */
214 reg = dwc3_readl(dwc, DWC3_OCFG);
215 reg &= ~DWC3_OCFG_DISPWRCUTTOFF;
216 dwc3_writel(dwc, DWC3_OCFG, reg);
217
218 /*
219 * OCFG.SRPCap = 1, OCFG.HNPCap = GHWPARAMS6.HNP_CAP
220 * We don't want SRP/HNP for simple dual-role so leave
221 * these disabled.
222 */
223
224 /*
225 * OEVTEN.OTGADevHostEvntEn = 1
226 * OEVTEN.OTGADevSessEndDetEvntEn = 1
227 * We don't want HNP/role-swap so leave these disabled.
228 */
229
230 /* GUSB2PHYCFG.ULPIAutoRes = 1/0, GUSB2PHYCFG.SusPHY = 1 */
231 if (!dwc->dis_u2_susphy_quirk) {
232 reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
233 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
234 dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
235 }
236
237 /* Set Port Power to enable VBUS: OCTL.PrtPwrCtl = 1 */
238 reg = dwc3_readl(dwc, DWC3_OCTL);
239 reg |= DWC3_OCTL_PRTPWRCTL;
240 dwc3_writel(dwc, DWC3_OCTL, reg);
241}
242
243/* should be called after Host controller driver is stopped */
244static void dwc3_otg_host_exit(struct dwc3 *dwc)
245{
246 u32 reg;
247
248 /*
249 * Exit from A-device flow as per
250 * Figure 11-4 OTG Driver Overall Programming Flow
251 */
252
253 /*
254 * OEVTEN.OTGADevBHostEndEvntEn=0, OEVTEN.OTGADevHNPChngEvntEn=0
255 * OEVTEN.OTGADevSessEndDetEvntEn=0,
256 * OEVTEN.OTGADevHostEvntEn = 0
257 * But we don't disable any OTG events
258 */
259
260 /* OCTL.HstSetHNPEn = 0, OCTL.PrtPwrCtl=0 */
261 reg = dwc3_readl(dwc, DWC3_OCTL);
262 reg &= ~(DWC3_OCTL_HSTSETHNPEN | DWC3_OCTL_PRTPWRCTL);
263 dwc3_writel(dwc, DWC3_OCTL, reg);
264}
265
266/* should be called before the gadget controller driver is started */
267static void dwc3_otg_device_init(struct dwc3 *dwc)
268{
269 u32 reg;
270
271 /* As per Figure 11-20 B-Device Flow Diagram */
272
273 /*
274 * OCFG.HNPCap = GHWPARAMS6.HNP_CAP, OCFG.SRPCap = 1
275 * but we keep them 0 for simple dual-role operation.
276 */
277 reg = dwc3_readl(dwc, DWC3_OCFG);
278 /* OCFG.OTGSftRstMsk = 0/1 */
279 reg |= DWC3_OCFG_SFTRSTMASK;
280 dwc3_writel(dwc, DWC3_OCFG, reg);
281 /*
282 * OCTL.PeriMode = 1
283 * OCTL.TermSelDLPulse = 0/1, OCTL.HNPReq = 0
284 * OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0
285 */
286 reg = dwc3_readl(dwc, DWC3_OCTL);
287 reg |= DWC3_OCTL_PERIMODE;
288 reg &= ~(DWC3_OCTL_TERMSELIDPULSE | DWC3_OCTL_HNPREQ |
289 DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN);
290 dwc3_writel(dwc, DWC3_OCTL, reg);
291 /* OEVTEN.OTGBDevSesVldDetEvntEn = 1 */
292 dwc3_otg_enable_events(dwc, DWC3_OEVTEN_BDEVSESSVLDDETEN);
293 /* GUSB2PHYCFG.ULPIAutoRes = 0, GUSB2PHYCFG0.SusPHY = 1 */
294 if (!dwc->dis_u2_susphy_quirk) {
295 reg = dwc3_readl(dwc, DWC3_GUSB2PHYCFG(0));
296 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
297 dwc3_writel(dwc, DWC3_GUSB2PHYCFG(0), reg);
298 }
299 /* GCTL.GblHibernationEn = 0. Already 0. */
300}
301
302/* should be called after the gadget controller driver is stopped */
303static void dwc3_otg_device_exit(struct dwc3 *dwc)
304{
305 u32 reg;
306
307 /*
308 * Exit from B-device flow as per
309 * Figure 11-4 OTG Driver Overall Programming Flow
310 */
311
312 /*
313 * OEVTEN.OTGBDevHNPChngEvntEn = 0
314 * OEVTEN.OTGBDevVBusChngEvntEn = 0
315 * OEVTEN.OTGBDevBHostEndEvntEn = 0
316 */
317 dwc3_otg_disable_events(dwc, DWC3_OEVTEN_BDEVHNPCHNGEN |
318 DWC3_OEVTEN_BDEVVBUSCHNGEN |
319 DWC3_OEVTEN_BDEVBHOSTENDEN);
320
321 /* OCTL.DevSetHNPEn = 0, OCTL.HNPReq = 0, OCTL.PeriMode=1 */
322 reg = dwc3_readl(dwc, DWC3_OCTL);
323 reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HNPREQ);
324 reg |= DWC3_OCTL_PERIMODE;
325 dwc3_writel(dwc, DWC3_OCTL, reg);
326}
327
328void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus)
329{
330 int ret;
331 u32 reg;
332 int id;
333 unsigned long flags;
334 int i;
335
336 if (dwc->dr_mode != USB_DR_MODE_OTG)
337 return;
338
339 /* don't do anything if debug user changed role to not OTG */
340 if (dwc->current_dr_role != DWC3_GCTL_PRTCAP_OTG)
341 return;
342
343 if (!ignore_idstatus) {
344 reg = dwc3_readl(dwc, DWC3_OSTS);
345 id = !!(reg & DWC3_OSTS_CONIDSTS);
346
347 dwc->desired_otg_role = id ? DWC3_OTG_ROLE_DEVICE :
348 DWC3_OTG_ROLE_HOST;
349 }
350
351 if (dwc->desired_otg_role == dwc->current_otg_role)
352 return;
353
354 switch (dwc->current_otg_role) {
355 case DWC3_OTG_ROLE_HOST:
356 dwc3_host_exit(dwc);
357 spin_lock_irqsave(&dwc->lock, flags);
358 dwc3_otg_host_exit(dwc);
359 spin_unlock_irqrestore(&dwc->lock, flags);
360 break;
361 case DWC3_OTG_ROLE_DEVICE:
362 dwc3_gadget_exit(dwc);
363 spin_lock_irqsave(&dwc->lock, flags);
364 dwc3_event_buffers_cleanup(dwc);
365 dwc3_otg_device_exit(dwc);
366 spin_unlock_irqrestore(&dwc->lock, flags);
367 break;
368 default:
369 break;
370 }
371
372 spin_lock_irqsave(&dwc->lock, flags);
373
374 dwc->current_otg_role = dwc->desired_otg_role;
375
376 spin_unlock_irqrestore(&dwc->lock, flags);
377
378 switch (dwc->desired_otg_role) {
379 case DWC3_OTG_ROLE_HOST:
380 spin_lock_irqsave(&dwc->lock, flags);
381 dwc3_otgregs_init(dwc);
382 dwc3_otg_host_init(dwc);
383 spin_unlock_irqrestore(&dwc->lock, flags);
384 dwc3_pre_set_role(dwc, USB_ROLE_HOST);
385 ret = dwc3_host_init(dwc);
386 if (ret) {
387 dev_err(dwc->dev, "failed to initialize host\n");
388 } else {
389 if (dwc->usb2_phy)
390 otg_set_vbus(dwc->usb2_phy->otg, true);
391 for (i = 0; i < dwc->num_usb2_ports; i++) {
392 if (dwc->usb2_generic_phy[i]) {
393 phy_set_mode(dwc->usb2_generic_phy[i],
394 PHY_MODE_USB_HOST);
395 }
396 }
397 }
398 break;
399 case DWC3_OTG_ROLE_DEVICE:
400 spin_lock_irqsave(&dwc->lock, flags);
401 dwc3_otgregs_init(dwc);
402 dwc3_otg_device_init(dwc);
403 dwc3_event_buffers_setup(dwc);
404 spin_unlock_irqrestore(&dwc->lock, flags);
405
406 if (dwc->usb2_phy)
407 otg_set_vbus(dwc->usb2_phy->otg, false);
408 if (dwc->usb2_generic_phy[0])
409 phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE);
410 dwc3_pre_set_role(dwc, USB_ROLE_DEVICE);
411 ret = dwc3_gadget_init(dwc);
412 if (ret)
413 dev_err(dwc->dev, "failed to initialize peripheral\n");
414 break;
415 default:
416 break;
417 }
418}
419
420static void dwc3_drd_update(struct dwc3 *dwc)
421{
422 int id;
423
424 if (dwc->edev) {
425 id = extcon_get_state(dwc->edev, EXTCON_USB_HOST);
426 if (id < 0)
427 id = 0;
428 dwc3_set_mode(dwc, id ?
429 DWC3_GCTL_PRTCAP_HOST :
430 DWC3_GCTL_PRTCAP_DEVICE);
431 }
432}
433
434static int dwc3_drd_notifier(struct notifier_block *nb,
435 unsigned long event, void *ptr)
436{
437 struct dwc3 *dwc = container_of(nb, struct dwc3, edev_nb);
438 u32 mode = event ? DWC3_GCTL_PRTCAP_HOST : DWC3_GCTL_PRTCAP_DEVICE;
439 enum usb_role role = mode == DWC3_GCTL_PRTCAP_HOST ?
440 USB_ROLE_HOST : USB_ROLE_DEVICE;
441
442 dwc3_pre_set_role(dwc, role);
443 dwc3_set_mode(dwc, mode);
444
445 return NOTIFY_DONE;
446}
447
448#if IS_ENABLED(CONFIG_USB_ROLE_SWITCH)
449#define ROLE_SWITCH 1
450static int dwc3_usb_role_switch_set(struct usb_role_switch *sw,
451 enum usb_role role)
452{
453 struct dwc3 *dwc = usb_role_switch_get_drvdata(sw);
454 u32 mode;
455
456 switch (role) {
457 case USB_ROLE_HOST:
458 mode = DWC3_GCTL_PRTCAP_HOST;
459 break;
460 case USB_ROLE_DEVICE:
461 mode = DWC3_GCTL_PRTCAP_DEVICE;
462 break;
463 default:
464 if (dwc->role_switch_default_mode == USB_DR_MODE_HOST)
465 mode = DWC3_GCTL_PRTCAP_HOST;
466 else
467 mode = DWC3_GCTL_PRTCAP_DEVICE;
468 break;
469 }
470
471 dwc3_pre_set_role(dwc, role);
472 dwc3_set_mode(dwc, mode);
473 return 0;
474}
475
476static enum usb_role dwc3_usb_role_switch_get(struct usb_role_switch *sw)
477{
478 struct dwc3 *dwc = usb_role_switch_get_drvdata(sw);
479 unsigned long flags;
480 enum usb_role role;
481
482 spin_lock_irqsave(&dwc->lock, flags);
483 switch (dwc->current_dr_role) {
484 case DWC3_GCTL_PRTCAP_HOST:
485 role = USB_ROLE_HOST;
486 break;
487 case DWC3_GCTL_PRTCAP_DEVICE:
488 role = USB_ROLE_DEVICE;
489 break;
490 case DWC3_GCTL_PRTCAP_OTG:
491 role = dwc->current_otg_role;
492 break;
493 default:
494 if (dwc->role_switch_default_mode == USB_DR_MODE_HOST)
495 role = USB_ROLE_HOST;
496 else
497 role = USB_ROLE_DEVICE;
498 break;
499 }
500 spin_unlock_irqrestore(&dwc->lock, flags);
501 return role;
502}
503
504static int dwc3_setup_role_switch(struct dwc3 *dwc)
505{
506 struct usb_role_switch_desc dwc3_role_switch = {NULL};
507 u32 mode;
508
509 dwc->role_switch_default_mode = usb_get_role_switch_default_mode(dwc->dev);
510 if (dwc->role_switch_default_mode == USB_DR_MODE_HOST) {
511 mode = DWC3_GCTL_PRTCAP_HOST;
512 } else {
513 dwc->role_switch_default_mode = USB_DR_MODE_PERIPHERAL;
514 mode = DWC3_GCTL_PRTCAP_DEVICE;
515 }
516 dwc3_set_mode(dwc, mode);
517
518 dwc3_role_switch.fwnode = dev_fwnode(dwc->dev);
519 dwc3_role_switch.set = dwc3_usb_role_switch_set;
520 dwc3_role_switch.get = dwc3_usb_role_switch_get;
521 dwc3_role_switch.driver_data = dwc;
522 dwc3_role_switch.allow_userspace_control = true;
523 dwc->role_sw = usb_role_switch_register(dwc->dev, &dwc3_role_switch);
524 if (IS_ERR(dwc->role_sw))
525 return PTR_ERR(dwc->role_sw);
526
527 if (dwc->dev->of_node) {
528 /* populate connector entry */
529 int ret = devm_of_platform_populate(dwc->dev);
530
531 if (ret) {
532 usb_role_switch_unregister(dwc->role_sw);
533 dwc->role_sw = NULL;
534 dev_err(dwc->dev, "DWC3 platform devices creation failed: %i\n", ret);
535 return ret;
536 }
537 }
538
539 return 0;
540}
541#else
542#define ROLE_SWITCH 0
543#define dwc3_setup_role_switch(x) 0
544#endif
545
546int dwc3_drd_init(struct dwc3 *dwc)
547{
548 int ret, irq;
549
550 if (ROLE_SWITCH &&
551 device_property_read_bool(dwc->dev, "usb-role-switch"))
552 return dwc3_setup_role_switch(dwc);
553
554 if (dwc->edev) {
555 dwc->edev_nb.notifier_call = dwc3_drd_notifier;
556 ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST,
557 &dwc->edev_nb);
558 if (ret < 0) {
559 dev_err(dwc->dev, "couldn't register cable notifier\n");
560 return ret;
561 }
562
563 dwc3_drd_update(dwc);
564 } else {
565 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG, true);
566
567 /* use OTG block to get ID event */
568 irq = dwc3_otg_get_irq(dwc);
569 if (irq < 0)
570 return irq;
571
572 dwc->otg_irq = irq;
573
574 /* disable all OTG IRQs */
575 dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS);
576 /* clear all events */
577 dwc3_otg_clear_events(dwc);
578
579 ret = request_threaded_irq(dwc->otg_irq, dwc3_otg_irq,
580 dwc3_otg_thread_irq,
581 IRQF_SHARED, "dwc3-otg", dwc);
582 if (ret) {
583 dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
584 dwc->otg_irq, ret);
585 ret = -ENODEV;
586 return ret;
587 }
588
589 dwc3_otg_init(dwc);
590 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
591 }
592
593 return 0;
594}
595
596void dwc3_drd_exit(struct dwc3 *dwc)
597{
598 unsigned long flags;
599
600 if (dwc->role_sw)
601 usb_role_switch_unregister(dwc->role_sw);
602
603 if (dwc->edev)
604 extcon_unregister_notifier(dwc->edev, EXTCON_USB_HOST,
605 &dwc->edev_nb);
606
607 cancel_work_sync(&dwc->drd_work);
608
609 /* debug user might have changed role, clean based on current role */
610 switch (dwc->current_dr_role) {
611 case DWC3_GCTL_PRTCAP_HOST:
612 dwc3_host_exit(dwc);
613 break;
614 case DWC3_GCTL_PRTCAP_DEVICE:
615 dwc3_gadget_exit(dwc);
616 dwc3_event_buffers_cleanup(dwc);
617 break;
618 case DWC3_GCTL_PRTCAP_OTG:
619 dwc3_otg_exit(dwc);
620 spin_lock_irqsave(&dwc->lock, flags);
621 dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE;
622 spin_unlock_irqrestore(&dwc->lock, flags);
623 dwc3_otg_update(dwc, 1);
624 break;
625 default:
626 break;
627 }
628
629 if (dwc->otg_irq)
630 free_irq(dwc->otg_irq, dwc);
631}