Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2/*
3 * Copyright (c) 2014-2020 Intel Corporation. All rights reserved.
4 */
5
6#ifndef OPA_PORT_INFO_H
7#define OPA_PORT_INFO_H
8
9#include <rdma/opa_smi.h>
10
11#define OPA_PORT_LINK_MODE_NOP 0 /* No change */
12#define OPA_PORT_LINK_MODE_OPA 4 /* Port mode is OPA */
13
14#define OPA_PORT_PACKET_FORMAT_NOP 0 /* No change */
15#define OPA_PORT_PACKET_FORMAT_8B 1 /* Format 8B */
16#define OPA_PORT_PACKET_FORMAT_9B 2 /* Format 9B */
17#define OPA_PORT_PACKET_FORMAT_10B 4 /* Format 10B */
18#define OPA_PORT_PACKET_FORMAT_16B 8 /* Format 16B */
19
20#define OPA_PORT_LTP_CRC_MODE_NONE 0 /* No change */
21#define OPA_PORT_LTP_CRC_MODE_14 1 /* 14-bit LTP CRC mode (optional) */
22#define OPA_PORT_LTP_CRC_MODE_16 2 /* 16-bit LTP CRC mode */
23#define OPA_PORT_LTP_CRC_MODE_48 4 /* 48-bit LTP CRC mode (optional) */
24#define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */
25
26/* Link Down / Neighbor Link Down Reason; indicated as follows: */
27#define OPA_LINKDOWN_REASON_NONE 0 /* No specified reason */
28#define OPA_LINKDOWN_REASON_RCV_ERROR_0 1
29#define OPA_LINKDOWN_REASON_BAD_PKT_LEN 2
30#define OPA_LINKDOWN_REASON_PKT_TOO_LONG 3
31#define OPA_LINKDOWN_REASON_PKT_TOO_SHORT 4
32#define OPA_LINKDOWN_REASON_BAD_SLID 5
33#define OPA_LINKDOWN_REASON_BAD_DLID 6
34#define OPA_LINKDOWN_REASON_BAD_L2 7
35#define OPA_LINKDOWN_REASON_BAD_SC 8
36#define OPA_LINKDOWN_REASON_RCV_ERROR_8 9
37#define OPA_LINKDOWN_REASON_BAD_MID_TAIL 10
38#define OPA_LINKDOWN_REASON_RCV_ERROR_10 11
39#define OPA_LINKDOWN_REASON_PREEMPT_ERROR 12
40#define OPA_LINKDOWN_REASON_PREEMPT_VL15 13
41#define OPA_LINKDOWN_REASON_BAD_VL_MARKER 14
42#define OPA_LINKDOWN_REASON_RCV_ERROR_14 15
43#define OPA_LINKDOWN_REASON_RCV_ERROR_15 16
44#define OPA_LINKDOWN_REASON_BAD_HEAD_DIST 17
45#define OPA_LINKDOWN_REASON_BAD_TAIL_DIST 18
46#define OPA_LINKDOWN_REASON_BAD_CTRL_DIST 19
47#define OPA_LINKDOWN_REASON_BAD_CREDIT_ACK 20
48#define OPA_LINKDOWN_REASON_UNSUPPORTED_VL_MARKER 21
49#define OPA_LINKDOWN_REASON_BAD_PREEMPT 22
50#define OPA_LINKDOWN_REASON_BAD_CONTROL_FLIT 23
51#define OPA_LINKDOWN_REASON_EXCEED_MULTICAST_LIMIT 24
52#define OPA_LINKDOWN_REASON_RCV_ERROR_24 25
53#define OPA_LINKDOWN_REASON_RCV_ERROR_25 26
54#define OPA_LINKDOWN_REASON_RCV_ERROR_26 27
55#define OPA_LINKDOWN_REASON_RCV_ERROR_27 28
56#define OPA_LINKDOWN_REASON_RCV_ERROR_28 29
57#define OPA_LINKDOWN_REASON_RCV_ERROR_29 30
58#define OPA_LINKDOWN_REASON_RCV_ERROR_30 31
59#define OPA_LINKDOWN_REASON_EXCESSIVE_BUFFER_OVERRUN 32
60#define OPA_LINKDOWN_REASON_UNKNOWN 33
61/* 34 -reserved */
62#define OPA_LINKDOWN_REASON_REBOOT 35
63#define OPA_LINKDOWN_REASON_NEIGHBOR_UNKNOWN 36
64/* 37-38 reserved */
65#define OPA_LINKDOWN_REASON_FM_BOUNCE 39
66#define OPA_LINKDOWN_REASON_SPEED_POLICY 40
67#define OPA_LINKDOWN_REASON_WIDTH_POLICY 41
68/* 42-48 reserved */
69#define OPA_LINKDOWN_REASON_DISCONNECTED 49
70#define OPA_LINKDOWN_REASON_LOCAL_MEDIA_NOT_INSTALLED 50
71#define OPA_LINKDOWN_REASON_NOT_INSTALLED 51
72#define OPA_LINKDOWN_REASON_CHASSIS_CONFIG 52
73/* 53 reserved */
74#define OPA_LINKDOWN_REASON_END_TO_END_NOT_INSTALLED 54
75/* 55 reserved */
76#define OPA_LINKDOWN_REASON_POWER_POLICY 56
77#define OPA_LINKDOWN_REASON_LINKSPEED_POLICY 57
78#define OPA_LINKDOWN_REASON_LINKWIDTH_POLICY 58
79/* 59 reserved */
80#define OPA_LINKDOWN_REASON_SWITCH_MGMT 60
81#define OPA_LINKDOWN_REASON_SMA_DISABLED 61
82/* 62 reserved */
83#define OPA_LINKDOWN_REASON_TRANSIENT 63
84/* 64-255 reserved */
85
86/* OPA Link Init reason; indicated as follows: */
87/* 3-7; 11-15 reserved; 8-15 cleared on Polling->LinkUp */
88#define OPA_LINKINIT_REASON_NOP 0
89#define OPA_LINKINIT_REASON_LINKUP (1 << 4)
90#define OPA_LINKINIT_REASON_FLAPPING (2 << 4)
91#define OPA_LINKINIT_REASON_CLEAR (8 << 4)
92#define OPA_LINKINIT_OUTSIDE_POLICY (8 << 4)
93#define OPA_LINKINIT_QUARANTINED (9 << 4)
94#define OPA_LINKINIT_INSUFIC_CAPABILITY (10 << 4)
95
96#define OPA_LINK_SPEED_NOP 0x0000 /* no change */
97#define OPA_LINK_SPEED_12_5G 0x0001 /* 12.5 Gbps */
98#define OPA_LINK_SPEED_25G 0x0002 /* 25.78125 Gbps */
99#define OPA_LINK_SPEED_50G 0x0004 /* 53.125 Gbps */
100#define OPA_LINK_SPEED_100G 0x0008 /* 106.25 Gbps */
101
102#define OPA_LINK_WIDTH_1X 0x0001
103#define OPA_LINK_WIDTH_2X 0x0002
104#define OPA_LINK_WIDTH_3X 0x0004
105#define OPA_LINK_WIDTH_4X 0x0008
106
107#define OPA_CAP_MASK3_IsEthOnFabricSupported (1 << 13)
108#define OPA_CAP_MASK3_IsSnoopSupported (1 << 7)
109#define OPA_CAP_MASK3_IsAsyncSC2VLSupported (1 << 6)
110#define OPA_CAP_MASK3_IsAddrRangeConfigSupported (1 << 5)
111#define OPA_CAP_MASK3_IsPassThroughSupported (1 << 4)
112#define OPA_CAP_MASK3_IsSharedSpaceSupported (1 << 3)
113/* reserved (1 << 2) */
114#define OPA_CAP_MASK3_IsVLMarkerSupported (1 << 1)
115#define OPA_CAP_MASK3_IsVLrSupported (1 << 0)
116
117enum {
118 OPA_PORT_PHYS_CONF_DISCONNECTED = 0,
119 OPA_PORT_PHYS_CONF_STANDARD = 1,
120 OPA_PORT_PHYS_CONF_FIXED = 2,
121 OPA_PORT_PHYS_CONF_VARIABLE = 3,
122 OPA_PORT_PHYS_CONF_SI_PHOTO = 4
123};
124
125enum port_info_field_masks {
126 /* vl.cap */
127 OPA_PI_MASK_VL_CAP = 0x1F,
128 /* port_states.ledenable_offlinereason */
129 OPA_PI_MASK_OFFLINE_REASON = 0x0F,
130 OPA_PI_MASK_LED_ENABLE = 0x40,
131 /* port_states.unsleepstate_downdefstate */
132 OPA_PI_MASK_UNSLEEP_STATE = 0xF0,
133 OPA_PI_MASK_DOWNDEF_STATE = 0x0F,
134 /* port_states.portphysstate_portstate */
135 OPA_PI_MASK_PORT_PHYSICAL_STATE = 0xF0,
136 OPA_PI_MASK_PORT_STATE = 0x0F,
137 /* port_phys_conf */
138 OPA_PI_MASK_PORT_PHYSICAL_CONF = 0x0F,
139 /* collectivemask_multicastmask */
140 OPA_PI_MASK_COLLECT_MASK = 0x38,
141 OPA_PI_MASK_MULTICAST_MASK = 0x07,
142 /* mkeyprotect_lmc */
143 OPA_PI_MASK_MKEY_PROT_BIT = 0xC0,
144 OPA_PI_MASK_LMC = 0x0F,
145 /* smsl */
146 OPA_PI_MASK_SMSL = 0x1F,
147 /* partenforce_filterraw */
148 /* Filter Raw In/Out bits 1 and 2 were removed */
149 OPA_PI_MASK_LINKINIT_REASON = 0xF0,
150 OPA_PI_MASK_PARTITION_ENFORCE_IN = 0x08,
151 OPA_PI_MASK_PARTITION_ENFORCE_OUT = 0x04,
152 /* operational_vls */
153 OPA_PI_MASK_OPERATIONAL_VL = 0x1F,
154 /* sa_qp */
155 OPA_PI_MASK_SA_QP = 0x00FFFFFF,
156 /* sm_trap_qp */
157 OPA_PI_MASK_SM_TRAP_QP = 0x00FFFFFF,
158 /* localphy_overrun_errors */
159 OPA_PI_MASK_LOCAL_PHY_ERRORS = 0xF0,
160 OPA_PI_MASK_OVERRUN_ERRORS = 0x0F,
161 /* clientrereg_subnettimeout */
162 OPA_PI_MASK_CLIENT_REREGISTER = 0x80,
163 OPA_PI_MASK_SUBNET_TIMEOUT = 0x1F,
164 /* port_link_mode */
165 OPA_PI_MASK_PORT_LINK_SUPPORTED = (0x001F << 10),
166 OPA_PI_MASK_PORT_LINK_ENABLED = (0x001F << 5),
167 OPA_PI_MASK_PORT_LINK_ACTIVE = (0x001F << 0),
168 /* port_link_crc_mode */
169 OPA_PI_MASK_PORT_LINK_CRC_SUPPORTED = 0x0F00,
170 OPA_PI_MASK_PORT_LINK_CRC_ENABLED = 0x00F0,
171 OPA_PI_MASK_PORT_LINK_CRC_ACTIVE = 0x000F,
172 /* port_mode */
173 OPA_PI_MASK_PORT_MODE_SECURITY_CHECK = 0x0001,
174 OPA_PI_MASK_PORT_MODE_16B_TRAP_QUERY = 0x0002,
175 OPA_PI_MASK_PORT_MODE_PKEY_CONVERT = 0x0004,
176 OPA_PI_MASK_PORT_MODE_SC2SC_MAPPING = 0x0008,
177 OPA_PI_MASK_PORT_MODE_VL_MARKER = 0x0010,
178 OPA_PI_MASK_PORT_PASS_THROUGH = 0x0020,
179 OPA_PI_MASK_PORT_ACTIVE_OPTOMIZE = 0x0040,
180 /* flit_control.interleave */
181 OPA_PI_MASK_INTERLEAVE_DIST_SUP = (0x0003 << 12),
182 OPA_PI_MASK_INTERLEAVE_DIST_ENABLE = (0x0003 << 10),
183 OPA_PI_MASK_INTERLEAVE_MAX_NEST_TX = (0x001F << 5),
184 OPA_PI_MASK_INTERLEAVE_MAX_NEST_RX = (0x001F << 0),
185
186 /* port_error_action */
187 OPA_PI_MASK_EX_BUFFER_OVERRUN = 0x80000000,
188 /* 7 bits reserved */
189 OPA_PI_MASK_FM_CFG_ERR_EXCEED_MULTICAST_LIMIT = 0x00800000,
190 OPA_PI_MASK_FM_CFG_BAD_CONTROL_FLIT = 0x00400000,
191 OPA_PI_MASK_FM_CFG_BAD_PREEMPT = 0x00200000,
192 OPA_PI_MASK_FM_CFG_UNSUPPORTED_VL_MARKER = 0x00100000,
193 OPA_PI_MASK_FM_CFG_BAD_CRDT_ACK = 0x00080000,
194 OPA_PI_MASK_FM_CFG_BAD_CTRL_DIST = 0x00040000,
195 OPA_PI_MASK_FM_CFG_BAD_TAIL_DIST = 0x00020000,
196 OPA_PI_MASK_FM_CFG_BAD_HEAD_DIST = 0x00010000,
197 /* 2 bits reserved */
198 OPA_PI_MASK_PORT_RCV_BAD_VL_MARKER = 0x00002000,
199 OPA_PI_MASK_PORT_RCV_PREEMPT_VL15 = 0x00001000,
200 OPA_PI_MASK_PORT_RCV_PREEMPT_ERROR = 0x00000800,
201 /* 1 bit reserved */
202 OPA_PI_MASK_PORT_RCV_BAD_MidTail = 0x00000200,
203 /* 1 bit reserved */
204 OPA_PI_MASK_PORT_RCV_BAD_SC = 0x00000080,
205 OPA_PI_MASK_PORT_RCV_BAD_L2 = 0x00000040,
206 OPA_PI_MASK_PORT_RCV_BAD_DLID = 0x00000020,
207 OPA_PI_MASK_PORT_RCV_BAD_SLID = 0x00000010,
208 OPA_PI_MASK_PORT_RCV_PKTLEN_TOOSHORT = 0x00000008,
209 OPA_PI_MASK_PORT_RCV_PKTLEN_TOOLONG = 0x00000004,
210 OPA_PI_MASK_PORT_RCV_BAD_PKTLEN = 0x00000002,
211 OPA_PI_MASK_PORT_RCV_BAD_LT = 0x00000001,
212
213 /* pass_through.res_drctl */
214 OPA_PI_MASK_PASS_THROUGH_DR_CONTROL = 0x01,
215
216 /* buffer_units */
217 OPA_PI_MASK_BUF_UNIT_VL15_INIT = (0x00000FFF << 11),
218 OPA_PI_MASK_BUF_UNIT_VL15_CREDIT_RATE = (0x0000001F << 6),
219 OPA_PI_MASK_BUF_UNIT_CREDIT_ACK = (0x00000003 << 3),
220 OPA_PI_MASK_BUF_UNIT_BUF_ALLOC = (0x00000003 << 0),
221
222 /* neigh_mtu.pvlx_to_mtu */
223 OPA_PI_MASK_NEIGH_MTU_PVL0 = 0xF0,
224 OPA_PI_MASK_NEIGH_MTU_PVL1 = 0x0F,
225
226 /* neigh_mtu.vlstall_hoq_life */
227 OPA_PI_MASK_VL_STALL = (0x03 << 5),
228 OPA_PI_MASK_HOQ_LIFE = (0x1F << 0),
229
230 /* port_neigh_mode */
231 OPA_PI_MASK_NEIGH_MGMT_ALLOWED = (0x01 << 3),
232 OPA_PI_MASK_NEIGH_FW_AUTH_BYPASS = (0x01 << 2),
233 OPA_PI_MASK_NEIGH_NODE_TYPE = (0x03 << 0),
234
235 /* resptime_value */
236 OPA_PI_MASK_RESPONSE_TIME_VALUE = 0x1F,
237
238 /* mtucap */
239 OPA_PI_MASK_MTU_CAP = 0x0F,
240};
241
242struct opa_port_states {
243 u8 reserved;
244 u8 ledenable_offlinereason; /* 1 res, 1 bit, 6 bits */
245 u8 reserved2;
246 u8 portphysstate_portstate; /* 4 bits, 4 bits */
247};
248
249struct opa_port_state_info {
250 struct opa_port_states port_states;
251 __be16 link_width_downgrade_tx_active;
252 __be16 link_width_downgrade_rx_active;
253};
254
255struct opa_port_info {
256 __be32 lid;
257 __be32 flow_control_mask;
258
259 struct {
260 u8 res; /* was inittype */
261 u8 cap; /* 3 res, 5 bits */
262 __be16 high_limit;
263 __be16 preempt_limit;
264 u8 arb_high_cap;
265 u8 arb_low_cap;
266 } vl;
267
268 struct opa_port_states port_states;
269 u8 port_phys_conf; /* 4 res, 4 bits */
270 u8 collectivemask_multicastmask; /* 2 res, 3, 3 */
271 u8 mkeyprotect_lmc; /* 2 bits, 2 res, 4 bits */
272 u8 smsl; /* 3 res, 5 bits */
273
274 u8 partenforce_filterraw; /* bit fields */
275 u8 operational_vls; /* 3 res, 5 bits */
276 __be16 pkey_8b;
277 __be16 pkey_10b;
278 __be16 mkey_violations;
279
280 __be16 pkey_violations;
281 __be16 qkey_violations;
282 __be32 sm_trap_qp; /* 8 bits, 24 bits */
283
284 __be32 sa_qp; /* 8 bits, 24 bits */
285 u8 neigh_port_num;
286 u8 link_down_reason;
287 u8 neigh_link_down_reason;
288 u8 clientrereg_subnettimeout; /* 1 bit, 2 bits, 5 */
289
290 struct {
291 __be16 supported;
292 __be16 enabled;
293 __be16 active;
294 } link_speed;
295 struct {
296 __be16 supported;
297 __be16 enabled;
298 __be16 active;
299 } link_width;
300 struct {
301 __be16 supported;
302 __be16 enabled;
303 __be16 tx_active;
304 __be16 rx_active;
305 } link_width_downgrade;
306 __be16 port_link_mode; /* 1 res, 5 bits, 5 bits, 5 bits */
307 __be16 port_ltp_crc_mode; /* 4 res, 4 bits, 4 bits, 4 bits */
308
309 __be16 port_mode; /* 9 res, bit fields */
310 struct {
311 __be16 supported;
312 __be16 enabled;
313 } port_packet_format;
314 struct {
315 __be16 interleave; /* 2 res, 2,2,5,5 */
316 struct {
317 __be16 min_initial;
318 __be16 min_tail;
319 u8 large_pkt_limit;
320 u8 small_pkt_limit;
321 u8 max_small_pkt_limit;
322 u8 preemption_limit;
323 } preemption;
324 } flit_control;
325
326 __be32 reserved4;
327 __be32 port_error_action; /* bit field */
328
329 struct {
330 u8 egress_port;
331 u8 res_drctl; /* 7 res, 1 */
332 } pass_through;
333 __be16 mkey_lease_period;
334 __be32 buffer_units; /* 9 res, 12, 5, 3, 3 */
335
336 __be32 reserved5;
337 __be32 sm_lid;
338
339 __be64 mkey;
340
341 __be64 subnet_prefix;
342
343 struct {
344 u8 pvlx_to_mtu[OPA_MAX_VLS/2]; /* 4 bits, 4 bits */
345 } neigh_mtu;
346
347 struct {
348 u8 vlstall_hoqlife; /* 3 bits, 5 bits */
349 } xmit_q[OPA_MAX_VLS];
350
351 struct {
352 u8 addr[16];
353 } ipaddr_ipv6;
354
355 struct {
356 u8 addr[4];
357 } ipaddr_ipv4;
358
359 u32 reserved6;
360 u32 reserved7;
361 u32 reserved8;
362
363 __be64 neigh_node_guid;
364
365 __be32 ib_cap_mask;
366 __be16 reserved9; /* was ib_cap_mask2 */
367 __be16 opa_cap_mask;
368
369 __be32 reserved10; /* was link_roundtrip_latency */
370 __be16 overall_buffer_space;
371 __be16 reserved11; /* was max_credit_hint */
372
373 __be16 diag_code;
374 struct {
375 u8 buffer;
376 u8 wire;
377 } replay_depth;
378 u8 port_neigh_mode;
379 u8 mtucap; /* 4 res, 4 bits */
380
381 u8 resptimevalue; /* 3 res, 5 bits */
382 u8 local_port_num;
383 u8 reserved12;
384 u8 reserved13; /* was guid_cap */
385} __packed;
386
387#endif /* OPA_PORT_INFO_H */