Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

KVM: selftests: Use u64 instead of uint64_t

Use u64 instead of uint64_t to make the KVM selftests code more concise
and more similar to the kernel (since selftests are primarily developed
by kernel developers).

This commit was generated with the following command:

git ls-files tools/testing/selftests/kvm | xargs sed -i 's/uint64_t/u64/g'

Then by manually adjusting whitespace to make checkpatch.pl happy.

Include <linux/types.h> in include/kvm_util_types.h, iinclude/test_util.h,
and include/x86/pmu.h to pick up the tools-defined u64. Arguably, all
headers (especially kvm_util_types.h) should have already been including
stdint.h to get uint64_t from the libc headers, but the missing dependency
only rears its head once KVM uses u64 instead of uint64_t.

No functional change intended.

Signed-off-by: David Matlack <dmatlack@google.com>
[sean: rename pread_uint64() => pread_u64, expand on types.h include]
Link: https://patch.msgid.link/20260420212004.3938325-5-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

authored by

David Matlack and committed by
Sean Christopherson
26f84532 6d349425

+1415 -1415
+22 -22
tools/testing/selftests/kvm/access_tracking_perf_test.c
··· 101 101 enum vm_mem_backing_src_type backing_src; 102 102 103 103 /* The amount of memory to allocate for each vCPU. */ 104 - uint64_t vcpu_memory_bytes; 104 + u64 vcpu_memory_bytes; 105 105 106 106 /* The number of vCPUs to create in the VM. */ 107 107 int nr_vcpus; 108 108 }; 109 109 110 - static uint64_t pread_uint64(int fd, const char *filename, uint64_t index) 110 + static u64 pread_u64(int fd, const char *filename, u64 index) 111 111 { 112 - uint64_t value; 112 + u64 value; 113 113 off_t offset = index * sizeof(value); 114 114 115 115 TEST_ASSERT(pread(fd, &value, sizeof(value), offset) == sizeof(value), ··· 123 123 #define PAGEMAP_PRESENT (1ULL << 63) 124 124 #define PAGEMAP_PFN_MASK ((1ULL << 55) - 1) 125 125 126 - static uint64_t lookup_pfn(int pagemap_fd, struct kvm_vm *vm, uint64_t gva) 126 + static u64 lookup_pfn(int pagemap_fd, struct kvm_vm *vm, u64 gva) 127 127 { 128 - uint64_t hva = (uint64_t) addr_gva2hva(vm, gva); 129 - uint64_t entry; 130 - uint64_t pfn; 128 + u64 hva = (u64)addr_gva2hva(vm, gva); 129 + u64 entry; 130 + u64 pfn; 131 131 132 - entry = pread_uint64(pagemap_fd, "pagemap", hva / getpagesize()); 132 + entry = pread_u64(pagemap_fd, "pagemap", hva / getpagesize()); 133 133 if (!(entry & PAGEMAP_PRESENT)) 134 134 return 0; 135 135 ··· 139 139 return pfn; 140 140 } 141 141 142 - static bool is_page_idle(int page_idle_fd, uint64_t pfn) 142 + static bool is_page_idle(int page_idle_fd, u64 pfn) 143 143 { 144 - uint64_t bits = pread_uint64(page_idle_fd, "page_idle", pfn / 64); 144 + u64 bits = pread_u64(page_idle_fd, "page_idle", pfn / 64); 145 145 146 146 return !!((bits >> (pfn % 64)) & 1); 147 147 } 148 148 149 - static void mark_page_idle(int page_idle_fd, uint64_t pfn) 149 + static void mark_page_idle(int page_idle_fd, u64 pfn) 150 150 { 151 - uint64_t bits = 1ULL << (pfn % 64); 151 + u64 bits = 1ULL << (pfn % 64); 152 152 153 153 TEST_ASSERT(pwrite(page_idle_fd, &bits, 8, 8 * (pfn / 64)) == 8, 154 154 "Set page_idle bits for PFN 0x%" PRIx64, pfn); ··· 174 174 struct memstress_vcpu_args *vcpu_args) 175 175 { 176 176 int vcpu_idx = vcpu_args->vcpu_idx; 177 - uint64_t base_gva = vcpu_args->gva; 178 - uint64_t pages = vcpu_args->pages; 179 - uint64_t page; 180 - uint64_t still_idle = 0; 181 - uint64_t no_pfn = 0; 177 + u64 base_gva = vcpu_args->gva; 178 + u64 pages = vcpu_args->pages; 179 + u64 page; 180 + u64 still_idle = 0; 181 + u64 no_pfn = 0; 182 182 int page_idle_fd; 183 183 int pagemap_fd; 184 184 ··· 193 193 TEST_ASSERT(pagemap_fd > 0, "Failed to open pagemap."); 194 194 195 195 for (page = 0; page < pages; page++) { 196 - uint64_t gva = base_gva + page * memstress_args.guest_page_size; 197 - uint64_t pfn = lookup_pfn(pagemap_fd, vm, gva); 196 + u64 gva = base_gva + page * memstress_args.guest_page_size; 197 + u64 pfn = lookup_pfn(pagemap_fd, vm, gva); 198 198 199 199 if (!pfn) { 200 200 no_pfn++; ··· 297 297 lru_gen_last_gen = new_gen; 298 298 } 299 299 300 - static void assert_ucall(struct kvm_vcpu *vcpu, uint64_t expected_ucall) 300 + static void assert_ucall(struct kvm_vcpu *vcpu, u64 expected_ucall) 301 301 { 302 302 struct ucall uc; 303 - uint64_t actual_ucall = get_ucall(vcpu, &uc); 303 + u64 actual_ucall = get_ucall(vcpu, &uc); 304 304 305 305 TEST_ASSERT(expected_ucall == actual_ucall, 306 306 "Guest exited unexpectedly (expected ucall %" PRIu64 ··· 417 417 */ 418 418 test_pages = params->nr_vcpus * params->vcpu_memory_bytes / 419 419 max(memstress_args.guest_page_size, 420 - (uint64_t)getpagesize()); 420 + (u64)getpagesize()); 421 421 422 422 memstress_start_vcpu_threads(nr_vcpus, vcpu_thread_main); 423 423
+7 -7
tools/testing/selftests/kvm/arm64/aarch32_id_regs.c
··· 66 66 } 67 67 } 68 68 69 - static uint64_t raz_wi_reg_ids[] = { 69 + static u64 raz_wi_reg_ids[] = { 70 70 KVM_ARM64_SYS_REG(SYS_ID_PFR0_EL1), 71 71 KVM_ARM64_SYS_REG(SYS_ID_PFR1_EL1), 72 72 KVM_ARM64_SYS_REG(SYS_ID_DFR0_EL1), ··· 94 94 int i; 95 95 96 96 for (i = 0; i < ARRAY_SIZE(raz_wi_reg_ids); i++) { 97 - uint64_t reg_id = raz_wi_reg_ids[i]; 98 - uint64_t val; 97 + u64 reg_id = raz_wi_reg_ids[i]; 98 + u64 val; 99 99 100 100 val = vcpu_get_reg(vcpu, reg_id); 101 101 TEST_ASSERT_EQ(val, 0); ··· 111 111 } 112 112 } 113 113 114 - static uint64_t raz_invariant_reg_ids[] = { 114 + static u64 raz_invariant_reg_ids[] = { 115 115 KVM_ARM64_SYS_REG(SYS_ID_AFR0_EL1), 116 116 KVM_ARM64_SYS_REG(sys_reg(3, 0, 0, 3, 3)), 117 117 KVM_ARM64_SYS_REG(SYS_ID_DFR1_EL1), ··· 123 123 int i, r; 124 124 125 125 for (i = 0; i < ARRAY_SIZE(raz_invariant_reg_ids); i++) { 126 - uint64_t reg_id = raz_invariant_reg_ids[i]; 127 - uint64_t val; 126 + u64 reg_id = raz_invariant_reg_ids[i]; 127 + u64 val; 128 128 129 129 val = vcpu_get_reg(vcpu, reg_id); 130 130 TEST_ASSERT_EQ(val, 0); ··· 142 142 143 143 static bool vcpu_aarch64_only(struct kvm_vcpu *vcpu) 144 144 { 145 - uint64_t val, el0; 145 + u64 val, el0; 146 146 147 147 val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1)); 148 148
+1 -1
tools/testing/selftests/kvm/arm64/arch_timer.c
··· 56 56 struct test_vcpu_shared_data *shared_data) 57 57 { 58 58 enum guest_stage stage = shared_data->guest_stage; 59 - uint64_t xcnt = 0, xcnt_diff_us, cval = 0; 59 + u64 xcnt = 0, xcnt_diff_us, cval = 0; 60 60 unsigned long xctl = 0; 61 61 unsigned int timer_irq = 0; 62 62 unsigned int accessor;
+59 -60
tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c
··· 23 23 #include "vgic.h" 24 24 25 25 /* Depends on counter width. */ 26 - static uint64_t CVAL_MAX; 26 + static u64 CVAL_MAX; 27 27 /* tval is a signed 32-bit int. */ 28 28 static const int32_t TVAL_MAX = INT32_MAX; 29 29 static const int32_t TVAL_MIN = INT32_MIN; ··· 32 32 static const uint32_t TIMEOUT_NO_IRQ_US = 50000; 33 33 34 34 /* Counter value to use as the starting one for most tests. Set to CVAL_MAX/2 */ 35 - static uint64_t DEF_CNT; 35 + static u64 DEF_CNT; 36 36 37 37 /* Number of runs. */ 38 38 static const uint32_t NR_TEST_ITERS_DEF = 5; ··· 53 53 /* Virtual or physical timer and counter tests. */ 54 54 enum arch_timer timer; 55 55 /* Delay used for most timer tests. */ 56 - uint64_t wait_ms; 56 + u64 wait_ms; 57 57 /* Delay used in the test_long_timer_delays test. */ 58 - uint64_t long_wait_ms; 58 + u64 long_wait_ms; 59 59 /* Number of iterations. */ 60 60 int iterations; 61 61 /* Whether to test the physical timer. */ ··· 82 82 NO_USERSPACE_CMD, 83 83 }; 84 84 85 - typedef void (*sleep_method_t)(enum arch_timer timer, uint64_t usec); 85 + typedef void (*sleep_method_t)(enum arch_timer timer, u64 usec); 86 86 87 - static void sleep_poll(enum arch_timer timer, uint64_t usec); 88 - static void sleep_sched_poll(enum arch_timer timer, uint64_t usec); 89 - static void sleep_in_userspace(enum arch_timer timer, uint64_t usec); 90 - static void sleep_migrate(enum arch_timer timer, uint64_t usec); 87 + static void sleep_poll(enum arch_timer timer, u64 usec); 88 + static void sleep_sched_poll(enum arch_timer timer, u64 usec); 89 + static void sleep_in_userspace(enum arch_timer timer, u64 usec); 90 + static void sleep_migrate(enum arch_timer timer, u64 usec); 91 91 92 92 sleep_method_t sleep_method[] = { 93 93 sleep_poll, ··· 122 122 __GUEST_ASSERT(h == n, "Handled %d IRQS but expected %d", h, n); 123 123 } 124 124 125 - static void userspace_cmd(uint64_t cmd) 125 + static void userspace_cmd(u64 cmd) 126 126 { 127 127 GUEST_SYNC_ARGS(cmd, 0, 0, 0, 0); 128 128 } ··· 132 132 userspace_cmd(USERSPACE_MIGRATE_SELF); 133 133 } 134 134 135 - static void userspace_sleep(uint64_t usecs) 135 + static void userspace_sleep(u64 usecs) 136 136 { 137 137 GUEST_SYNC_ARGS(USERSPACE_USLEEP, usecs, 0, 0, 0); 138 138 } 139 139 140 - static void set_counter(enum arch_timer timer, uint64_t counter) 140 + static void set_counter(enum arch_timer timer, u64 counter) 141 141 { 142 142 GUEST_SYNC_ARGS(SET_COUNTER_VALUE, counter, timer, 0, 0); 143 143 } ··· 146 146 { 147 147 unsigned int intid = gic_get_and_ack_irq(); 148 148 enum arch_timer timer; 149 - uint64_t cnt, cval; 149 + u64 cnt, cval; 150 150 uint32_t ctl; 151 151 bool timer_condition, istatus; 152 152 ··· 178 178 gic_set_eoi(intid); 179 179 } 180 180 181 - static void set_cval_irq(enum arch_timer timer, uint64_t cval_cycles, 181 + static void set_cval_irq(enum arch_timer timer, u64 cval_cycles, 182 182 uint32_t ctl) 183 183 { 184 184 atomic_set(&shared_data.handled, 0); ··· 187 187 timer_set_ctl(timer, ctl); 188 188 } 189 189 190 - static void set_tval_irq(enum arch_timer timer, uint64_t tval_cycles, 190 + static void set_tval_irq(enum arch_timer timer, u64 tval_cycles, 191 191 uint32_t ctl) 192 192 { 193 193 atomic_set(&shared_data.handled, 0); ··· 196 196 timer_set_ctl(timer, ctl); 197 197 } 198 198 199 - static void set_xval_irq(enum arch_timer timer, uint64_t xval, uint32_t ctl, 199 + static void set_xval_irq(enum arch_timer timer, u64 xval, uint32_t ctl, 200 200 enum timer_view tv) 201 201 { 202 202 switch (tv) { ··· 275 275 * Sleep for usec microseconds by polling in the guest or in 276 276 * userspace (e.g. userspace_cmd=USERSPACE_SCHEDULE). 277 277 */ 278 - static void guest_poll(enum arch_timer test_timer, uint64_t usec, 278 + static void guest_poll(enum arch_timer test_timer, u64 usec, 279 279 enum sync_cmd usp_cmd) 280 280 { 281 - uint64_t cycles = usec_to_cycles(usec); 281 + u64 cycles = usec_to_cycles(usec); 282 282 /* Whichever timer we are testing with, sleep with the other. */ 283 283 enum arch_timer sleep_timer = 1 - test_timer; 284 - uint64_t start = timer_get_cntct(sleep_timer); 284 + u64 start = timer_get_cntct(sleep_timer); 285 285 286 286 while ((timer_get_cntct(sleep_timer) - start) < cycles) { 287 287 if (usp_cmd == NO_USERSPACE_CMD) ··· 291 291 } 292 292 } 293 293 294 - static void sleep_poll(enum arch_timer timer, uint64_t usec) 294 + static void sleep_poll(enum arch_timer timer, u64 usec) 295 295 { 296 296 guest_poll(timer, usec, NO_USERSPACE_CMD); 297 297 } 298 298 299 - static void sleep_sched_poll(enum arch_timer timer, uint64_t usec) 299 + static void sleep_sched_poll(enum arch_timer timer, u64 usec) 300 300 { 301 301 guest_poll(timer, usec, USERSPACE_SCHED_YIELD); 302 302 } 303 303 304 - static void sleep_migrate(enum arch_timer timer, uint64_t usec) 304 + static void sleep_migrate(enum arch_timer timer, u64 usec) 305 305 { 306 306 guest_poll(timer, usec, USERSPACE_MIGRATE_SELF); 307 307 } 308 308 309 - static void sleep_in_userspace(enum arch_timer timer, uint64_t usec) 309 + static void sleep_in_userspace(enum arch_timer timer, u64 usec) 310 310 { 311 311 userspace_sleep(usec); 312 312 } ··· 315 315 * Reset the timer state to some nice values like the counter not being close 316 316 * to the edge, and the control register masked and disabled. 317 317 */ 318 - static void reset_timer_state(enum arch_timer timer, uint64_t cnt) 318 + static void reset_timer_state(enum arch_timer timer, u64 cnt) 319 319 { 320 320 set_counter(timer, cnt); 321 321 timer_set_ctl(timer, CTL_IMASK); 322 322 } 323 323 324 - static void test_timer_xval(enum arch_timer timer, uint64_t xval, 324 + static void test_timer_xval(enum arch_timer timer, u64 xval, 325 325 enum timer_view tv, irq_wait_method_t wm, bool reset_state, 326 - uint64_t reset_cnt) 326 + u64 reset_cnt) 327 327 { 328 328 local_irq_disable(); 329 329 ··· 348 348 * the "runner", like: tools/testing/selftests/kselftest/runner.sh. 349 349 */ 350 350 351 - static void test_timer_cval(enum arch_timer timer, uint64_t cval, 351 + static void test_timer_cval(enum arch_timer timer, u64 cval, 352 352 irq_wait_method_t wm, bool reset_state, 353 - uint64_t reset_cnt) 353 + u64 reset_cnt) 354 354 { 355 355 test_timer_xval(timer, cval, TIMER_CVAL, wm, reset_state, reset_cnt); 356 356 } 357 357 358 358 static void test_timer_tval(enum arch_timer timer, int32_t tval, 359 359 irq_wait_method_t wm, bool reset_state, 360 - uint64_t reset_cnt) 360 + u64 reset_cnt) 361 361 { 362 - test_timer_xval(timer, (uint64_t) tval, TIMER_TVAL, wm, reset_state, 362 + test_timer_xval(timer, (u64)tval, TIMER_TVAL, wm, reset_state, 363 363 reset_cnt); 364 364 } 365 365 366 - static void test_xval_check_no_irq(enum arch_timer timer, uint64_t xval, 367 - uint64_t usec, enum timer_view timer_view, 366 + static void test_xval_check_no_irq(enum arch_timer timer, u64 xval, 367 + u64 usec, enum timer_view timer_view, 368 368 sleep_method_t guest_sleep) 369 369 { 370 370 local_irq_disable(); ··· 379 379 assert_irqs_handled(0); 380 380 } 381 381 382 - static void test_cval_no_irq(enum arch_timer timer, uint64_t cval, 383 - uint64_t usec, sleep_method_t wm) 382 + static void test_cval_no_irq(enum arch_timer timer, u64 cval, 383 + u64 usec, sleep_method_t wm) 384 384 { 385 385 test_xval_check_no_irq(timer, cval, usec, TIMER_CVAL, wm); 386 386 } 387 387 388 - static void test_tval_no_irq(enum arch_timer timer, int32_t tval, uint64_t usec, 388 + static void test_tval_no_irq(enum arch_timer timer, int32_t tval, u64 usec, 389 389 sleep_method_t wm) 390 390 { 391 391 /* tval will be cast to an int32_t in test_xval_check_no_irq */ 392 - test_xval_check_no_irq(timer, (uint64_t) tval, usec, TIMER_TVAL, wm); 392 + test_xval_check_no_irq(timer, (u64)tval, usec, TIMER_TVAL, wm); 393 393 } 394 394 395 395 /* Test masking/unmasking a timer using the timer mask (not the IRQ mask). */ ··· 488 488 static void test_reprogram_timers(enum arch_timer timer) 489 489 { 490 490 int i; 491 - uint64_t base_wait = test_args.wait_ms; 491 + u64 base_wait = test_args.wait_ms; 492 492 493 493 for (i = 0; i < ARRAY_SIZE(irq_wait_method); i++) { 494 494 /* ··· 505 505 static void test_basic_functionality(enum arch_timer timer) 506 506 { 507 507 int32_t tval = (int32_t) msec_to_cycles(test_args.wait_ms); 508 - uint64_t cval = DEF_CNT + msec_to_cycles(test_args.wait_ms); 508 + u64 cval = DEF_CNT + msec_to_cycles(test_args.wait_ms); 509 509 int i; 510 510 511 511 for (i = 0; i < ARRAY_SIZE(irq_wait_method); i++) { ··· 593 593 reset_timer_state(timer, DEF_CNT); 594 594 595 595 set_cval_irq(timer, 596 - (uint64_t) TVAL_MAX + 596 + (u64)TVAL_MAX + 597 597 msec_to_cycles(test_args.wait_ms) / 2, CTL_ENABLE); 598 598 599 599 set_counter(timer, TVAL_MAX); ··· 608 608 /* Test timers set for: cval = now + TVAL_MAX + wait_ms / 2 */ 609 609 static void test_timers_above_tval_max(enum arch_timer timer) 610 610 { 611 - uint64_t cval; 611 + u64 cval; 612 612 int i; 613 613 614 614 /* ··· 638 638 * sets the counter to cnt_1, the [c|t]val, the counter to cnt_2, and 639 639 * then waits for an IRQ. 640 640 */ 641 - static void test_set_cnt_after_xval(enum arch_timer timer, uint64_t cnt_1, 642 - uint64_t xval, uint64_t cnt_2, 641 + static void test_set_cnt_after_xval(enum arch_timer timer, u64 cnt_1, 642 + u64 xval, u64 cnt_2, 643 643 irq_wait_method_t wm, enum timer_view tv) 644 644 { 645 645 local_irq_disable(); ··· 662 662 * then waits for an IRQ. 663 663 */ 664 664 static void test_set_cnt_after_xval_no_irq(enum arch_timer timer, 665 - uint64_t cnt_1, uint64_t xval, 666 - uint64_t cnt_2, 665 + u64 cnt_1, u64 xval, 666 + u64 cnt_2, 667 667 sleep_method_t guest_sleep, 668 668 enum timer_view tv) 669 669 { ··· 684 684 timer_set_ctl(timer, CTL_IMASK); 685 685 } 686 686 687 - static void test_set_cnt_after_tval(enum arch_timer timer, uint64_t cnt_1, 688 - int32_t tval, uint64_t cnt_2, 687 + static void test_set_cnt_after_tval(enum arch_timer timer, u64 cnt_1, 688 + int32_t tval, u64 cnt_2, 689 689 irq_wait_method_t wm) 690 690 { 691 691 test_set_cnt_after_xval(timer, cnt_1, tval, cnt_2, wm, TIMER_TVAL); 692 692 } 693 693 694 - static void test_set_cnt_after_cval(enum arch_timer timer, uint64_t cnt_1, 695 - uint64_t cval, uint64_t cnt_2, 694 + static void test_set_cnt_after_cval(enum arch_timer timer, u64 cnt_1, 695 + u64 cval, u64 cnt_2, 696 696 irq_wait_method_t wm) 697 697 { 698 698 test_set_cnt_after_xval(timer, cnt_1, cval, cnt_2, wm, TIMER_CVAL); 699 699 } 700 700 701 701 static void test_set_cnt_after_tval_no_irq(enum arch_timer timer, 702 - uint64_t cnt_1, int32_t tval, 703 - uint64_t cnt_2, sleep_method_t wm) 702 + u64 cnt_1, int32_t tval, 703 + u64 cnt_2, sleep_method_t wm) 704 704 { 705 705 test_set_cnt_after_xval_no_irq(timer, cnt_1, tval, cnt_2, wm, 706 706 TIMER_TVAL); 707 707 } 708 708 709 709 static void test_set_cnt_after_cval_no_irq(enum arch_timer timer, 710 - uint64_t cnt_1, uint64_t cval, 711 - uint64_t cnt_2, sleep_method_t wm) 710 + u64 cnt_1, u64 cval, 711 + u64 cnt_2, sleep_method_t wm) 712 712 { 713 713 test_set_cnt_after_xval_no_irq(timer, cnt_1, cval, cnt_2, wm, 714 714 TIMER_CVAL); ··· 730 730 test_set_cnt_after_tval(timer, 0, -1, DEF_CNT + 1, wm); 731 731 test_set_cnt_after_tval(timer, 0, -1, TVAL_MAX, wm); 732 732 tval = TVAL_MAX; 733 - test_set_cnt_after_tval(timer, 0, tval, (uint64_t) tval + 1, 734 - wm); 733 + test_set_cnt_after_tval(timer, 0, tval, (u64)tval + 1, wm); 735 734 } 736 735 } 737 736 ··· 754 755 static void test_timers_in_the_past(enum arch_timer timer) 755 756 { 756 757 int32_t tval = -1 * (int32_t) msec_to_cycles(test_args.wait_ms); 757 - uint64_t cval; 758 + u64 cval; 758 759 int i; 759 760 760 761 for (i = 0; i < ARRAY_SIZE(irq_wait_method); i++) { ··· 790 791 static void test_long_timer_delays(enum arch_timer timer) 791 792 { 792 793 int32_t tval = (int32_t) msec_to_cycles(test_args.long_wait_ms); 793 - uint64_t cval = DEF_CNT + msec_to_cycles(test_args.long_wait_ms); 794 + u64 cval = DEF_CNT + msec_to_cycles(test_args.long_wait_ms); 794 795 int i; 795 796 796 797 for (i = 0; i < ARRAY_SIZE(irq_wait_method); i++) { ··· 861 862 return next; 862 863 } 863 864 864 - static void kvm_set_cntxct(struct kvm_vcpu *vcpu, uint64_t cnt, 865 + static void kvm_set_cntxct(struct kvm_vcpu *vcpu, u64 cnt, 865 866 enum arch_timer timer) 866 867 { 867 868 if (timer == PHYSICAL) ··· 873 874 static void handle_sync(struct kvm_vcpu *vcpu, struct ucall *uc) 874 875 { 875 876 enum sync_cmd cmd = uc->args[1]; 876 - uint64_t val = uc->args[2]; 877 + u64 val = uc->args[2]; 877 878 enum arch_timer timer = uc->args[3]; 878 879 879 880 switch (cmd) { ··· 1017 1018 1018 1019 static void set_counter_defaults(void) 1019 1020 { 1020 - const uint64_t MIN_ROLLOVER_SECS = 40ULL * 365 * 24 * 3600; 1021 - uint64_t freq = read_sysreg(CNTFRQ_EL0); 1021 + const u64 MIN_ROLLOVER_SECS = 40ULL * 365 * 24 * 3600; 1022 + u64 freq = read_sysreg(CNTFRQ_EL0); 1022 1023 int width = ilog2(MIN_ROLLOVER_SECS * freq); 1023 1024 1024 1025 width = clamp(width, 56, 64);
+27 -27
tools/testing/selftests/kvm/arm64/debug-exceptions.c
··· 31 31 32 32 extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start, hw_bp_ctx; 33 33 extern unsigned char iter_ss_begin, iter_ss_end; 34 - static volatile uint64_t sw_bp_addr, hw_bp_addr; 35 - static volatile uint64_t wp_addr, wp_data_addr; 36 - static volatile uint64_t svc_addr; 37 - static volatile uint64_t ss_addr[4], ss_idx; 38 - #define PC(v) ((uint64_t)&(v)) 34 + static volatile u64 sw_bp_addr, hw_bp_addr; 35 + static volatile u64 wp_addr, wp_data_addr; 36 + static volatile u64 svc_addr; 37 + static volatile u64 ss_addr[4], ss_idx; 38 + #define PC(v) ((u64)&(v)) 39 39 40 40 #define GEN_DEBUG_WRITE_REG(reg_name) \ 41 - static void write_##reg_name(int num, uint64_t val) \ 41 + static void write_##reg_name(int num, u64 val) \ 42 42 { \ 43 43 switch (num) { \ 44 44 case 0: \ ··· 103 103 static void reset_debug_state(void) 104 104 { 105 105 uint8_t brps, wrps, i; 106 - uint64_t dfr0; 106 + u64 dfr0; 107 107 108 108 asm volatile("msr daifset, #8"); 109 109 ··· 140 140 141 141 static void enable_monitor_debug_exceptions(void) 142 142 { 143 - uint64_t mdscr; 143 + u64 mdscr; 144 144 145 145 asm volatile("msr daifclr, #8"); 146 146 ··· 149 149 isb(); 150 150 } 151 151 152 - static void install_wp(uint8_t wpn, uint64_t addr) 152 + static void install_wp(uint8_t wpn, u64 addr) 153 153 { 154 154 uint32_t wcr; 155 155 ··· 162 162 enable_monitor_debug_exceptions(); 163 163 } 164 164 165 - static void install_hw_bp(uint8_t bpn, uint64_t addr) 165 + static void install_hw_bp(uint8_t bpn, u64 addr) 166 166 { 167 167 uint32_t bcr; 168 168 ··· 174 174 enable_monitor_debug_exceptions(); 175 175 } 176 176 177 - static void install_wp_ctx(uint8_t addr_wp, uint8_t ctx_bp, uint64_t addr, 178 - uint64_t ctx) 177 + static void install_wp_ctx(uint8_t addr_wp, uint8_t ctx_bp, u64 addr, 178 + u64 ctx) 179 179 { 180 180 uint32_t wcr; 181 - uint64_t ctx_bcr; 181 + u64 ctx_bcr; 182 182 183 183 /* Setup a context-aware breakpoint for Linked Context ID Match */ 184 184 ctx_bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E | ··· 196 196 enable_monitor_debug_exceptions(); 197 197 } 198 198 199 - void install_hw_bp_ctx(uint8_t addr_bp, uint8_t ctx_bp, uint64_t addr, 200 - uint64_t ctx) 199 + void install_hw_bp_ctx(uint8_t addr_bp, uint8_t ctx_bp, u64 addr, 200 + u64 ctx) 201 201 { 202 202 uint32_t addr_bcr, ctx_bcr; 203 203 ··· 223 223 224 224 static void install_ss(void) 225 225 { 226 - uint64_t mdscr; 226 + u64 mdscr; 227 227 228 228 asm volatile("msr daifclr, #8"); 229 229 ··· 236 236 237 237 static void guest_code(uint8_t bpn, uint8_t wpn, uint8_t ctx_bpn) 238 238 { 239 - uint64_t ctx = 0xabcdef; /* a random context number */ 239 + u64 ctx = 0xabcdef; /* a random context number */ 240 240 241 241 /* Software-breakpoint */ 242 242 reset_debug_state(); ··· 377 377 378 378 static void guest_code_ss(int test_cnt) 379 379 { 380 - uint64_t i; 381 - uint64_t bvr, wvr, w_bvr, w_wvr; 380 + u64 i; 381 + u64 bvr, wvr, w_bvr, w_wvr; 382 382 383 383 for (i = 0; i < test_cnt; i++) { 384 384 /* Bits [1:0] of dbg{b,w}vr are RES0 */ ··· 416 416 GUEST_DONE(); 417 417 } 418 418 419 - static int debug_version(uint64_t id_aa64dfr0) 419 + static int debug_version(u64 id_aa64dfr0) 420 420 { 421 421 return FIELD_GET(ID_AA64DFR0_EL1_DebugVer, id_aa64dfr0); 422 422 } ··· 468 468 struct kvm_vm *vm; 469 469 struct ucall uc; 470 470 struct kvm_run *run; 471 - uint64_t pc, cmd; 472 - uint64_t test_pc = 0; 471 + u64 pc, cmd; 472 + u64 test_pc = 0; 473 473 bool ss_enable = false; 474 474 struct kvm_guest_debug debug = {}; 475 475 ··· 506 506 "Unexpected pc 0x%lx (expected 0x%lx)", 507 507 pc, test_pc); 508 508 509 - if ((pc + 4) == (uint64_t)&iter_ss_end) { 509 + if ((pc + 4) == (u64)&iter_ss_end) { 510 510 test_pc = 0; 511 511 debug.control = KVM_GUESTDBG_ENABLE; 512 512 ss_enable = false; ··· 519 519 * iter_ss_end, the pc for the next KVM_EXIT_DEBUG should 520 520 * be the current pc + 4. 521 521 */ 522 - if ((pc >= (uint64_t)&iter_ss_begin) && 523 - (pc < (uint64_t)&iter_ss_end)) 522 + if ((pc >= (u64)&iter_ss_begin) && 523 + (pc < (u64)&iter_ss_end)) 524 524 test_pc = pc + 4; 525 525 else 526 526 test_pc = 0; ··· 533 533 * Run debug testing using the various breakpoint#, watchpoint# and 534 534 * context-aware breakpoint# with the given ID_AA64DFR0_EL1 configuration. 535 535 */ 536 - void test_guest_debug_exceptions_all(uint64_t aa64dfr0) 536 + void test_guest_debug_exceptions_all(u64 aa64dfr0) 537 537 { 538 538 uint8_t brp_num, wrp_num, ctx_brp_num, normal_brp_num, ctx_brp_base; 539 539 int b, w, c; ··· 580 580 struct kvm_vm *vm; 581 581 int opt; 582 582 int ss_iteration = 10000; 583 - uint64_t aa64dfr0; 583 + u64 aa64dfr0; 584 584 585 585 vm = vm_create_with_one_vcpu(&vcpu, guest_code); 586 586 aa64dfr0 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1));
+9 -9
tools/testing/selftests/kvm/arm64/hypercalls.c
··· 29 29 #define KVM_REG_ARM_VENDOR_HYP_BMAP_2_RESET_VAL 0 30 30 31 31 struct kvm_fw_reg_info { 32 - uint64_t reg; /* Register definition */ 33 - uint64_t max_feat_bit; /* Bit that represents the upper limit of the feature-map */ 34 - uint64_t reset_val; /* Reset value for the register */ 32 + u64 reg; /* Register definition */ 33 + u64 max_feat_bit; /* Bit that represents the upper limit of the feature-map */ 34 + u64 reset_val; /* Reset value for the register */ 35 35 }; 36 36 37 37 #define FW_REG_INFO(r) \ ··· 60 60 61 61 struct test_hvc_info { 62 62 uint32_t func_id; 63 - uint64_t arg1; 63 + u64 arg1; 64 64 }; 65 65 66 66 #define TEST_HVC_INFO(f, a1) \ ··· 154 154 struct st_time { 155 155 uint32_t rev; 156 156 uint32_t attr; 157 - uint64_t st_time; 157 + u64 st_time; 158 158 }; 159 159 160 160 #define STEAL_TIME_SIZE ((sizeof(struct st_time) + 63) & ~63) ··· 162 162 163 163 static void steal_time_init(struct kvm_vcpu *vcpu) 164 164 { 165 - uint64_t st_ipa = (ulong)ST_GPA_BASE; 165 + u64 st_ipa = (ulong)ST_GPA_BASE; 166 166 unsigned int gpages; 167 167 168 168 gpages = vm_calc_num_guest_pages(VM_MODE_DEFAULT, STEAL_TIME_SIZE); ··· 174 174 175 175 static void test_fw_regs_before_vm_start(struct kvm_vcpu *vcpu) 176 176 { 177 - uint64_t val; 177 + u64 val; 178 178 unsigned int i; 179 179 int ret; 180 180 181 181 for (i = 0; i < ARRAY_SIZE(fw_reg_info); i++) { 182 182 const struct kvm_fw_reg_info *reg_info = &fw_reg_info[i]; 183 - uint64_t set_val; 183 + u64 set_val; 184 184 185 185 /* First 'read' should be the reset value for the reg */ 186 186 val = vcpu_get_reg(vcpu, reg_info->reg); ··· 229 229 230 230 static void test_fw_regs_after_vm_start(struct kvm_vcpu *vcpu) 231 231 { 232 - uint64_t val; 232 + u64 val; 233 233 unsigned int i; 234 234 int ret; 235 235
+2 -2
tools/testing/selftests/kvm/arm64/idreg-idst.c
··· 13 13 14 14 #define __check_sr_read(r) \ 15 15 ({ \ 16 - uint64_t val; \ 16 + u64 val; \ 17 17 \ 18 18 sys64 = false; \ 19 19 undef = false; \ ··· 101 101 { 102 102 struct kvm_vcpu *vcpu; 103 103 struct kvm_vm *vm; 104 - uint64_t mmfr2; 104 + u64 mmfr2; 105 105 106 106 test_disable_default_vgic(); 107 107
+4 -4
tools/testing/selftests/kvm/arm64/no-vgic.c
··· 15 15 16 16 #define __check_sr_read(r) \ 17 17 ({ \ 18 - uint64_t val; \ 18 + u64 val; \ 19 19 \ 20 20 handled = false; \ 21 21 dsb(sy); \ ··· 33 33 34 34 #define __check_gicv5_gicr_op(r) \ 35 35 ({ \ 36 - uint64_t val; \ 36 + u64 val; \ 37 37 \ 38 38 handled = false; \ 39 39 dsb(sy); \ ··· 82 82 83 83 static void guest_code_gicv3(void) 84 84 { 85 - uint64_t val; 85 + u64 val; 86 86 87 87 /* 88 88 * Check that we advertise that ID_AA64PFR0_EL1.GIC == 0, having ··· 262 262 struct kvm_vcpu *vcpu; 263 263 struct kvm_vm *vm; 264 264 bool has_v3, has_v5; 265 - uint64_t pfr; 265 + u64 pfr; 266 266 267 267 test_disable_default_vgic(); 268 268
+37 -37
tools/testing/selftests/kvm/arm64/page_fault_test.c
··· 23 23 #define TEST_PTE_GVA 0xb0000000 24 24 #define TEST_DATA 0x0123456789ABCDEF 25 25 26 - static uint64_t *guest_test_memory = (uint64_t *)TEST_GVA; 26 + static u64 *guest_test_memory = (u64 *)TEST_GVA; 27 27 28 28 #define CMD_NONE (0) 29 29 #define CMD_SKIP_TEST (1ULL << 1) ··· 48 48 49 49 struct test_desc { 50 50 const char *name; 51 - uint64_t mem_mark_cmd; 51 + u64 mem_mark_cmd; 52 52 /* Skip the test if any prepare function returns false */ 53 53 bool (*guest_prepare[PREPARE_FN_NR])(void); 54 54 void (*guest_test)(void); ··· 70 70 struct test_desc *test_desc; 71 71 }; 72 72 73 - static inline void flush_tlb_page(uint64_t vaddr) 73 + static inline void flush_tlb_page(u64 vaddr) 74 74 { 75 - uint64_t page = vaddr >> 12; 75 + u64 page = vaddr >> 12; 76 76 77 77 dsb(ishst); 78 78 asm volatile("tlbi vaae1is, %0" :: "r" (page)); ··· 82 82 83 83 static void guest_write64(void) 84 84 { 85 - uint64_t val; 85 + u64 val; 86 86 87 87 WRITE_ONCE(*guest_test_memory, TEST_DATA); 88 88 val = READ_ONCE(*guest_test_memory); ··· 92 92 /* Check the system for atomic instructions. */ 93 93 static bool guest_check_lse(void) 94 94 { 95 - uint64_t isar0 = read_sysreg(id_aa64isar0_el1); 96 - uint64_t atomic; 95 + u64 isar0 = read_sysreg(id_aa64isar0_el1); 96 + u64 atomic; 97 97 98 98 atomic = FIELD_GET(ID_AA64ISAR0_EL1_ATOMIC, isar0); 99 99 return atomic >= 2; ··· 101 101 102 102 static bool guest_check_dc_zva(void) 103 103 { 104 - uint64_t dczid = read_sysreg(dczid_el0); 105 - uint64_t dzp = FIELD_GET(DCZID_EL0_DZP, dczid); 104 + u64 dczid = read_sysreg(dczid_el0); 105 + u64 dzp = FIELD_GET(DCZID_EL0_DZP, dczid); 106 106 107 107 return dzp == 0; 108 108 } ··· 110 110 /* Compare and swap instruction. */ 111 111 static void guest_cas(void) 112 112 { 113 - uint64_t val; 113 + u64 val; 114 114 115 115 GUEST_ASSERT(guest_check_lse()); 116 116 asm volatile(".arch_extension lse\n" ··· 122 122 123 123 static void guest_read64(void) 124 124 { 125 - uint64_t val; 125 + u64 val; 126 126 127 127 val = READ_ONCE(*guest_test_memory); 128 128 GUEST_ASSERT_EQ(val, 0); ··· 131 131 /* Address translation instruction */ 132 132 static void guest_at(void) 133 133 { 134 - uint64_t par; 134 + u64 par; 135 135 136 136 asm volatile("at s1e1r, %0" :: "r" (guest_test_memory)); 137 137 isb(); ··· 164 164 */ 165 165 static void guest_ld_preidx(void) 166 166 { 167 - uint64_t val; 168 - uint64_t addr = TEST_GVA - 8; 167 + u64 val; 168 + u64 addr = TEST_GVA - 8; 169 169 170 170 /* 171 171 * This ends up accessing "TEST_GVA + 8 - 8", where "TEST_GVA - 8" is ··· 179 179 180 180 static void guest_st_preidx(void) 181 181 { 182 - uint64_t val = TEST_DATA; 183 - uint64_t addr = TEST_GVA - 8; 182 + u64 val = TEST_DATA; 183 + u64 addr = TEST_GVA - 8; 184 184 185 185 asm volatile("str %0, [%1, #8]!" 186 186 : "+r" (val), "+r" (addr)); ··· 191 191 192 192 static bool guest_set_ha(void) 193 193 { 194 - uint64_t mmfr1 = read_sysreg(id_aa64mmfr1_el1); 195 - uint64_t hadbs, tcr; 194 + u64 mmfr1 = read_sysreg(id_aa64mmfr1_el1); 195 + u64 hadbs, tcr; 196 196 197 197 /* Skip if HA is not supported. */ 198 198 hadbs = FIELD_GET(ID_AA64MMFR1_EL1_HAFDBS, mmfr1); ··· 208 208 209 209 static bool guest_clear_pte_af(void) 210 210 { 211 - *((uint64_t *)TEST_PTE_GVA) &= ~PTE_AF; 211 + *((u64 *)TEST_PTE_GVA) &= ~PTE_AF; 212 212 flush_tlb_page(TEST_GVA); 213 213 214 214 return true; ··· 217 217 static void guest_check_pte_af(void) 218 218 { 219 219 dsb(ish); 220 - GUEST_ASSERT_EQ(*((uint64_t *)TEST_PTE_GVA) & PTE_AF, PTE_AF); 220 + GUEST_ASSERT_EQ(*((u64 *)TEST_PTE_GVA) & PTE_AF, PTE_AF); 221 221 } 222 222 223 223 static void guest_check_write_in_dirty_log(void) ··· 302 302 static struct uffd_args { 303 303 char *copy; 304 304 void *hva; 305 - uint64_t paging_size; 305 + u64 paging_size; 306 306 } pt_args, data_args; 307 307 308 308 /* Returns true to continue the test, and false if it should be skipped. */ 309 309 static int uffd_generic_handler(int uffd_mode, int uffd, struct uffd_msg *msg, 310 310 struct uffd_args *args) 311 311 { 312 - uint64_t addr = msg->arg.pagefault.address; 313 - uint64_t flags = msg->arg.pagefault.flags; 312 + u64 addr = msg->arg.pagefault.address; 313 + u64 flags = msg->arg.pagefault.flags; 314 314 struct uffdio_copy copy; 315 315 int ret; 316 316 317 317 TEST_ASSERT(uffd_mode == UFFDIO_REGISTER_MODE_MISSING, 318 318 "The only expected UFFD mode is MISSING"); 319 - TEST_ASSERT_EQ(addr, (uint64_t)args->hva); 319 + TEST_ASSERT_EQ(addr, (u64)args->hva); 320 320 321 321 pr_debug("uffd fault: addr=%p write=%d\n", 322 322 (void *)addr, !!(flags & UFFD_PAGEFAULT_FLAG_WRITE)); 323 323 324 - copy.src = (uint64_t)args->copy; 324 + copy.src = (u64)args->copy; 325 325 copy.dst = addr; 326 326 copy.len = args->paging_size; 327 327 copy.mode = 0; ··· 407 407 struct userspace_mem_region *region) 408 408 { 409 409 void *hva = (void *)region->region.userspace_addr; 410 - uint64_t paging_size = region->region.memory_size; 410 + u64 paging_size = region->region.memory_size; 411 411 int ret, fd = region->fd; 412 412 413 413 if (fd != -1) { ··· 438 438 439 439 static void mmio_no_handler(struct kvm_vm *vm, struct kvm_run *run) 440 440 { 441 - uint64_t data; 441 + u64 data; 442 442 443 443 memcpy(&data, run->mmio.data, sizeof(data)); 444 444 pr_debug("addr=%lld len=%d w=%d data=%lx\n", ··· 449 449 450 450 static bool check_write_in_dirty_log(struct kvm_vm *vm, 451 451 struct userspace_mem_region *region, 452 - uint64_t host_pg_nr) 452 + u64 host_pg_nr) 453 453 { 454 454 unsigned long *bmap; 455 455 bool first_page_dirty; 456 - uint64_t size = region->region.memory_size; 456 + u64 size = region->region.memory_size; 457 457 458 458 /* getpage_size() is not always equal to vm->page_size */ 459 459 bmap = bitmap_zalloc(size / getpagesize()); ··· 468 468 { 469 469 struct userspace_mem_region *data_region, *pt_region; 470 470 bool continue_test = true; 471 - uint64_t pte_gpa, pte_pg; 471 + u64 pte_gpa, pte_pg; 472 472 473 473 data_region = vm_get_mem_region(vm, MEM_REGION_TEST_DATA); 474 474 pt_region = vm_get_mem_region(vm, MEM_REGION_PT); ··· 525 525 */ 526 526 static void load_exec_code_for_test(struct kvm_vm *vm) 527 527 { 528 - uint64_t *code; 528 + u64 *code; 529 529 struct userspace_mem_region *region; 530 530 void *hva; 531 531 ··· 552 552 static void setup_gva_maps(struct kvm_vm *vm) 553 553 { 554 554 struct userspace_mem_region *region; 555 - uint64_t pte_gpa; 555 + u64 pte_gpa; 556 556 557 557 region = vm_get_mem_region(vm, MEM_REGION_TEST_DATA); 558 558 /* Map TEST_GVA first. This will install a new PTE. */ ··· 574 574 */ 575 575 static void setup_memslots(struct kvm_vm *vm, struct test_params *p) 576 576 { 577 - uint64_t backing_src_pagesz = get_backing_src_pagesz(p->src_type); 578 - uint64_t guest_page_size = vm->page_size; 579 - uint64_t max_gfn = vm_compute_max_gfn(vm); 577 + u64 backing_src_pagesz = get_backing_src_pagesz(p->src_type); 578 + u64 guest_page_size = vm->page_size; 579 + u64 max_gfn = vm_compute_max_gfn(vm); 580 580 /* Enough for 2M of code when using 4K guest pages. */ 581 - uint64_t code_npages = 512; 582 - uint64_t pt_size, data_size, data_gpa; 581 + u64 code_npages = 512; 582 + u64 pt_size, data_size, data_gpa; 583 583 584 584 /* 585 585 * This test requires 1 pgd, 2 pud, 4 pmd, and 6 pte pages when using
+12 -14
tools/testing/selftests/kvm/arm64/psci_test.c
··· 22 22 #define CPU_ON_ENTRY_ADDR 0xfeedf00dul 23 23 #define CPU_ON_CONTEXT_ID 0xdeadc0deul 24 24 25 - static uint64_t psci_cpu_on(uint64_t target_cpu, uint64_t entry_addr, 26 - uint64_t context_id) 25 + static u64 psci_cpu_on(u64 target_cpu, u64 entry_addr, u64 context_id) 27 26 { 28 27 struct arm_smccc_res res; 29 28 ··· 32 33 return res.a0; 33 34 } 34 35 35 - static uint64_t psci_affinity_info(uint64_t target_affinity, 36 - uint64_t lowest_affinity_level) 36 + static u64 psci_affinity_info(u64 target_affinity, u64 lowest_affinity_level) 37 37 { 38 38 struct arm_smccc_res res; 39 39 ··· 42 44 return res.a0; 43 45 } 44 46 45 - static uint64_t psci_system_suspend(uint64_t entry_addr, uint64_t context_id) 47 + static u64 psci_system_suspend(u64 entry_addr, u64 context_id) 46 48 { 47 49 struct arm_smccc_res res; 48 50 ··· 52 54 return res.a0; 53 55 } 54 56 55 - static uint64_t psci_system_off2(uint64_t type, uint64_t cookie) 57 + static u64 psci_system_off2(u64 type, u64 cookie) 56 58 { 57 59 struct arm_smccc_res res; 58 60 ··· 61 63 return res.a0; 62 64 } 63 65 64 - static uint64_t psci_features(uint32_t func_id) 66 + static u64 psci_features(uint32_t func_id) 65 67 { 66 68 struct arm_smccc_res res; 67 69 ··· 108 110 109 111 static void assert_vcpu_reset(struct kvm_vcpu *vcpu) 110 112 { 111 - uint64_t obs_pc, obs_x0; 113 + u64 obs_pc, obs_x0; 112 114 113 115 obs_pc = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc)); 114 116 obs_x0 = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.regs[0])); ··· 121 123 obs_x0, CPU_ON_CONTEXT_ID); 122 124 } 123 125 124 - static void guest_test_cpu_on(uint64_t target_cpu) 126 + static void guest_test_cpu_on(u64 target_cpu) 125 127 { 126 - uint64_t target_state; 128 + u64 target_state; 127 129 128 130 GUEST_ASSERT(!psci_cpu_on(target_cpu, CPU_ON_ENTRY_ADDR, CPU_ON_CONTEXT_ID)); 129 131 ··· 140 142 static void host_test_cpu_on(void) 141 143 { 142 144 struct kvm_vcpu *source, *target; 143 - uint64_t target_mpidr; 145 + u64 target_mpidr; 144 146 struct kvm_vm *vm; 145 147 struct ucall uc; 146 148 ··· 164 166 165 167 static void guest_test_system_suspend(void) 166 168 { 167 - uint64_t ret; 169 + u64 ret; 168 170 169 171 /* assert that SYSTEM_SUSPEND is discoverable */ 170 172 GUEST_ASSERT(!psci_features(PSCI_1_0_FN_SYSTEM_SUSPEND)); ··· 198 200 199 201 static void guest_test_system_off2(void) 200 202 { 201 - uint64_t ret; 203 + u64 ret; 202 204 203 205 /* assert that SYSTEM_OFF2 is discoverable */ 204 206 GUEST_ASSERT(psci_features(PSCI_1_3_FN_SYSTEM_OFF2) & ··· 236 238 { 237 239 struct kvm_vcpu *source, *target; 238 240 struct kvm_mp_state mps; 239 - uint64_t psci_version = 0; 241 + u64 psci_version = 0; 240 242 int nr_shutdowns = 0; 241 243 struct kvm_run *run; 242 244 struct ucall uc;
+13 -13
tools/testing/selftests/kvm/arm64/sea_to_user.c
··· 53 53 54 54 static gpa_t einj_gpa; 55 55 static void *einj_hva; 56 - static uint64_t einj_hpa; 56 + static u64 einj_hpa; 57 57 static bool far_invalid; 58 58 59 - static uint64_t translate_to_host_paddr(unsigned long vaddr) 59 + static u64 translate_to_host_paddr(unsigned long vaddr) 60 60 { 61 - uint64_t pinfo; 61 + u64 pinfo; 62 62 int64_t offset = vaddr / getpagesize() * sizeof(pinfo); 63 63 int fd; 64 - uint64_t page_addr; 65 - uint64_t paddr; 64 + u64 page_addr; 65 + u64 paddr; 66 66 67 67 fd = open("/proc/self/pagemap", O_RDONLY); 68 68 if (fd < 0) ··· 82 82 return paddr; 83 83 } 84 84 85 - static void write_einj_entry(const char *einj_path, uint64_t val) 85 + static void write_einj_entry(const char *einj_path, u64 val) 86 86 { 87 87 char cmd[256] = {0}; 88 88 FILE *cmdfile = NULL; ··· 96 96 ksft_exit_fail_perror("Failed to write EINJ entry"); 97 97 } 98 98 99 - static void inject_uer(uint64_t paddr) 99 + static void inject_uer(u64 paddr) 100 100 { 101 101 if (access("/sys/firmware/acpi/tables/EINJ", R_OK) == -1) 102 102 ksft_test_result_skip("EINJ table no available in firmware"); ··· 145 145 146 146 static void guest_code(void) 147 147 { 148 - uint64_t guest_data; 148 + u64 guest_data; 149 149 150 150 /* Consumes error will cause a SEA. */ 151 - guest_data = *(uint64_t *)EINJ_GVA; 151 + guest_data = *(u64 *)EINJ_GVA; 152 152 153 153 GUEST_FAIL("Poison not protected by SEA: gva=%#lx, guest_data=%#lx\n", 154 154 EINJ_GVA, guest_data); ··· 253 253 size_t backing_page_size; 254 254 size_t guest_page_size; 255 255 size_t alignment; 256 - uint64_t num_guest_pages; 256 + u64 num_guest_pages; 257 257 gpa_t start_gpa; 258 258 enum vm_mem_backing_src_type src_type = VM_MEM_SRC_ANONYMOUS_HUGETLB_1GB; 259 259 struct kvm_vm *vm; ··· 292 292 293 293 static void vm_inject_memory_uer(struct kvm_vm *vm) 294 294 { 295 - uint64_t guest_data; 295 + u64 guest_data; 296 296 297 297 einj_gpa = addr_gva2gpa(vm, EINJ_GVA); 298 298 einj_hva = addr_gva2hva(vm, EINJ_GVA); 299 299 300 300 /* Populate certain data before injecting UER. */ 301 - *(uint64_t *)einj_hva = 0xBAADCAFE; 302 - guest_data = *(uint64_t *)einj_hva; 301 + *(u64 *)einj_hva = 0xBAADCAFE; 302 + guest_data = *(u64 *)einj_hva; 303 303 ksft_print_msg("Before EINJect: data=%#lx\n", 304 304 guest_data); 305 305
+28 -28
tools/testing/selftests/kvm/arm64/set_id_regs.c
··· 31 31 bool sign; 32 32 enum ftr_type type; 33 33 uint8_t shift; 34 - uint64_t mask; 34 + u64 mask; 35 35 /* 36 36 * For FTR_EXACT, safe_val is used as the exact safe value. 37 37 * For FTR_LOWER_SAFE, safe_val is used as the minimal safe value. ··· 274 274 } 275 275 276 276 /* Return a safe value to a given ftr_bits an ftr value */ 277 - uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr) 277 + u64 get_safe_value(const struct reg_ftr_bits *ftr_bits, u64 ftr) 278 278 { 279 - uint64_t ftr_max = ftr_bits->mask >> ftr_bits->shift; 279 + u64 ftr_max = ftr_bits->mask >> ftr_bits->shift; 280 280 281 281 TEST_ASSERT(ftr_max > 1, "This test doesn't support single bit features"); 282 282 ··· 328 328 } 329 329 330 330 /* Return an invalid value to a given ftr_bits an ftr value */ 331 - uint64_t get_invalid_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr) 331 + u64 get_invalid_value(const struct reg_ftr_bits *ftr_bits, u64 ftr) 332 332 { 333 - uint64_t ftr_max = ftr_bits->mask >> ftr_bits->shift; 333 + u64 ftr_max = ftr_bits->mask >> ftr_bits->shift; 334 334 335 335 TEST_ASSERT(ftr_max > 1, "This test doesn't support single bit features"); 336 336 337 337 if (ftr_bits->sign == FTR_UNSIGNED) { 338 338 switch (ftr_bits->type) { 339 339 case FTR_EXACT: 340 - ftr = max((uint64_t)ftr_bits->safe_val + 1, ftr + 1); 340 + ftr = max((u64)ftr_bits->safe_val + 1, ftr + 1); 341 341 break; 342 342 case FTR_LOWER_SAFE: 343 343 ftr++; ··· 357 357 } else if (ftr != ftr_max) { 358 358 switch (ftr_bits->type) { 359 359 case FTR_EXACT: 360 - ftr = max((uint64_t)ftr_bits->safe_val + 1, ftr + 1); 360 + ftr = max((u64)ftr_bits->safe_val + 1, ftr + 1); 361 361 break; 362 362 case FTR_LOWER_SAFE: 363 363 ftr++; ··· 381 381 return ftr; 382 382 } 383 383 384 - static uint64_t test_reg_set_success(struct kvm_vcpu *vcpu, uint64_t reg, 385 - const struct reg_ftr_bits *ftr_bits) 384 + static u64 test_reg_set_success(struct kvm_vcpu *vcpu, u64 reg, 385 + const struct reg_ftr_bits *ftr_bits) 386 386 { 387 387 uint8_t shift = ftr_bits->shift; 388 - uint64_t mask = ftr_bits->mask; 389 - uint64_t val, new_val, ftr; 388 + u64 mask = ftr_bits->mask; 389 + u64 val, new_val, ftr; 390 390 391 391 val = vcpu_get_reg(vcpu, reg); 392 392 ftr = (val & mask) >> shift; ··· 404 404 return new_val; 405 405 } 406 406 407 - static void test_reg_set_fail(struct kvm_vcpu *vcpu, uint64_t reg, 407 + static void test_reg_set_fail(struct kvm_vcpu *vcpu, u64 reg, 408 408 const struct reg_ftr_bits *ftr_bits) 409 409 { 410 410 uint8_t shift = ftr_bits->shift; 411 - uint64_t mask = ftr_bits->mask; 412 - uint64_t val, old_val, ftr; 411 + u64 mask = ftr_bits->mask; 412 + u64 val, old_val, ftr; 413 413 int r; 414 414 415 415 val = vcpu_get_reg(vcpu, reg); ··· 430 430 TEST_ASSERT_EQ(val, old_val); 431 431 } 432 432 433 - static uint64_t test_reg_vals[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 433 + static u64 test_reg_vals[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 434 434 435 435 #define encoding_to_range_idx(encoding) \ 436 436 KVM_ARM_FEATURE_ID_RANGE_IDX(sys_reg_Op0(encoding), sys_reg_Op1(encoding), \ ··· 440 440 441 441 static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu, bool aarch64_only) 442 442 { 443 - uint64_t masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 443 + u64 masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 444 444 struct reg_mask_range range = { 445 445 .addr = (__u64)masks, 446 446 }; ··· 458 458 for (int i = 0; i < ARRAY_SIZE(test_regs); i++) { 459 459 const struct reg_ftr_bits *ftr_bits = test_regs[i].ftr_bits; 460 460 uint32_t reg_id = test_regs[i].reg; 461 - uint64_t reg = KVM_ARM64_SYS_REG(reg_id); 461 + u64 reg = KVM_ARM64_SYS_REG(reg_id); 462 462 int idx; 463 463 464 464 /* Get the index to masks array for the idreg */ ··· 488 488 #define MPAM_IDREG_TEST 6 489 489 static void test_user_set_mpam_reg(struct kvm_vcpu *vcpu) 490 490 { 491 - uint64_t masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 491 + u64 masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 492 492 struct reg_mask_range range = { 493 493 .addr = (__u64)masks, 494 494 }; 495 - uint64_t val; 495 + u64 val; 496 496 int idx, err; 497 497 498 498 /* ··· 583 583 #define MTE_IDREG_TEST 1 584 584 static void test_user_set_mte_reg(struct kvm_vcpu *vcpu) 585 585 { 586 - uint64_t masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 586 + u64 masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; 587 587 struct reg_mask_range range = { 588 588 .addr = (__u64)masks, 589 589 }; 590 - uint64_t val; 591 - uint64_t mte; 592 - uint64_t mte_frac; 590 + u64 val; 591 + u64 mte; 592 + u64 mte_frac; 593 593 int idx, err; 594 594 595 595 val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR1_EL1)); ··· 643 643 ksft_test_result_pass("ID_AA64PFR1_EL1.MTE_frac no longer 0xF\n"); 644 644 } 645 645 646 - static uint64_t reset_mutable_bits(uint32_t id, uint64_t val) 646 + static u64 reset_mutable_bits(uint32_t id, u64 val) 647 647 { 648 648 struct test_feature_reg *reg = NULL; 649 649 ··· 673 673 struct ucall uc; 674 674 675 675 while (!done) { 676 - uint64_t val; 676 + u64 val; 677 677 678 678 vcpu_run(vcpu); 679 679 ··· 706 706 707 707 static void test_clidr(struct kvm_vcpu *vcpu) 708 708 { 709 - uint64_t clidr; 709 + u64 clidr; 710 710 int level; 711 711 712 712 clidr = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CLIDR_EL1)); ··· 774 774 static void test_assert_id_reg_unchanged(struct kvm_vcpu *vcpu, uint32_t encoding) 775 775 { 776 776 size_t idx = encoding_to_range_idx(encoding); 777 - uint64_t observed; 777 + u64 observed; 778 778 779 779 observed = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding)); 780 780 TEST_ASSERT_EQ(reset_mutable_bits(encoding, test_reg_vals[idx]), ··· 807 807 struct kvm_vcpu *vcpu; 808 808 struct kvm_vm *vm; 809 809 bool aarch64_only; 810 - uint64_t val, el0; 810 + u64 val, el0; 811 811 int test_cnt, i, j; 812 812 813 813 TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES));
+13 -13
tools/testing/selftests/kvm/arm64/vgic_init.c
··· 19 19 20 20 #define NR_VCPUS 4 21 21 22 - #define REG_OFFSET(vcpu, offset) (((uint64_t)vcpu << 32) | offset) 22 + #define REG_OFFSET(vcpu, offset) (((u64)vcpu << 32) | offset) 23 23 24 24 #define VGIC_DEV_IS_V2(_d) ((_d) == KVM_DEV_TYPE_ARM_VGIC_V2) 25 25 #define VGIC_DEV_IS_V3(_d) ((_d) == KVM_DEV_TYPE_ARM_VGIC_V3) ··· 30 30 uint32_t gic_dev_type; 31 31 }; 32 32 33 - static uint64_t max_phys_size; 33 + static u64 max_phys_size; 34 34 35 35 /* 36 36 * Helpers to access a redistributor register and verify the ioctl() failed or ··· 103 103 } 104 104 105 105 struct vgic_region_attr { 106 - uint64_t attr; 107 - uint64_t size; 108 - uint64_t alignment; 106 + u64 attr; 107 + u64 size; 108 + u64 alignment; 109 109 }; 110 110 111 111 struct vgic_region_attr gic_v3_dist_region = { ··· 143 143 static void subtest_dist_rdist(struct vm_gic *v) 144 144 { 145 145 int ret; 146 - uint64_t addr; 146 + u64 addr; 147 147 struct vgic_region_attr rdist; /* CPU interface in GICv2*/ 148 148 struct vgic_region_attr dist; 149 149 ··· 223 223 /* Test the new REDIST region API */ 224 224 static void subtest_v3_redist_regions(struct vm_gic *v) 225 225 { 226 - uint64_t addr, expected_addr; 226 + u64 addr, expected_addr; 227 227 int ret; 228 228 229 229 ret = __kvm_has_device_attr(v->gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR, ··· 408 408 struct kvm_vcpu *vcpus[NR_VCPUS]; 409 409 void *dummy = NULL; 410 410 struct vm_gic v; 411 - uint64_t addr; 411 + u64 addr; 412 412 int ret; 413 413 414 414 v = vm_gic_create_with_vcpus(KVM_DEV_TYPE_ARM_VGIC_V3, NR_VCPUS, vcpus); ··· 460 460 static void test_v3_typer_accesses(void) 461 461 { 462 462 struct vm_gic v; 463 - uint64_t addr; 463 + u64 addr; 464 464 int ret, i; 465 465 466 466 v.vm = vm_create(NR_VCPUS); ··· 546 546 { 547 547 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 }; 548 548 struct vm_gic v; 549 - uint64_t addr; 549 + u64 addr; 550 550 551 551 v = vm_gic_v3_create_with_vcpuids(ARRAY_SIZE(vcpuids), vcpuids); 552 552 ··· 580 580 { 581 581 uint32_t vcpuids[] = { 0, 3, 5, 4, 1, 2 }; 582 582 struct vm_gic v; 583 - uint64_t addr; 583 + u64 addr; 584 584 585 585 v = vm_gic_v3_create_with_vcpuids(ARRAY_SIZE(vcpuids), vcpuids); 586 586 ··· 606 606 struct kvm_vcpu *vcpus[NR_VCPUS]; 607 607 struct vm_gic v; 608 608 int ret, i; 609 - uint64_t addr; 609 + u64 addr; 610 610 611 611 v = vm_gic_create_with_vcpus(KVM_DEV_TYPE_ARM_VGIC_V3, 1, vcpus); 612 612 ··· 638 638 { 639 639 struct kvm_vcpu *vcpus[NR_VCPUS]; 640 640 struct vm_gic v; 641 - uint64_t addr; 641 + u64 addr; 642 642 int its_fd, ret; 643 643 644 644 v = vm_gic_create_with_vcpus(KVM_DEV_TYPE_ARM_VGIC_V3, NR_VCPUS, vcpus);
+18 -18
tools/testing/selftests/kvm/arm64/vgic_irq.c
··· 133 133 for_each_supported_inject_fn((args), (t), (f)) 134 134 135 135 /* Shared between the guest main thread and the IRQ handlers. */ 136 - volatile uint64_t irq_handled; 136 + volatile u64 irq_handled; 137 137 volatile uint32_t irqnr_received[MAX_SPI + 1]; 138 138 139 139 static void reset_stats(void) ··· 145 145 irqnr_received[i] = 0; 146 146 } 147 147 148 - static uint64_t gic_read_ap1r0(void) 148 + static u64 gic_read_ap1r0(void) 149 149 { 150 - uint64_t reg = read_sysreg_s(SYS_ICC_AP1R0_EL1); 150 + u64 reg = read_sysreg_s(SYS_ICC_AP1R0_EL1); 151 151 152 152 dsb(sy); 153 153 return reg; 154 154 } 155 155 156 - static void gic_write_ap1r0(uint64_t val) 156 + static void gic_write_ap1r0(u64 val) 157 157 { 158 158 write_sysreg_s(val, SYS_ICC_AP1R0_EL1); 159 159 isb(); ··· 578 578 { 579 579 struct kvm_irq_routing *routing; 580 580 int ret; 581 - uint64_t i; 581 + u64 i; 582 582 583 583 assert(num <= kvm_max_routes && kvm_max_routes <= KVM_MAX_IRQ_ROUTES); 584 584 585 585 routing = kvm_gsi_routing_create(); 586 - for (i = intid; i < (uint64_t)intid + num; i++) 586 + for (i = intid; i < (u64)intid + num; i++) 587 587 kvm_gsi_routing_irqchip_add(routing, i - MIN_SPI, i - MIN_SPI); 588 588 589 589 if (!expect_failure) { ··· 591 591 } else { 592 592 ret = _kvm_gsi_routing_write(vm, routing); 593 593 /* The kernel only checks e->irqchip.pin >= KVM_IRQCHIP_NUM_PINS */ 594 - if (((uint64_t)intid + num - 1 - MIN_SPI) >= KVM_IRQCHIP_NUM_PINS) 594 + if (((u64)intid + num - 1 - MIN_SPI) >= KVM_IRQCHIP_NUM_PINS) 595 595 TEST_ASSERT(ret != 0 && errno == EINVAL, 596 596 "Bad intid %u did not cause KVM_SET_GSI_ROUTING " 597 597 "error: rc: %i errno: %i", intid, ret, errno); ··· 622 622 bool expect_failure) 623 623 { 624 624 int fd[MAX_SPI]; 625 - uint64_t val; 625 + u64 val; 626 626 int ret, f; 627 - uint64_t i; 627 + u64 i; 628 628 629 629 /* 630 630 * There is no way to try injecting an SGI or PPI as the interface ··· 643 643 * that no actual interrupt was injected for those cases. 644 644 */ 645 645 646 - for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) 646 + for (f = 0, i = intid; i < (u64)intid + num; i++, f++) 647 647 fd[f] = kvm_new_eventfd(); 648 648 649 - for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) { 650 - assert(i <= (uint64_t)UINT_MAX); 649 + for (f = 0, i = intid; i < (u64)intid + num; i++, f++) { 650 + assert(i <= (u64)UINT_MAX); 651 651 kvm_assign_irqfd(vm, i - MIN_SPI, fd[f]); 652 652 } 653 653 654 - for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) { 654 + for (f = 0, i = intid; i < (u64)intid + num; i++, f++) { 655 655 val = 1; 656 - ret = write(fd[f], &val, sizeof(uint64_t)); 657 - TEST_ASSERT(ret == sizeof(uint64_t), 656 + ret = write(fd[f], &val, sizeof(u64)); 657 + TEST_ASSERT(ret == sizeof(u64), 658 658 __KVM_SYSCALL_ERROR("write()", ret)); 659 659 } 660 660 661 - for (f = 0, i = intid; i < (uint64_t)intid + num; i++, f++) 661 + for (f = 0, i = intid; i < (u64)intid + num; i++, f++) 662 662 kvm_close(fd[f]); 663 663 } 664 664 665 665 /* handles the valid case: intid=0xffffffff num=1 */ 666 666 #define for_each_intid(first, num, tmp, i) \ 667 667 for ((tmp) = (i) = (first); \ 668 - (tmp) < (uint64_t)(first) + (uint64_t)(num); \ 668 + (tmp) < (u64)(first) + (u64)(num); \ 669 669 (tmp)++, (i)++) 670 670 671 671 static void run_guest_cmd(struct kvm_vcpu *vcpu, int gic_fd, ··· 678 678 int level = inject_args->level; 679 679 bool expect_failure = inject_args->expect_failure; 680 680 struct kvm_vm *vm = vcpu->vm; 681 - uint64_t tmp; 681 + u64 tmp; 682 682 uint32_t i; 683 683 684 684 /* handles the valid case: intid=0xffffffff num=1 */
+1 -1
tools/testing/selftests/kvm/arm64/vgic_v5.c
··· 20 20 uint32_t gic_dev_type; 21 21 }; 22 22 23 - static uint64_t max_phys_size; 23 + static u64 max_phys_size; 24 24 25 25 #define GUEST_CMD_IRQ_CDIA 10 26 26 #define GUEST_CMD_IRQ_DIEOI 11
+27 -27
tools/testing/selftests/kvm/arm64/vpmu_counter_access.c
··· 33 33 static struct vpmu_vm vpmu_vm; 34 34 35 35 struct pmreg_sets { 36 - uint64_t set_reg_id; 37 - uint64_t clr_reg_id; 36 + u64 set_reg_id; 37 + u64 clr_reg_id; 38 38 }; 39 39 40 40 #define PMREG_SET(set, clr) {.set_reg_id = set, .clr_reg_id = clr} 41 41 42 - static uint64_t get_pmcr_n(uint64_t pmcr) 42 + static u64 get_pmcr_n(u64 pmcr) 43 43 { 44 44 return FIELD_GET(ARMV8_PMU_PMCR_N, pmcr); 45 45 } 46 46 47 - static uint64_t get_counters_mask(uint64_t n) 47 + static u64 get_counters_mask(u64 n) 48 48 { 49 - uint64_t mask = BIT(ARMV8_PMU_CYCLE_IDX); 49 + u64 mask = BIT(ARMV8_PMU_CYCLE_IDX); 50 50 51 51 if (n) 52 52 mask |= GENMASK(n - 1, 0); ··· 89 89 90 90 static void pmu_disable_reset(void) 91 91 { 92 - uint64_t pmcr = read_sysreg(pmcr_el0); 92 + u64 pmcr = read_sysreg(pmcr_el0); 93 93 94 94 /* Reset all counters, disabling them */ 95 95 pmcr &= ~ARMV8_PMU_PMCR_E; ··· 169 169 170 170 #define GUEST_ASSERT_BITMAP_REG(regname, mask, set_expected) \ 171 171 { \ 172 - uint64_t _tval = read_sysreg(regname); \ 172 + u64 _tval = read_sysreg(regname); \ 173 173 \ 174 174 if (set_expected) \ 175 175 __GUEST_ASSERT((_tval & mask), \ ··· 185 185 * Check if @mask bits in {PMCNTEN,PMINTEN,PMOVS}{SET,CLR} registers 186 186 * are set or cleared as specified in @set_expected. 187 187 */ 188 - static void check_bitmap_pmu_regs(uint64_t mask, bool set_expected) 188 + static void check_bitmap_pmu_regs(u64 mask, bool set_expected) 189 189 { 190 190 GUEST_ASSERT_BITMAP_REG(pmcntenset_el0, mask, set_expected); 191 191 GUEST_ASSERT_BITMAP_REG(pmcntenclr_el0, mask, set_expected); ··· 207 207 */ 208 208 static void test_bitmap_pmu_regs(int pmc_idx, bool set_op) 209 209 { 210 - uint64_t pmcr_n, test_bit = BIT(pmc_idx); 210 + u64 pmcr_n, test_bit = BIT(pmc_idx); 211 211 bool set_expected = false; 212 212 213 213 if (set_op) { ··· 232 232 */ 233 233 static void test_access_pmc_regs(struct pmc_accessor *acc, int pmc_idx) 234 234 { 235 - uint64_t write_data, read_data; 235 + u64 write_data, read_data; 236 236 237 237 /* Disable all PMCs and reset all PMCs to zero. */ 238 238 pmu_disable_reset(); ··· 287 287 } 288 288 289 289 #define INVALID_EC (-1ul) 290 - uint64_t expected_ec = INVALID_EC; 290 + u64 expected_ec = INVALID_EC; 291 291 292 292 static void guest_sync_handler(struct ex_regs *regs) 293 293 { 294 - uint64_t esr, ec; 294 + u64 esr, ec; 295 295 296 296 esr = read_sysreg(esr_el1); 297 297 ec = ESR_ELx_EC(esr); ··· 351 351 * if reading/writing PMU registers for implemented or unimplemented 352 352 * counters works as expected. 353 353 */ 354 - static void guest_code(uint64_t expected_pmcr_n) 354 + static void guest_code(u64 expected_pmcr_n) 355 355 { 356 - uint64_t pmcr, pmcr_n, unimp_mask; 356 + u64 pmcr, pmcr_n, unimp_mask; 357 357 int i, pmc; 358 358 359 359 __GUEST_ASSERT(expected_pmcr_n <= ARMV8_PMU_MAX_GENERAL_COUNTERS, ··· 403 403 { 404 404 struct kvm_vcpu_init init; 405 405 uint8_t pmuver, ec; 406 - uint64_t dfr0, irq = 23; 406 + u64 dfr0, irq = 23; 407 407 struct kvm_device_attr irq_attr = { 408 408 .group = KVM_ARM_VCPU_PMU_V3_CTRL, 409 409 .attr = KVM_ARM_VCPU_PMU_V3_IRQ, 410 - .addr = (uint64_t)&irq, 410 + .addr = (u64)&irq, 411 411 }; 412 412 413 413 /* The test creates the vpmu_vm multiple times. Ensure a clean state */ ··· 443 443 kvm_vm_free(vpmu_vm.vm); 444 444 } 445 445 446 - static void run_vcpu(struct kvm_vcpu *vcpu, uint64_t pmcr_n) 446 + static void run_vcpu(struct kvm_vcpu *vcpu, u64 pmcr_n) 447 447 { 448 448 struct ucall uc; 449 449 ··· 489 489 * Create a guest with one vCPU, set the PMCR_EL0.N for the vCPU to @pmcr_n, 490 490 * and run the test. 491 491 */ 492 - static void run_access_test(uint64_t pmcr_n) 492 + static void run_access_test(u64 pmcr_n) 493 493 { 494 - uint64_t sp; 494 + u64 sp; 495 495 struct kvm_vcpu *vcpu; 496 496 struct kvm_vcpu_init init; 497 497 ··· 514 514 aarch64_vcpu_setup(vcpu, &init); 515 515 vcpu_init_descriptor_tables(vcpu); 516 516 vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_SP_EL1), sp); 517 - vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (uint64_t)guest_code); 517 + vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (u64)guest_code); 518 518 519 519 run_vcpu(vcpu, pmcr_n); 520 520 ··· 531 531 * Create a VM, and check if KVM handles the userspace accesses of 532 532 * the PMU register sets in @validity_check_reg_sets[] correctly. 533 533 */ 534 - static void run_pmregs_validity_test(uint64_t pmcr_n) 534 + static void run_pmregs_validity_test(u64 pmcr_n) 535 535 { 536 536 int i; 537 537 struct kvm_vcpu *vcpu; 538 - uint64_t set_reg_id, clr_reg_id, reg_val; 539 - uint64_t valid_counters_mask, max_counters_mask; 538 + u64 set_reg_id, clr_reg_id, reg_val; 539 + u64 valid_counters_mask, max_counters_mask; 540 540 541 541 test_create_vpmu_vm_with_nr_counters(pmcr_n, false); 542 542 vcpu = vpmu_vm.vcpu; ··· 588 588 * the vCPU to @pmcr_n, which is larger than the host value. 589 589 * The attempt should fail as @pmcr_n is too big to set for the vCPU. 590 590 */ 591 - static void run_error_test(uint64_t pmcr_n) 591 + static void run_error_test(u64 pmcr_n) 592 592 { 593 593 pr_debug("Error test with pmcr_n %lu (larger than the host)\n", pmcr_n); 594 594 ··· 600 600 * Return the default number of implemented PMU event counters excluding 601 601 * the cycle counter (i.e. PMCR_EL0.N value) for the guest. 602 602 */ 603 - static uint64_t get_pmcr_n_limit(void) 603 + static u64 get_pmcr_n_limit(void) 604 604 { 605 - uint64_t pmcr; 605 + u64 pmcr; 606 606 607 607 create_vpmu_vm(guest_code); 608 608 pmcr = vcpu_get_reg(vpmu_vm.vcpu, KVM_ARM64_SYS_REG(SYS_PMCR_EL0)); ··· 624 624 625 625 int main(void) 626 626 { 627 - uint64_t i, pmcr_n; 627 + u64 i, pmcr_n; 628 628 629 629 TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_PMU_V3)); 630 630 TEST_REQUIRE(kvm_supports_vgic_v3());
+7 -7
tools/testing/selftests/kvm/coalesced_io_test.c
··· 15 15 struct kvm_coalesced_io { 16 16 struct kvm_coalesced_mmio_ring *ring; 17 17 uint32_t ring_size; 18 - uint64_t mmio_gpa; 19 - uint64_t *mmio; 18 + u64 mmio_gpa; 19 + u64 *mmio; 20 20 21 21 /* 22 22 * x86-only, but define pio_port for all architectures to minimize the ··· 94 94 95 95 TEST_ASSERT((!want_pio && (run->exit_reason == KVM_EXIT_MMIO && run->mmio.is_write && 96 96 run->mmio.phys_addr == io->mmio_gpa && run->mmio.len == 8 && 97 - *(uint64_t *)run->mmio.data == io->mmio_gpa + io->ring_size - 1)) || 97 + *(u64 *)run->mmio.data == io->mmio_gpa + io->ring_size - 1)) || 98 98 (want_pio && (run->exit_reason == KVM_EXIT_IO && run->io.port == io->pio_port && 99 99 run->io.direction == KVM_EXIT_IO_OUT && run->io.count == 1 && 100 100 pio_value == io->pio_port + io->ring_size - 1)), ··· 105 105 want_pio ? (unsigned long long)io->pio_port : io->mmio_gpa, 106 106 (want_pio ? io->pio_port : io->mmio_gpa) + io->ring_size - 1, run->exit_reason, 107 107 run->exit_reason == KVM_EXIT_MMIO ? "MMIO" : run->exit_reason == KVM_EXIT_IO ? "PIO" : "other", 108 - run->mmio.phys_addr, run->mmio.is_write, run->mmio.len, *(uint64_t *)run->mmio.data, 108 + run->mmio.phys_addr, run->mmio.is_write, run->mmio.len, *(u64 *)run->mmio.data, 109 109 run->io.port, run->io.direction, run->io.size, run->io.count, pio_value); 110 110 } 111 111 ··· 143 143 "Wanted 8-byte MMIO to 0x%lx = %lx in entry %u, got %u-byte %s 0x%llx = 0x%lx", 144 144 io->mmio_gpa, io->mmio_gpa + i, i, 145 145 entry->len, entry->pio ? "PIO" : "MMIO", 146 - entry->phys_addr, *(uint64_t *)entry->data); 146 + entry->phys_addr, *(u64 *)entry->data); 147 147 } 148 148 } 149 149 ··· 219 219 * the MMIO GPA identity mapped in the guest. 220 220 */ 221 221 .mmio_gpa = 4ull * SZ_1G, 222 - .mmio = (uint64_t *)(4ull * SZ_1G), 222 + .mmio = (u64 *)(4ull * SZ_1G), 223 223 .pio_port = 0x80, 224 224 }; 225 225 226 - virt_map(vm, (uint64_t)kvm_builtin_io_ring.mmio, kvm_builtin_io_ring.mmio_gpa, 1); 226 + virt_map(vm, (u64)kvm_builtin_io_ring.mmio, kvm_builtin_io_ring.mmio_gpa, 1); 227 227 228 228 sync_global_to_guest(vm, kvm_builtin_io_ring); 229 229 vcpu_args_set(vcpu, 1, &kvm_builtin_io_ring);
+5 -5
tools/testing/selftests/kvm/demand_paging_test.c
··· 24 24 #ifdef __NR_userfaultfd 25 25 26 26 static int nr_vcpus = 1; 27 - static uint64_t guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 27 + static u64 guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 28 28 29 29 static size_t demand_paging_size; 30 30 static char *guest_data_prototype; ··· 58 58 struct uffd_msg *msg) 59 59 { 60 60 pid_t tid = syscall(__NR_gettid); 61 - uint64_t addr = msg->arg.pagefault.address; 61 + u64 addr = msg->arg.pagefault.address; 62 62 struct timespec start; 63 63 struct timespec ts_diff; 64 64 int r; ··· 68 68 if (uffd_mode == UFFDIO_REGISTER_MODE_MISSING) { 69 69 struct uffdio_copy copy; 70 70 71 - copy.src = (uint64_t)guest_data_prototype; 71 + copy.src = (u64)guest_data_prototype; 72 72 copy.dst = addr; 73 73 copy.len = demand_paging_size; 74 74 copy.mode = 0; ··· 138 138 bool partition_vcpu_memory_access; 139 139 }; 140 140 141 - static void prefault_mem(void *alias, uint64_t len) 141 + static void prefault_mem(void *alias, u64 len) 142 142 { 143 143 size_t p; 144 144 ··· 154 154 struct memstress_vcpu_args *vcpu_args; 155 155 struct test_params *p = arg; 156 156 struct uffd_desc **uffd_descs = NULL; 157 - uint64_t uffd_region_size; 157 + u64 uffd_region_size; 158 158 struct timespec start; 159 159 struct timespec ts_diff; 160 160 double vcpu_paging_rate;
+6 -6
tools/testing/selftests/kvm/dirty_log_perf_test.c
··· 24 24 #define TEST_HOST_LOOP_N 2UL 25 25 26 26 static int nr_vcpus = 1; 27 - static uint64_t guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 27 + static u64 guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 28 28 static bool run_vcpus_while_disabling_dirty_logging; 29 29 30 30 /* Host variables */ ··· 37 37 { 38 38 struct kvm_vcpu *vcpu = vcpu_args->vcpu; 39 39 int vcpu_idx = vcpu_args->vcpu_idx; 40 - uint64_t pages_count = 0; 40 + u64 pages_count = 0; 41 41 struct kvm_run *run; 42 42 struct timespec start; 43 43 struct timespec ts_diff; ··· 93 93 94 94 struct test_params { 95 95 unsigned long iterations; 96 - uint64_t phys_offset; 96 + u64 phys_offset; 97 97 bool partition_vcpu_memory_access; 98 98 enum vm_mem_backing_src_type backing_src; 99 99 int slots; ··· 106 106 struct test_params *p = arg; 107 107 struct kvm_vm *vm; 108 108 unsigned long **bitmaps; 109 - uint64_t guest_num_pages; 110 - uint64_t host_num_pages; 111 - uint64_t pages_per_slot; 109 + u64 guest_num_pages; 110 + u64 host_num_pages; 111 + u64 pages_per_slot; 112 112 struct timespec start; 113 113 struct timespec ts_diff; 114 114 struct timespec get_dirty_log_total = (struct timespec){0};
+22 -22
tools/testing/selftests/kvm/dirty_log_test.c
··· 74 74 * the host. READ/WRITE_ONCE() should also be used with anything 75 75 * that may change. 76 76 */ 77 - static uint64_t host_page_size; 78 - static uint64_t guest_page_size; 79 - static uint64_t guest_num_pages; 80 - static uint64_t iteration; 81 - static uint64_t nr_writes; 77 + static u64 host_page_size; 78 + static u64 guest_page_size; 79 + static u64 guest_num_pages; 80 + static u64 iteration; 81 + static u64 nr_writes; 82 82 static bool vcpu_stop; 83 83 84 84 /* ··· 86 86 * This will be set to the topmost valid physical address minus 87 87 * the test memory size. 88 88 */ 89 - static uint64_t guest_test_phys_mem; 89 + static u64 guest_test_phys_mem; 90 90 91 91 /* 92 92 * Guest virtual memory offset of the testing memory slot. 93 93 * Must not conflict with identity mapped test code. 94 94 */ 95 - static uint64_t guest_test_virt_mem = DEFAULT_GUEST_TEST_MEM; 95 + static u64 guest_test_virt_mem = DEFAULT_GUEST_TEST_MEM; 96 96 97 97 /* 98 98 * Continuously write to the first 8 bytes of a random pages within ··· 100 100 */ 101 101 static void guest_code(void) 102 102 { 103 - uint64_t addr; 103 + u64 addr; 104 104 105 105 #ifdef __s390x__ 106 - uint64_t i; 106 + u64 i; 107 107 108 108 /* 109 109 * On s390x, all pages of a 1M segment are initially marked as dirty ··· 113 113 */ 114 114 for (i = 0; i < guest_num_pages; i++) { 115 115 addr = guest_test_virt_mem + i * guest_page_size; 116 - vcpu_arch_put_guest(*(uint64_t *)addr, READ_ONCE(iteration)); 116 + vcpu_arch_put_guest(*(u64 *)addr, READ_ONCE(iteration)); 117 117 nr_writes++; 118 118 } 119 119 #endif ··· 125 125 * guest_page_size; 126 126 addr = align_down(addr, host_page_size); 127 127 128 - vcpu_arch_put_guest(*(uint64_t *)addr, READ_ONCE(iteration)); 128 + vcpu_arch_put_guest(*(u64 *)addr, READ_ONCE(iteration)); 129 129 nr_writes++; 130 130 } 131 131 ··· 138 138 139 139 /* Points to the test VM memory region on which we track dirty logs */ 140 140 static void *host_test_mem; 141 - static uint64_t host_num_pages; 141 + static u64 host_num_pages; 142 142 143 143 /* For statistics only */ 144 - static uint64_t host_dirty_count; 145 - static uint64_t host_clear_count; 144 + static u64 host_dirty_count; 145 + static u64 host_clear_count; 146 146 147 147 /* Whether dirty ring reset is requested, or finished */ 148 148 static sem_t sem_vcpu_stop; ··· 169 169 * dirty gfn we've collected, so that if a mismatch of data found later in the 170 170 * verifying process, we let it pass. 171 171 */ 172 - static uint64_t dirty_ring_last_page = -1ULL; 172 + static u64 dirty_ring_last_page = -1ULL; 173 173 174 174 /* 175 175 * In addition to the above, it is possible (especially if this ··· 213 213 * and also don't fail when it is reported in the next iteration, together with 214 214 * an outdated iteration count. 215 215 */ 216 - static uint64_t dirty_ring_prev_iteration_last_page; 216 + static u64 dirty_ring_prev_iteration_last_page; 217 217 218 218 enum log_mode_t { 219 219 /* Only use KVM_GET_DIRTY_LOG for logging */ ··· 297 297 298 298 static void dirty_ring_create_vm_done(struct kvm_vm *vm) 299 299 { 300 - uint64_t pages; 300 + u64 pages; 301 301 uint32_t limit; 302 302 303 303 /* ··· 494 494 495 495 static void vm_dirty_log_verify(enum vm_guest_mode mode, unsigned long **bmap) 496 496 { 497 - uint64_t page, nr_dirty_pages = 0, nr_clean_pages = 0; 498 - uint64_t step = vm_num_host_pages(mode, 1); 497 + u64 page, nr_dirty_pages = 0, nr_clean_pages = 0; 498 + u64 step = vm_num_host_pages(mode, 1); 499 499 500 500 for (page = 0; page < host_num_pages; page += step) { 501 - uint64_t val = *(uint64_t *)(host_test_mem + page * host_page_size); 501 + u64 val = *(u64 *)(host_test_mem + page * host_page_size); 502 502 bool bmap0_dirty = __test_and_clear_bit_le(page, bmap[0]); 503 503 504 504 /* ··· 575 575 } 576 576 577 577 static struct kvm_vm *create_vm(enum vm_guest_mode mode, struct kvm_vcpu **vcpu, 578 - uint64_t extra_mem_pages, void *guest_code) 578 + u64 extra_mem_pages, void *guest_code) 579 579 { 580 580 struct kvm_vm *vm; 581 581 ··· 592 592 struct test_params { 593 593 unsigned long iterations; 594 594 unsigned long interval; 595 - uint64_t phys_offset; 595 + u64 phys_offset; 596 596 }; 597 597 598 598 static void run_test(enum vm_guest_mode mode, void *arg)
+8 -8
tools/testing/selftests/kvm/guest_memfd_test.c
··· 171 171 kvm_munmap(mem, total_size); 172 172 } 173 173 174 - static void test_collapse(int fd, uint64_t flags) 174 + static void test_collapse(int fd, u64 flags) 175 175 { 176 176 const size_t pmd_size = get_trans_hugepagesz(); 177 177 void *reserved_addr; ··· 346 346 } 347 347 348 348 static void test_create_guest_memfd_invalid_sizes(struct kvm_vm *vm, 349 - uint64_t guest_memfd_flags) 349 + u64 guest_memfd_flags) 350 350 { 351 351 size_t size; 352 352 int fd; ··· 389 389 390 390 static void test_guest_memfd_flags(struct kvm_vm *vm) 391 391 { 392 - uint64_t valid_flags = vm_check_cap(vm, KVM_CAP_GUEST_MEMFD_FLAGS); 393 - uint64_t flag; 392 + u64 valid_flags = vm_check_cap(vm, KVM_CAP_GUEST_MEMFD_FLAGS); 393 + u64 flag; 394 394 int fd; 395 395 396 396 for (flag = BIT(0); flag; flag <<= 1) { ··· 419 419 #define gmem_test(__test, __vm, __flags) \ 420 420 __gmem_test(__test, __vm, __flags, page_size * 4) 421 421 422 - static void __test_guest_memfd(struct kvm_vm *vm, uint64_t flags) 422 + static void __test_guest_memfd(struct kvm_vm *vm, u64 flags) 423 423 { 424 424 test_create_guest_memfd_multiple(vm); 425 425 test_create_guest_memfd_invalid_sizes(vm, flags); ··· 452 452 static void test_guest_memfd(unsigned long vm_type) 453 453 { 454 454 struct kvm_vm *vm = vm_create_barebones_type(vm_type); 455 - uint64_t flags; 455 + u64 flags; 456 456 457 457 test_guest_memfd_flags(vm); 458 458 ··· 470 470 kvm_vm_free(vm); 471 471 } 472 472 473 - static void guest_code(uint8_t *mem, uint64_t size) 473 + static void guest_code(uint8_t *mem, u64 size) 474 474 { 475 475 size_t i; 476 476 ··· 489 489 * the guest's code, stack, and page tables, and low memory contains 490 490 * the PCI hole and other MMIO regions that need to be avoided. 491 491 */ 492 - const uint64_t gpa = SZ_4G; 492 + const u64 gpa = SZ_4G; 493 493 const int slot = 1; 494 494 495 495 struct kvm_vcpu *vcpu;
+7 -7
tools/testing/selftests/kvm/guest_print_test.c
··· 16 16 #include "ucall_common.h" 17 17 18 18 struct guest_vals { 19 - uint64_t a; 20 - uint64_t b; 21 - uint64_t type; 19 + u64 a; 20 + u64 b; 21 + u64 type; 22 22 }; 23 23 24 24 static struct guest_vals vals; ··· 26 26 /* GUEST_PRINTF()/GUEST_ASSERT_FMT() does not support float or double. */ 27 27 #define TYPE_LIST \ 28 28 TYPE(test_type_i64, I64, "%ld", int64_t) \ 29 - TYPE(test_type_u64, U64u, "%lu", uint64_t) \ 30 - TYPE(test_type_x64, U64x, "0x%lx", uint64_t) \ 31 - TYPE(test_type_X64, U64X, "0x%lX", uint64_t) \ 29 + TYPE(test_type_u64, U64u, "%lu", u64) \ 30 + TYPE(test_type_x64, U64x, "0x%lx", u64) \ 31 + TYPE(test_type_X64, U64X, "0x%lX", u64) \ 32 32 TYPE(test_type_u32, U32u, "%u", uint32_t) \ 33 33 TYPE(test_type_x32, U32x, "0x%x", uint32_t) \ 34 34 TYPE(test_type_X32, U32X, "0x%X", uint32_t) \ ··· 56 56 \ 57 57 snprintf(expected_printf, UCALL_BUFFER_LEN, PRINTF_FMT_##ext, a, b); \ 58 58 snprintf(expected_assert, UCALL_BUFFER_LEN, ASSERT_FMT_##ext, a, b); \ 59 - vals = (struct guest_vals){ (uint64_t)a, (uint64_t)b, TYPE_##ext }; \ 59 + vals = (struct guest_vals){ (u64)a, (u64)b, TYPE_##ext }; \ 60 60 sync_global_to_guest(vcpu->vm, vals); \ 61 61 run_test(vcpu, expected_printf, expected_assert); \ 62 62 }
+8 -8
tools/testing/selftests/kvm/include/arm64/arch_timer.h
··· 18 18 #define CTL_ISTATUS (1 << 2) 19 19 20 20 #define msec_to_cycles(msec) \ 21 - (timer_get_cntfrq() * (uint64_t)(msec) / 1000) 21 + (timer_get_cntfrq() * (u64)(msec) / 1000) 22 22 23 23 #define usec_to_cycles(usec) \ 24 - (timer_get_cntfrq() * (uint64_t)(usec) / 1000000) 24 + (timer_get_cntfrq() * (u64)(usec) / 1000000) 25 25 26 26 #define cycles_to_usec(cycles) \ 27 - ((uint64_t)(cycles) * 1000000 / timer_get_cntfrq()) 27 + ((u64)(cycles) * 1000000 / timer_get_cntfrq()) 28 28 29 29 static inline uint32_t timer_get_cntfrq(void) 30 30 { 31 31 return read_sysreg(cntfrq_el0); 32 32 } 33 33 34 - static inline uint64_t timer_get_cntct(enum arch_timer timer) 34 + static inline u64 timer_get_cntct(enum arch_timer timer) 35 35 { 36 36 isb(); 37 37 ··· 48 48 return 0; 49 49 } 50 50 51 - static inline void timer_set_cval(enum arch_timer timer, uint64_t cval) 51 + static inline void timer_set_cval(enum arch_timer timer, u64 cval) 52 52 { 53 53 switch (timer) { 54 54 case VIRTUAL: ··· 64 64 isb(); 65 65 } 66 66 67 - static inline uint64_t timer_get_cval(enum arch_timer timer) 67 + static inline u64 timer_get_cval(enum arch_timer timer) 68 68 { 69 69 switch (timer) { 70 70 case VIRTUAL: ··· 144 144 145 145 static inline void timer_set_next_cval_ms(enum arch_timer timer, uint32_t msec) 146 146 { 147 - uint64_t now_ct = timer_get_cntct(timer); 148 - uint64_t next_ct = now_ct + msec_to_cycles(msec); 147 + u64 now_ct = timer_get_cntct(timer); 148 + u64 next_ct = now_ct + msec_to_cycles(msec); 149 149 150 150 timer_set_cval(timer, next_ct); 151 151 }
+2 -2
tools/testing/selftests/kvm/include/arm64/delay.h
··· 8 8 9 9 #include "arch_timer.h" 10 10 11 - static inline void __delay(uint64_t cycles) 11 + static inline void __delay(u64 cycles) 12 12 { 13 13 enum arch_timer timer = VIRTUAL; 14 - uint64_t start = timer_get_cntct(timer); 14 + u64 start = timer_get_cntct(timer); 15 15 16 16 while ((timer_get_cntct(timer) - start) < cycles) 17 17 cpu_relax();
+1 -1
tools/testing/selftests/kvm/include/arm64/gic.h
··· 48 48 * split is true, EOI drops the priority and deactivates the interrupt. 49 49 */ 50 50 void gic_set_eoi_split(bool split); 51 - void gic_set_priority_mask(uint64_t mask); 51 + void gic_set_priority_mask(u64 mask); 52 52 void gic_set_priority(uint32_t intid, uint32_t prio); 53 53 void gic_irq_set_active(unsigned int intid); 54 54 void gic_irq_clear_active(unsigned int intid);
+8 -8
tools/testing/selftests/kvm/include/arm64/processor.h
··· 179 179 void vm_install_sync_handler(struct kvm_vm *vm, 180 180 int vector, int ec, handler_fn handler); 181 181 182 - uint64_t *virt_get_pte_hva_at_level(struct kvm_vm *vm, gva_t gva, int level); 183 - uint64_t *virt_get_pte_hva(struct kvm_vm *vm, gva_t gva); 182 + u64 *virt_get_pte_hva_at_level(struct kvm_vm *vm, gva_t gva, int level); 183 + u64 *virt_get_pte_hva(struct kvm_vm *vm, gva_t gva); 184 184 185 185 static inline void cpu_relax(void) 186 186 { ··· 287 287 * @res: pointer to write the return values from registers x0-x3 288 288 * 289 289 */ 290 - void smccc_hvc(uint32_t function_id, uint64_t arg0, uint64_t arg1, 291 - uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5, 292 - uint64_t arg6, struct arm_smccc_res *res); 290 + void smccc_hvc(uint32_t function_id, u64 arg0, u64 arg1, 291 + u64 arg2, u64 arg3, u64 arg4, u64 arg5, 292 + u64 arg6, struct arm_smccc_res *res); 293 293 294 294 /** 295 295 * smccc_smc - Invoke a SMCCC function using the smc conduit ··· 298 298 * @res: pointer to write the return values from registers x0-x3 299 299 * 300 300 */ 301 - void smccc_smc(uint32_t function_id, uint64_t arg0, uint64_t arg1, 302 - uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5, 303 - uint64_t arg6, struct arm_smccc_res *res); 301 + void smccc_smc(uint32_t function_id, u64 arg0, u64 arg1, 302 + u64 arg2, u64 arg3, u64 arg4, u64 arg5, 303 + u64 arg6, struct arm_smccc_res *res); 304 304 305 305 /* Execute a Wait For Interrupt instruction. */ 306 306 void wfi(void);
+3 -3
tools/testing/selftests/kvm/include/arm64/vgic.h
··· 11 11 #include "kvm_util.h" 12 12 13 13 #define REDIST_REGION_ATTR_ADDR(count, base, flags, index) \ 14 - (((uint64_t)(count) << 52) | \ 15 - ((uint64_t)((base) >> 16) << 16) | \ 16 - ((uint64_t)(flags) << 12) | \ 14 + (((u64)(count) << 52) | \ 15 + ((u64)((base) >> 16) << 16) | \ 16 + ((u64)(flags) << 12) | \ 17 17 index) 18 18 19 19 bool kvm_supports_vgic_v3(void);
+78 -74
tools/testing/selftests/kvm/include/kvm_util.h
··· 90 90 91 91 struct kvm_mmu { 92 92 bool pgd_created; 93 - uint64_t pgd; 93 + u64 pgd; 94 94 int pgtable_levels; 95 95 96 96 struct kvm_mmu_arch arch; ··· 105 105 unsigned int page_shift; 106 106 unsigned int pa_bits; 107 107 unsigned int va_bits; 108 - uint64_t max_gfn; 108 + u64 max_gfn; 109 109 struct list_head vcpus; 110 110 struct userspace_mem_regions regions; 111 111 struct sparsebit *vpages_valid; ··· 114 114 gpa_t ucall_mmio_addr; 115 115 gva_t handlers; 116 116 uint32_t dirty_ring_size; 117 - uint64_t gpa_tag_mask; 117 + u64 gpa_tag_mask; 118 118 119 119 /* 120 120 * "mmu" is the guest's stage-1, with a short name because the vast ··· 219 219 uint16_t pad1; 220 220 }; 221 221 222 - kvm_static_assert(sizeof(struct vm_shape) == sizeof(uint64_t)); 222 + kvm_static_assert(sizeof(struct vm_shape) == sizeof(u64)); 223 223 224 224 #define VM_TYPE_DEFAULT 0 225 225 ··· 404 404 return ret; 405 405 } 406 406 407 - static inline int __vm_enable_cap(struct kvm_vm *vm, uint32_t cap, uint64_t arg0) 407 + static inline int __vm_enable_cap(struct kvm_vm *vm, uint32_t cap, u64 arg0) 408 408 { 409 409 struct kvm_enable_cap enable_cap = { .cap = cap, .args = { arg0 } }; 410 410 411 411 return __vm_ioctl(vm, KVM_ENABLE_CAP, &enable_cap); 412 412 } 413 - static inline void vm_enable_cap(struct kvm_vm *vm, uint32_t cap, uint64_t arg0) 413 + 414 + static inline void vm_enable_cap(struct kvm_vm *vm, uint32_t cap, u64 arg0) 414 415 { 415 416 struct kvm_enable_cap enable_cap = { .cap = cap, .args = { arg0 } }; 416 417 417 418 vm_ioctl(vm, KVM_ENABLE_CAP, &enable_cap); 418 419 } 419 420 420 - static inline void vm_set_memory_attributes(struct kvm_vm *vm, uint64_t gpa, 421 - uint64_t size, uint64_t attributes) 421 + static inline void vm_set_memory_attributes(struct kvm_vm *vm, u64 gpa, 422 + u64 size, u64 attributes) 422 423 { 423 424 struct kvm_memory_attributes attr = { 424 425 .attributes = attributes, ··· 439 438 } 440 439 441 440 442 - static inline void vm_mem_set_private(struct kvm_vm *vm, uint64_t gpa, 443 - uint64_t size) 441 + static inline void vm_mem_set_private(struct kvm_vm *vm, u64 gpa, 442 + u64 size) 444 443 { 445 444 vm_set_memory_attributes(vm, gpa, size, KVM_MEMORY_ATTRIBUTE_PRIVATE); 446 445 } 447 446 448 - static inline void vm_mem_set_shared(struct kvm_vm *vm, uint64_t gpa, 449 - uint64_t size) 447 + static inline void vm_mem_set_shared(struct kvm_vm *vm, u64 gpa, 448 + u64 size) 450 449 { 451 450 vm_set_memory_attributes(vm, gpa, size, 0); 452 451 } 453 452 454 - void vm_guest_mem_fallocate(struct kvm_vm *vm, uint64_t gpa, uint64_t size, 453 + void vm_guest_mem_fallocate(struct kvm_vm *vm, u64 gpa, u64 size, 455 454 bool punch_hole); 456 455 457 - static inline void vm_guest_mem_punch_hole(struct kvm_vm *vm, uint64_t gpa, 458 - uint64_t size) 456 + static inline void vm_guest_mem_punch_hole(struct kvm_vm *vm, u64 gpa, 457 + u64 size) 459 458 { 460 459 vm_guest_mem_fallocate(vm, gpa, size, true); 461 460 } 462 461 463 - static inline void vm_guest_mem_allocate(struct kvm_vm *vm, uint64_t gpa, 464 - uint64_t size) 462 + static inline void vm_guest_mem_allocate(struct kvm_vm *vm, u64 gpa, 463 + u64 size) 465 464 { 466 465 vm_guest_mem_fallocate(vm, gpa, size, false); 467 466 } ··· 485 484 } 486 485 487 486 static inline void kvm_vm_clear_dirty_log(struct kvm_vm *vm, int slot, void *log, 488 - uint64_t first_page, uint32_t num_pages) 487 + u64 first_page, uint32_t num_pages) 489 488 { 490 489 struct kvm_clear_dirty_log args = { 491 490 .dirty_bitmap = log, ··· 503 502 } 504 503 505 504 static inline void kvm_vm_register_coalesced_io(struct kvm_vm *vm, 506 - uint64_t address, 507 - uint64_t size, bool pio) 505 + u64 address, 506 + u64 size, bool pio) 508 507 { 509 508 struct kvm_coalesced_mmio_zone zone = { 510 509 .addr = address, ··· 516 515 } 517 516 518 517 static inline void kvm_vm_unregister_coalesced_io(struct kvm_vm *vm, 519 - uint64_t address, 520 - uint64_t size, bool pio) 518 + u64 address, 519 + u64 size, bool pio) 521 520 { 522 521 struct kvm_coalesced_mmio_zone zone = { 523 522 .addr = address, ··· 611 610 } 612 611 613 612 void read_stat_data(int stats_fd, struct kvm_stats_header *header, 614 - struct kvm_stats_desc *desc, uint64_t *data, 613 + struct kvm_stats_desc *desc, u64 *data, 615 614 size_t max_elements); 616 615 617 616 void kvm_get_stat(struct kvm_binary_stats *stats, const char *name, 618 - uint64_t *data, size_t max_elements); 617 + u64 *data, size_t max_elements); 619 618 620 619 #define __get_stat(stats, stat) \ 621 620 ({ \ 622 - uint64_t data; \ 621 + u64 data; \ 623 622 \ 624 623 kvm_get_stat(stats, #stat, &data, 1); \ 625 624 data; \ ··· 665 664 666 665 void vm_create_irqchip(struct kvm_vm *vm); 667 666 668 - static inline int __vm_create_guest_memfd(struct kvm_vm *vm, uint64_t size, 669 - uint64_t flags) 667 + static inline int __vm_create_guest_memfd(struct kvm_vm *vm, u64 size, 668 + u64 flags) 670 669 { 671 670 struct kvm_create_guest_memfd guest_memfd = { 672 671 .size = size, ··· 676 675 return __vm_ioctl(vm, KVM_CREATE_GUEST_MEMFD, &guest_memfd); 677 676 } 678 677 679 - static inline int vm_create_guest_memfd(struct kvm_vm *vm, uint64_t size, 680 - uint64_t flags) 678 + static inline int vm_create_guest_memfd(struct kvm_vm *vm, u64 size, 679 + u64 flags) 681 680 { 682 681 int fd = __vm_create_guest_memfd(vm, size, flags); 683 682 ··· 686 685 } 687 686 688 687 void vm_set_user_memory_region(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 689 - uint64_t gpa, uint64_t size, void *hva); 688 + u64 gpa, u64 size, void *hva); 690 689 int __vm_set_user_memory_region(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 691 - uint64_t gpa, uint64_t size, void *hva); 690 + u64 gpa, u64 size, void *hva); 692 691 void vm_set_user_memory_region2(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 693 - uint64_t gpa, uint64_t size, void *hva, 694 - uint32_t guest_memfd, uint64_t guest_memfd_offset); 692 + u64 gpa, u64 size, void *hva, 693 + uint32_t guest_memfd, u64 guest_memfd_offset); 695 694 int __vm_set_user_memory_region2(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 696 - uint64_t gpa, uint64_t size, void *hva, 697 - uint32_t guest_memfd, uint64_t guest_memfd_offset); 695 + u64 gpa, u64 size, void *hva, 696 + uint32_t guest_memfd, u64 guest_memfd_offset); 698 697 699 698 void vm_userspace_mem_region_add(struct kvm_vm *vm, 700 699 enum vm_mem_backing_src_type src_type, 701 - uint64_t gpa, uint32_t slot, uint64_t npages, 700 + u64 gpa, uint32_t slot, u64 npages, 702 701 uint32_t flags); 703 702 void vm_mem_add(struct kvm_vm *vm, enum vm_mem_backing_src_type src_type, 704 - uint64_t gpa, uint32_t slot, uint64_t npages, uint32_t flags, 705 - int guest_memfd_fd, uint64_t guest_memfd_offset); 703 + u64 gpa, uint32_t slot, u64 npages, uint32_t flags, 704 + int guest_memfd_fd, u64 guest_memfd_offset); 706 705 707 706 #ifndef vm_arch_has_protected_memory 708 707 static inline bool vm_arch_has_protected_memory(struct kvm_vm *vm) ··· 713 712 714 713 void vm_mem_region_set_flags(struct kvm_vm *vm, uint32_t slot, uint32_t flags); 715 714 void vm_mem_region_reload(struct kvm_vm *vm, uint32_t slot); 716 - void vm_mem_region_move(struct kvm_vm *vm, uint32_t slot, uint64_t new_gpa); 715 + void vm_mem_region_move(struct kvm_vm *vm, uint32_t slot, u64 new_gpa); 717 716 void vm_mem_region_delete(struct kvm_vm *vm, uint32_t slot); 718 717 struct kvm_vcpu *__vm_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id); 719 718 void vm_populate_vaddr_bitmap(struct kvm_vm *vm); ··· 727 726 gva_t __vm_vaddr_alloc_page(struct kvm_vm *vm, enum kvm_mem_region_type type); 728 727 gva_t vm_vaddr_alloc_page(struct kvm_vm *vm); 729 728 730 - void virt_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr, 729 + void virt_map(struct kvm_vm *vm, u64 vaddr, u64 paddr, 731 730 unsigned int npages); 732 731 void *addr_gpa2hva(struct kvm_vm *vm, gpa_t gpa); 733 732 void *addr_gva2hva(struct kvm_vm *vm, gva_t gva); ··· 755 754 struct kvm_reg_list *vcpu_get_reg_list(struct kvm_vcpu *vcpu); 756 755 757 756 static inline void vcpu_enable_cap(struct kvm_vcpu *vcpu, uint32_t cap, 758 - uint64_t arg0) 757 + u64 arg0) 759 758 { 760 759 struct kvm_enable_cap enable_cap = { .cap = cap, .args = { arg0 } }; 761 760 ··· 810 809 vcpu_ioctl(vcpu, KVM_SET_FPU, fpu); 811 810 } 812 811 813 - static inline int __vcpu_get_reg(struct kvm_vcpu *vcpu, uint64_t id, void *addr) 812 + static inline int __vcpu_get_reg(struct kvm_vcpu *vcpu, u64 id, void *addr) 814 813 { 815 - struct kvm_one_reg reg = { .id = id, .addr = (uint64_t)addr }; 814 + struct kvm_one_reg reg = { .id = id, .addr = (u64)addr }; 816 815 817 816 return __vcpu_ioctl(vcpu, KVM_GET_ONE_REG, &reg); 818 817 } 819 - static inline int __vcpu_set_reg(struct kvm_vcpu *vcpu, uint64_t id, uint64_t val) 818 + 819 + static inline int __vcpu_set_reg(struct kvm_vcpu *vcpu, u64 id, u64 val) 820 820 { 821 - struct kvm_one_reg reg = { .id = id, .addr = (uint64_t)&val }; 821 + struct kvm_one_reg reg = { .id = id, .addr = (u64)&val }; 822 822 823 823 return __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, &reg); 824 824 } 825 - static inline uint64_t vcpu_get_reg(struct kvm_vcpu *vcpu, uint64_t id) 825 + 826 + static inline u64 vcpu_get_reg(struct kvm_vcpu *vcpu, u64 id) 826 827 { 827 - uint64_t val; 828 - struct kvm_one_reg reg = { .id = id, .addr = (uint64_t)&val }; 828 + u64 val; 829 + struct kvm_one_reg reg = { .id = id, .addr = (u64)&val }; 829 830 830 831 TEST_ASSERT(KVM_REG_SIZE(id) <= sizeof(val), "Reg %lx too big", id); 831 832 832 833 vcpu_ioctl(vcpu, KVM_GET_ONE_REG, &reg); 833 834 return val; 834 835 } 835 - static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, uint64_t id, uint64_t val) 836 + 837 + static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u64 id, u64 val) 836 838 { 837 - struct kvm_one_reg reg = { .id = id, .addr = (uint64_t)&val }; 839 + struct kvm_one_reg reg = { .id = id, .addr = (u64)&val }; 838 840 839 841 TEST_ASSERT(KVM_REG_SIZE(id) <= sizeof(val), "Reg %lx too big", id); 840 842 ··· 882 878 return fd; 883 879 } 884 880 885 - int __kvm_has_device_attr(int dev_fd, uint32_t group, uint64_t attr); 881 + int __kvm_has_device_attr(int dev_fd, uint32_t group, u64 attr); 886 882 887 - static inline void kvm_has_device_attr(int dev_fd, uint32_t group, uint64_t attr) 883 + static inline void kvm_has_device_attr(int dev_fd, uint32_t group, u64 attr) 888 884 { 889 885 int ret = __kvm_has_device_attr(dev_fd, group, attr); 890 886 891 887 TEST_ASSERT(!ret, "KVM_HAS_DEVICE_ATTR failed, rc: %i errno: %i", ret, errno); 892 888 } 893 889 894 - int __kvm_device_attr_get(int dev_fd, uint32_t group, uint64_t attr, void *val); 890 + int __kvm_device_attr_get(int dev_fd, uint32_t group, u64 attr, void *val); 895 891 896 892 static inline void kvm_device_attr_get(int dev_fd, uint32_t group, 897 - uint64_t attr, void *val) 893 + u64 attr, void *val) 898 894 { 899 895 int ret = __kvm_device_attr_get(dev_fd, group, attr, val); 900 896 901 897 TEST_ASSERT(!ret, KVM_IOCTL_ERROR(KVM_GET_DEVICE_ATTR, ret)); 902 898 } 903 899 904 - int __kvm_device_attr_set(int dev_fd, uint32_t group, uint64_t attr, void *val); 900 + int __kvm_device_attr_set(int dev_fd, uint32_t group, u64 attr, void *val); 905 901 906 902 static inline void kvm_device_attr_set(int dev_fd, uint32_t group, 907 - uint64_t attr, void *val) 903 + u64 attr, void *val) 908 904 { 909 905 int ret = __kvm_device_attr_set(dev_fd, group, attr, val); 910 906 ··· 912 908 } 913 909 914 910 static inline int __vcpu_has_device_attr(struct kvm_vcpu *vcpu, uint32_t group, 915 - uint64_t attr) 911 + u64 attr) 916 912 { 917 913 return __kvm_has_device_attr(vcpu->fd, group, attr); 918 914 } 919 915 920 916 static inline void vcpu_has_device_attr(struct kvm_vcpu *vcpu, uint32_t group, 921 - uint64_t attr) 917 + u64 attr) 922 918 { 923 919 kvm_has_device_attr(vcpu->fd, group, attr); 924 920 } 925 921 926 922 static inline int __vcpu_device_attr_get(struct kvm_vcpu *vcpu, uint32_t group, 927 - uint64_t attr, void *val) 923 + u64 attr, void *val) 928 924 { 929 925 return __kvm_device_attr_get(vcpu->fd, group, attr, val); 930 926 } 931 927 932 928 static inline void vcpu_device_attr_get(struct kvm_vcpu *vcpu, uint32_t group, 933 - uint64_t attr, void *val) 929 + u64 attr, void *val) 934 930 { 935 931 kvm_device_attr_get(vcpu->fd, group, attr, val); 936 932 } 937 933 938 934 static inline int __vcpu_device_attr_set(struct kvm_vcpu *vcpu, uint32_t group, 939 - uint64_t attr, void *val) 935 + u64 attr, void *val) 940 936 { 941 937 return __kvm_device_attr_set(vcpu->fd, group, attr, val); 942 938 } 943 939 944 940 static inline void vcpu_device_attr_set(struct kvm_vcpu *vcpu, uint32_t group, 945 - uint64_t attr, void *val) 941 + u64 attr, void *val) 946 942 { 947 943 kvm_device_attr_set(vcpu->fd, group, attr, val); 948 944 } 949 945 950 - int __kvm_test_create_device(struct kvm_vm *vm, uint64_t type); 951 - int __kvm_create_device(struct kvm_vm *vm, uint64_t type); 946 + int __kvm_test_create_device(struct kvm_vm *vm, u64 type); 947 + int __kvm_create_device(struct kvm_vm *vm, u64 type); 952 948 953 - static inline int kvm_create_device(struct kvm_vm *vm, uint64_t type) 949 + static inline int kvm_create_device(struct kvm_vm *vm, u64 type) 954 950 { 955 951 int fd = __kvm_create_device(vm, type); 956 952 ··· 966 962 * Input Args: 967 963 * vcpu - vCPU 968 964 * num - number of arguments 969 - * ... - arguments, each of type uint64_t 965 + * ... - arguments, each of type u64 970 966 * 971 967 * Output Args: None 972 968 * ··· 974 970 * 975 971 * Sets the first @num input parameters for the function at @vcpu's entry point, 976 972 * per the C calling convention of the architecture, to the values given as 977 - * variable args. Each of the variable args is expected to be of type uint64_t. 973 + * variable args. Each of the variable args is expected to be of type u64. 978 974 * The maximum @num can be is specific to the architecture. 979 975 */ 980 976 void vcpu_args_set(struct kvm_vcpu *vcpu, unsigned int num, ...); ··· 1018 1014 */ 1019 1015 struct kvm_vm *____vm_create(struct vm_shape shape); 1020 1016 struct kvm_vm *__vm_create(struct vm_shape shape, uint32_t nr_runnable_vcpus, 1021 - uint64_t nr_extra_pages); 1017 + u64 nr_extra_pages); 1022 1018 1023 1019 static inline struct kvm_vm *vm_create_barebones(void) 1024 1020 { ··· 1041 1037 } 1042 1038 1043 1039 struct kvm_vm *__vm_create_with_vcpus(struct vm_shape shape, uint32_t nr_vcpus, 1044 - uint64_t extra_mem_pages, 1040 + u64 extra_mem_pages, 1045 1041 void *guest_code, struct kvm_vcpu *vcpus[]); 1046 1042 1047 1043 static inline struct kvm_vm *vm_create_with_vcpus(uint32_t nr_vcpus, ··· 1055 1051 1056 1052 struct kvm_vm *__vm_create_shape_with_one_vcpu(struct vm_shape shape, 1057 1053 struct kvm_vcpu **vcpu, 1058 - uint64_t extra_mem_pages, 1054 + u64 extra_mem_pages, 1059 1055 void *guest_code); 1060 1056 1061 1057 /* ··· 1063 1059 * additional pages of guest memory. Returns the VM and vCPU (via out param). 1064 1060 */ 1065 1061 static inline struct kvm_vm *__vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, 1066 - uint64_t extra_mem_pages, 1062 + u64 extra_mem_pages, 1067 1063 void *guest_code) 1068 1064 { 1069 1065 return __vm_create_shape_with_one_vcpu(VM_SHAPE_DEFAULT, vcpu, ··· 1219 1215 * Within @vm, creates a virtual translation for the page starting 1220 1216 * at @vaddr to the page starting at @paddr. 1221 1217 */ 1222 - void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr); 1218 + void virt_arch_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr); 1223 1219 1224 - static inline void virt_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr) 1220 + static inline void virt_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr) 1225 1221 { 1226 1222 virt_arch_pg_map(vm, vaddr, paddr); 1227 1223 sparsebit_set(vm->vpages_mapped, vaddr >> vm->page_shift); ··· 1278 1274 return __vm_enable_cap(vm, KVM_CAP_VM_DISABLE_NX_HUGE_PAGES, 0); 1279 1275 } 1280 1276 1281 - static inline uint64_t vm_page_align(struct kvm_vm *vm, uint64_t v) 1277 + static inline u64 vm_page_align(struct kvm_vm *vm, u64 v) 1282 1278 { 1283 1279 return (v + vm->page_size - 1) & ~(vm->page_size - 1); 1284 1280 }
+5 -3
tools/testing/selftests/kvm/include/kvm_util_types.h
··· 2 2 #ifndef SELFTEST_KVM_UTIL_TYPES_H 3 3 #define SELFTEST_KVM_UTIL_TYPES_H 4 4 5 + #include <linux/types.h> 6 + 5 7 /* 6 8 * Provide a version of static_assert() that is guaranteed to have an optional 7 9 * message param. _GNU_SOURCE is defined for all KVM selftests, _GNU_SOURCE ··· 16 14 #define __kvm_static_assert(expr, msg, ...) _Static_assert(expr, msg) 17 15 #define kvm_static_assert(expr, ...) __kvm_static_assert(expr, ##__VA_ARGS__, #expr) 18 16 19 - typedef uint64_t gpa_t; /* Virtual Machine (Guest) physical address */ 20 - typedef uint64_t gva_t; /* Virtual Machine (Guest) virtual address */ 17 + typedef u64 gpa_t; /* Virtual Machine (Guest) physical address */ 18 + typedef u64 gva_t; /* Virtual Machine (Guest) virtual address */ 21 19 22 - #define INVALID_GPA (~(uint64_t)0) 20 + #define INVALID_GPA (~(u64)0) 23 21 24 22 #endif /* SELFTEST_KVM_UTIL_TYPES_H */
+2 -2
tools/testing/selftests/kvm/include/loongarch/arch_timer.h
··· 70 70 csr_write(val, LOONGARCH_CSR_TCFG); 71 71 } 72 72 73 - static inline void __delay(uint64_t cycles) 73 + static inline void __delay(u64 cycles) 74 74 { 75 - uint64_t start = timer_get_cycles(); 75 + u64 start = timer_get_cycles(); 76 76 77 77 while ((timer_get_cycles() - start) < cycles) 78 78 cpu_relax();
+10 -10
tools/testing/selftests/kvm/include/memstress.h
··· 20 20 #define MEMSTRESS_MEM_SLOT_INDEX 1 21 21 22 22 struct memstress_vcpu_args { 23 - uint64_t gpa; 24 - uint64_t gva; 25 - uint64_t pages; 23 + u64 gpa; 24 + u64 gva; 25 + u64 pages; 26 26 27 27 /* Only used by the host userspace part of the vCPU thread */ 28 28 struct kvm_vcpu *vcpu; ··· 32 32 struct memstress_args { 33 33 struct kvm_vm *vm; 34 34 /* The starting address and size of the guest test region. */ 35 - uint64_t gpa; 36 - uint64_t size; 37 - uint64_t guest_page_size; 35 + u64 gpa; 36 + u64 size; 37 + u64 guest_page_size; 38 38 uint32_t random_seed; 39 39 uint32_t write_percent; 40 40 ··· 56 56 extern struct memstress_args memstress_args; 57 57 58 58 struct kvm_vm *memstress_create_vm(enum vm_guest_mode mode, int nr_vcpus, 59 - uint64_t vcpu_memory_bytes, int slots, 59 + u64 vcpu_memory_bytes, int slots, 60 60 enum vm_mem_backing_src_type backing_src, 61 61 bool partition_vcpu_memory_access); 62 62 void memstress_destroy_vm(struct kvm_vm *vm); ··· 68 68 void memstress_join_vcpu_threads(int vcpus); 69 69 void memstress_guest_code(uint32_t vcpu_id); 70 70 71 - uint64_t memstress_nested_pages(int nr_vcpus); 71 + u64 memstress_nested_pages(int nr_vcpus); 72 72 void memstress_setup_nested(struct kvm_vm *vm, int nr_vcpus, struct kvm_vcpu *vcpus[]); 73 73 74 74 void memstress_enable_dirty_logging(struct kvm_vm *vm, int slots); 75 75 void memstress_disable_dirty_logging(struct kvm_vm *vm, int slots); 76 76 void memstress_get_dirty_log(struct kvm_vm *vm, unsigned long *bitmaps[], int slots); 77 77 void memstress_clear_dirty_log(struct kvm_vm *vm, unsigned long *bitmaps[], 78 - int slots, uint64_t pages_per_slot); 79 - unsigned long **memstress_alloc_bitmaps(int slots, uint64_t pages_per_slot); 78 + int slots, u64 pages_per_slot); 79 + unsigned long **memstress_alloc_bitmaps(int slots, u64 pages_per_slot); 80 80 void memstress_free_bitmaps(unsigned long *bitmaps[], int slots); 81 81 82 82 #endif /* SELFTEST_KVM_MEMSTRESS_H */
+10 -10
tools/testing/selftests/kvm/include/riscv/arch_timer.h
··· 14 14 static unsigned long timer_freq; 15 15 16 16 #define msec_to_cycles(msec) \ 17 - ((timer_freq) * (uint64_t)(msec) / 1000) 17 + ((timer_freq) * (u64)(msec) / 1000) 18 18 19 19 #define usec_to_cycles(usec) \ 20 - ((timer_freq) * (uint64_t)(usec) / 1000000) 20 + ((timer_freq) * (u64)(usec) / 1000000) 21 21 22 22 #define cycles_to_usec(cycles) \ 23 - ((uint64_t)(cycles) * 1000000 / (timer_freq)) 23 + ((u64)(cycles) * 1000000 / (timer_freq)) 24 24 25 - static inline uint64_t timer_get_cycles(void) 25 + static inline u64 timer_get_cycles(void) 26 26 { 27 27 return csr_read(CSR_TIME); 28 28 } 29 29 30 - static inline void timer_set_cmp(uint64_t cval) 30 + static inline void timer_set_cmp(u64 cval) 31 31 { 32 32 csr_write(CSR_STIMECMP, cval); 33 33 } 34 34 35 - static inline uint64_t timer_get_cmp(void) 35 + static inline u64 timer_get_cmp(void) 36 36 { 37 37 return csr_read(CSR_STIMECMP); 38 38 } ··· 49 49 50 50 static inline void timer_set_next_cmp_ms(uint32_t msec) 51 51 { 52 - uint64_t now_ct = timer_get_cycles(); 53 - uint64_t next_ct = now_ct + msec_to_cycles(msec); 52 + u64 now_ct = timer_get_cycles(); 53 + u64 next_ct = now_ct + msec_to_cycles(msec); 54 54 55 55 timer_set_cmp(next_ct); 56 56 } 57 57 58 - static inline void __delay(uint64_t cycles) 58 + static inline void __delay(u64 cycles) 59 59 { 60 - uint64_t start = timer_get_cycles(); 60 + u64 start = timer_get_cycles(); 61 61 62 62 while ((timer_get_cycles() - start) < cycles) 63 63 cpu_relax();
+4 -5
tools/testing/selftests/kvm/include/riscv/processor.h
··· 25 25 #define GET_RM(insn) (((insn) & INSN_MASK_FUNCT3) >> INSN_SHIFT_FUNCT3) 26 26 #define GET_CSR_NUM(insn) (((insn) & INSN_CSR_MASK) >> INSN_CSR_SHIFT) 27 27 28 - static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype, 29 - uint64_t idx, uint64_t size) 28 + static inline u64 __kvm_reg_id(u64 type, u64 subtype, u64 idx, u64 size) 30 29 { 31 30 return KVM_REG_RISCV | type | subtype | idx | size; 32 31 } ··· 61 62 KVM_REG_RISCV_SBI_SINGLE, \ 62 63 idx, KVM_REG_SIZE_ULONG) 63 64 64 - bool __vcpu_has_ext(struct kvm_vcpu *vcpu, uint64_t ext); 65 + bool __vcpu_has_ext(struct kvm_vcpu *vcpu, u64 ext); 65 66 66 - static inline bool __vcpu_has_isa_ext(struct kvm_vcpu *vcpu, uint64_t isa_ext) 67 + static inline bool __vcpu_has_isa_ext(struct kvm_vcpu *vcpu, u64 isa_ext) 67 68 { 68 69 return __vcpu_has_ext(vcpu, RISCV_ISA_EXT_REG(isa_ext)); 69 70 } 70 71 71 - static inline bool __vcpu_has_sbi_ext(struct kvm_vcpu *vcpu, uint64_t sbi_ext) 72 + static inline bool __vcpu_has_sbi_ext(struct kvm_vcpu *vcpu, u64 sbi_ext) 72 73 { 73 74 return __vcpu_has_ext(vcpu, RISCV_SBI_EXT_REG(sbi_ext)); 74 75 }
+1 -1
tools/testing/selftests/kvm/include/s390/diag318_test_handler.h
··· 8 8 #ifndef SELFTEST_KVM_DIAG318_TEST_HANDLER 9 9 #define SELFTEST_KVM_DIAG318_TEST_HANDLER 10 10 11 - uint64_t get_diag318_info(void); 11 + u64 get_diag318_info(void); 12 12 13 13 #endif
+2 -2
tools/testing/selftests/kvm/include/s390/facility.h
··· 16 16 /* alt_stfle_fac_list[16] + stfle_fac_list[16] */ 17 17 #define NB_STFL_DOUBLEWORDS 32 18 18 19 - extern uint64_t stfl_doublewords[NB_STFL_DOUBLEWORDS]; 19 + extern u64 stfl_doublewords[NB_STFL_DOUBLEWORDS]; 20 20 extern bool stfle_flag; 21 21 22 22 static inline bool test_bit_inv(unsigned long nr, const unsigned long *ptr) ··· 24 24 return test_bit(nr ^ (BITS_PER_LONG - 1), ptr); 25 25 } 26 26 27 - static inline void stfle(uint64_t *fac, unsigned int nb_doublewords) 27 + static inline void stfle(u64 *fac, unsigned int nb_doublewords) 28 28 { 29 29 register unsigned long r0 asm("0") = nb_doublewords - 1; 30 30
+3 -3
tools/testing/selftests/kvm/include/sparsebit.h
··· 6 6 * 7 7 * Header file that describes API to the sparsebit library. 8 8 * This library provides a memory efficient means of storing 9 - * the settings of bits indexed via a uint64_t. Memory usage 9 + * the settings of bits indexed via a u64. Memory usage 10 10 * is reasonable, significantly less than (2^64 / 8) bytes, as 11 11 * long as bits that are mostly set or mostly cleared are close 12 12 * to each other. This library is efficient in memory usage ··· 25 25 #endif 26 26 27 27 struct sparsebit; 28 - typedef uint64_t sparsebit_idx_t; 29 - typedef uint64_t sparsebit_num_t; 28 + typedef u64 sparsebit_idx_t; 29 + typedef u64 sparsebit_num_t; 30 30 31 31 struct sparsebit *sparsebit_alloc(void); 32 32 void sparsebit_free(struct sparsebit **sbitp);
+8 -6
tools/testing/selftests/kvm/include/test_util.h
··· 22 22 #include <sys/mman.h> 23 23 #include "kselftest.h" 24 24 25 + #include <linux/types.h> 26 + 25 27 #define msecs_to_usecs(msec) ((msec) * 1000ULL) 26 28 27 29 static inline __printf(1, 2) int _no_printf(const char *format, ...) { return 0; } ··· 129 127 return __guest_random_bool(state, 50); 130 128 } 131 129 132 - static inline uint64_t guest_random_u64(struct guest_random_state *state) 130 + static inline u64 guest_random_u64(struct guest_random_state *state) 133 131 { 134 - return ((uint64_t)guest_random_u32(state) << 32) | guest_random_u32(state); 132 + return ((u64)guest_random_u32(state) << 32) | guest_random_u32(state); 135 133 } 136 134 137 135 enum vm_mem_backing_src_type { ··· 191 189 } 192 190 193 191 /* Aligns x up to the next multiple of size. Size must be a power of 2. */ 194 - static inline uint64_t align_up(uint64_t x, uint64_t size) 192 + static inline u64 align_up(u64 x, u64 size) 195 193 { 196 - uint64_t mask = size - 1; 194 + u64 mask = size - 1; 197 195 198 196 TEST_ASSERT(size != 0 && !(size & (size - 1)), 199 197 "size not a power of 2: %lu", size); 200 198 return ((x + mask) & ~mask); 201 199 } 202 200 203 - static inline uint64_t align_down(uint64_t x, uint64_t size) 201 + static inline u64 align_down(u64 x, u64 size) 204 202 { 205 - uint64_t x_aligned_up = align_up(x, size); 203 + u64 x_aligned_up = align_up(x, size); 206 204 207 205 if (x == x_aligned_up) 208 206 return x;
+3 -3
tools/testing/selftests/kvm/include/timer_test.h
··· 24 24 uint32_t migration_freq_ms; 25 25 uint32_t timer_err_margin_us; 26 26 /* Members of struct kvm_arm_counter_offset */ 27 - uint64_t counter_offset; 28 - uint64_t reserved; 27 + u64 counter_offset; 28 + u64 reserved; 29 29 }; 30 30 31 31 /* Shared variables between host and guest */ 32 32 struct test_vcpu_shared_data { 33 33 uint32_t nr_iter; 34 34 int guest_stage; 35 - uint64_t xcnt; 35 + u64 xcnt; 36 36 }; 37 37 38 38 extern struct test_args test_args;
+7 -7
tools/testing/selftests/kvm/include/ucall_common.h
··· 21 21 #define UCALL_BUFFER_LEN 1024 22 22 23 23 struct ucall { 24 - uint64_t cmd; 25 - uint64_t args[UCALL_MAX_ARGS]; 24 + u64 cmd; 25 + u64 args[UCALL_MAX_ARGS]; 26 26 char buffer[UCALL_BUFFER_LEN]; 27 27 28 28 /* Host virtual address of this struct. */ ··· 33 33 void ucall_arch_do_ucall(gva_t uc); 34 34 void *ucall_arch_get_ucall(struct kvm_vcpu *vcpu); 35 35 36 - void ucall(uint64_t cmd, int nargs, ...); 37 - __printf(2, 3) void ucall_fmt(uint64_t cmd, const char *fmt, ...); 38 - __printf(5, 6) void ucall_assert(uint64_t cmd, const char *exp, 36 + void ucall(u64 cmd, int nargs, ...); 37 + __printf(2, 3) void ucall_fmt(u64 cmd, const char *fmt, ...); 38 + __printf(5, 6) void ucall_assert(u64 cmd, const char *exp, 39 39 const char *file, unsigned int line, 40 40 const char *fmt, ...); 41 - uint64_t get_ucall(struct kvm_vcpu *vcpu, struct ucall *uc); 41 + u64 get_ucall(struct kvm_vcpu *vcpu, struct ucall *uc); 42 42 void ucall_init(struct kvm_vm *vm, gpa_t mmio_gpa); 43 - int ucall_nr_pages_required(uint64_t page_size); 43 + int ucall_nr_pages_required(u64 page_size); 44 44 45 45 /* 46 46 * Perform userspace call without any associated data. This bare call avoids
+3 -3
tools/testing/selftests/kvm/include/userfaultfd_util.h
··· 25 25 26 26 struct uffd_desc { 27 27 int uffd; 28 - uint64_t num_readers; 28 + u64 num_readers; 29 29 /* Holds the write ends of the pipes for killing the readers. */ 30 30 int *pipefds; 31 31 pthread_t *readers; ··· 33 33 }; 34 34 35 35 struct uffd_desc *uffd_setup_demand_paging(int uffd_mode, useconds_t delay, 36 - void *hva, uint64_t len, 37 - uint64_t num_readers, 36 + void *hva, u64 len, 37 + u64 num_readers, 38 38 uffd_handler_t handler); 39 39 40 40 void uffd_stop_demand_paging(struct uffd_desc *uffd);
+4 -4
tools/testing/selftests/kvm/include/x86/apic.h
··· 94 94 ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val; 95 95 } 96 96 97 - static inline uint64_t x2apic_read_reg(unsigned int reg) 97 + static inline u64 x2apic_read_reg(unsigned int reg) 98 98 { 99 99 return rdmsr(APIC_BASE_MSR + (reg >> 4)); 100 100 } 101 101 102 - static inline uint8_t x2apic_write_reg_safe(unsigned int reg, uint64_t value) 102 + static inline uint8_t x2apic_write_reg_safe(unsigned int reg, u64 value) 103 103 { 104 104 return wrmsr_safe(APIC_BASE_MSR + (reg >> 4), value); 105 105 } 106 106 107 - static inline void x2apic_write_reg(unsigned int reg, uint64_t value) 107 + static inline void x2apic_write_reg(unsigned int reg, u64 value) 108 108 { 109 109 uint8_t fault = x2apic_write_reg_safe(reg, value); 110 110 ··· 112 112 fault, APIC_BASE_MSR + (reg >> 4), value); 113 113 } 114 114 115 - static inline void x2apic_write_reg_fault(unsigned int reg, uint64_t value) 115 + static inline void x2apic_write_reg_fault(unsigned int reg, u64 value) 116 116 { 117 117 uint8_t fault = x2apic_write_reg_safe(reg, value); 118 118
+9 -9
tools/testing/selftests/kvm/include/x86/evmcs.h
··· 12 12 13 13 #define u16 uint16_t 14 14 #define u32 uint32_t 15 - #define u64 uint64_t 15 + #define u64 u64 16 16 17 17 #define EVMCS_VERSION 1 18 18 ··· 245 245 enable_evmcs = true; 246 246 } 247 247 248 - static inline int evmcs_vmptrld(uint64_t vmcs_pa, void *vmcs) 248 + static inline int evmcs_vmptrld(u64 vmcs_pa, void *vmcs) 249 249 { 250 250 current_vp_assist->current_nested_vmcs = vmcs_pa; 251 251 current_vp_assist->enlighten_vmentry = 1; ··· 265 265 return true; 266 266 } 267 267 268 - static inline int evmcs_vmptrst(uint64_t *value) 268 + static inline int evmcs_vmptrst(u64 *value) 269 269 { 270 270 *value = current_vp_assist->current_nested_vmcs & 271 271 ~HV_X64_MSR_VP_ASSIST_PAGE_ENABLE; ··· 273 273 return 0; 274 274 } 275 275 276 - static inline int evmcs_vmread(uint64_t encoding, uint64_t *value) 276 + static inline int evmcs_vmread(u64 encoding, u64 *value) 277 277 { 278 278 switch (encoding) { 279 279 case GUEST_RIP: ··· 672 672 return 0; 673 673 } 674 674 675 - static inline int evmcs_vmwrite(uint64_t encoding, uint64_t value) 675 + static inline int evmcs_vmwrite(u64 encoding, u64 value) 676 676 { 677 677 switch (encoding) { 678 678 case GUEST_RIP: ··· 1226 1226 "pop %%rbp;" 1227 1227 : [ret]"=&a"(ret) 1228 1228 : [host_rsp]"r" 1229 - ((uint64_t)&current_evmcs->host_rsp), 1229 + ((u64)&current_evmcs->host_rsp), 1230 1230 [host_rip]"r" 1231 - ((uint64_t)&current_evmcs->host_rip) 1231 + ((u64)&current_evmcs->host_rip) 1232 1232 : "memory", "cc", "rbx", "r8", "r9", "r10", 1233 1233 "r11", "r12", "r13", "r14", "r15"); 1234 1234 return ret; ··· 1265 1265 "pop %%rbp;" 1266 1266 : [ret]"=&a"(ret) 1267 1267 : [host_rsp]"r" 1268 - ((uint64_t)&current_evmcs->host_rsp), 1268 + ((u64)&current_evmcs->host_rsp), 1269 1269 [host_rip]"r" 1270 - ((uint64_t)&current_evmcs->host_rip) 1270 + ((u64)&current_evmcs->host_rip) 1271 1271 : "memory", "cc", "rbx", "r8", "r9", "r10", 1272 1272 "r11", "r12", "r13", "r14", "r15"); 1273 1273 return ret;
+7 -7
tools/testing/selftests/kvm/include/x86/hyperv.h
··· 256 256 */ 257 257 static inline uint8_t __hyperv_hypercall(u64 control, gva_t input_address, 258 258 gva_t output_address, 259 - uint64_t *hv_status) 259 + u64 *hv_status) 260 260 { 261 - uint64_t error_code; 261 + u64 error_code; 262 262 uint8_t vector; 263 263 264 264 /* Note both the hypercall and the "asm safe" clobber r9-r11. */ ··· 277 277 static inline void hyperv_hypercall(u64 control, gva_t input_address, 278 278 gva_t output_address) 279 279 { 280 - uint64_t hv_status; 280 + u64 hv_status; 281 281 uint8_t vector; 282 282 283 283 vector = __hyperv_hypercall(control, input_address, output_address, &hv_status); ··· 327 327 328 328 extern struct hv_vp_assist_page *current_vp_assist; 329 329 330 - int enable_vp_assist(uint64_t vp_assist_pa, void *vp_assist); 330 + int enable_vp_assist(u64 vp_assist_pa, void *vp_assist); 331 331 332 332 struct hyperv_test_pages { 333 333 /* VP assist page */ 334 334 void *vp_assist_hva; 335 - uint64_t vp_assist_gpa; 335 + u64 vp_assist_gpa; 336 336 void *vp_assist; 337 337 338 338 /* Partition assist page */ 339 339 void *partition_assist_hva; 340 - uint64_t partition_assist_gpa; 340 + u64 partition_assist_gpa; 341 341 void *partition_assist; 342 342 343 343 /* Enlightened VMCS */ 344 344 void *enlightened_vmcs_hva; 345 - uint64_t enlightened_vmcs_gpa; 345 + u64 enlightened_vmcs_gpa; 346 346 void *enlightened_vmcs; 347 347 }; 348 348
+15 -15
tools/testing/selftests/kvm/include/x86/kvm_util_arch.h
··· 11 11 extern bool is_forced_emulation_enabled; 12 12 13 13 struct pte_masks { 14 - uint64_t present; 15 - uint64_t writable; 16 - uint64_t user; 17 - uint64_t readable; 18 - uint64_t executable; 19 - uint64_t accessed; 20 - uint64_t dirty; 21 - uint64_t huge; 22 - uint64_t nx; 23 - uint64_t c; 24 - uint64_t s; 14 + u64 present; 15 + u64 writable; 16 + u64 user; 17 + u64 readable; 18 + u64 executable; 19 + u64 accessed; 20 + u64 dirty; 21 + u64 huge; 22 + u64 nx; 23 + u64 c; 24 + u64 s; 25 25 26 - uint64_t always_set; 26 + u64 always_set; 27 27 }; 28 28 29 29 struct kvm_mmu_arch { ··· 37 37 gva_t tss; 38 38 gva_t idt; 39 39 40 - uint64_t c_bit; 41 - uint64_t s_bit; 40 + u64 c_bit; 41 + u64 s_bit; 42 42 int sev_fd; 43 43 bool is_pt_protected; 44 44 }; ··· 62 62 : "+m" (mem) \ 63 63 : "r" (val) : "memory"); \ 64 64 } else { \ 65 - uint64_t __old = READ_ONCE(mem); \ 65 + u64 __old = READ_ONCE(mem); \ 66 66 \ 67 67 __asm__ __volatile__(KVM_FEP LOCK_PREFIX "cmpxchg %[new], %[ptr]" \ 68 68 : [ptr] "+m" (mem), [old] "+a" (__old) \
+5 -4
tools/testing/selftests/kvm/include/x86/pmu.h
··· 6 6 #define SELFTEST_KVM_PMU_H 7 7 8 8 #include <stdbool.h> 9 - #include <stdint.h> 10 9 10 + #include <linux/types.h> 11 11 #include <linux/bits.h> 12 12 13 13 #define KVM_PMU_EVENT_FILTER_MAX_EVENTS 300 ··· 104 104 NR_AMD_ZEN_EVENTS, 105 105 }; 106 106 107 - extern const uint64_t intel_pmu_arch_events[]; 108 - extern const uint64_t amd_pmu_zen_events[]; 107 + extern const u64 intel_pmu_arch_events[]; 108 + extern const u64 amd_pmu_zen_events[]; 109 109 110 110 enum pmu_errata { 111 111 INSTRUCTIONS_RETIRED_OVERCOUNT, 112 112 BRANCHES_RETIRED_OVERCOUNT, 113 113 }; 114 - extern uint64_t pmu_errata_mask; 114 + 115 + extern u64 pmu_errata_mask; 115 116 116 117 void kvm_init_pmu_errata(void); 117 118
+67 -70
tools/testing/selftests/kvm/include/x86/processor.h
··· 23 23 extern bool host_cpu_is_amd; 24 24 extern bool host_cpu_is_hygon; 25 25 extern bool host_cpu_is_amd_compatible; 26 - extern uint64_t guest_tsc_khz; 26 + extern u64 guest_tsc_khz; 27 27 28 28 #ifndef MAX_NR_CPUID_ENTRIES 29 29 #define MAX_NR_CPUID_ENTRIES 100 ··· 409 409 410 410 struct desc_ptr { 411 411 uint16_t size; 412 - uint64_t address; 412 + u64 address; 413 413 } __attribute__((packed)); 414 414 415 415 struct kvm_x86_state { ··· 427 427 struct kvm_msrs msrs; 428 428 }; 429 429 430 - static inline uint64_t get_desc64_base(const struct desc64 *desc) 430 + static inline u64 get_desc64_base(const struct desc64 *desc) 431 431 { 432 - return (uint64_t)desc->base3 << 32 | 433 - (uint64_t)desc->base2 << 24 | 434 - (uint64_t)desc->base1 << 16 | 435 - (uint64_t)desc->base0; 432 + return (u64)desc->base3 << 32 | 433 + (u64)desc->base2 << 24 | 434 + (u64)desc->base1 << 16 | 435 + (u64)desc->base0; 436 436 } 437 437 438 - static inline uint64_t rdtsc(void) 438 + static inline u64 rdtsc(void) 439 439 { 440 440 uint32_t eax, edx; 441 - uint64_t tsc_val; 441 + u64 tsc_val; 442 442 /* 443 443 * The lfence is to wait (on Intel CPUs) until all previous 444 444 * instructions have been executed. If software requires RDTSC to be ··· 446 446 * execute LFENCE immediately after RDTSC 447 447 */ 448 448 __asm__ __volatile__("lfence; rdtsc; lfence" : "=a"(eax), "=d"(edx)); 449 - tsc_val = ((uint64_t)edx) << 32 | eax; 449 + tsc_val = ((u64)edx) << 32 | eax; 450 450 return tsc_val; 451 451 } 452 452 453 - static inline uint64_t rdtscp(uint32_t *aux) 453 + static inline u64 rdtscp(uint32_t *aux) 454 454 { 455 455 uint32_t eax, edx; 456 456 457 457 __asm__ __volatile__("rdtscp" : "=a"(eax), "=d"(edx), "=c"(*aux)); 458 - return ((uint64_t)edx) << 32 | eax; 458 + return ((u64)edx) << 32 | eax; 459 459 } 460 460 461 - static inline uint64_t rdmsr(uint32_t msr) 461 + static inline u64 rdmsr(uint32_t msr) 462 462 { 463 463 uint32_t a, d; 464 464 465 465 __asm__ __volatile__("rdmsr" : "=a"(a), "=d"(d) : "c"(msr) : "memory"); 466 466 467 - return a | ((uint64_t) d << 32); 467 + return a | ((u64)d << 32); 468 468 } 469 469 470 - static inline void wrmsr(uint32_t msr, uint64_t value) 470 + static inline void wrmsr(uint32_t msr, u64 value) 471 471 { 472 472 uint32_t a = value; 473 473 uint32_t d = value >> 32; ··· 550 550 return tr; 551 551 } 552 552 553 - static inline uint64_t get_cr0(void) 553 + static inline u64 get_cr0(void) 554 554 { 555 - uint64_t cr0; 555 + u64 cr0; 556 556 557 557 __asm__ __volatile__("mov %%cr0, %[cr0]" 558 558 : /* output */ [cr0]"=r"(cr0)); 559 559 return cr0; 560 560 } 561 561 562 - static inline void set_cr0(uint64_t val) 562 + static inline void set_cr0(u64 val) 563 563 { 564 564 __asm__ __volatile__("mov %0, %%cr0" : : "r" (val) : "memory"); 565 565 } 566 566 567 - static inline uint64_t get_cr3(void) 567 + static inline u64 get_cr3(void) 568 568 { 569 - uint64_t cr3; 569 + u64 cr3; 570 570 571 571 __asm__ __volatile__("mov %%cr3, %[cr3]" 572 572 : /* output */ [cr3]"=r"(cr3)); 573 573 return cr3; 574 574 } 575 575 576 - static inline void set_cr3(uint64_t val) 576 + static inline void set_cr3(u64 val) 577 577 { 578 578 __asm__ __volatile__("mov %0, %%cr3" : : "r" (val) : "memory"); 579 579 } 580 580 581 - static inline uint64_t get_cr4(void) 581 + static inline u64 get_cr4(void) 582 582 { 583 - uint64_t cr4; 583 + u64 cr4; 584 584 585 585 __asm__ __volatile__("mov %%cr4, %[cr4]" 586 586 : /* output */ [cr4]"=r"(cr4)); 587 587 return cr4; 588 588 } 589 589 590 - static inline void set_cr4(uint64_t val) 590 + static inline void set_cr4(u64 val) 591 591 { 592 592 __asm__ __volatile__("mov %0, %%cr4" : : "r" (val) : "memory"); 593 593 } 594 594 595 - static inline uint64_t get_cr8(void) 595 + static inline u64 get_cr8(void) 596 596 { 597 - uint64_t cr8; 597 + u64 cr8; 598 598 599 599 __asm__ __volatile__("mov %%cr8, %[cr8]" : [cr8]"=r"(cr8)); 600 600 return cr8; 601 601 } 602 602 603 - static inline void set_cr8(uint64_t val) 603 + static inline void set_cr8(u64 val) 604 604 { 605 605 __asm__ __volatile__("mov %0, %%cr8" : : "r" (val) : "memory"); 606 606 } ··· 782 782 return nr_bits > feature.f.bit || this_cpu_has(feature.f); 783 783 } 784 784 785 - static __always_inline uint64_t this_cpu_supported_xcr0(void) 785 + static __always_inline u64 this_cpu_supported_xcr0(void) 786 786 { 787 787 if (!this_cpu_has_p(X86_PROPERTY_SUPPORTED_XCR0_LO)) 788 788 return 0; 789 789 790 790 return this_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_LO) | 791 - ((uint64_t)this_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_HI) << 32); 791 + ((u64)this_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_HI) << 32); 792 792 } 793 793 794 794 typedef u32 __attribute__((vector_size(16))) sse128_t; ··· 867 867 868 868 static inline void udelay(unsigned long usec) 869 869 { 870 - uint64_t start, now, cycles; 870 + u64 start, now, cycles; 871 871 872 872 GUEST_ASSERT(guest_tsc_khz); 873 873 cycles = guest_tsc_khz / 1000 * usec; ··· 899 899 const struct kvm_msr_list *kvm_get_msr_index_list(void); 900 900 const struct kvm_msr_list *kvm_get_feature_msr_index_list(void); 901 901 bool kvm_msr_is_in_save_restore_list(uint32_t msr_index); 902 - uint64_t kvm_get_feature_msr(uint64_t msr_index); 902 + u64 kvm_get_feature_msr(u64 msr_index); 903 903 904 904 static inline void vcpu_msrs_get(struct kvm_vcpu *vcpu, 905 905 struct kvm_msrs *msrs) ··· 1022 1022 return nr_bits > feature.f.bit || kvm_cpu_has(feature.f); 1023 1023 } 1024 1024 1025 - static __always_inline uint64_t kvm_cpu_supported_xcr0(void) 1025 + static __always_inline u64 kvm_cpu_supported_xcr0(void) 1026 1026 { 1027 1027 if (!kvm_cpu_has_p(X86_PROPERTY_SUPPORTED_XCR0_LO)) 1028 1028 return 0; 1029 1029 1030 1030 return kvm_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_LO) | 1031 - ((uint64_t)kvm_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_HI) << 32); 1031 + ((u64)kvm_cpu_property(X86_PROPERTY_SUPPORTED_XCR0_HI) << 32); 1032 1032 } 1033 1033 1034 1034 static inline size_t kvm_cpuid2_size(int nr_entries) ··· 1135 1135 vcpu_set_or_clear_cpuid_feature(vcpu, feature, false); 1136 1136 } 1137 1137 1138 - uint64_t vcpu_get_msr(struct kvm_vcpu *vcpu, uint64_t msr_index); 1139 - int _vcpu_set_msr(struct kvm_vcpu *vcpu, uint64_t msr_index, uint64_t msr_value); 1138 + u64 vcpu_get_msr(struct kvm_vcpu *vcpu, u64 msr_index); 1139 + int _vcpu_set_msr(struct kvm_vcpu *vcpu, u64 msr_index, u64 msr_value); 1140 1140 1141 1141 /* 1142 1142 * Assert on an MSR access(es) and pretty print the MSR name when possible. ··· 1168 1168 1169 1169 #define vcpu_set_msr(vcpu, msr, val) \ 1170 1170 do { \ 1171 - uint64_t r, v = val; \ 1171 + u64 r, v = val; \ 1172 1172 \ 1173 1173 TEST_ASSERT_MSR(_vcpu_set_msr(vcpu, msr, v) == 1, \ 1174 1174 "KVM_SET_MSRS failed on %s, value = 0x%lx", msr, #msr, v); \ ··· 1182 1182 void kvm_init_vm_address_properties(struct kvm_vm *vm); 1183 1183 1184 1184 struct ex_regs { 1185 - uint64_t rax, rcx, rdx, rbx; 1186 - uint64_t rbp, rsi, rdi; 1187 - uint64_t r8, r9, r10, r11; 1188 - uint64_t r12, r13, r14, r15; 1189 - uint64_t vector; 1190 - uint64_t error_code; 1191 - uint64_t rip; 1192 - uint64_t cs; 1193 - uint64_t rflags; 1185 + u64 rax, rcx, rdx, rbx; 1186 + u64 rbp, rsi, rdi; 1187 + u64 r8, r9, r10, r11; 1188 + u64 r12, r13, r14, r15; 1189 + u64 vector; 1190 + u64 error_code; 1191 + u64 rip; 1192 + u64 cs; 1193 + u64 rflags; 1194 1194 }; 1195 1195 1196 1196 struct idt_entry { ··· 1262 1262 1263 1263 #define kvm_asm_safe(insn, inputs...) \ 1264 1264 ({ \ 1265 - uint64_t ign_error_code; \ 1265 + u64 ign_error_code; \ 1266 1266 uint8_t vector; \ 1267 1267 \ 1268 1268 asm volatile(KVM_ASM_SAFE(insn) \ ··· 1285 1285 1286 1286 #define kvm_asm_safe_fep(insn, inputs...) \ 1287 1287 ({ \ 1288 - uint64_t ign_error_code; \ 1288 + u64 ign_error_code; \ 1289 1289 uint8_t vector; \ 1290 1290 \ 1291 1291 asm volatile(KVM_ASM_SAFE_FEP(insn) \ ··· 1307 1307 }) 1308 1308 1309 1309 #define BUILD_READ_U64_SAFE_HELPER(insn, _fep, _FEP) \ 1310 - static inline uint8_t insn##_safe ##_fep(uint32_t idx, uint64_t *val) \ 1310 + static inline uint8_t insn##_safe ##_fep(uint32_t idx, u64 *val) \ 1311 1311 { \ 1312 - uint64_t error_code; \ 1312 + u64 error_code; \ 1313 1313 uint8_t vector; \ 1314 1314 uint32_t a, d; \ 1315 1315 \ ··· 1319 1319 : "c"(idx) \ 1320 1320 : KVM_ASM_SAFE_CLOBBERS); \ 1321 1321 \ 1322 - *val = (uint64_t)a | ((uint64_t)d << 32); \ 1322 + *val = (u64)a | ((u64)d << 32); \ 1323 1323 return vector; \ 1324 1324 } 1325 1325 ··· 1335 1335 BUILD_READ_U64_SAFE_HELPERS(rdpmc) 1336 1336 BUILD_READ_U64_SAFE_HELPERS(xgetbv) 1337 1337 1338 - static inline uint8_t wrmsr_safe(uint32_t msr, uint64_t val) 1338 + static inline uint8_t wrmsr_safe(uint32_t msr, u64 val) 1339 1339 { 1340 1340 return kvm_asm_safe("wrmsr", "a"(val & -1u), "d"(val >> 32), "c"(msr)); 1341 1341 } 1342 1342 1343 - static inline uint8_t xsetbv_safe(uint32_t index, uint64_t value) 1343 + static inline uint8_t xsetbv_safe(uint32_t index, u64 value) 1344 1344 { 1345 1345 u32 eax = value; 1346 1346 u32 edx = value >> 32; ··· 1395 1395 return !!get_kvm_amd_param_integer("lbrv"); 1396 1396 } 1397 1397 1398 - uint64_t *vm_get_pte(struct kvm_vm *vm, uint64_t vaddr); 1398 + u64 *vm_get_pte(struct kvm_vm *vm, u64 vaddr); 1399 1399 1400 - uint64_t kvm_hypercall(uint64_t nr, uint64_t a0, uint64_t a1, uint64_t a2, 1401 - uint64_t a3); 1402 - uint64_t __xen_hypercall(uint64_t nr, uint64_t a0, void *a1); 1403 - void xen_hypercall(uint64_t nr, uint64_t a0, void *a1); 1400 + u64 kvm_hypercall(u64 nr, u64 a0, u64 a1, u64 a2, u64 a3); 1401 + u64 __xen_hypercall(u64 nr, u64 a0, void *a1); 1402 + void xen_hypercall(u64 nr, u64 a0, void *a1); 1404 1403 1405 - static inline uint64_t __kvm_hypercall_map_gpa_range(uint64_t gpa, 1406 - uint64_t size, uint64_t flags) 1404 + static inline u64 __kvm_hypercall_map_gpa_range(u64 gpa, u64 size, u64 flags) 1407 1405 { 1408 1406 return kvm_hypercall(KVM_HC_MAP_GPA_RANGE, gpa, size >> PAGE_SHIFT, flags, 0); 1409 1407 } 1410 1408 1411 - static inline void kvm_hypercall_map_gpa_range(uint64_t gpa, uint64_t size, 1412 - uint64_t flags) 1409 + static inline void kvm_hypercall_map_gpa_range(u64 gpa, u64 size, u64 flags) 1413 1410 { 1414 - uint64_t ret = __kvm_hypercall_map_gpa_range(gpa, size, flags); 1411 + u64 ret = __kvm_hypercall_map_gpa_range(gpa, size, flags); 1415 1412 1416 1413 GUEST_ASSERT(!ret); 1417 1414 } ··· 1453 1456 asm volatile ("cli"); 1454 1457 } 1455 1458 1456 - void __vm_xsave_require_permission(uint64_t xfeature, const char *name); 1459 + void __vm_xsave_require_permission(u64 xfeature, const char *name); 1457 1460 1458 1461 #define vm_xsave_require_permission(xfeature) \ 1459 1462 __vm_xsave_require_permission(xfeature, #xfeature) ··· 1508 1511 void tdp_mmu_init(struct kvm_vm *vm, int pgtable_levels, 1509 1512 struct pte_masks *pte_masks); 1510 1513 1511 - void __virt_pg_map(struct kvm_vm *vm, struct kvm_mmu *mmu, uint64_t vaddr, 1512 - uint64_t paddr, int level); 1513 - void virt_map_level(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr, 1514 - uint64_t nr_bytes, int level); 1514 + void __virt_pg_map(struct kvm_vm *vm, struct kvm_mmu *mmu, u64 vaddr, 1515 + u64 paddr, int level); 1516 + void virt_map_level(struct kvm_vm *vm, u64 vaddr, u64 paddr, 1517 + u64 nr_bytes, int level); 1515 1518 1516 1519 void vm_enable_tdp(struct kvm_vm *vm); 1517 1520 bool kvm_cpu_has_tdp(void); 1518 - void tdp_map(struct kvm_vm *vm, uint64_t nested_paddr, uint64_t paddr, uint64_t size); 1521 + void tdp_map(struct kvm_vm *vm, u64 nested_paddr, u64 paddr, u64 size); 1519 1522 void tdp_identity_map_default_memslots(struct kvm_vm *vm); 1520 - void tdp_identity_map_1g(struct kvm_vm *vm, uint64_t addr, uint64_t size); 1521 - uint64_t *tdp_get_pte(struct kvm_vm *vm, uint64_t l2_gpa); 1523 + void tdp_identity_map_1g(struct kvm_vm *vm, u64 addr, u64 size); 1524 + u64 *tdp_get_pte(struct kvm_vm *vm, u64 l2_gpa); 1522 1525 1523 1526 /* 1524 1527 * Basic CPU control in CR0
+5 -5
tools/testing/selftests/kvm/include/x86/sev.h
··· 49 49 void sev_vm_launch(struct kvm_vm *vm, uint32_t policy); 50 50 void sev_vm_launch_measure(struct kvm_vm *vm, uint8_t *measurement); 51 51 void sev_vm_launch_finish(struct kvm_vm *vm); 52 - void snp_vm_launch_start(struct kvm_vm *vm, uint64_t policy); 52 + void snp_vm_launch_start(struct kvm_vm *vm, u64 policy); 53 53 void snp_vm_launch_update(struct kvm_vm *vm); 54 54 void snp_vm_launch_finish(struct kvm_vm *vm); 55 55 56 56 struct kvm_vm *vm_sev_create_with_one_vcpu(uint32_t type, void *guest_code, 57 57 struct kvm_vcpu **cpu); 58 - void vm_sev_launch(struct kvm_vm *vm, uint64_t policy, uint8_t *measurement); 58 + void vm_sev_launch(struct kvm_vm *vm, u64 policy, uint8_t *measurement); 59 59 60 60 kvm_static_assert(SEV_RET_SUCCESS == 0); 61 61 ··· 85 85 unsigned long raw; \ 86 86 } sev_cmd = { .c = { \ 87 87 .id = (cmd), \ 88 - .data = (uint64_t)(arg), \ 88 + .data = (u64)(arg), \ 89 89 .sev_fd = (vm)->arch.sev_fd, \ 90 90 } }; \ 91 91 \ ··· 121 121 } 122 122 123 123 static inline void sev_launch_update_data(struct kvm_vm *vm, gpa_t gpa, 124 - uint64_t size) 124 + u64 size) 125 125 { 126 126 struct kvm_sev_launch_update_data update_data = { 127 127 .uaddr = (unsigned long)addr_gpa2hva(vm, gpa), ··· 132 132 } 133 133 134 134 static inline void snp_launch_update_data(struct kvm_vm *vm, gpa_t gpa, 135 - uint64_t hva, uint64_t size, uint8_t type) 135 + u64 hva, u64 size, uint8_t type) 136 136 { 137 137 struct kvm_sev_snp_launch_update update_data = { 138 138 .uaddr = hva,
+1 -2
tools/testing/selftests/kvm/include/x86/smm.h
··· 8 8 #define SMRAM_MEMSLOT ((1 << 16) | 1) 9 9 #define SMRAM_PAGES (SMRAM_SIZE / PAGE_SIZE) 10 10 11 - void setup_smram(struct kvm_vm *vm, struct kvm_vcpu *vcpu, 12 - uint64_t smram_gpa, 11 + void setup_smram(struct kvm_vm *vm, struct kvm_vcpu *vcpu, u64 smram_gpa, 13 12 const void *smi_handler, size_t handler_size); 14 13 15 14 void inject_smi(struct kvm_vcpu *vcpu);
+5 -5
tools/testing/selftests/kvm/include/x86/svm_util.h
··· 16 16 /* VMCB */ 17 17 struct vmcb *vmcb; /* gva */ 18 18 void *vmcb_hva; 19 - uint64_t vmcb_gpa; 19 + u64 vmcb_gpa; 20 20 21 21 /* host state-save area */ 22 22 struct vmcb_save_area *save_area; /* gva */ 23 23 void *save_area_hva; 24 - uint64_t save_area_gpa; 24 + u64 save_area_gpa; 25 25 26 26 /* MSR-Bitmap */ 27 27 void *msr; /* gva */ 28 28 void *msr_hva; 29 - uint64_t msr_gpa; 29 + u64 msr_gpa; 30 30 31 31 /* NPT */ 32 - uint64_t ncr3_gpa; 32 + u64 ncr3_gpa; 33 33 }; 34 34 35 35 static inline void vmmcall(void) ··· 58 58 59 59 struct svm_test_data *vcpu_alloc_svm(struct kvm_vm *vm, gva_t *p_svm_gva); 60 60 void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_rsp); 61 - void run_guest(struct vmcb *vmcb, uint64_t vmcb_gpa); 61 + void run_guest(struct vmcb *vmcb, u64 vmcb_gpa); 62 62 63 63 static inline bool kvm_cpu_has_npt(void) 64 64 {
+25 -25
tools/testing/selftests/kvm/include/x86/vmx.h
··· 287 287 struct vmx_msr_entry { 288 288 uint32_t index; 289 289 uint32_t reserved; 290 - uint64_t value; 290 + u64 value; 291 291 } __attribute__ ((aligned(16))); 292 292 293 293 #include "evmcs.h" 294 294 295 - static inline int vmxon(uint64_t phys) 295 + static inline int vmxon(u64 phys) 296 296 { 297 297 uint8_t ret; 298 298 ··· 309 309 __asm__ __volatile__("vmxoff"); 310 310 } 311 311 312 - static inline int vmclear(uint64_t vmcs_pa) 312 + static inline int vmclear(u64 vmcs_pa) 313 313 { 314 314 uint8_t ret; 315 315 ··· 321 321 return ret; 322 322 } 323 323 324 - static inline int vmptrld(uint64_t vmcs_pa) 324 + static inline int vmptrld(u64 vmcs_pa) 325 325 { 326 326 uint8_t ret; 327 327 ··· 336 336 return ret; 337 337 } 338 338 339 - static inline int vmptrst(uint64_t *value) 339 + static inline int vmptrst(u64 *value) 340 340 { 341 - uint64_t tmp; 341 + u64 tmp; 342 342 uint8_t ret; 343 343 344 344 if (enable_evmcs) ··· 356 356 * A wrapper around vmptrst that ignores errors and returns zero if the 357 357 * vmptrst instruction fails. 358 358 */ 359 - static inline uint64_t vmptrstz(void) 359 + static inline u64 vmptrstz(void) 360 360 { 361 - uint64_t value = 0; 361 + u64 value = 0; 362 362 vmptrst(&value); 363 363 return value; 364 364 } ··· 391 391 "pop %%rcx;" 392 392 "pop %%rbp;" 393 393 : [ret]"=&a"(ret) 394 - : [host_rsp]"r"((uint64_t)HOST_RSP), 395 - [host_rip]"r"((uint64_t)HOST_RIP) 394 + : [host_rsp]"r"((u64)HOST_RSP), 395 + [host_rip]"r"((u64)HOST_RIP) 396 396 : "memory", "cc", "rbx", "r8", "r9", "r10", 397 397 "r11", "r12", "r13", "r14", "r15"); 398 398 return ret; ··· 426 426 "pop %%rcx;" 427 427 "pop %%rbp;" 428 428 : [ret]"=&a"(ret) 429 - : [host_rsp]"r"((uint64_t)HOST_RSP), 430 - [host_rip]"r"((uint64_t)HOST_RIP) 429 + : [host_rsp]"r"((u64)HOST_RSP), 430 + [host_rip]"r"((u64)HOST_RIP) 431 431 : "memory", "cc", "rbx", "r8", "r9", "r10", 432 432 "r11", "r12", "r13", "r14", "r15"); 433 433 return ret; ··· 447 447 "r10", "r11", "r12", "r13", "r14", "r15"); 448 448 } 449 449 450 - static inline int vmread(uint64_t encoding, uint64_t *value) 450 + static inline int vmread(u64 encoding, u64 *value) 451 451 { 452 - uint64_t tmp; 452 + u64 tmp; 453 453 uint8_t ret; 454 454 455 455 if (enable_evmcs) ··· 468 468 * A wrapper around vmread that ignores errors and returns zero if the 469 469 * vmread instruction fails. 470 470 */ 471 - static inline uint64_t vmreadz(uint64_t encoding) 471 + static inline u64 vmreadz(u64 encoding) 472 472 { 473 - uint64_t value = 0; 473 + u64 value = 0; 474 474 vmread(encoding, &value); 475 475 return value; 476 476 } 477 477 478 - static inline int vmwrite(uint64_t encoding, uint64_t value) 478 + static inline int vmwrite(u64 encoding, u64 value) 479 479 { 480 480 uint8_t ret; 481 481 ··· 497 497 498 498 struct vmx_pages { 499 499 void *vmxon_hva; 500 - uint64_t vmxon_gpa; 500 + u64 vmxon_gpa; 501 501 void *vmxon; 502 502 503 503 void *vmcs_hva; 504 - uint64_t vmcs_gpa; 504 + u64 vmcs_gpa; 505 505 void *vmcs; 506 506 507 507 void *msr_hva; 508 - uint64_t msr_gpa; 508 + u64 msr_gpa; 509 509 void *msr; 510 510 511 511 void *shadow_vmcs_hva; 512 - uint64_t shadow_vmcs_gpa; 512 + u64 shadow_vmcs_gpa; 513 513 void *shadow_vmcs; 514 514 515 515 void *vmread_hva; 516 - uint64_t vmread_gpa; 516 + u64 vmread_gpa; 517 517 void *vmread; 518 518 519 519 void *vmwrite_hva; 520 - uint64_t vmwrite_gpa; 520 + u64 vmwrite_gpa; 521 521 void *vmwrite; 522 522 523 523 void *apic_access_hva; 524 - uint64_t apic_access_gpa; 524 + u64 apic_access_gpa; 525 525 void *apic_access; 526 526 527 - uint64_t eptp_gpa; 527 + u64 eptp_gpa; 528 528 }; 529 529 530 530 union vmx_basic {
+24 -24
tools/testing/selftests/kvm/kvm_page_table_test.c
··· 46 46 47 47 struct test_args { 48 48 struct kvm_vm *vm; 49 - uint64_t guest_test_virt_mem; 50 - uint64_t host_page_size; 51 - uint64_t host_num_pages; 52 - uint64_t large_page_size; 53 - uint64_t large_num_pages; 54 - uint64_t host_pages_per_lpage; 49 + u64 guest_test_virt_mem; 50 + u64 host_page_size; 51 + u64 host_num_pages; 52 + u64 large_page_size; 53 + u64 large_num_pages; 54 + u64 host_pages_per_lpage; 55 55 enum vm_mem_backing_src_type src_type; 56 56 struct kvm_vcpu *vcpus[KVM_MAX_VCPUS]; 57 57 }; ··· 77 77 * This will be set to the topmost valid physical address minus 78 78 * the test memory size. 79 79 */ 80 - static uint64_t guest_test_phys_mem; 80 + static u64 guest_test_phys_mem; 81 81 82 82 /* 83 83 * Guest virtual memory offset of the testing memory slot. 84 84 * Must not conflict with identity mapped test code. 85 85 */ 86 - static uint64_t guest_test_virt_mem = DEFAULT_GUEST_TEST_MEM; 86 + static u64 guest_test_virt_mem = DEFAULT_GUEST_TEST_MEM; 87 87 88 88 static void guest_code(bool do_write) 89 89 { 90 90 struct test_args *p = &test_args; 91 91 enum test_stage *current_stage = &guest_test_stage; 92 - uint64_t addr; 92 + u64 addr; 93 93 int i, j; 94 94 95 95 while (true) { ··· 113 113 case KVM_CREATE_MAPPINGS: 114 114 for (i = 0; i < p->large_num_pages; i++) { 115 115 if (do_write) 116 - *(uint64_t *)addr = 0x0123456789ABCDEF; 116 + *(u64 *)addr = 0x0123456789ABCDEF; 117 117 else 118 - READ_ONCE(*(uint64_t *)addr); 118 + READ_ONCE(*(u64 *)addr); 119 119 120 120 addr += p->large_page_size; 121 121 } ··· 131 131 case KVM_UPDATE_MAPPINGS: 132 132 if (p->src_type == VM_MEM_SRC_ANONYMOUS) { 133 133 for (i = 0; i < p->host_num_pages; i++) { 134 - *(uint64_t *)addr = 0x0123456789ABCDEF; 134 + *(u64 *)addr = 0x0123456789ABCDEF; 135 135 addr += p->host_page_size; 136 136 } 137 137 break; ··· 142 142 * Write to the first host page in each large 143 143 * page region, and triger break of large pages. 144 144 */ 145 - *(uint64_t *)addr = 0x0123456789ABCDEF; 145 + *(u64 *)addr = 0x0123456789ABCDEF; 146 146 147 147 /* 148 148 * Access the middle host pages in each large ··· 152 152 */ 153 153 addr += p->large_page_size / 2; 154 154 for (j = 0; j < p->host_pages_per_lpage / 2; j++) { 155 - READ_ONCE(*(uint64_t *)addr); 155 + READ_ONCE(*(u64 *)addr); 156 156 addr += p->host_page_size; 157 157 } 158 158 } ··· 167 167 */ 168 168 case KVM_ADJUST_MAPPINGS: 169 169 for (i = 0; i < p->host_num_pages; i++) { 170 - READ_ONCE(*(uint64_t *)addr); 170 + READ_ONCE(*(u64 *)addr); 171 171 addr += p->host_page_size; 172 172 } 173 173 break; ··· 227 227 } 228 228 229 229 struct test_params { 230 - uint64_t phys_offset; 231 - uint64_t test_mem_size; 230 + u64 phys_offset; 231 + u64 test_mem_size; 232 232 enum vm_mem_backing_src_type src_type; 233 233 }; 234 234 ··· 237 237 int ret; 238 238 struct test_params *p = arg; 239 239 enum vm_mem_backing_src_type src_type = p->src_type; 240 - uint64_t large_page_size = get_backing_src_pagesz(src_type); 241 - uint64_t guest_page_size = vm_guest_mode_params[mode].page_size; 242 - uint64_t host_page_size = getpagesize(); 243 - uint64_t test_mem_size = p->test_mem_size; 244 - uint64_t guest_num_pages; 245 - uint64_t alignment; 240 + u64 large_page_size = get_backing_src_pagesz(src_type); 241 + u64 guest_page_size = vm_guest_mode_params[mode].page_size; 242 + u64 host_page_size = getpagesize(); 243 + u64 test_mem_size = p->test_mem_size; 244 + u64 guest_num_pages; 245 + u64 alignment; 246 246 void *host_test_mem; 247 247 struct kvm_vm *vm; 248 248 ··· 304 304 pr_info("Guest physical test memory offset: 0x%lx\n", 305 305 guest_test_phys_mem); 306 306 pr_info("Host virtual test memory offset: 0x%lx\n", 307 - (uint64_t)host_test_mem); 307 + (u64)host_test_mem); 308 308 pr_info("Number of testing vCPUs: %d\n", nr_vcpus); 309 309 310 310 return vm;
+2 -2
tools/testing/selftests/kvm/lib/arm64/gic.c
··· 73 73 74 74 unsigned int gic_get_and_ack_irq(void) 75 75 { 76 - uint64_t irqstat; 76 + u64 irqstat; 77 77 unsigned int intid; 78 78 79 79 GUEST_ASSERT(gic_common_ops); ··· 102 102 gic_common_ops->gic_set_eoi_split(split); 103 103 } 104 104 105 - void gic_set_priority_mask(uint64_t pmr) 105 + void gic_set_priority_mask(u64 pmr) 106 106 { 107 107 GUEST_ASSERT(gic_common_ops); 108 108 gic_common_ops->gic_set_priority_mask(pmr);
+2 -2
tools/testing/selftests/kvm/lib/arm64/gic_private.h
··· 12 12 void (*gic_cpu_init)(unsigned int cpu); 13 13 void (*gic_irq_enable)(unsigned int intid); 14 14 void (*gic_irq_disable)(unsigned int intid); 15 - uint64_t (*gic_read_iar)(void); 15 + u64 (*gic_read_iar)(void); 16 16 void (*gic_write_eoir)(uint32_t irq); 17 17 void (*gic_write_dir)(uint32_t irq); 18 18 void (*gic_set_eoi_split)(bool split); 19 - void (*gic_set_priority_mask)(uint64_t mask); 19 + void (*gic_set_priority_mask)(u64 mask); 20 20 void (*gic_set_priority)(uint32_t intid, uint32_t prio); 21 21 void (*gic_irq_set_active)(uint32_t intid); 22 22 void (*gic_irq_clear_active)(uint32_t intid);
+15 -15
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
··· 91 91 return INVALID_RANGE; 92 92 } 93 93 94 - static uint64_t gicv3_read_iar(void) 94 + static u64 gicv3_read_iar(void) 95 95 { 96 - uint64_t irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); 96 + u64 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); 97 97 98 98 dsb(sy); 99 99 return irqstat; ··· 111 111 isb(); 112 112 } 113 113 114 - static void gicv3_set_priority_mask(uint64_t mask) 114 + static void gicv3_set_priority_mask(u64 mask) 115 115 { 116 116 write_sysreg_s(mask, SYS_ICC_PMR_EL1); 117 117 } ··· 129 129 isb(); 130 130 } 131 131 132 - uint32_t gicv3_reg_readl(uint32_t cpu_or_dist, uint64_t offset) 132 + uint32_t gicv3_reg_readl(uint32_t cpu_or_dist, u64 offset) 133 133 { 134 134 volatile void *base = cpu_or_dist & DIST_BIT ? GICD_BASE_GVA 135 135 : sgi_base_from_redist(gicr_base_cpu(cpu_or_dist)); 136 136 return readl(base + offset); 137 137 } 138 138 139 - void gicv3_reg_writel(uint32_t cpu_or_dist, uint64_t offset, uint32_t reg_val) 139 + void gicv3_reg_writel(uint32_t cpu_or_dist, u64 offset, uint32_t reg_val) 140 140 { 141 141 volatile void *base = cpu_or_dist & DIST_BIT ? GICD_BASE_GVA 142 142 : sgi_base_from_redist(gicr_base_cpu(cpu_or_dist)); 143 143 writel(reg_val, base + offset); 144 144 } 145 145 146 - uint32_t gicv3_getl_fields(uint32_t cpu_or_dist, uint64_t offset, uint32_t mask) 146 + uint32_t gicv3_getl_fields(uint32_t cpu_or_dist, u64 offset, uint32_t mask) 147 147 { 148 148 return gicv3_reg_readl(cpu_or_dist, offset) & mask; 149 149 } 150 150 151 - void gicv3_setl_fields(uint32_t cpu_or_dist, uint64_t offset, 152 - uint32_t mask, uint32_t reg_val) 151 + void gicv3_setl_fields(uint32_t cpu_or_dist, u64 offset, 152 + uint32_t mask, uint32_t reg_val) 153 153 { 154 154 uint32_t tmp = gicv3_reg_readl(cpu_or_dist, offset) & ~mask; 155 155 ··· 165 165 * map that doesn't implement it; like GICR_WAKER's offset of 0x0014 being 166 166 * marked as "Reserved" in the Distributor map. 167 167 */ 168 - static void gicv3_access_reg(uint32_t intid, uint64_t offset, 169 - uint32_t reg_bits, uint32_t bits_per_field, 170 - bool write, uint32_t *val) 168 + static void gicv3_access_reg(uint32_t intid, u64 offset, 169 + uint32_t reg_bits, uint32_t bits_per_field, 170 + bool write, uint32_t *val) 171 171 { 172 172 uint32_t cpu = guest_get_vcpuid(); 173 173 enum gicv3_intid_range intid_range = get_intid_range(intid); ··· 197 197 *val = gicv3_getl_fields(cpu_or_dist, offset, mask) >> shift; 198 198 } 199 199 200 - static void gicv3_write_reg(uint32_t intid, uint64_t offset, 201 - uint32_t reg_bits, uint32_t bits_per_field, uint32_t val) 200 + static void gicv3_write_reg(uint32_t intid, u64 offset, 201 + uint32_t reg_bits, uint32_t bits_per_field, uint32_t val) 202 202 { 203 203 gicv3_access_reg(intid, offset, reg_bits, 204 204 bits_per_field, true, &val); 205 205 } 206 206 207 - static uint32_t gicv3_read_reg(uint32_t intid, uint64_t offset, 208 - uint32_t reg_bits, uint32_t bits_per_field) 207 + static uint32_t gicv3_read_reg(uint32_t intid, u64 offset, 208 + uint32_t reg_bits, uint32_t bits_per_field) 209 209 { 210 210 uint32_t val; 211 211
+42 -42
tools/testing/selftests/kvm/lib/arm64/processor.c
··· 21 21 22 22 static gva_t exception_handlers; 23 23 24 - static uint64_t pgd_index(struct kvm_vm *vm, gva_t gva) 24 + static u64 pgd_index(struct kvm_vm *vm, gva_t gva) 25 25 { 26 26 unsigned int shift = (vm->mmu.pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift; 27 - uint64_t mask = (1UL << (vm->va_bits - shift)) - 1; 27 + u64 mask = (1UL << (vm->va_bits - shift)) - 1; 28 28 29 29 return (gva >> shift) & mask; 30 30 } 31 31 32 - static uint64_t pud_index(struct kvm_vm *vm, gva_t gva) 32 + static u64 pud_index(struct kvm_vm *vm, gva_t gva) 33 33 { 34 34 unsigned int shift = 2 * (vm->page_shift - 3) + vm->page_shift; 35 - uint64_t mask = (1UL << (vm->page_shift - 3)) - 1; 35 + u64 mask = (1UL << (vm->page_shift - 3)) - 1; 36 36 37 37 TEST_ASSERT(vm->mmu.pgtable_levels == 4, 38 38 "Mode %d does not have 4 page table levels", vm->mode); ··· 40 40 return (gva >> shift) & mask; 41 41 } 42 42 43 - static uint64_t pmd_index(struct kvm_vm *vm, gva_t gva) 43 + static u64 pmd_index(struct kvm_vm *vm, gva_t gva) 44 44 { 45 45 unsigned int shift = (vm->page_shift - 3) + vm->page_shift; 46 - uint64_t mask = (1UL << (vm->page_shift - 3)) - 1; 46 + u64 mask = (1UL << (vm->page_shift - 3)) - 1; 47 47 48 48 TEST_ASSERT(vm->mmu.pgtable_levels >= 3, 49 49 "Mode %d does not have >= 3 page table levels", vm->mode); ··· 51 51 return (gva >> shift) & mask; 52 52 } 53 53 54 - static uint64_t pte_index(struct kvm_vm *vm, gva_t gva) 54 + static u64 pte_index(struct kvm_vm *vm, gva_t gva) 55 55 { 56 - uint64_t mask = (1UL << (vm->page_shift - 3)) - 1; 56 + u64 mask = (1UL << (vm->page_shift - 3)) - 1; 57 57 return (gva >> vm->page_shift) & mask; 58 58 } 59 59 ··· 63 63 (vm->pa_bits > 48 || vm->va_bits > 48); 64 64 } 65 65 66 - static uint64_t addr_pte(struct kvm_vm *vm, uint64_t pa, uint64_t attrs) 66 + static u64 addr_pte(struct kvm_vm *vm, u64 pa, u64 attrs) 67 67 { 68 - uint64_t pte; 68 + u64 pte; 69 69 70 70 if (use_lpa2_pte_format(vm)) { 71 71 pte = pa & PTE_ADDR_MASK_LPA2(vm->page_shift); ··· 81 81 return pte; 82 82 } 83 83 84 - static uint64_t pte_addr(struct kvm_vm *vm, uint64_t pte) 84 + static u64 pte_addr(struct kvm_vm *vm, u64 pte) 85 85 { 86 - uint64_t pa; 86 + u64 pa; 87 87 88 88 if (use_lpa2_pte_format(vm)) { 89 89 pa = pte & PTE_ADDR_MASK_LPA2(vm->page_shift); ··· 97 97 return pa; 98 98 } 99 99 100 - static uint64_t ptrs_per_pgd(struct kvm_vm *vm) 100 + static u64 ptrs_per_pgd(struct kvm_vm *vm) 101 101 { 102 102 unsigned int shift = (vm->mmu.pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift; 103 103 return 1 << (vm->va_bits - shift); 104 104 } 105 105 106 - static uint64_t __maybe_unused ptrs_per_pte(struct kvm_vm *vm) 106 + static u64 __maybe_unused ptrs_per_pte(struct kvm_vm *vm) 107 107 { 108 108 return 1 << (vm->page_shift - 3); 109 109 } ··· 121 121 vm->mmu.pgd_created = true; 122 122 } 123 123 124 - static void _virt_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr, 125 - uint64_t flags) 124 + static void _virt_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr, 125 + u64 flags) 126 126 { 127 127 uint8_t attr_idx = flags & (PTE_ATTRINDX_MASK >> PTE_ATTRINDX_SHIFT); 128 - uint64_t pg_attr; 129 - uint64_t *ptep; 128 + u64 pg_attr; 129 + u64 *ptep; 130 130 131 131 TEST_ASSERT((vaddr % vm->page_size) == 0, 132 132 "Virtual address not on page boundary,\n" ··· 174 174 *ptep = addr_pte(vm, paddr, pg_attr); 175 175 } 176 176 177 - void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr) 177 + void virt_arch_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr) 178 178 { 179 - uint64_t attr_idx = MT_NORMAL; 179 + u64 attr_idx = MT_NORMAL; 180 180 181 181 _virt_pg_map(vm, vaddr, paddr, attr_idx); 182 182 } 183 183 184 - uint64_t *virt_get_pte_hva_at_level(struct kvm_vm *vm, gva_t gva, int level) 184 + u64 *virt_get_pte_hva_at_level(struct kvm_vm *vm, gva_t gva, int level) 185 185 { 186 - uint64_t *ptep; 186 + u64 *ptep; 187 187 188 188 if (!vm->mmu.pgd_created) 189 189 goto unmapped_gva; ··· 225 225 exit(EXIT_FAILURE); 226 226 } 227 227 228 - uint64_t *virt_get_pte_hva(struct kvm_vm *vm, gva_t gva) 228 + u64 *virt_get_pte_hva(struct kvm_vm *vm, gva_t gva) 229 229 { 230 230 return virt_get_pte_hva_at_level(vm, gva, 3); 231 231 } 232 232 233 233 gpa_t addr_arch_gva2gpa(struct kvm_vm *vm, gva_t gva) 234 234 { 235 - uint64_t *ptep = virt_get_pte_hva(vm, gva); 235 + u64 *ptep = virt_get_pte_hva(vm, gva); 236 236 237 237 return pte_addr(vm, *ptep) + (gva & (vm->page_size - 1)); 238 238 } 239 239 240 - static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, uint64_t page, int level) 240 + static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, u64 page, int level) 241 241 { 242 242 #ifdef DEBUG 243 243 static const char * const type[] = { "", "pud", "pmd", "pte" }; 244 - uint64_t pte, *ptep; 244 + u64 pte, *ptep; 245 245 246 246 if (level == 4) 247 247 return; ··· 259 259 void virt_arch_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent) 260 260 { 261 261 int level = 4 - (vm->mmu.pgtable_levels - 1); 262 - uint64_t pgd, *ptep; 262 + u64 pgd, *ptep; 263 263 264 264 if (!vm->mmu.pgd_created) 265 265 return; ··· 298 298 { 299 299 struct kvm_vcpu_init default_init = { .target = -1, }; 300 300 struct kvm_vm *vm = vcpu->vm; 301 - uint64_t sctlr_el1, tcr_el1, ttbr0_el1; 301 + u64 sctlr_el1, tcr_el1, ttbr0_el1; 302 302 303 303 if (!init) { 304 304 kvm_get_default_vcpu_target(vm, &default_init); ··· 399 399 400 400 void vcpu_arch_dump(FILE *stream, struct kvm_vcpu *vcpu, uint8_t indent) 401 401 { 402 - uint64_t pstate, pc; 402 + u64 pstate, pc; 403 403 404 404 pstate = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pstate)); 405 405 pc = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc)); ··· 410 410 411 411 void vcpu_arch_set_entry_point(struct kvm_vcpu *vcpu, void *guest_code) 412 412 { 413 - vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (uint64_t)guest_code); 413 + vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (u64)guest_code); 414 414 } 415 415 416 416 static struct kvm_vcpu *__aarch64_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id, 417 417 struct kvm_vcpu_init *init) 418 418 { 419 419 size_t stack_size; 420 - uint64_t stack_vaddr; 420 + u64 stack_vaddr; 421 421 struct kvm_vcpu *vcpu = __vm_vcpu_add(vm, vcpu_id); 422 422 423 423 stack_size = vm->page_size == 4096 ? DEFAULT_STACK_PGS * vm->page_size : ··· 459 459 460 460 for (i = 0; i < num; i++) { 461 461 vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.regs[i]), 462 - va_arg(ap, uint64_t)); 462 + va_arg(ap, u64)); 463 463 } 464 464 465 465 va_end(ap); 466 466 } 467 467 468 - void kvm_exit_unexpected_exception(int vector, uint64_t ec, bool valid_ec) 468 + void kvm_exit_unexpected_exception(int vector, u64 ec, bool valid_ec) 469 469 { 470 470 ucall(UCALL_UNHANDLED, 3, vector, ec, valid_ec); 471 471 while (1) ··· 498 498 { 499 499 extern char vectors; 500 500 501 - vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_VBAR_EL1), (uint64_t)&vectors); 501 + vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_VBAR_EL1), (u64)&vectors); 502 502 } 503 503 504 504 void route_exception(struct ex_regs *regs, int vector) ··· 584 584 { 585 585 struct kvm_vcpu_init preferred_init; 586 586 int kvm_fd, vm_fd, vcpu_fd, err; 587 - uint64_t val; 587 + u64 val; 588 588 uint32_t gran; 589 589 struct kvm_one_reg reg = { 590 590 .id = KVM_ARM64_SYS_REG(SYS_ID_AA64MMFR0_EL1), 591 - .addr = (uint64_t)&val, 591 + .addr = (u64)&val, 592 592 }; 593 593 594 594 kvm_fd = open_kvm_dev_path_or_exit(); ··· 646 646 : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7") 647 647 648 648 649 - void smccc_hvc(uint32_t function_id, uint64_t arg0, uint64_t arg1, 650 - uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5, 651 - uint64_t arg6, struct arm_smccc_res *res) 649 + void smccc_hvc(uint32_t function_id, u64 arg0, u64 arg1, 650 + u64 arg2, u64 arg3, u64 arg4, u64 arg5, 651 + u64 arg6, struct arm_smccc_res *res) 652 652 { 653 653 __smccc_call(hvc, function_id, arg0, arg1, arg2, arg3, arg4, arg5, 654 654 arg6, res); 655 655 } 656 656 657 - void smccc_smc(uint32_t function_id, uint64_t arg0, uint64_t arg1, 658 - uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5, 659 - uint64_t arg6, struct arm_smccc_res *res) 657 + void smccc_smc(uint32_t function_id, u64 arg0, u64 arg1, 658 + u64 arg2, u64 arg3, u64 arg4, u64 arg5, 659 + u64 arg6, struct arm_smccc_res *res) 660 660 { 661 661 __smccc_call(smc, function_id, arg0, arg1, arg2, arg3, arg4, arg5, 662 662 arg6, res);
+2 -2
tools/testing/selftests/kvm/lib/arm64/ucall.c
··· 25 25 26 26 if (run->exit_reason == KVM_EXIT_MMIO && 27 27 run->mmio.phys_addr == vcpu->vm->ucall_mmio_addr) { 28 - TEST_ASSERT(run->mmio.is_write && run->mmio.len == sizeof(uint64_t), 28 + TEST_ASSERT(run->mmio.is_write && run->mmio.len == sizeof(u64), 29 29 "Unexpected ucall exit mmio address access"); 30 - return (void *)(*((uint64_t *)run->mmio.data)); 30 + return (void *)(*((u64 *)run->mmio.data)); 31 31 } 32 32 33 33 return NULL;
+9 -9
tools/testing/selftests/kvm/lib/arm64/vgic.c
··· 44 44 int __vgic_v3_setup(struct kvm_vm *vm, unsigned int nr_vcpus, uint32_t nr_irqs) 45 45 { 46 46 int gic_fd; 47 - uint64_t attr; 47 + u64 attr; 48 48 unsigned int nr_gic_pages; 49 49 50 50 /* Distributor setup */ ··· 106 106 /* should only work for level sensitive interrupts */ 107 107 int _kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level) 108 108 { 109 - uint64_t attr = 32 * (intid / 32); 110 - uint64_t index = intid % 32; 111 - uint64_t val; 109 + u64 attr = 32 * (intid / 32); 110 + u64 index = intid % 32; 111 + u64 val; 112 112 int ret; 113 113 114 114 ret = __kvm_device_attr_get(gic_fd, KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO, ··· 152 152 } 153 153 154 154 static void vgic_poke_irq(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu, 155 - uint64_t reg_off) 155 + u64 reg_off) 156 156 { 157 - uint64_t reg = intid / 32; 158 - uint64_t index = intid % 32; 159 - uint64_t attr = reg_off + reg * 4; 160 - uint64_t val; 157 + u64 reg = intid / 32; 158 + u64 index = intid % 32; 159 + u64 attr = reg_off + reg * 4; 160 + u64 val; 161 161 bool intid_is_private = INTID_IS_SGI(intid) || INTID_IS_PPI(intid); 162 162 163 163 uint32_t group = intid_is_private ? KVM_DEV_ARM_VGIC_GRP_REDIST_REGS
+1 -1
tools/testing/selftests/kvm/lib/elf.c
··· 156 156 TEST_ASSERT(phdr.p_memsz > 0, "Unexpected loadable segment " 157 157 "memsize of 0,\n" 158 158 " phdr index: %u p_memsz: 0x%" PRIx64, 159 - n1, (uint64_t) phdr.p_memsz); 159 + n1, (u64)phdr.p_memsz); 160 160 gva_t seg_vstart = align_down(phdr.p_vaddr, vm->page_size); 161 161 gva_t seg_vend = phdr.p_vaddr + phdr.p_memsz - 1; 162 162 seg_vend |= vm->page_size - 1;
+5 -5
tools/testing/selftests/kvm/lib/guest_sprintf.c
··· 35 35 ({ \ 36 36 int __res; \ 37 37 \ 38 - __res = ((uint64_t) n) % (uint32_t) base; \ 39 - n = ((uint64_t) n) / (uint32_t) base; \ 38 + __res = ((u64)n) % (uint32_t) base; \ 39 + n = ((u64)n) / (uint32_t) base; \ 40 40 __res; \ 41 41 }) 42 42 ··· 119 119 { 120 120 char *str, *end; 121 121 const char *s; 122 - uint64_t num; 122 + u64 num; 123 123 int i, base; 124 124 int len; 125 125 ··· 240 240 flags |= SPECIAL | SMALL | ZEROPAD; 241 241 } 242 242 str = number(str, end, 243 - (uint64_t)va_arg(args, void *), 16, 243 + (u64)va_arg(args, void *), 16, 244 244 field_width, precision, flags); 245 245 continue; 246 246 ··· 284 284 continue; 285 285 } 286 286 if (qualifier == 'l') 287 - num = va_arg(args, uint64_t); 287 + num = va_arg(args, u64); 288 288 else if (qualifier == 'h') { 289 289 num = (uint16_t)va_arg(args, int); 290 290 if (flags & SIGN)
+44 -44
tools/testing/selftests/kvm/lib/kvm_util.c
··· 396 396 return vm; 397 397 } 398 398 399 - static uint64_t vm_nr_pages_required(enum vm_guest_mode mode, 400 - uint32_t nr_runnable_vcpus, 401 - uint64_t extra_mem_pages) 399 + static u64 vm_nr_pages_required(enum vm_guest_mode mode, 400 + uint32_t nr_runnable_vcpus, 401 + u64 extra_mem_pages) 402 402 { 403 - uint64_t page_size = vm_guest_mode_params[mode].page_size; 404 - uint64_t nr_pages; 403 + u64 page_size = vm_guest_mode_params[mode].page_size; 404 + u64 nr_pages; 405 405 406 406 TEST_ASSERT(nr_runnable_vcpus, 407 407 "Use vm_create_barebones() for VMs that _never_ have vCPUs"); ··· 477 477 } 478 478 479 479 struct kvm_vm *__vm_create(struct vm_shape shape, uint32_t nr_runnable_vcpus, 480 - uint64_t nr_extra_pages) 480 + u64 nr_extra_pages) 481 481 { 482 - uint64_t nr_pages = vm_nr_pages_required(shape.mode, nr_runnable_vcpus, 482 + u64 nr_pages = vm_nr_pages_required(shape.mode, nr_runnable_vcpus, 483 483 nr_extra_pages); 484 484 struct userspace_mem_region *slot0; 485 485 struct kvm_vm *vm; ··· 547 547 * no real memory allocation for non-slot0 memory in this function. 548 548 */ 549 549 struct kvm_vm *__vm_create_with_vcpus(struct vm_shape shape, uint32_t nr_vcpus, 550 - uint64_t extra_mem_pages, 550 + u64 extra_mem_pages, 551 551 void *guest_code, struct kvm_vcpu *vcpus[]) 552 552 { 553 553 struct kvm_vm *vm; ··· 566 566 567 567 struct kvm_vm *__vm_create_shape_with_one_vcpu(struct vm_shape shape, 568 568 struct kvm_vcpu **vcpu, 569 - uint64_t extra_mem_pages, 569 + u64 extra_mem_pages, 570 570 void *guest_code) 571 571 { 572 572 struct kvm_vcpu *vcpus[1]; ··· 715 715 * region exists. 716 716 */ 717 717 static struct userspace_mem_region * 718 - userspace_mem_region_find(struct kvm_vm *vm, uint64_t start, uint64_t end) 718 + userspace_mem_region_find(struct kvm_vm *vm, u64 start, u64 end) 719 719 { 720 720 struct rb_node *node; 721 721 722 722 for (node = vm->regions.gpa_tree.rb_node; node; ) { 723 723 struct userspace_mem_region *region = 724 724 container_of(node, struct userspace_mem_region, gpa_node); 725 - uint64_t existing_start = region->region.guest_phys_addr; 726 - uint64_t existing_end = region->region.guest_phys_addr 725 + u64 existing_start = region->region.guest_phys_addr; 726 + u64 existing_end = region->region.guest_phys_addr 727 727 + region->region.memory_size - 1; 728 728 if (start <= existing_end && end >= existing_start) 729 729 return region; ··· 919 919 920 920 921 921 int __vm_set_user_memory_region(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 922 - uint64_t gpa, uint64_t size, void *hva) 922 + u64 gpa, u64 size, void *hva) 923 923 { 924 924 struct kvm_userspace_memory_region region = { 925 925 .slot = slot, ··· 933 933 } 934 934 935 935 void vm_set_user_memory_region(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 936 - uint64_t gpa, uint64_t size, void *hva) 936 + u64 gpa, u64 size, void *hva) 937 937 { 938 938 int ret = __vm_set_user_memory_region(vm, slot, flags, gpa, size, hva); 939 939 ··· 946 946 "KVM selftests now require KVM_SET_USER_MEMORY_REGION2 (introduced in v6.8)") 947 947 948 948 int __vm_set_user_memory_region2(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 949 - uint64_t gpa, uint64_t size, void *hva, 950 - uint32_t guest_memfd, uint64_t guest_memfd_offset) 949 + u64 gpa, u64 size, void *hva, 950 + uint32_t guest_memfd, u64 guest_memfd_offset) 951 951 { 952 952 struct kvm_userspace_memory_region2 region = { 953 953 .slot = slot, ··· 965 965 } 966 966 967 967 void vm_set_user_memory_region2(struct kvm_vm *vm, uint32_t slot, uint32_t flags, 968 - uint64_t gpa, uint64_t size, void *hva, 969 - uint32_t guest_memfd, uint64_t guest_memfd_offset) 968 + u64 gpa, u64 size, void *hva, 969 + uint32_t guest_memfd, u64 guest_memfd_offset) 970 970 { 971 971 int ret = __vm_set_user_memory_region2(vm, slot, flags, gpa, size, hva, 972 972 guest_memfd, guest_memfd_offset); ··· 978 978 979 979 /* FIXME: This thing needs to be ripped apart and rewritten. */ 980 980 void vm_mem_add(struct kvm_vm *vm, enum vm_mem_backing_src_type src_type, 981 - uint64_t gpa, uint32_t slot, uint64_t npages, uint32_t flags, 982 - int guest_memfd, uint64_t guest_memfd_offset) 981 + u64 gpa, uint32_t slot, u64 npages, uint32_t flags, 982 + int guest_memfd, u64 guest_memfd_offset) 983 983 { 984 984 int ret; 985 985 struct userspace_mem_region *region; ··· 1016 1016 " requested gpa: 0x%lx npages: 0x%lx page_size: 0x%x\n" 1017 1017 " existing gpa: 0x%lx size: 0x%lx", 1018 1018 gpa, npages, vm->page_size, 1019 - (uint64_t) region->region.guest_phys_addr, 1020 - (uint64_t) region->region.memory_size); 1019 + (u64)region->region.guest_phys_addr, 1020 + (u64)region->region.memory_size); 1021 1021 1022 1022 /* Confirm no region with the requested slot already exists. */ 1023 1023 hash_for_each_possible(vm->regions.slot_hash, region, slot_node, ··· 1030 1030 " requested slot: %u paddr: 0x%lx npages: 0x%lx\n" 1031 1031 " existing slot: %u paddr: 0x%lx size: 0x%lx", 1032 1032 slot, gpa, npages, region->region.slot, 1033 - (uint64_t) region->region.guest_phys_addr, 1034 - (uint64_t) region->region.memory_size); 1033 + (u64)region->region.guest_phys_addr, 1034 + (u64)region->region.memory_size); 1035 1035 } 1036 1036 1037 1037 /* Allocate and initialize new mem region structure. */ ··· 1141 1141 1142 1142 void vm_userspace_mem_region_add(struct kvm_vm *vm, 1143 1143 enum vm_mem_backing_src_type src_type, 1144 - uint64_t gpa, uint32_t slot, uint64_t npages, 1144 + u64 gpa, uint32_t slot, u64 npages, 1145 1145 uint32_t flags) 1146 1146 { 1147 1147 vm_mem_add(vm, src_type, gpa, slot, npages, flags, -1, 0); ··· 1234 1234 * 1235 1235 * Change the gpa of a memory region. 1236 1236 */ 1237 - void vm_mem_region_move(struct kvm_vm *vm, uint32_t slot, uint64_t new_gpa) 1237 + void vm_mem_region_move(struct kvm_vm *vm, uint32_t slot, u64 new_gpa) 1238 1238 { 1239 1239 struct userspace_mem_region *region; 1240 1240 int ret; ··· 1273 1273 __vm_mem_region_delete(vm, region); 1274 1274 } 1275 1275 1276 - void vm_guest_mem_fallocate(struct kvm_vm *vm, uint64_t base, uint64_t size, 1276 + void vm_guest_mem_fallocate(struct kvm_vm *vm, u64 base, u64 size, 1277 1277 bool punch_hole) 1278 1278 { 1279 1279 const int mode = FALLOC_FL_KEEP_SIZE | (punch_hole ? FALLOC_FL_PUNCH_HOLE : 0); 1280 1280 struct userspace_mem_region *region; 1281 - uint64_t end = base + size; 1282 - uint64_t gpa, len; 1281 + u64 end = base + size; 1282 + u64 gpa, len; 1283 1283 off_t fd_offset; 1284 1284 int ret; 1285 1285 1286 1286 for (gpa = base; gpa < end; gpa += len) { 1287 - uint64_t offset; 1287 + u64 offset; 1288 1288 1289 1289 region = userspace_mem_region_find(vm, gpa, gpa); 1290 1290 TEST_ASSERT(region && region->region.flags & KVM_MEM_GUEST_MEMFD, ··· 1292 1292 1293 1293 offset = gpa - region->region.guest_phys_addr; 1294 1294 fd_offset = region->region.guest_memfd_offset + offset; 1295 - len = min_t(uint64_t, end - gpa, region->region.memory_size - offset); 1295 + len = min_t(u64, end - gpa, region->region.memory_size - offset); 1296 1296 1297 1297 ret = fallocate(region->region.guest_memfd, mode, fd_offset, len); 1298 1298 TEST_ASSERT(!ret, "fallocate() failed to %s at %lx (len = %lu), fd = %d, mode = %x, offset = %lx", ··· 1388 1388 */ 1389 1389 gva_t vm_vaddr_unused_gap(struct kvm_vm *vm, size_t sz, gva_t vaddr_min) 1390 1390 { 1391 - uint64_t pages = (sz + vm->page_size - 1) >> vm->page_shift; 1391 + u64 pages = (sz + vm->page_size - 1) >> vm->page_shift; 1392 1392 1393 1393 /* Determine lowest permitted virtual page index. */ 1394 - uint64_t pgidx_start = (vaddr_min + vm->page_size - 1) >> vm->page_shift; 1394 + u64 pgidx_start = (vaddr_min + vm->page_size - 1) >> vm->page_shift; 1395 1395 if ((pgidx_start * vm->page_size) < vaddr_min) 1396 1396 goto no_va_found; 1397 1397 ··· 1454 1454 static gva_t ____vm_vaddr_alloc(struct kvm_vm *vm, size_t sz, gva_t vaddr_min, 1455 1455 enum kvm_mem_region_type type, bool protected) 1456 1456 { 1457 - uint64_t pages = (sz >> vm->page_shift) + ((sz % vm->page_size) != 0); 1457 + u64 pages = (sz >> vm->page_shift) + ((sz % vm->page_size) != 0); 1458 1458 1459 1459 virt_pgd_alloc(vm); 1460 1460 gpa_t paddr = __vm_phy_pages_alloc(vm, pages, ··· 1573 1573 * Within the VM given by @vm, creates a virtual translation for 1574 1574 * @npages starting at @vaddr to the page range starting at @paddr. 1575 1575 */ 1576 - void virt_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr, 1576 + void virt_map(struct kvm_vm *vm, u64 vaddr, u64 paddr, 1577 1577 unsigned int npages) 1578 1578 { 1579 1579 size_t page_size = vm->page_size; ··· 1807 1807 * Device Ioctl 1808 1808 */ 1809 1809 1810 - int __kvm_has_device_attr(int dev_fd, uint32_t group, uint64_t attr) 1810 + int __kvm_has_device_attr(int dev_fd, uint32_t group, u64 attr) 1811 1811 { 1812 1812 struct kvm_device_attr attribute = { 1813 1813 .group = group, ··· 1818 1818 return ioctl(dev_fd, KVM_HAS_DEVICE_ATTR, &attribute); 1819 1819 } 1820 1820 1821 - int __kvm_test_create_device(struct kvm_vm *vm, uint64_t type) 1821 + int __kvm_test_create_device(struct kvm_vm *vm, u64 type) 1822 1822 { 1823 1823 struct kvm_create_device create_dev = { 1824 1824 .type = type, ··· 1828 1828 return __vm_ioctl(vm, KVM_CREATE_DEVICE, &create_dev); 1829 1829 } 1830 1830 1831 - int __kvm_create_device(struct kvm_vm *vm, uint64_t type) 1831 + int __kvm_create_device(struct kvm_vm *vm, u64 type) 1832 1832 { 1833 1833 struct kvm_create_device create_dev = { 1834 1834 .type = type, ··· 1842 1842 return err ? : create_dev.fd; 1843 1843 } 1844 1844 1845 - int __kvm_device_attr_get(int dev_fd, uint32_t group, uint64_t attr, void *val) 1845 + int __kvm_device_attr_get(int dev_fd, uint32_t group, u64 attr, void *val) 1846 1846 { 1847 1847 struct kvm_device_attr kvmattr = { 1848 1848 .group = group, ··· 1854 1854 return __kvm_ioctl(dev_fd, KVM_GET_DEVICE_ATTR, &kvmattr); 1855 1855 } 1856 1856 1857 - int __kvm_device_attr_set(int dev_fd, uint32_t group, uint64_t attr, void *val) 1857 + int __kvm_device_attr_set(int dev_fd, uint32_t group, u64 attr, void *val) 1858 1858 { 1859 1859 struct kvm_device_attr kvmattr = { 1860 1860 .group = group, ··· 1965 1965 hash_for_each(vm->regions.slot_hash, ctr, region, slot_node) { 1966 1966 fprintf(stream, "%*sguest_phys: 0x%lx size: 0x%lx " 1967 1967 "host_virt: %p\n", indent + 2, "", 1968 - (uint64_t) region->region.guest_phys_addr, 1969 - (uint64_t) region->region.memory_size, 1968 + (u64)region->region.guest_phys_addr, 1969 + (u64)region->region.memory_size, 1970 1970 region->host_mem); 1971 1971 fprintf(stream, "%*sunused_phy_pages: ", indent + 2, ""); 1972 1972 sparsebit_dump(stream, region->unused_phy_pages, 0); ··· 2254 2254 * Read the data values of a specified stat from the binary stats interface. 2255 2255 */ 2256 2256 void read_stat_data(int stats_fd, struct kvm_stats_header *header, 2257 - struct kvm_stats_desc *desc, uint64_t *data, 2257 + struct kvm_stats_desc *desc, u64 *data, 2258 2258 size_t max_elements) 2259 2259 { 2260 2260 size_t nr_elements = min_t(ssize_t, desc->size, max_elements); ··· 2275 2275 } 2276 2276 2277 2277 void kvm_get_stat(struct kvm_binary_stats *stats, const char *name, 2278 - uint64_t *data, size_t max_elements) 2278 + u64 *data, size_t max_elements) 2279 2279 { 2280 2280 struct kvm_stats_desc *desc; 2281 2281 size_t size_desc;
+23 -23
tools/testing/selftests/kvm/lib/loongarch/processor.c
··· 15 15 static gpa_t invalid_pgtable[4]; 16 16 static gva_t exception_handlers; 17 17 18 - static uint64_t virt_pte_index(struct kvm_vm *vm, gva_t gva, int level) 18 + static u64 virt_pte_index(struct kvm_vm *vm, gva_t gva, int level) 19 19 { 20 20 unsigned int shift; 21 - uint64_t mask; 21 + u64 mask; 22 22 23 23 shift = level * (vm->page_shift - 3) + vm->page_shift; 24 24 mask = (1UL << (vm->page_shift - 3)) - 1; 25 25 return (gva >> shift) & mask; 26 26 } 27 27 28 - static uint64_t pte_addr(struct kvm_vm *vm, uint64_t entry) 28 + static u64 pte_addr(struct kvm_vm *vm, u64 entry) 29 29 { 30 30 return entry & ~((0x1UL << vm->page_shift) - 1); 31 31 } 32 32 33 - static uint64_t ptrs_per_pte(struct kvm_vm *vm) 33 + static u64 ptrs_per_pte(struct kvm_vm *vm) 34 34 { 35 35 return 1 << (vm->page_shift - 3); 36 36 } 37 37 38 38 static void virt_set_pgtable(struct kvm_vm *vm, gpa_t table, gpa_t child) 39 39 { 40 - uint64_t *ptep; 40 + u64 *ptep; 41 41 int i, ptrs_per_pte; 42 42 43 43 ptep = addr_gpa2hva(vm, table); ··· 67 67 vm->mmu.pgd_created = true; 68 68 } 69 69 70 - static int virt_pte_none(uint64_t *ptep, int level) 70 + static int virt_pte_none(u64 *ptep, int level) 71 71 { 72 72 return *ptep == invalid_pgtable[level]; 73 73 } 74 74 75 - static uint64_t *virt_populate_pte(struct kvm_vm *vm, gva_t gva, int alloc) 75 + static u64 *virt_populate_pte(struct kvm_vm *vm, gva_t gva, int alloc) 76 76 { 77 77 int level; 78 - uint64_t *ptep; 78 + u64 *ptep; 79 79 gpa_t child; 80 80 81 81 if (!vm->mmu.pgd_created) ··· 108 108 109 109 gpa_t addr_arch_gva2gpa(struct kvm_vm *vm, gva_t gva) 110 110 { 111 - uint64_t *ptep; 111 + u64 *ptep; 112 112 113 113 ptep = virt_populate_pte(vm, gva, 0); 114 114 TEST_ASSERT(*ptep != 0, "Virtual address vaddr: 0x%lx not mapped\n", gva); ··· 116 116 return pte_addr(vm, *ptep) + (gva & (vm->page_size - 1)); 117 117 } 118 118 119 - void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr) 119 + void virt_arch_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr) 120 120 { 121 121 uint32_t prot_bits; 122 - uint64_t *ptep; 122 + u64 *ptep; 123 123 124 124 TEST_ASSERT((vaddr % vm->page_size) == 0, 125 125 "Virtual address not on page boundary,\n" ··· 140 140 WRITE_ONCE(*ptep, paddr | prot_bits); 141 141 } 142 142 143 - static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, uint64_t page, int level) 143 + static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, u64 page, int level) 144 144 { 145 - uint64_t pte, *ptep; 145 + u64 pte, *ptep; 146 146 static const char * const type[] = { "pte", "pmd", "pud", "pgd"}; 147 147 148 148 if (level < 0) ··· 241 241 242 242 va_start(ap, num); 243 243 for (i = 0; i < num; i++) 244 - regs.gpr[i + 4] = va_arg(ap, uint64_t); 244 + regs.gpr[i + 4] = va_arg(ap, u64); 245 245 va_end(ap); 246 246 247 247 vcpu_regs_set(vcpu, &regs); 248 248 } 249 249 250 - static void loongarch_set_reg(struct kvm_vcpu *vcpu, uint64_t id, uint64_t val) 250 + static void loongarch_set_reg(struct kvm_vcpu *vcpu, u64 id, u64 val) 251 251 { 252 252 __vcpu_set_reg(vcpu, id, val); 253 253 } 254 254 255 - static void loongarch_set_cpucfg(struct kvm_vcpu *vcpu, uint64_t id, uint64_t val) 255 + static void loongarch_set_cpucfg(struct kvm_vcpu *vcpu, u64 id, u64 val) 256 256 { 257 - uint64_t cfgid; 257 + u64 cfgid; 258 258 259 259 cfgid = KVM_REG_LOONGARCH_CPUCFG | KVM_REG_SIZE_U64 | 8 * id; 260 260 __vcpu_set_reg(vcpu, cfgid, val); 261 261 } 262 262 263 - static void loongarch_get_csr(struct kvm_vcpu *vcpu, uint64_t id, void *addr) 263 + static void loongarch_get_csr(struct kvm_vcpu *vcpu, u64 id, void *addr) 264 264 { 265 - uint64_t csrid; 265 + u64 csrid; 266 266 267 267 csrid = KVM_REG_LOONGARCH_CSR | KVM_REG_SIZE_U64 | 8 * id; 268 268 __vcpu_get_reg(vcpu, csrid, addr); 269 269 } 270 270 271 - static void loongarch_set_csr(struct kvm_vcpu *vcpu, uint64_t id, uint64_t val) 271 + static void loongarch_set_csr(struct kvm_vcpu *vcpu, u64 id, u64 val) 272 272 { 273 - uint64_t csrid; 273 + u64 csrid; 274 274 275 275 csrid = KVM_REG_LOONGARCH_CSR | KVM_REG_SIZE_U64 | 8 * id; 276 276 __vcpu_set_reg(vcpu, csrid, val); ··· 372 372 struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id) 373 373 { 374 374 size_t stack_size; 375 - uint64_t stack_vaddr; 375 + u64 stack_vaddr; 376 376 struct kvm_regs regs; 377 377 struct kvm_vcpu *vcpu; 378 378 ··· 397 397 398 398 /* Setup guest PC register */ 399 399 vcpu_regs_get(vcpu, &regs); 400 - regs.pc = (uint64_t)guest_code; 400 + regs.pc = (u64)guest_code; 401 401 vcpu_regs_set(vcpu, &regs); 402 402 }
+2 -2
tools/testing/selftests/kvm/lib/loongarch/ucall.c
··· 28 28 29 29 if (run->exit_reason == KVM_EXIT_MMIO && 30 30 run->mmio.phys_addr == vcpu->vm->ucall_mmio_addr) { 31 - TEST_ASSERT(run->mmio.is_write && run->mmio.len == sizeof(uint64_t), 31 + TEST_ASSERT(run->mmio.is_write && run->mmio.len == sizeof(u64), 32 32 "Unexpected ucall exit mmio address access"); 33 33 34 - return (void *)(*((uint64_t *)run->mmio.data)); 34 + return (void *)(*((u64 *)run->mmio.data)); 35 35 } 36 36 37 37 return NULL;
+16 -16
tools/testing/selftests/kvm/lib/memstress.c
··· 16 16 * Guest virtual memory offset of the testing memory slot. 17 17 * Must not conflict with identity mapped test code. 18 18 */ 19 - static uint64_t guest_test_virt_mem = DEFAULT_GUEST_TEST_MEM; 19 + static u64 guest_test_virt_mem = DEFAULT_GUEST_TEST_MEM; 20 20 21 21 struct vcpu_thread { 22 22 /* The index of the vCPU. */ ··· 49 49 struct memstress_args *args = &memstress_args; 50 50 struct memstress_vcpu_args *vcpu_args = &args->vcpu_args[vcpu_idx]; 51 51 struct guest_random_state rand_state; 52 - uint64_t gva; 53 - uint64_t pages; 54 - uint64_t addr; 55 - uint64_t page; 52 + u64 gva; 53 + u64 pages; 54 + u64 addr; 55 + u64 page; 56 56 int i; 57 57 58 58 rand_state = new_guest_random_state(guest_random_seed + vcpu_idx); ··· 76 76 addr = gva + (page * args->guest_page_size); 77 77 78 78 if (__guest_random_bool(&rand_state, args->write_percent)) 79 - *(uint64_t *)addr = 0x0123456789ABCDEF; 79 + *(u64 *)addr = 0x0123456789ABCDEF; 80 80 else 81 - READ_ONCE(*(uint64_t *)addr); 81 + READ_ONCE(*(u64 *)addr); 82 82 } 83 83 84 84 GUEST_SYNC(1); ··· 87 87 88 88 void memstress_setup_vcpus(struct kvm_vm *vm, int nr_vcpus, 89 89 struct kvm_vcpu *vcpus[], 90 - uint64_t vcpu_memory_bytes, 90 + u64 vcpu_memory_bytes, 91 91 bool partition_vcpu_memory_access) 92 92 { 93 93 struct memstress_args *args = &memstress_args; ··· 122 122 } 123 123 124 124 struct kvm_vm *memstress_create_vm(enum vm_guest_mode mode, int nr_vcpus, 125 - uint64_t vcpu_memory_bytes, int slots, 125 + u64 vcpu_memory_bytes, int slots, 126 126 enum vm_mem_backing_src_type backing_src, 127 127 bool partition_vcpu_memory_access) 128 128 { 129 129 struct memstress_args *args = &memstress_args; 130 130 struct kvm_vm *vm; 131 - uint64_t guest_num_pages, slot0_pages = 0; 132 - uint64_t backing_src_pagesz = get_backing_src_pagesz(backing_src); 133 - uint64_t region_end_gfn; 131 + u64 guest_num_pages, slot0_pages = 0; 132 + u64 backing_src_pagesz = get_backing_src_pagesz(backing_src); 133 + u64 region_end_gfn; 134 134 int i; 135 135 136 136 pr_info("Testing guest mode: %s\n", vm_guest_mode_string(mode)); ··· 202 202 203 203 /* Add extra memory slots for testing */ 204 204 for (i = 0; i < slots; i++) { 205 - uint64_t region_pages = guest_num_pages / slots; 205 + u64 region_pages = guest_num_pages / slots; 206 206 gpa_t region_start = args->gpa + region_pages * args->guest_page_size * i; 207 207 208 208 vm_userspace_mem_region_add(vm, backing_src, region_start, ··· 244 244 sync_global_to_guest(vm, memstress_args.random_access); 245 245 } 246 246 247 - uint64_t __weak memstress_nested_pages(int nr_vcpus) 247 + u64 __weak memstress_nested_pages(int nr_vcpus) 248 248 { 249 249 return 0; 250 250 } ··· 349 349 } 350 350 351 351 void memstress_clear_dirty_log(struct kvm_vm *vm, unsigned long *bitmaps[], 352 - int slots, uint64_t pages_per_slot) 352 + int slots, u64 pages_per_slot) 353 353 { 354 354 int i; 355 355 ··· 360 360 } 361 361 } 362 362 363 - unsigned long **memstress_alloc_bitmaps(int slots, uint64_t pages_per_slot) 363 + unsigned long **memstress_alloc_bitmaps(int slots, u64 pages_per_slot) 364 364 { 365 365 unsigned long **bitmaps; 366 366 int i;
+16 -16
tools/testing/selftests/kvm/lib/riscv/processor.c
··· 17 17 18 18 static gva_t exception_handlers; 19 19 20 - bool __vcpu_has_ext(struct kvm_vcpu *vcpu, uint64_t ext) 20 + bool __vcpu_has_ext(struct kvm_vcpu *vcpu, u64 ext) 21 21 { 22 22 unsigned long value = 0; 23 23 int ret; ··· 27 27 return !ret && !!value; 28 28 } 29 29 30 - static uint64_t pte_addr(struct kvm_vm *vm, uint64_t entry) 30 + static u64 pte_addr(struct kvm_vm *vm, u64 entry) 31 31 { 32 32 return ((entry & PGTBL_PTE_ADDR_MASK) >> PGTBL_PTE_ADDR_SHIFT) << 33 33 PGTBL_PAGE_SIZE_SHIFT; 34 34 } 35 35 36 - static uint64_t ptrs_per_pte(struct kvm_vm *vm) 36 + static u64 ptrs_per_pte(struct kvm_vm *vm) 37 37 { 38 - return PGTBL_PAGE_SIZE / sizeof(uint64_t); 38 + return PGTBL_PAGE_SIZE / sizeof(u64); 39 39 } 40 40 41 - static uint64_t pte_index_mask[] = { 41 + static u64 pte_index_mask[] = { 42 42 PGTBL_L0_INDEX_MASK, 43 43 PGTBL_L1_INDEX_MASK, 44 44 PGTBL_L2_INDEX_MASK, ··· 52 52 PGTBL_L3_INDEX_SHIFT, 53 53 }; 54 54 55 - static uint64_t pte_index(struct kvm_vm *vm, gva_t gva, int level) 55 + static u64 pte_index(struct kvm_vm *vm, gva_t gva, int level) 56 56 { 57 57 TEST_ASSERT(level > -1, 58 58 "Negative page table level (%d) not possible", level); ··· 75 75 vm->mmu.pgd_created = true; 76 76 } 77 77 78 - void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr) 78 + void virt_arch_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr) 79 79 { 80 - uint64_t *ptep, next_ppn; 80 + u64 *ptep, next_ppn; 81 81 int level = vm->mmu.pgtable_levels - 1; 82 82 83 83 TEST_ASSERT((vaddr % vm->page_size) == 0, ··· 121 121 122 122 gpa_t addr_arch_gva2gpa(struct kvm_vm *vm, gva_t gva) 123 123 { 124 - uint64_t *ptep; 124 + u64 *ptep; 125 125 int level = vm->mmu.pgtable_levels - 1; 126 126 127 127 if (!vm->mmu.pgd_created) ··· 149 149 } 150 150 151 151 static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, 152 - uint64_t page, int level) 152 + u64 page, int level) 153 153 { 154 154 #ifdef DEBUG 155 155 static const char *const type[] = { "pte", "pmd", "pud", "p4d"}; 156 - uint64_t pte, *ptep; 156 + u64 pte, *ptep; 157 157 158 158 if (level < 0) 159 159 return; ··· 174 174 { 175 175 struct kvm_mmu *mmu = &vm->mmu; 176 176 int level = mmu->pgtable_levels - 1; 177 - uint64_t pgd, *ptep; 177 + u64 pgd, *ptep; 178 178 179 179 if (!mmu->pgd_created) 180 180 return; ··· 358 358 void vcpu_args_set(struct kvm_vcpu *vcpu, unsigned int num, ...) 359 359 { 360 360 va_list ap; 361 - uint64_t id = RISCV_CORE_REG(regs.a0); 361 + u64 id = RISCV_CORE_REG(regs.a0); 362 362 int i; 363 363 364 364 TEST_ASSERT(num >= 1 && num <= 8, "Unsupported number of args,\n" ··· 393 393 id = RISCV_CORE_REG(regs.a7); 394 394 break; 395 395 } 396 - vcpu_set_reg(vcpu, id, va_arg(ap, uint64_t)); 396 + vcpu_set_reg(vcpu, id, va_arg(ap, u64)); 397 397 } 398 398 399 399 va_end(ap); ··· 544 544 unsigned long riscv64_get_satp_mode(void) 545 545 { 546 546 int kvm_fd, vm_fd, vcpu_fd, err; 547 - uint64_t val; 547 + u64 val; 548 548 struct kvm_one_reg reg = { 549 549 .id = RISCV_CONFIG_REG(satp_mode), 550 - .addr = (uint64_t)&val, 550 + .addr = (u64)&val, 551 551 }; 552 552 553 553 kvm_fd = open_kvm_dev_path_or_exit();
+6 -6
tools/testing/selftests/kvm/lib/s390/diag318_test_handler.c
··· 13 13 14 14 static void guest_code(void) 15 15 { 16 - uint64_t diag318_info = 0x12345678; 16 + u64 diag318_info = 0x12345678; 17 17 18 18 asm volatile ("diag %0,0,0x318\n" : : "d" (diag318_info)); 19 19 } ··· 23 23 * we create an ad-hoc VM here to handle the instruction then extract the 24 24 * necessary data. It is up to the caller to decide what to do with that data. 25 25 */ 26 - static uint64_t diag318_handler(void) 26 + static u64 diag318_handler(void) 27 27 { 28 28 struct kvm_vcpu *vcpu; 29 29 struct kvm_vm *vm; 30 30 struct kvm_run *run; 31 - uint64_t reg; 32 - uint64_t diag318_info; 31 + u64 reg; 32 + u64 diag318_info; 33 33 34 34 vm = vm_create_with_one_vcpu(&vcpu, guest_code); 35 35 vcpu_run(vcpu); ··· 51 51 return diag318_info; 52 52 } 53 53 54 - uint64_t get_diag318_info(void) 54 + u64 get_diag318_info(void) 55 55 { 56 - static uint64_t diag318_info; 56 + static u64 diag318_info; 57 57 static bool printed_skip; 58 58 59 59 /*
+1 -1
tools/testing/selftests/kvm/lib/s390/facility.c
··· 10 10 11 11 #include "facility.h" 12 12 13 - uint64_t stfl_doublewords[NB_STFL_DOUBLEWORDS]; 13 + u64 stfl_doublewords[NB_STFL_DOUBLEWORDS]; 14 14 bool stfle_flag;
+11 -11
tools/testing/selftests/kvm/lib/s390/processor.c
··· 34 34 * a page table (ri == 4). Returns a suitable region/segment table entry 35 35 * which points to the freshly allocated pages. 36 36 */ 37 - static uint64_t virt_alloc_region(struct kvm_vm *vm, int ri) 37 + static u64 virt_alloc_region(struct kvm_vm *vm, int ri) 38 38 { 39 - uint64_t taddr; 39 + u64 taddr; 40 40 41 41 taddr = vm_phy_pages_alloc(vm, ri < 4 ? PAGES_PER_REGION : 1, 42 42 KVM_GUEST_PAGE_TABLE_MIN_PADDR, 0); ··· 47 47 | ((ri < 4 ? (PAGES_PER_REGION - 1) : 0) & REGION_ENTRY_LENGTH); 48 48 } 49 49 50 - void virt_arch_pg_map(struct kvm_vm *vm, uint64_t gva, uint64_t gpa) 50 + void virt_arch_pg_map(struct kvm_vm *vm, u64 gva, u64 gpa) 51 51 { 52 52 int ri, idx; 53 - uint64_t *entry; 53 + u64 *entry; 54 54 55 55 TEST_ASSERT((gva % vm->page_size) == 0, 56 56 "Virtual address not on page boundary,\n" ··· 89 89 gpa_t addr_arch_gva2gpa(struct kvm_vm *vm, gva_t gva) 90 90 { 91 91 int ri, idx; 92 - uint64_t *entry; 92 + u64 *entry; 93 93 94 94 TEST_ASSERT(vm->page_size == PAGE_SIZE, "Unsupported page size: 0x%x", 95 95 vm->page_size); ··· 112 112 } 113 113 114 114 static void virt_dump_ptes(FILE *stream, struct kvm_vm *vm, uint8_t indent, 115 - uint64_t ptea_start) 115 + u64 ptea_start) 116 116 { 117 - uint64_t *pte, ptea; 117 + u64 *pte, ptea; 118 118 119 119 for (ptea = ptea_start; ptea < ptea_start + 0x100 * 8; ptea += 8) { 120 120 pte = addr_gpa2hva(vm, ptea); ··· 126 126 } 127 127 128 128 static void virt_dump_region(FILE *stream, struct kvm_vm *vm, uint8_t indent, 129 - uint64_t reg_tab_addr) 129 + u64 reg_tab_addr) 130 130 { 131 - uint64_t addr, *entry; 131 + u64 addr, *entry; 132 132 133 133 for (addr = reg_tab_addr; addr < reg_tab_addr + 0x400 * 8; addr += 8) { 134 134 entry = addr_gpa2hva(vm, addr); ··· 163 163 struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id) 164 164 { 165 165 size_t stack_size = DEFAULT_STACK_PGS * getpagesize(); 166 - uint64_t stack_vaddr; 166 + u64 stack_vaddr; 167 167 struct kvm_regs regs; 168 168 struct kvm_sregs sregs; 169 169 struct kvm_vcpu *vcpu; ··· 206 206 vcpu_regs_get(vcpu, &regs); 207 207 208 208 for (i = 0; i < num; i++) 209 - regs.gprs[i + 2] = va_arg(ap, uint64_t); 209 + regs.gprs[i + 2] = va_arg(ap, u64); 210 210 211 211 vcpu_regs_set(vcpu, &regs); 212 212 va_end(ap);
+6 -6
tools/testing/selftests/kvm/lib/sparsebit.c
··· 76 76 * the use of a binary-search tree, where each node contains at least 77 77 * the following members: 78 78 * 79 - * typedef uint64_t sparsebit_idx_t; 80 - * typedef uint64_t sparsebit_num_t; 79 + * typedef u64 sparsebit_idx_t; 80 + * typedef u64 sparsebit_num_t; 81 81 * 82 82 * sparsebit_idx_t idx; 83 83 * uint32_t mask; ··· 2056 2056 return ch; 2057 2057 } 2058 2058 2059 - uint64_t get64(void) 2059 + u64 get64(void) 2060 2060 { 2061 - uint64_t x; 2061 + u64 x; 2062 2062 2063 2063 x = get8(); 2064 2064 x = (x << 8) | get8(); ··· 2075 2075 s = sparsebit_alloc(); 2076 2076 for (;;) { 2077 2077 uint8_t op = get8() & 0xf; 2078 - uint64_t first = get64(); 2079 - uint64_t last = get64(); 2078 + u64 first = get64(); 2079 + u64 last = get64(); 2080 2080 2081 2081 operate(op, first, last); 2082 2082 }
+1 -1
tools/testing/selftests/kvm/lib/test_util.c
··· 38 38 39 39 uint32_t guest_random_u32(struct guest_random_state *state) 40 40 { 41 - state->seed = (uint64_t)state->seed * 48271 % ((uint32_t)(1 << 31) - 1); 41 + state->seed = (u64)state->seed * 48271 % ((uint32_t)(1 << 31) - 1); 42 42 return state->seed; 43 43 } 44 44
+8 -8
tools/testing/selftests/kvm/lib/ucall_common.c
··· 14 14 struct ucall ucalls[KVM_MAX_VCPUS]; 15 15 }; 16 16 17 - int ucall_nr_pages_required(uint64_t page_size) 17 + int ucall_nr_pages_required(u64 page_size) 18 18 { 19 19 return align_up(sizeof(struct ucall_header), page_size) / page_size; 20 20 } ··· 79 79 clear_bit(uc - ucall_pool->ucalls, ucall_pool->in_use); 80 80 } 81 81 82 - void ucall_assert(uint64_t cmd, const char *exp, const char *file, 82 + void ucall_assert(u64 cmd, const char *exp, const char *file, 83 83 unsigned int line, const char *fmt, ...) 84 84 { 85 85 struct ucall *uc; ··· 88 88 uc = ucall_alloc(); 89 89 uc->cmd = cmd; 90 90 91 - WRITE_ONCE(uc->args[GUEST_ERROR_STRING], (uint64_t)(exp)); 92 - WRITE_ONCE(uc->args[GUEST_FILE], (uint64_t)(file)); 91 + WRITE_ONCE(uc->args[GUEST_ERROR_STRING], (u64)(exp)); 92 + WRITE_ONCE(uc->args[GUEST_FILE], (u64)(file)); 93 93 WRITE_ONCE(uc->args[GUEST_LINE], line); 94 94 95 95 va_start(va, fmt); ··· 101 101 ucall_free(uc); 102 102 } 103 103 104 - void ucall_fmt(uint64_t cmd, const char *fmt, ...) 104 + void ucall_fmt(u64 cmd, const char *fmt, ...) 105 105 { 106 106 struct ucall *uc; 107 107 va_list va; ··· 118 118 ucall_free(uc); 119 119 } 120 120 121 - void ucall(uint64_t cmd, int nargs, ...) 121 + void ucall(u64 cmd, int nargs, ...) 122 122 { 123 123 struct ucall *uc; 124 124 va_list va; ··· 132 132 133 133 va_start(va, nargs); 134 134 for (i = 0; i < nargs; ++i) 135 - WRITE_ONCE(uc->args[i], va_arg(va, uint64_t)); 135 + WRITE_ONCE(uc->args[i], va_arg(va, u64)); 136 136 va_end(va); 137 137 138 138 ucall_arch_do_ucall((gva_t)uc->hva); ··· 140 140 ucall_free(uc); 141 141 } 142 142 143 - uint64_t get_ucall(struct kvm_vcpu *vcpu, struct ucall *uc) 143 + u64 get_ucall(struct kvm_vcpu *vcpu, struct ucall *uc) 144 144 { 145 145 struct ucall ucall; 146 146 void *addr;
+6 -6
tools/testing/selftests/kvm/lib/userfaultfd_util.c
··· 100 100 } 101 101 102 102 struct uffd_desc *uffd_setup_demand_paging(int uffd_mode, useconds_t delay, 103 - void *hva, uint64_t len, 104 - uint64_t num_readers, 103 + void *hva, u64 len, 104 + u64 num_readers, 105 105 uffd_handler_t handler) 106 106 { 107 107 struct uffd_desc *uffd_desc; ··· 109 109 int uffd; 110 110 struct uffdio_api uffdio_api; 111 111 struct uffdio_register uffdio_register; 112 - uint64_t expected_ioctls = ((uint64_t) 1) << _UFFDIO_COPY; 112 + u64 expected_ioctls = ((u64)1) << _UFFDIO_COPY; 113 113 int ret, i; 114 114 115 115 PER_PAGE_DEBUG("Userfaultfd %s mode, faults resolved with %s\n", ··· 132 132 133 133 /* In order to get minor faults, prefault via the alias. */ 134 134 if (is_minor) 135 - expected_ioctls = ((uint64_t) 1) << _UFFDIO_CONTINUE; 135 + expected_ioctls = ((u64)1) << _UFFDIO_CONTINUE; 136 136 137 137 uffd = syscall(__NR_userfaultfd, O_CLOEXEC | O_NONBLOCK); 138 138 TEST_ASSERT(uffd >= 0, "uffd creation failed, errno: %d", errno); ··· 141 141 uffdio_api.features = 0; 142 142 TEST_ASSERT(ioctl(uffd, UFFDIO_API, &uffdio_api) != -1, 143 143 "ioctl UFFDIO_API failed: %" PRIu64, 144 - (uint64_t)uffdio_api.api); 144 + (u64)uffdio_api.api); 145 145 146 - uffdio_register.range.start = (uint64_t)hva; 146 + uffdio_register.range.start = (u64)hva; 147 147 uffdio_register.range.len = len; 148 148 uffdio_register.mode = uffd_mode; 149 149 TEST_ASSERT(ioctl(uffd, UFFDIO_REGISTER, &uffdio_register) != -1,
+1 -1
tools/testing/selftests/kvm/lib/x86/apic.c
··· 14 14 15 15 void xapic_enable(void) 16 16 { 17 - uint64_t val = rdmsr(MSR_IA32_APICBASE); 17 + u64 val = rdmsr(MSR_IA32_APICBASE); 18 18 19 19 /* Per SDM: to enable xAPIC when in x2APIC must first disable APIC */ 20 20 if (val & MSR_IA32_APICBASE_EXTD) {
+2 -2
tools/testing/selftests/kvm/lib/x86/hyperv.c
··· 100 100 return hv; 101 101 } 102 102 103 - int enable_vp_assist(uint64_t vp_assist_pa, void *vp_assist) 103 + int enable_vp_assist(u64 vp_assist_pa, void *vp_assist) 104 104 { 105 - uint64_t val = (vp_assist_pa & HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK) | 105 + u64 val = (vp_assist_pa & HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK) | 106 106 HV_X64_MSR_VP_ASSIST_PAGE_ENABLE; 107 107 108 108 wrmsr(HV_X64_MSR_VP_ASSIST_PAGE, val);
+6 -6
tools/testing/selftests/kvm/lib/x86/memstress.c
··· 16 16 #include "svm_util.h" 17 17 #include "vmx.h" 18 18 19 - void memstress_l2_guest_code(uint64_t vcpu_id) 19 + void memstress_l2_guest_code(u64 vcpu_id) 20 20 { 21 21 memstress_guest_code(vcpu_id); 22 22 vmcall(); ··· 32 32 33 33 #define L2_GUEST_STACK_SIZE 64 34 34 35 - static void l1_vmx_code(struct vmx_pages *vmx, uint64_t vcpu_id) 35 + static void l1_vmx_code(struct vmx_pages *vmx, u64 vcpu_id) 36 36 { 37 37 unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE]; 38 38 unsigned long *rsp; ··· 51 51 GUEST_DONE(); 52 52 } 53 53 54 - static void l1_svm_code(struct svm_test_data *svm, uint64_t vcpu_id) 54 + static void l1_svm_code(struct svm_test_data *svm, u64 vcpu_id) 55 55 { 56 56 unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE]; 57 57 unsigned long *rsp; ··· 67 67 } 68 68 69 69 70 - static void memstress_l1_guest_code(void *data, uint64_t vcpu_id) 70 + static void memstress_l1_guest_code(void *data, u64 vcpu_id) 71 71 { 72 72 if (this_cpu_has(X86_FEATURE_VMX)) 73 73 l1_vmx_code(data, vcpu_id); ··· 75 75 l1_svm_code(data, vcpu_id); 76 76 } 77 77 78 - uint64_t memstress_nested_pages(int nr_vcpus) 78 + u64 memstress_nested_pages(int nr_vcpus) 79 79 { 80 80 /* 81 81 * 513 page tables is enough to identity-map 256 TiB of L2 with 1G ··· 87 87 88 88 static void memstress_setup_ept_mappings(struct kvm_vm *vm) 89 89 { 90 - uint64_t start, end; 90 + u64 start, end; 91 91 92 92 /* 93 93 * Identity map the first 4G and the test region with 1G pages so that
+4 -4
tools/testing/selftests/kvm/lib/x86/pmu.c
··· 11 11 #include "processor.h" 12 12 #include "pmu.h" 13 13 14 - const uint64_t intel_pmu_arch_events[] = { 14 + const u64 intel_pmu_arch_events[] = { 15 15 INTEL_ARCH_CPU_CYCLES, 16 16 INTEL_ARCH_INSTRUCTIONS_RETIRED, 17 17 INTEL_ARCH_REFERENCE_CYCLES, ··· 28 28 }; 29 29 kvm_static_assert(ARRAY_SIZE(intel_pmu_arch_events) == NR_INTEL_ARCH_EVENTS); 30 30 31 - const uint64_t amd_pmu_zen_events[] = { 31 + const u64 amd_pmu_zen_events[] = { 32 32 AMD_ZEN_CORE_CYCLES, 33 33 AMD_ZEN_INSTRUCTIONS_RETIRED, 34 34 AMD_ZEN_BRANCHES_RETIRED, ··· 50 50 * be overcounted on these certain instructions, but for Clearwater Forest 51 51 * only "Instruction Retired" event is overcounted on these instructions. 52 52 */ 53 - static uint64_t get_pmu_errata(void) 53 + static u64 get_pmu_errata(void) 54 54 { 55 55 if (!this_cpu_is_intel()) 56 56 return 0; ··· 72 72 } 73 73 } 74 74 75 - uint64_t pmu_errata_mask; 75 + u64 pmu_errata_mask; 76 76 77 77 void kvm_init_pmu_errata(void) 78 78 {
+61 -63
tools/testing/selftests/kvm/lib/x86/processor.c
··· 27 27 bool host_cpu_is_hygon; 28 28 bool host_cpu_is_amd_compatible; 29 29 bool is_forced_emulation_enabled; 30 - uint64_t guest_tsc_khz; 30 + u64 guest_tsc_khz; 31 31 32 32 const char *ex_str(int vector) 33 33 { ··· 207 207 } 208 208 209 209 static void *virt_get_pte(struct kvm_vm *vm, struct kvm_mmu *mmu, 210 - uint64_t *parent_pte, uint64_t vaddr, int level) 210 + u64 *parent_pte, u64 vaddr, int level) 211 211 { 212 - uint64_t pt_gpa = PTE_GET_PA(*parent_pte); 213 - uint64_t *page_table = addr_gpa2hva(vm, pt_gpa); 212 + u64 pt_gpa = PTE_GET_PA(*parent_pte); 213 + u64 *page_table = addr_gpa2hva(vm, pt_gpa); 214 214 int index = (vaddr >> PG_LEVEL_SHIFT(level)) & 0x1ffu; 215 215 216 216 TEST_ASSERT((*parent_pte == mmu->pgd) || is_present_pte(mmu, parent_pte), ··· 220 220 return &page_table[index]; 221 221 } 222 222 223 - static uint64_t *virt_create_upper_pte(struct kvm_vm *vm, 224 - struct kvm_mmu *mmu, 225 - uint64_t *parent_pte, 226 - uint64_t vaddr, 227 - uint64_t paddr, 228 - int current_level, 229 - int target_level) 223 + static u64 *virt_create_upper_pte(struct kvm_vm *vm, 224 + struct kvm_mmu *mmu, 225 + u64 *parent_pte, 226 + u64 vaddr, 227 + u64 paddr, 228 + int current_level, 229 + int target_level) 230 230 { 231 - uint64_t *pte = virt_get_pte(vm, mmu, parent_pte, vaddr, current_level); 231 + u64 *pte = virt_get_pte(vm, mmu, parent_pte, vaddr, current_level); 232 232 233 233 paddr = vm_untag_gpa(vm, paddr); 234 234 ··· 256 256 return pte; 257 257 } 258 258 259 - void __virt_pg_map(struct kvm_vm *vm, struct kvm_mmu *mmu, uint64_t vaddr, 260 - uint64_t paddr, int level) 259 + void __virt_pg_map(struct kvm_vm *vm, struct kvm_mmu *mmu, u64 vaddr, 260 + u64 paddr, int level) 261 261 { 262 - const uint64_t pg_size = PG_LEVEL_SIZE(level); 263 - uint64_t *pte = &mmu->pgd; 262 + const u64 pg_size = PG_LEVEL_SIZE(level); 263 + u64 *pte = &mmu->pgd; 264 264 int current_level; 265 265 266 266 TEST_ASSERT(vm->mode == VM_MODE_PXXVYY_4K, ··· 315 315 *pte |= PTE_S_BIT_MASK(mmu); 316 316 } 317 317 318 - void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr) 318 + void virt_arch_pg_map(struct kvm_vm *vm, u64 vaddr, u64 paddr) 319 319 { 320 320 __virt_pg_map(vm, &vm->mmu, vaddr, paddr, PG_LEVEL_4K); 321 321 } 322 322 323 - void virt_map_level(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr, 324 - uint64_t nr_bytes, int level) 323 + void virt_map_level(struct kvm_vm *vm, u64 vaddr, u64 paddr, 324 + u64 nr_bytes, int level) 325 325 { 326 - uint64_t pg_size = PG_LEVEL_SIZE(level); 327 - uint64_t nr_pages = nr_bytes / pg_size; 326 + u64 pg_size = PG_LEVEL_SIZE(level); 327 + u64 nr_pages = nr_bytes / pg_size; 328 328 int i; 329 329 330 330 TEST_ASSERT(nr_bytes % pg_size == 0, ··· 341 341 } 342 342 } 343 343 344 - static bool vm_is_target_pte(struct kvm_mmu *mmu, uint64_t *pte, 344 + static bool vm_is_target_pte(struct kvm_mmu *mmu, u64 *pte, 345 345 int *level, int current_level) 346 346 { 347 347 if (is_huge_pte(mmu, pte)) { ··· 354 354 return *level == current_level; 355 355 } 356 356 357 - static uint64_t *__vm_get_page_table_entry(struct kvm_vm *vm, 358 - struct kvm_mmu *mmu, 359 - uint64_t vaddr, 360 - int *level) 357 + static u64 *__vm_get_page_table_entry(struct kvm_vm *vm, 358 + struct kvm_mmu *mmu, 359 + u64 vaddr, 360 + int *level) 361 361 { 362 362 int va_width = 12 + (mmu->pgtable_levels) * 9; 363 - uint64_t *pte = &mmu->pgd; 363 + u64 *pte = &mmu->pgd; 364 364 int current_level; 365 365 366 366 TEST_ASSERT(!vm->arch.is_pt_protected, ··· 393 393 return virt_get_pte(vm, mmu, pte, vaddr, PG_LEVEL_4K); 394 394 } 395 395 396 - uint64_t *tdp_get_pte(struct kvm_vm *vm, uint64_t l2_gpa) 396 + u64 *tdp_get_pte(struct kvm_vm *vm, u64 l2_gpa) 397 397 { 398 398 int level = PG_LEVEL_4K; 399 399 400 400 return __vm_get_page_table_entry(vm, &vm->stage2_mmu, l2_gpa, &level); 401 401 } 402 402 403 - uint64_t *vm_get_pte(struct kvm_vm *vm, uint64_t vaddr) 403 + u64 *vm_get_pte(struct kvm_vm *vm, u64 vaddr) 404 404 { 405 405 int level = PG_LEVEL_4K; 406 406 ··· 410 410 void virt_arch_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent) 411 411 { 412 412 struct kvm_mmu *mmu = &vm->mmu; 413 - uint64_t *pml4e, *pml4e_start; 414 - uint64_t *pdpe, *pdpe_start; 415 - uint64_t *pde, *pde_start; 416 - uint64_t *pte, *pte_start; 413 + u64 *pml4e, *pml4e_start; 414 + u64 *pdpe, *pdpe_start; 415 + u64 *pde, *pde_start; 416 + u64 *pte, *pte_start; 417 417 418 418 if (!mmu->pgd_created) 419 419 return; ··· 423 423 fprintf(stream, "%*s index hvaddr gpaddr " 424 424 "addr w exec dirty\n", 425 425 indent, ""); 426 - pml4e_start = (uint64_t *) addr_gpa2hva(vm, mmu->pgd); 426 + pml4e_start = (u64 *)addr_gpa2hva(vm, mmu->pgd); 427 427 for (uint16_t n1 = 0; n1 <= 0x1ffu; n1++) { 428 428 pml4e = &pml4e_start[n1]; 429 429 if (!is_present_pte(mmu, pml4e)) ··· 475 475 is_writable_pte(mmu, pte), 476 476 is_nx_pte(mmu, pte), 477 477 is_dirty_pte(mmu, pte), 478 - ((uint64_t) n1 << 27) 479 - | ((uint64_t) n2 << 18) 480 - | ((uint64_t) n3 << 9) 481 - | ((uint64_t) n4)); 478 + ((u64)n1 << 27) 479 + | ((u64)n2 << 18) 480 + | ((u64)n3 << 9) 481 + | ((u64)n4)); 482 482 } 483 483 } 484 484 } ··· 498 498 return kvm_cpu_has_ept() || kvm_cpu_has_npt(); 499 499 } 500 500 501 - void __tdp_map(struct kvm_vm *vm, uint64_t nested_paddr, uint64_t paddr, 502 - uint64_t size, int level) 501 + void __tdp_map(struct kvm_vm *vm, u64 nested_paddr, u64 paddr, 502 + u64 size, int level) 503 503 { 504 504 size_t page_size = PG_LEVEL_SIZE(level); 505 505 size_t npages = size / page_size; ··· 514 514 } 515 515 } 516 516 517 - void tdp_map(struct kvm_vm *vm, uint64_t nested_paddr, uint64_t paddr, 518 - uint64_t size) 517 + void tdp_map(struct kvm_vm *vm, u64 nested_paddr, u64 paddr, 518 + u64 size) 519 519 { 520 520 __tdp_map(vm, nested_paddr, paddr, size, PG_LEVEL_4K); 521 521 } ··· 540 540 if (i > last) 541 541 break; 542 542 543 - tdp_map(vm, (uint64_t)i << vm->page_shift, 544 - (uint64_t)i << vm->page_shift, 1 << vm->page_shift); 543 + tdp_map(vm, (u64)i << vm->page_shift, 544 + (u64)i << vm->page_shift, 1 << vm->page_shift); 545 545 } 546 546 } 547 547 548 548 /* Identity map a region with 1GiB Pages. */ 549 - void tdp_identity_map_1g(struct kvm_vm *vm, uint64_t addr, uint64_t size) 549 + void tdp_identity_map_1g(struct kvm_vm *vm, u64 addr, u64 size) 550 550 { 551 551 __tdp_map(vm, addr, addr, size, PG_LEVEL_1G); 552 552 } ··· 621 621 gpa_t addr_arch_gva2gpa(struct kvm_vm *vm, gva_t gva) 622 622 { 623 623 int level = PG_LEVEL_NONE; 624 - uint64_t *pte = __vm_get_page_table_entry(vm, &vm->mmu, gva, &level); 624 + u64 *pte = __vm_get_page_table_entry(vm, &vm->mmu, gva, &level); 625 625 626 626 TEST_ASSERT(is_present_pte(&vm->mmu, pte), 627 627 "Leaf PTE not PRESENT for gva: 0x%08lx", gva); ··· 943 943 property.reg, property.lo_bit, property.hi_bit); 944 944 } 945 945 946 - uint64_t kvm_get_feature_msr(uint64_t msr_index) 946 + u64 kvm_get_feature_msr(u64 msr_index) 947 947 { 948 948 struct { 949 949 struct kvm_msrs header; ··· 962 962 return buffer.entry.data; 963 963 } 964 964 965 - void __vm_xsave_require_permission(uint64_t xfeature, const char *name) 965 + void __vm_xsave_require_permission(u64 xfeature, const char *name) 966 966 { 967 967 int kvm_fd; 968 968 u64 bitmask; ··· 1063 1063 vcpu_set_cpuid(vcpu); 1064 1064 } 1065 1065 1066 - uint64_t vcpu_get_msr(struct kvm_vcpu *vcpu, uint64_t msr_index) 1066 + u64 vcpu_get_msr(struct kvm_vcpu *vcpu, u64 msr_index) 1067 1067 { 1068 1068 struct { 1069 1069 struct kvm_msrs header; ··· 1078 1078 return buffer.entry.data; 1079 1079 } 1080 1080 1081 - int _vcpu_set_msr(struct kvm_vcpu *vcpu, uint64_t msr_index, uint64_t msr_value) 1081 + int _vcpu_set_msr(struct kvm_vcpu *vcpu, u64 msr_index, u64 msr_value) 1082 1082 { 1083 1083 struct { 1084 1084 struct kvm_msrs header; ··· 1106 1106 vcpu_regs_get(vcpu, &regs); 1107 1107 1108 1108 if (num >= 1) 1109 - regs.rdi = va_arg(ap, uint64_t); 1109 + regs.rdi = va_arg(ap, u64); 1110 1110 1111 1111 if (num >= 2) 1112 - regs.rsi = va_arg(ap, uint64_t); 1112 + regs.rsi = va_arg(ap, u64); 1113 1113 1114 1114 if (num >= 3) 1115 - regs.rdx = va_arg(ap, uint64_t); 1115 + regs.rdx = va_arg(ap, u64); 1116 1116 1117 1117 if (num >= 4) 1118 - regs.rcx = va_arg(ap, uint64_t); 1118 + regs.rcx = va_arg(ap, u64); 1119 1119 1120 1120 if (num >= 5) 1121 - regs.r8 = va_arg(ap, uint64_t); 1121 + regs.r8 = va_arg(ap, u64); 1122 1122 1123 1123 if (num >= 6) 1124 - regs.r9 = va_arg(ap, uint64_t); 1124 + regs.r9 = va_arg(ap, u64); 1125 1125 1126 1126 vcpu_regs_set(vcpu, &regs); 1127 1127 va_end(ap); ··· 1344 1344 1345 1345 #define X86_HYPERCALL(inputs...) \ 1346 1346 ({ \ 1347 - uint64_t r; \ 1347 + u64 r; \ 1348 1348 \ 1349 1349 asm volatile("test %[use_vmmcall], %[use_vmmcall]\n\t" \ 1350 1350 "jnz 1f\n\t" \ ··· 1359 1359 r; \ 1360 1360 }) 1361 1361 1362 - uint64_t kvm_hypercall(uint64_t nr, uint64_t a0, uint64_t a1, uint64_t a2, 1363 - uint64_t a3) 1362 + u64 kvm_hypercall(u64 nr, u64 a0, u64 a1, u64 a2, u64 a3) 1364 1363 { 1365 1364 return X86_HYPERCALL("a"(nr), "b"(a0), "c"(a1), "d"(a2), "S"(a3)); 1366 1365 } 1367 1366 1368 - uint64_t __xen_hypercall(uint64_t nr, uint64_t a0, void *a1) 1367 + u64 __xen_hypercall(u64 nr, u64 a0, void *a1) 1369 1368 { 1370 1369 return X86_HYPERCALL("a"(nr), "D"(a0), "S"(a1)); 1371 1370 } 1372 1371 1373 - void xen_hypercall(uint64_t nr, uint64_t a0, void *a1) 1372 + void xen_hypercall(u64 nr, u64 a0, void *a1) 1374 1373 { 1375 1374 GUEST_ASSERT(!__xen_hypercall(nr, a0, a1)); 1376 1375 } ··· 1452 1453 return true; 1453 1454 } 1454 1455 1455 - void setup_smram(struct kvm_vm *vm, struct kvm_vcpu *vcpu, 1456 - uint64_t smram_gpa, 1456 + void setup_smram(struct kvm_vm *vm, struct kvm_vcpu *vcpu, u64 smram_gpa, 1457 1457 const void *smi_handler, size_t handler_size) 1458 1458 { 1459 1459 vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS, smram_gpa,
+5 -5
tools/testing/selftests/kvm/lib/x86/sev.c
··· 29 29 sev_register_encrypted_memory(vm, region); 30 30 31 31 sparsebit_for_each_set_range(protected_phy_pages, i, j) { 32 - const uint64_t size = (j - i + 1) * vm->page_size; 33 - const uint64_t offset = (i - lowest_page_in_region) * vm->page_size; 32 + const u64 size = (j - i + 1) * vm->page_size; 33 + const u64 offset = (i - lowest_page_in_region) * vm->page_size; 34 34 35 35 if (private) 36 36 vm_mem_set_private(vm, gpa_base + offset, size); 37 37 38 38 if (is_sev_snp_vm(vm)) 39 39 snp_launch_update_data(vm, gpa_base + offset, 40 - (uint64_t)addr_gpa2hva(vm, gpa_base + offset), 40 + (u64)addr_gpa2hva(vm, gpa_base + offset), 41 41 size, page_type); 42 42 else 43 43 sev_launch_update_data(vm, gpa_base + offset, size); ··· 131 131 TEST_ASSERT_EQ(status.state, SEV_GUEST_STATE_RUNNING); 132 132 } 133 133 134 - void snp_vm_launch_start(struct kvm_vm *vm, uint64_t policy) 134 + void snp_vm_launch_start(struct kvm_vm *vm, u64 policy) 135 135 { 136 136 struct kvm_sev_snp_launch_start launch_start = { 137 137 .policy = policy, ··· 174 174 return vm; 175 175 } 176 176 177 - void vm_sev_launch(struct kvm_vm *vm, uint64_t policy, uint8_t *measurement) 177 + void vm_sev_launch(struct kvm_vm *vm, u64 policy, uint8_t *measurement) 178 178 { 179 179 if (is_sev_snp_vm(vm)) { 180 180 vm_enable_cap(vm, KVM_CAP_EXIT_HYPERCALL, BIT(KVM_HC_MAP_GPA_RANGE));
+3 -3
tools/testing/selftests/kvm/lib/x86/svm.c
··· 84 84 void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_rsp) 85 85 { 86 86 struct vmcb *vmcb = svm->vmcb; 87 - uint64_t vmcb_gpa = svm->vmcb_gpa; 87 + u64 vmcb_gpa = svm->vmcb_gpa; 88 88 struct vmcb_save_area *save = &vmcb->save; 89 89 struct vmcb_control_area *ctrl = &vmcb->control; 90 90 u32 data_seg_attr = 3 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK 91 91 | SVM_SELECTOR_DB_MASK | SVM_SELECTOR_G_MASK; 92 92 u32 code_seg_attr = 9 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK 93 93 | SVM_SELECTOR_L_MASK | SVM_SELECTOR_G_MASK; 94 - uint64_t efer; 94 + u64 efer; 95 95 96 96 efer = rdmsr(MSR_EFER); 97 97 wrmsr(MSR_EFER, efer | EFER_SVME); ··· 158 158 * for now. registers involved in LOAD/SAVE_GPR_C are eventually 159 159 * unmodified so they do not need to be in the clobber list. 160 160 */ 161 - void run_guest(struct vmcb *vmcb, uint64_t vmcb_gpa) 161 + void run_guest(struct vmcb *vmcb, u64 vmcb_gpa) 162 162 { 163 163 asm volatile ( 164 164 "vmload %[vmcb_gpa]\n\t"
+7 -7
tools/testing/selftests/kvm/lib/x86/vmx.c
··· 125 125 126 126 bool prepare_for_vmx_operation(struct vmx_pages *vmx) 127 127 { 128 - uint64_t feature_control; 129 - uint64_t required; 128 + u64 feature_control; 129 + u64 required; 130 130 unsigned long cr0; 131 131 unsigned long cr4; 132 132 ··· 185 185 return true; 186 186 } 187 187 188 - static bool ept_vpid_cap_supported(uint64_t mask) 188 + static bool ept_vpid_cap_supported(u64 mask) 189 189 { 190 190 return rdmsr(MSR_IA32_VMX_EPT_VPID_CAP) & mask; 191 191 } ··· 208 208 vmwrite(PIN_BASED_VM_EXEC_CONTROL, rdmsr(MSR_IA32_VMX_TRUE_PINBASED_CTLS)); 209 209 210 210 if (vmx->eptp_gpa) { 211 - uint64_t eptp = vmx->eptp_gpa | EPTP_WB | EPTP_PWL_4; 211 + u64 eptp = vmx->eptp_gpa | EPTP_WB | EPTP_PWL_4; 212 212 213 213 TEST_ASSERT((vmx->eptp_gpa & ~PHYSICAL_PAGE_MASK) == 0, 214 214 "Illegal bits set in vmx->eptp_gpa"); ··· 358 358 vmwrite(GUEST_GDTR_BASE, vmreadz(HOST_GDTR_BASE)); 359 359 vmwrite(GUEST_IDTR_BASE, vmreadz(HOST_IDTR_BASE)); 360 360 vmwrite(GUEST_DR7, 0x400); 361 - vmwrite(GUEST_RSP, (uint64_t)rsp); 362 - vmwrite(GUEST_RIP, (uint64_t)rip); 361 + vmwrite(GUEST_RSP, (u64)rsp); 362 + vmwrite(GUEST_RIP, (u64)rip); 363 363 vmwrite(GUEST_RFLAGS, 2); 364 364 vmwrite(GUEST_PENDING_DBG_EXCEPTIONS, 0); 365 365 vmwrite(GUEST_SYSENTER_ESP, vmreadz(HOST_IA32_SYSENTER_ESP)); ··· 375 375 376 376 bool kvm_cpu_has_ept(void) 377 377 { 378 - uint64_t ctrl; 378 + u64 ctrl; 379 379 380 380 if (!kvm_cpu_has(X86_FEATURE_VMX)) 381 381 return false;
+4 -4
tools/testing/selftests/kvm/loongarch/arch_timer.c
··· 28 28 { 29 29 unsigned int intid; 30 30 uint32_t cpu = guest_get_vcpuid(); 31 - uint64_t xcnt, val, cfg, xcnt_diff_us; 31 + u64 xcnt, val, cfg, xcnt_diff_us; 32 32 struct test_vcpu_shared_data *shared_data = &vcpu_shared_data[cpu]; 33 33 34 34 intid = !!(regs->estat & BIT(INT_TI)); ··· 65 65 static void guest_test_period_timer(uint32_t cpu) 66 66 { 67 67 uint32_t irq_iter, config_iter; 68 - uint64_t us; 68 + u64 us; 69 69 struct test_vcpu_shared_data *shared_data = &vcpu_shared_data[cpu]; 70 70 71 71 shared_data->nr_iter = test_args.nr_iter; ··· 89 89 static void guest_test_oneshot_timer(uint32_t cpu) 90 90 { 91 91 uint32_t irq_iter, config_iter; 92 - uint64_t us; 92 + u64 us; 93 93 struct test_vcpu_shared_data *shared_data = &vcpu_shared_data[cpu]; 94 94 95 95 shared_data->nr_iter = 0; ··· 115 115 static void guest_test_emulate_timer(uint32_t cpu) 116 116 { 117 117 uint32_t config_iter; 118 - uint64_t xcnt_diff_us, us; 118 + u64 xcnt_diff_us, us; 119 119 struct test_vcpu_shared_data *shared_data = &vcpu_shared_data[cpu]; 120 120 121 121 local_irq_disable();
+2 -2
tools/testing/selftests/kvm/loongarch/pmu_test.c
··· 52 52 { 53 53 int i; 54 54 uint32_t cfg6, pmnum; 55 - uint64_t cnt[4]; 55 + u64 cnt[4]; 56 56 57 57 cfg6 = read_cpucfg(LOONGARCH_CPUCFG6); 58 58 pmnum = (cfg6 >> 4) & 0xf; ··· 114 114 115 115 static void guest_pmu_interrupt_test(void) 116 116 { 117 - uint64_t cnt; 117 + u64 cnt; 118 118 119 119 csr_write(PMU_OVERFLOW - 1, LOONGARCH_CSR_PERFCNTR0); 120 120 csr_write(PMU_ENVENT_ENABLED | CSR_PERFCTRL_PMIE | LOONGARCH_PMU_EVENT_CYCLES, LOONGARCH_CSR_PERFCTRL0);
+5 -5
tools/testing/selftests/kvm/memslot_modification_stress_test.c
··· 30 30 31 31 32 32 static int nr_vcpus = 1; 33 - static uint64_t guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 33 + static u64 guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 34 34 35 35 static void vcpu_worker(struct memstress_vcpu_args *vcpu_args) 36 36 { ··· 55 55 } 56 56 57 57 static void add_remove_memslot(struct kvm_vm *vm, useconds_t delay, 58 - uint64_t nr_modifications) 58 + u64 nr_modifications) 59 59 { 60 - uint64_t pages = max_t(int, vm->page_size, getpagesize()) / vm->page_size; 61 - uint64_t gpa; 60 + u64 pages = max_t(int, vm->page_size, getpagesize()) / vm->page_size; 61 + u64 gpa; 62 62 int i; 63 63 64 64 /* ··· 78 78 79 79 struct test_params { 80 80 useconds_t delay; 81 - uint64_t nr_iterations; 81 + u64 nr_iterations; 82 82 bool partition_vcpu_memory_access; 83 83 bool disable_slot_zap_quirk; 84 84 };
+57 -57
tools/testing/selftests/kvm/memslot_perf_test.c
··· 86 86 struct kvm_vcpu *vcpu; 87 87 pthread_t vcpu_thread; 88 88 uint32_t nslots; 89 - uint64_t npages; 90 - uint64_t pages_per_slot; 89 + u64 npages; 90 + u64 pages_per_slot; 91 91 void **hva_slots; 92 92 bool mmio_ok; 93 - uint64_t mmio_gpa_min; 94 - uint64_t mmio_gpa_max; 93 + u64 mmio_gpa_min; 94 + u64 mmio_gpa_max; 95 95 }; 96 96 97 97 struct sync_area { ··· 186 186 "sem_timedwait() failed: %d", errno); 187 187 } 188 188 189 - static void *vm_gpa2hva(struct vm_data *data, uint64_t gpa, uint64_t *rempages) 189 + static void *vm_gpa2hva(struct vm_data *data, u64 gpa, u64 *rempages) 190 190 { 191 - uint64_t gpage, pgoffs; 191 + u64 gpage, pgoffs; 192 192 uint32_t slot, slotoffs; 193 193 void *base; 194 194 uint32_t guest_page_size = data->vm->page_size; ··· 200 200 201 201 gpage = gpa / guest_page_size; 202 202 pgoffs = gpa % guest_page_size; 203 - slot = min(gpage / data->pages_per_slot, (uint64_t)data->nslots - 1); 203 + slot = min(gpage / data->pages_per_slot, (u64)data->nslots - 1); 204 204 slotoffs = gpage - (slot * data->pages_per_slot); 205 205 206 206 if (rempages) { 207 - uint64_t slotpages; 207 + u64 slotpages; 208 208 209 209 if (slot == data->nslots - 1) 210 210 slotpages = data->npages - slot * data->pages_per_slot; ··· 220 220 return (uint8_t *)base + slotoffs * guest_page_size + pgoffs; 221 221 } 222 222 223 - static uint64_t vm_slot2gpa(struct vm_data *data, uint32_t slot) 223 + static u64 vm_slot2gpa(struct vm_data *data, uint32_t slot) 224 224 { 225 225 uint32_t guest_page_size = data->vm->page_size; 226 226 ··· 244 244 } 245 245 246 246 static bool check_slot_pages(uint32_t host_page_size, uint32_t guest_page_size, 247 - uint64_t pages_per_slot, uint64_t rempages) 247 + u64 pages_per_slot, u64 rempages) 248 248 { 249 249 if (!pages_per_slot) 250 250 return false; ··· 259 259 } 260 260 261 261 262 - static uint64_t get_max_slots(struct vm_data *data, uint32_t host_page_size) 262 + static u64 get_max_slots(struct vm_data *data, uint32_t host_page_size) 263 263 { 264 264 uint32_t guest_page_size = data->vm->page_size; 265 - uint64_t mempages, pages_per_slot, rempages; 266 - uint64_t slots; 265 + u64 mempages, pages_per_slot, rempages; 266 + u64 slots; 267 267 268 268 mempages = data->npages; 269 269 slots = data->nslots; ··· 281 281 return 0; 282 282 } 283 283 284 - static bool prepare_vm(struct vm_data *data, int nslots, uint64_t *maxslots, 285 - void *guest_code, uint64_t mem_size, 284 + static bool prepare_vm(struct vm_data *data, int nslots, u64 *maxslots, 285 + void *guest_code, u64 mem_size, 286 286 struct timespec *slot_runtime) 287 287 { 288 - uint64_t mempages, rempages; 289 - uint64_t guest_addr; 288 + u64 mempages, rempages; 289 + u64 guest_addr; 290 290 uint32_t slot, host_page_size, guest_page_size; 291 291 struct timespec tstart; 292 292 struct sync_area *sync; ··· 317 317 318 318 clock_gettime(CLOCK_MONOTONIC, &tstart); 319 319 for (slot = 1, guest_addr = MEM_GPA; slot <= data->nslots; slot++) { 320 - uint64_t npages; 320 + u64 npages; 321 321 322 322 npages = data->pages_per_slot; 323 323 if (slot == data->nslots) ··· 331 331 *slot_runtime = timespec_elapsed(tstart); 332 332 333 333 for (slot = 1, guest_addr = MEM_GPA; slot <= data->nslots; slot++) { 334 - uint64_t npages; 335 - uint64_t gpa; 334 + u64 npages; 335 + u64 gpa; 336 336 337 337 npages = data->pages_per_slot; 338 338 if (slot == data->nslots) ··· 460 460 461 461 for (ptr = base; ptr < base + MEM_TEST_MOVE_SIZE; 462 462 ptr += page_size) 463 - *(uint64_t *)ptr = MEM_TEST_VAL_1; 463 + *(u64 *)ptr = MEM_TEST_VAL_1; 464 464 465 465 /* 466 466 * No host sync here since the MMIO exits are so expensive ··· 489 489 for (ptr = MEM_TEST_GPA; 490 490 ptr < MEM_TEST_GPA + MEM_TEST_MAP_SIZE / 2; 491 491 ptr += page_size) 492 - *(uint64_t *)ptr = MEM_TEST_VAL_1; 492 + *(u64 *)ptr = MEM_TEST_VAL_1; 493 493 494 494 if (!guest_perform_sync()) 495 495 break; ··· 497 497 for (ptr = MEM_TEST_GPA + MEM_TEST_MAP_SIZE / 2; 498 498 ptr < MEM_TEST_GPA + MEM_TEST_MAP_SIZE; 499 499 ptr += page_size) 500 - *(uint64_t *)ptr = MEM_TEST_VAL_2; 500 + *(u64 *)ptr = MEM_TEST_VAL_2; 501 501 502 502 if (!guest_perform_sync()) 503 503 break; ··· 526 526 * 527 527 * Just access a single page to be on the safe side. 528 528 */ 529 - *(uint64_t *)ptr = MEM_TEST_VAL_1; 529 + *(u64 *)ptr = MEM_TEST_VAL_1; 530 530 531 531 if (!guest_perform_sync()) 532 532 break; 533 533 534 534 ptr += MEM_TEST_UNMAP_SIZE / 2; 535 - *(uint64_t *)ptr = MEM_TEST_VAL_2; 535 + *(u64 *)ptr = MEM_TEST_VAL_2; 536 536 537 537 if (!guest_perform_sync()) 538 538 break; ··· 555 555 556 556 for (ptr = MEM_TEST_GPA; 557 557 ptr < MEM_TEST_GPA + MEM_TEST_SIZE; ptr += page_size) 558 - *(uint64_t *)ptr = MEM_TEST_VAL_1; 558 + *(u64 *)ptr = MEM_TEST_VAL_1; 559 559 560 560 if (!guest_perform_sync()) 561 561 break; 562 562 563 563 for (ptr = MEM_TEST_GPA + page_size / 2; 564 564 ptr < MEM_TEST_GPA + MEM_TEST_SIZE; ptr += page_size) { 565 - uint64_t val = *(uint64_t *)ptr; 565 + u64 val = *(u64 *)ptr; 566 566 567 567 GUEST_ASSERT_EQ(val, MEM_TEST_VAL_2); 568 - *(uint64_t *)ptr = 0; 568 + *(u64 *)ptr = 0; 569 569 } 570 570 571 571 if (!guest_perform_sync()) ··· 577 577 578 578 static bool test_memslot_move_prepare(struct vm_data *data, 579 579 struct sync_area *sync, 580 - uint64_t *maxslots, bool isactive) 580 + u64 *maxslots, bool isactive) 581 581 { 582 582 uint32_t guest_page_size = data->vm->page_size; 583 - uint64_t movesrcgpa, movetestgpa; 583 + u64 movesrcgpa, movetestgpa; 584 584 585 585 #ifdef __x86_64__ 586 586 if (disable_slot_zap_quirk) ··· 590 590 movesrcgpa = vm_slot2gpa(data, data->nslots - 1); 591 591 592 592 if (isactive) { 593 - uint64_t lastpages; 593 + u64 lastpages; 594 594 595 595 vm_gpa2hva(data, movesrcgpa, &lastpages); 596 596 if (lastpages * guest_page_size < MEM_TEST_MOVE_SIZE / 2) { ··· 613 613 614 614 static bool test_memslot_move_prepare_active(struct vm_data *data, 615 615 struct sync_area *sync, 616 - uint64_t *maxslots) 616 + u64 *maxslots) 617 617 { 618 618 return test_memslot_move_prepare(data, sync, maxslots, true); 619 619 } 620 620 621 621 static bool test_memslot_move_prepare_inactive(struct vm_data *data, 622 622 struct sync_area *sync, 623 - uint64_t *maxslots) 623 + u64 *maxslots) 624 624 { 625 625 return test_memslot_move_prepare(data, sync, maxslots, false); 626 626 } 627 627 628 628 static void test_memslot_move_loop(struct vm_data *data, struct sync_area *sync) 629 629 { 630 - uint64_t movesrcgpa; 630 + u64 movesrcgpa; 631 631 632 632 movesrcgpa = vm_slot2gpa(data, data->nslots - 1); 633 633 vm_mem_region_move(data->vm, data->nslots - 1 + 1, ··· 636 636 } 637 637 638 638 static void test_memslot_do_unmap(struct vm_data *data, 639 - uint64_t offsp, uint64_t count) 639 + u64 offsp, u64 count) 640 640 { 641 - uint64_t gpa, ctr; 641 + u64 gpa, ctr; 642 642 uint32_t guest_page_size = data->vm->page_size; 643 643 644 644 for (gpa = MEM_TEST_GPA + offsp * guest_page_size, ctr = 0; ctr < count; ) { 645 - uint64_t npages; 645 + u64 npages; 646 646 void *hva; 647 647 int ret; 648 648 ··· 661 661 } 662 662 663 663 static void test_memslot_map_unmap_check(struct vm_data *data, 664 - uint64_t offsp, uint64_t valexp) 664 + u64 offsp, u64 valexp) 665 665 { 666 - uint64_t gpa; 667 - uint64_t *val; 666 + u64 gpa; 667 + u64 *val; 668 668 uint32_t guest_page_size = data->vm->page_size; 669 669 670 670 if (!map_unmap_verify) ··· 681 681 static void test_memslot_map_loop(struct vm_data *data, struct sync_area *sync) 682 682 { 683 683 uint32_t guest_page_size = data->vm->page_size; 684 - uint64_t guest_pages = MEM_TEST_MAP_SIZE / guest_page_size; 684 + u64 guest_pages = MEM_TEST_MAP_SIZE / guest_page_size; 685 685 686 686 /* 687 687 * Unmap the second half of the test area while guest writes to (maps) ··· 718 718 719 719 static void test_memslot_unmap_loop_common(struct vm_data *data, 720 720 struct sync_area *sync, 721 - uint64_t chunk) 721 + u64 chunk) 722 722 { 723 723 uint32_t guest_page_size = data->vm->page_size; 724 - uint64_t guest_pages = MEM_TEST_UNMAP_SIZE / guest_page_size; 725 - uint64_t ctr; 724 + u64 guest_pages = MEM_TEST_UNMAP_SIZE / guest_page_size; 725 + u64 ctr; 726 726 727 727 /* 728 728 * Wait for the guest to finish mapping page(s) in the first half ··· 748 748 { 749 749 uint32_t host_page_size = getpagesize(); 750 750 uint32_t guest_page_size = data->vm->page_size; 751 - uint64_t guest_chunk_pages = guest_page_size >= host_page_size ? 751 + u64 guest_chunk_pages = guest_page_size >= host_page_size ? 752 752 1 : host_page_size / guest_page_size; 753 753 754 754 test_memslot_unmap_loop_common(data, sync, guest_chunk_pages); ··· 758 758 struct sync_area *sync) 759 759 { 760 760 uint32_t guest_page_size = data->vm->page_size; 761 - uint64_t guest_chunk_pages = MEM_TEST_UNMAP_CHUNK_SIZE / guest_page_size; 761 + u64 guest_chunk_pages = MEM_TEST_UNMAP_CHUNK_SIZE / guest_page_size; 762 762 763 763 test_memslot_unmap_loop_common(data, sync, guest_chunk_pages); 764 764 } 765 765 766 766 static void test_memslot_rw_loop(struct vm_data *data, struct sync_area *sync) 767 767 { 768 - uint64_t gptr; 768 + u64 gptr; 769 769 uint32_t guest_page_size = data->vm->page_size; 770 770 771 771 for (gptr = MEM_TEST_GPA + guest_page_size / 2; 772 772 gptr < MEM_TEST_GPA + MEM_TEST_SIZE; gptr += guest_page_size) 773 - *(uint64_t *)vm_gpa2hva(data, gptr, NULL) = MEM_TEST_VAL_2; 773 + *(u64 *)vm_gpa2hva(data, gptr, NULL) = MEM_TEST_VAL_2; 774 774 775 775 host_perform_sync(sync); 776 776 777 777 for (gptr = MEM_TEST_GPA; 778 778 gptr < MEM_TEST_GPA + MEM_TEST_SIZE; gptr += guest_page_size) { 779 - uint64_t *vptr = (typeof(vptr))vm_gpa2hva(data, gptr, NULL); 780 - uint64_t val = *vptr; 779 + u64 *vptr = (typeof(vptr))vm_gpa2hva(data, gptr, NULL); 780 + u64 val = *vptr; 781 781 782 782 TEST_ASSERT(val == MEM_TEST_VAL_1, 783 783 "Guest written values should read back correctly (is %"PRIu64" @ %"PRIx64")", ··· 790 790 791 791 struct test_data { 792 792 const char *name; 793 - uint64_t mem_size; 793 + u64 mem_size; 794 794 void (*guest_code)(void); 795 795 bool (*prepare)(struct vm_data *data, struct sync_area *sync, 796 - uint64_t *maxslots); 796 + u64 *maxslots); 797 797 void (*loop)(struct vm_data *data, struct sync_area *sync); 798 798 }; 799 799 800 - static bool test_execute(int nslots, uint64_t *maxslots, 800 + static bool test_execute(int nslots, u64 *maxslots, 801 801 unsigned int maxtime, 802 802 const struct test_data *tdata, 803 - uint64_t *nloops, 803 + u64 *nloops, 804 804 struct timespec *slot_runtime, 805 805 struct timespec *guest_runtime) 806 806 { 807 - uint64_t mem_size = tdata->mem_size ? : MEM_SIZE; 807 + u64 mem_size = tdata->mem_size ? : MEM_SIZE; 808 808 struct vm_data *data; 809 809 struct sync_area *sync; 810 810 struct timespec tstart; ··· 1041 1041 struct test_result { 1042 1042 struct timespec slot_runtime, guest_runtime, iter_runtime; 1043 1043 int64_t slottimens, runtimens; 1044 - uint64_t nloops; 1044 + u64 nloops; 1045 1045 }; 1046 1046 1047 1047 static bool test_loop(const struct test_data *data, ··· 1049 1049 struct test_result *rbestslottime, 1050 1050 struct test_result *rbestruntime) 1051 1051 { 1052 - uint64_t maxslots; 1052 + u64 maxslots; 1053 1053 struct test_result result = {}; 1054 1054 1055 1055 if (!test_execute(targs->nslots, &maxslots, targs->seconds, data,
+13 -13
tools/testing/selftests/kvm/mmu_stress_test.c
··· 20 20 static bool mprotect_ro_done; 21 21 static bool all_vcpus_hit_ro_fault; 22 22 23 - static void guest_code(uint64_t start_gpa, uint64_t end_gpa, uint64_t stride) 23 + static void guest_code(u64 start_gpa, u64 end_gpa, u64 stride) 24 24 { 25 - uint64_t gpa; 25 + u64 gpa; 26 26 int i; 27 27 28 28 for (i = 0; i < 2; i++) { 29 29 for (gpa = start_gpa; gpa < end_gpa; gpa += stride) 30 - vcpu_arch_put_guest(*((volatile uint64_t *)gpa), gpa); 30 + vcpu_arch_put_guest(*((volatile u64 *)gpa), gpa); 31 31 GUEST_SYNC(i); 32 32 } 33 33 34 34 for (gpa = start_gpa; gpa < end_gpa; gpa += stride) 35 - *((volatile uint64_t *)gpa); 35 + *((volatile u64 *)gpa); 36 36 GUEST_SYNC(2); 37 37 38 38 /* ··· 55 55 #elif defined(__aarch64__) 56 56 asm volatile("str %0, [%0]" :: "r" (gpa) : "memory"); 57 57 #else 58 - vcpu_arch_put_guest(*((volatile uint64_t *)gpa), gpa); 58 + vcpu_arch_put_guest(*((volatile u64 *)gpa), gpa); 59 59 #endif 60 60 } while (!READ_ONCE(mprotect_ro_done) || !READ_ONCE(all_vcpus_hit_ro_fault)); 61 61 ··· 68 68 #endif 69 69 70 70 for (gpa = start_gpa; gpa < end_gpa; gpa += stride) 71 - vcpu_arch_put_guest(*((volatile uint64_t *)gpa), gpa); 71 + vcpu_arch_put_guest(*((volatile u64 *)gpa), gpa); 72 72 GUEST_SYNC(4); 73 73 74 74 GUEST_ASSERT(0); ··· 76 76 77 77 struct vcpu_info { 78 78 struct kvm_vcpu *vcpu; 79 - uint64_t start_gpa; 80 - uint64_t end_gpa; 79 + u64 start_gpa; 80 + u64 end_gpa; 81 81 }; 82 82 83 83 static int nr_vcpus; ··· 203 203 } 204 204 205 205 static pthread_t *spawn_workers(struct kvm_vm *vm, struct kvm_vcpu **vcpus, 206 - uint64_t start_gpa, uint64_t end_gpa) 206 + u64 start_gpa, u64 end_gpa) 207 207 { 208 208 struct vcpu_info *info; 209 - uint64_t gpa, nr_bytes; 209 + u64 gpa, nr_bytes; 210 210 pthread_t *threads; 211 211 int i; 212 212 ··· 217 217 TEST_ASSERT(info, "Failed to allocate vCPU gpa ranges"); 218 218 219 219 nr_bytes = ((end_gpa - start_gpa) / nr_vcpus) & 220 - ~((uint64_t)vm->page_size - 1); 220 + ~((u64)vm->page_size - 1); 221 221 TEST_ASSERT(nr_bytes, "C'mon, no way you have %d CPUs", nr_vcpus); 222 222 223 223 for (i = 0, gpa = start_gpa; i < nr_vcpus; i++, gpa += nr_bytes) { ··· 278 278 * just below the 4gb boundary. This test could create memory at 279 279 * 1gb-3gb,but it's simpler to skip straight to 4gb. 280 280 */ 281 - const uint64_t start_gpa = SZ_4G; 281 + const u64 start_gpa = SZ_4G; 282 282 const int first_slot = 1; 283 283 284 284 struct timespec time_start, time_run1, time_reset, time_run2, time_ro, time_rw; 285 - uint64_t max_gpa, gpa, slot_size, max_mem, i; 285 + u64 max_gpa, gpa, slot_size, max_mem, i; 286 286 int max_slots, slot, opt, fd; 287 287 bool hugepages = false; 288 288 struct kvm_vcpu **vcpus;
+4 -4
tools/testing/selftests/kvm/pre_fault_memory_test.c
··· 17 17 #define TEST_NPAGES (TEST_SIZE / PAGE_SIZE) 18 18 #define TEST_SLOT 10 19 19 20 - static void guest_code(uint64_t base_gva) 20 + static void guest_code(u64 base_gva) 21 21 { 22 - volatile uint64_t val __used; 22 + volatile u64 val __used; 23 23 int i; 24 24 25 25 for (i = 0; i < TEST_NPAGES; i++) { 26 - uint64_t *src = (uint64_t *)(base_gva + i * PAGE_SIZE); 26 + u64 *src = (u64 *)(base_gva + i * PAGE_SIZE); 27 27 28 28 val = *src; 29 29 } ··· 161 161 162 162 static void __test_pre_fault_memory(unsigned long vm_type, bool private) 163 163 { 164 - uint64_t gpa, gva, alignment, guest_page_size; 164 + u64 gpa, gva, alignment, guest_page_size; 165 165 const struct vm_shape shape = { 166 166 .mode = VM_MODE_DEFAULT, 167 167 .type = vm_type,
+1 -1
tools/testing/selftests/kvm/riscv/arch_timer.c
··· 17 17 18 18 static void guest_irq_handler(struct pt_regs *regs) 19 19 { 20 - uint64_t xcnt, xcnt_diff_us, cmp; 20 + u64 xcnt, xcnt_diff_us, cmp; 21 21 unsigned int intid = regs->cause & ~CAUSE_IRQ_FLAG; 22 22 uint32_t cpu = guest_get_vcpuid(); 23 23 struct test_vcpu_shared_data *shared_data = &vcpu_shared_data[cpu];
+3 -3
tools/testing/selftests/kvm/riscv/ebreak_test.c
··· 8 8 #include "kvm_util.h" 9 9 #include "ucall_common.h" 10 10 11 - #define LABEL_ADDRESS(v) ((uint64_t)&(v)) 11 + #define LABEL_ADDRESS(v) ((u64)&(v)) 12 12 13 13 extern unsigned char sw_bp_1, sw_bp_2; 14 - static uint64_t sw_bp_addr; 14 + static u64 sw_bp_addr; 15 15 16 16 static void guest_code(void) 17 17 { ··· 37 37 { 38 38 struct kvm_vm *vm; 39 39 struct kvm_vcpu *vcpu; 40 - uint64_t pc; 40 + u64 pc; 41 41 struct kvm_guest_debug debug = { 42 42 .control = KVM_GUESTDBG_ENABLE, 43 43 };
+2 -2
tools/testing/selftests/kvm/riscv/get-reg-list.c
··· 162 162 } 163 163 164 164 static int override_vector_reg_size(struct kvm_vcpu *vcpu, struct vcpu_reg_sublist *s, 165 - uint64_t feature) 165 + u64 feature) 166 166 { 167 167 unsigned long vlenb_reg = 0; 168 168 int rc; ··· 197 197 { 198 198 unsigned long isa_ext_state[KVM_RISCV_ISA_EXT_MAX] = { 0 }; 199 199 struct vcpu_reg_sublist *s; 200 - uint64_t feature; 200 + u64 feature; 201 201 int rc; 202 202 203 203 for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++)
+1 -1
tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
··· 86 86 #undef switchcase_csr_read 87 87 } 88 88 89 - static inline void dummy_func_loop(uint64_t iter) 89 + static inline void dummy_func_loop(u64 iter) 90 90 { 91 91 int i = 0; 92 92
+4 -4
tools/testing/selftests/kvm/s390/debug_test.c
··· 17 17 "j .\n"); 18 18 19 19 static struct kvm_vm *test_step_int_1(struct kvm_vcpu **vcpu, void *guest_code, 20 - size_t new_psw_off, uint64_t *new_psw) 20 + size_t new_psw_off, u64 *new_psw) 21 21 { 22 22 struct kvm_guest_debug debug = {}; 23 23 struct kvm_regs regs; ··· 27 27 vm = vm_create_with_one_vcpu(vcpu, guest_code); 28 28 lowcore = addr_gpa2hva(vm, 0); 29 29 new_psw[0] = (*vcpu)->run->psw_mask; 30 - new_psw[1] = (uint64_t)int_handler; 30 + new_psw[1] = (u64)int_handler; 31 31 memcpy(lowcore + new_psw_off, new_psw, 16); 32 32 vcpu_regs_get(*vcpu, &regs); 33 33 regs.gprs[2] = -1; ··· 42 42 static void test_step_int(void *guest_code, size_t new_psw_off) 43 43 { 44 44 struct kvm_vcpu *vcpu; 45 - uint64_t new_psw[2]; 45 + u64 new_psw[2]; 46 46 struct kvm_vm *vm; 47 47 48 48 vm = test_step_int_1(&vcpu, guest_code, new_psw_off, new_psw); ··· 79 79 .u.pgm.code = PGM_SPECIFICATION, 80 80 }; 81 81 struct kvm_vcpu *vcpu; 82 - uint64_t new_psw[2]; 82 + u64 new_psw[2]; 83 83 struct kvm_vm *vm; 84 84 85 85 vm = test_step_int_1(&vcpu, test_step_pgm_diag_guest_code,
+16 -16
tools/testing/selftests/kvm/s390/memop.c
··· 34 34 struct mop_desc { 35 35 uintptr_t gaddr; 36 36 uintptr_t gaddr_v; 37 - uint64_t set_flags; 37 + u64 set_flags; 38 38 unsigned int f_check : 1; 39 39 unsigned int f_inject : 1; 40 40 unsigned int f_key : 1; ··· 85 85 ksmo.op = KVM_S390_MEMOP_ABSOLUTE_WRITE; 86 86 if (desc->mode == CMPXCHG) { 87 87 ksmo.op = KVM_S390_MEMOP_ABSOLUTE_CMPXCHG; 88 - ksmo.old_addr = (uint64_t)desc->old; 88 + ksmo.old_addr = (u64)desc->old; 89 89 memcpy(desc->old_value, desc->old, desc->size); 90 90 } 91 91 break; ··· 489 489 case 4: 490 490 return (uint32_t)val; 491 491 case 8: 492 - return (uint64_t)val; 492 + return (u64)val; 493 493 case 16: 494 494 return val; 495 495 } ··· 501 501 { 502 502 unsigned int count_a, count_b; 503 503 504 - count_a = __builtin_popcountl((uint64_t)(a >> 64)) + 505 - __builtin_popcountl((uint64_t)a); 506 - count_b = __builtin_popcountl((uint64_t)(b >> 64)) + 507 - __builtin_popcountl((uint64_t)b); 504 + count_a = __builtin_popcountl((u64)(a >> 64)) + 505 + __builtin_popcountl((u64)a); 506 + count_b = __builtin_popcountl((u64)(b >> 64)) + 507 + __builtin_popcountl((u64)b); 508 508 return count_a == count_b; 509 509 } 510 510 ··· 598 598 return ret; 599 599 } 600 600 case 8: { 601 - uint64_t old = *old_addr; 601 + u64 old = *old_addr; 602 602 603 603 asm volatile ("csg %[old],%[new],%[address]" 604 604 : [old] "+d" (old), 605 - [address] "+Q" (*(uint64_t *)(target)) 606 - : [new] "d" ((uint64_t)new) 605 + [address] "+Q" (*(u64 *)(target)) 606 + : [new] "d" ((u64)new) 607 607 : "cc" 608 608 ); 609 - ret = old == (uint64_t)*old_addr; 609 + ret = old == (u64)*old_addr; 610 610 *old_addr = old; 611 611 return ret; 612 612 } ··· 811 811 static void test_termination(void) 812 812 { 813 813 struct test_default t = test_default_init(guest_error_key); 814 - uint64_t prefix; 815 - uint64_t teid; 816 - uint64_t teid_mask = BIT(63 - 56) | BIT(63 - 60) | BIT(63 - 61); 817 - uint64_t psw[2]; 814 + u64 prefix; 815 + u64 teid; 816 + u64 teid_mask = BIT(63 - 56) | BIT(63 - 60) | BIT(63 - 61); 817 + u64 psw[2]; 818 818 819 819 HOST_SYNC(t.vcpu, STAGE_INITED); 820 820 HOST_SYNC(t.vcpu, STAGE_SKEYS_SET); ··· 855 855 kvm_vm_free(t.kvm_vm); 856 856 } 857 857 858 - const uint64_t last_page_addr = -PAGE_SIZE; 858 + const u64 last_page_addr = -PAGE_SIZE; 859 859 860 860 static void guest_copy_key_fetch_prot_override(void) 861 861 {
+2 -2
tools/testing/selftests/kvm/s390/resets.c
··· 57 57 ); 58 58 } 59 59 60 - static void test_one_reg(struct kvm_vcpu *vcpu, uint64_t id, uint64_t value) 60 + static void test_one_reg(struct kvm_vcpu *vcpu, u64 id, u64 value) 61 61 { 62 - uint64_t eval_reg; 62 + u64 eval_reg; 63 63 64 64 eval_reg = vcpu_get_reg(vcpu, id); 65 65 TEST_ASSERT(eval_reg == value, "value == 0x%lx", value);
+1 -1
tools/testing/selftests/kvm/s390/tprot.c
··· 46 46 47 47 static enum permission test_protection(void *addr, uint8_t key) 48 48 { 49 - uint64_t mask; 49 + u64 mask; 50 50 51 51 asm volatile ( 52 52 "tprot %[addr], 0(%[key])\n"
+15 -15
tools/testing/selftests/kvm/set_memory_region_test.c
··· 30 30 #define MEM_REGION_GPA 0xc0000000 31 31 #define MEM_REGION_SLOT 10 32 32 33 - static const uint64_t MMIO_VAL = 0xbeefull; 33 + static const u64 MMIO_VAL = 0xbeefull; 34 34 35 - extern const uint64_t final_rip_start; 36 - extern const uint64_t final_rip_end; 35 + extern const u64 final_rip_start; 36 + extern const u64 final_rip_end; 37 37 38 38 static sem_t vcpu_ready; 39 39 40 - static inline uint64_t guest_spin_on_val(uint64_t spin_val) 40 + static inline u64 guest_spin_on_val(u64 spin_val) 41 41 { 42 - uint64_t val; 42 + u64 val; 43 43 44 44 do { 45 - val = READ_ONCE(*((uint64_t *)MEM_REGION_GPA)); 45 + val = READ_ONCE(*((u64 *)MEM_REGION_GPA)); 46 46 } while (val == spin_val); 47 47 48 48 GUEST_SYNC(0); ··· 54 54 struct kvm_vcpu *vcpu = data; 55 55 struct kvm_run *run = vcpu->run; 56 56 struct ucall uc; 57 - uint64_t cmd; 57 + u64 cmd; 58 58 59 59 /* 60 60 * Loop until the guest is done. Re-enter the guest on all MMIO exits, ··· 111 111 void *guest_code) 112 112 { 113 113 struct kvm_vm *vm; 114 - uint64_t *hva; 115 - uint64_t gpa; 114 + u64 *hva; 115 + u64 gpa; 116 116 117 117 vm = vm_create_with_one_vcpu(vcpu, guest_code); 118 118 ··· 144 144 145 145 static void guest_code_move_memory_region(void) 146 146 { 147 - uint64_t val; 147 + u64 val; 148 148 149 149 GUEST_SYNC(0); 150 150 ··· 180 180 pthread_t vcpu_thread; 181 181 struct kvm_vcpu *vcpu; 182 182 struct kvm_vm *vm; 183 - uint64_t *hva; 183 + u64 *hva; 184 184 185 185 vm = spawn_vm(&vcpu, &vcpu_thread, guest_code_move_memory_region); 186 186 ··· 224 224 static void guest_code_delete_memory_region(void) 225 225 { 226 226 struct desc_ptr idt; 227 - uint64_t val; 227 + u64 val; 228 228 229 229 /* 230 230 * Clobber the IDT so that a #PF due to the memory region being deleted ··· 434 434 435 435 for (slot = 0; slot < max_mem_slots; slot++) 436 436 vm_set_user_memory_region(vm, slot, 0, 437 - ((uint64_t)slot * MEM_REGION_SIZE), 437 + ((u64)slot * MEM_REGION_SIZE), 438 438 MEM_REGION_SIZE, 439 - mem_aligned + (uint64_t)slot * MEM_REGION_SIZE); 439 + mem_aligned + (u64)slot * MEM_REGION_SIZE); 440 440 441 441 /* Check it cannot be added memory slots beyond the limit */ 442 442 mem_extra = kvm_mmap(MEM_REGION_SIZE, PROT_READ | PROT_WRITE, 443 443 MAP_PRIVATE | MAP_ANONYMOUS, -1); 444 444 445 445 ret = __vm_set_user_memory_region(vm, max_mem_slots, 0, 446 - (uint64_t)max_mem_slots * MEM_REGION_SIZE, 446 + (u64)max_mem_slots * MEM_REGION_SIZE, 447 447 MEM_REGION_SIZE, mem_extra); 448 448 TEST_ASSERT(ret == -1 && errno == EINVAL, 449 449 "Adding one more memory slot should fail with EINVAL");
+16 -16
tools/testing/selftests/kvm/steal_time.c
··· 25 25 #define ST_GPA_BASE (1 << 30) 26 26 27 27 static void *st_gva[NR_VCPUS]; 28 - static uint64_t guest_stolen_time[NR_VCPUS]; 28 + static u64 guest_stolen_time[NR_VCPUS]; 29 29 30 30 #if defined(__x86_64__) 31 31 ··· 44 44 struct kvm_steal_time *st = st_gva[cpu]; 45 45 uint32_t version; 46 46 47 - GUEST_ASSERT_EQ(rdmsr(MSR_KVM_STEAL_TIME), ((uint64_t)st_gva[cpu] | KVM_MSR_ENABLED)); 47 + GUEST_ASSERT_EQ(rdmsr(MSR_KVM_STEAL_TIME), ((u64)st_gva[cpu] | KVM_MSR_ENABLED)); 48 48 49 49 memset(st, 0, sizeof(*st)); 50 50 GUEST_SYNC(0); ··· 120 120 struct st_time { 121 121 uint32_t rev; 122 122 uint32_t attr; 123 - uint64_t st_time; 123 + u64 st_time; 124 124 }; 125 125 126 - static int64_t smccc(uint32_t func, uint64_t arg) 126 + static int64_t smccc(uint32_t func, u64 arg) 127 127 { 128 128 struct arm_smccc_res res; 129 129 ··· 178 178 static void steal_time_init(struct kvm_vcpu *vcpu, uint32_t i) 179 179 { 180 180 struct kvm_vm *vm = vcpu->vm; 181 - uint64_t st_ipa; 181 + u64 st_ipa; 182 182 183 183 struct kvm_device_attr dev = { 184 184 .group = KVM_ARM_VCPU_PVTIME_CTRL, 185 185 .attr = KVM_ARM_VCPU_PVTIME_IPA, 186 - .addr = (uint64_t)&st_ipa, 186 + .addr = (u64)&st_ipa, 187 187 }; 188 188 189 189 /* ST_GPA_BASE is identity mapped */ ··· 208 208 { 209 209 struct kvm_vm *vm; 210 210 struct kvm_vcpu *vcpu; 211 - uint64_t st_ipa; 211 + u64 st_ipa; 212 212 int ret; 213 213 214 214 vm = vm_create_with_one_vcpu(&vcpu, NULL); ··· 216 216 struct kvm_device_attr dev = { 217 217 .group = KVM_ARM_VCPU_PVTIME_CTRL, 218 218 .attr = KVM_ARM_VCPU_PVTIME_IPA, 219 - .addr = (uint64_t)&st_ipa, 219 + .addr = (u64)&st_ipa, 220 220 }; 221 221 222 222 vcpu_ioctl(vcpu, KVM_HAS_DEVICE_ATTR, &dev); ··· 244 244 struct sta_struct { 245 245 uint32_t sequence; 246 246 uint32_t flags; 247 - uint64_t steal; 247 + u64 steal; 248 248 uint8_t preempted; 249 249 uint8_t pad[47]; 250 250 } __packed; ··· 297 297 298 298 static bool is_steal_time_supported(struct kvm_vcpu *vcpu) 299 299 { 300 - uint64_t id = RISCV_SBI_EXT_REG(KVM_RISCV_SBI_EXT_STA); 300 + u64 id = RISCV_SBI_EXT_REG(KVM_RISCV_SBI_EXT_STA); 301 301 unsigned long enabled = vcpu_get_reg(vcpu, id); 302 302 303 303 TEST_ASSERT(enabled == 0 || enabled == 1, "Expected boolean result"); ··· 335 335 struct kvm_vm *vm; 336 336 struct kvm_vcpu *vcpu; 337 337 struct kvm_one_reg reg; 338 - uint64_t shmem; 338 + u64 shmem; 339 339 int ret; 340 340 341 341 vm = vm_create_with_one_vcpu(&vcpu, NULL); ··· 345 345 KVM_REG_RISCV_SBI_STATE | 346 346 KVM_REG_RISCV_SBI_STA | 347 347 KVM_REG_RISCV_SBI_STA_REG(shmem_lo); 348 - reg.addr = (uint64_t)&shmem; 348 + reg.addr = (u64)&shmem; 349 349 350 350 shmem = ST_GPA_BASE + 1; 351 351 ret = __vcpu_ioctl(vcpu, KVM_SET_ONE_REG, &reg); ··· 410 410 static bool is_steal_time_supported(struct kvm_vcpu *vcpu) 411 411 { 412 412 int err; 413 - uint64_t val; 413 + u64 val; 414 414 struct kvm_device_attr attr = { 415 415 .group = KVM_LOONGARCH_VCPU_CPUCFG, 416 416 .attr = CPUCFG_KVM_FEATURE, 417 - .addr = (uint64_t)&val, 417 + .addr = (u64)&val, 418 418 }; 419 419 420 420 err = __vcpu_ioctl(vcpu, KVM_HAS_DEVICE_ATTR, &attr); ··· 431 431 static void steal_time_init(struct kvm_vcpu *vcpu, uint32_t i) 432 432 { 433 433 int err; 434 - uint64_t st_gpa; 434 + u64 st_gpa; 435 435 struct kvm_vm *vm = vcpu->vm; 436 436 struct kvm_device_attr attr = { 437 437 .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, 438 438 .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, 439 - .addr = (uint64_t)&st_gpa, 439 + .addr = (u64)&st_gpa, 440 440 }; 441 441 442 442 /* ST_GPA_BASE is identity mapped */
+6 -6
tools/testing/selftests/kvm/system_counter_offset_test.c
··· 17 17 #ifdef __x86_64__ 18 18 19 19 struct test_case { 20 - uint64_t tsc_offset; 20 + u64 tsc_offset; 21 21 }; 22 22 23 23 static struct test_case test_cases[] = { ··· 39 39 &test->tsc_offset); 40 40 } 41 41 42 - static uint64_t guest_read_system_counter(struct test_case *test) 42 + static u64 guest_read_system_counter(struct test_case *test) 43 43 { 44 44 return rdtsc(); 45 45 } 46 46 47 - static uint64_t host_read_guest_system_counter(struct test_case *test) 47 + static u64 host_read_guest_system_counter(struct test_case *test) 48 48 { 49 49 return rdtsc() + test->tsc_offset; 50 50 } ··· 69 69 } 70 70 } 71 71 72 - static void handle_sync(struct ucall *uc, uint64_t start, uint64_t end) 72 + static void handle_sync(struct ucall *uc, u64 start, u64 end) 73 73 { 74 - uint64_t obs = uc->args[2]; 74 + u64 obs = uc->args[2]; 75 75 76 76 TEST_ASSERT(start <= obs && obs <= end, 77 77 "unexpected system counter value: %"PRIu64" expected range: [%"PRIu64", %"PRIu64"]", ··· 88 88 89 89 static void enter_guest(struct kvm_vcpu *vcpu) 90 90 { 91 - uint64_t start, end; 91 + u64 start, end; 92 92 struct ucall uc; 93 93 int i; 94 94
+1 -1
tools/testing/selftests/kvm/x86/amx_test.c
··· 80 80 asm volatile(".byte 0xc4, 0xe2, 0x78, 0x49, 0xc0" ::); 81 81 } 82 82 83 - static inline void __xsavec(struct xstate *xstate, uint64_t rfbm) 83 + static inline void __xsavec(struct xstate *xstate, u64 rfbm) 84 84 { 85 85 uint32_t rfbm_lo = rfbm; 86 86 uint32_t rfbm_hi = rfbm >> 32;
+6 -6
tools/testing/selftests/kvm/x86/aperfmperf_test.c
··· 35 35 return open_path_or_exit(path, O_RDONLY); 36 36 } 37 37 38 - static uint64_t read_dev_msr(int msr_fd, uint32_t msr) 38 + static u64 read_dev_msr(int msr_fd, uint32_t msr) 39 39 { 40 - uint64_t data; 40 + u64 data; 41 41 ssize_t rc; 42 42 43 43 rc = pread(msr_fd, &data, sizeof(data), msr); ··· 107 107 108 108 static void guest_no_aperfmperf(void) 109 109 { 110 - uint64_t msr_val; 110 + u64 msr_val; 111 111 uint8_t vector; 112 112 113 113 vector = rdmsr_safe(MSR_IA32_APERF, &msr_val); ··· 122 122 int main(int argc, char *argv[]) 123 123 { 124 124 const bool has_nested = kvm_cpu_has(X86_FEATURE_SVM) || kvm_cpu_has(X86_FEATURE_VMX); 125 - uint64_t host_aperf_before, host_mperf_before; 125 + u64 host_aperf_before, host_mperf_before; 126 126 gva_t nested_test_data_gva; 127 127 struct kvm_vcpu *vcpu; 128 128 struct kvm_vm *vm; ··· 166 166 host_mperf_before = read_dev_msr(msr_fd, MSR_IA32_MPERF); 167 167 168 168 for (i = 0; i <= NUM_ITERATIONS * (1 + has_nested); i++) { 169 - uint64_t host_aperf_after, host_mperf_after; 170 - uint64_t guest_aperf, guest_mperf; 169 + u64 host_aperf_after, host_mperf_after; 170 + u64 guest_aperf, guest_mperf; 171 171 struct ucall uc; 172 172 173 173 vcpu_run(vcpu);
+6 -6
tools/testing/selftests/kvm/x86/apic_bus_clock_test.c
··· 55 55 xapic_write_reg(reg, val); 56 56 } 57 57 58 - static void apic_guest_code(uint64_t apic_hz, uint64_t delay_ms) 58 + static void apic_guest_code(u64 apic_hz, u64 delay_ms) 59 59 { 60 - uint64_t tsc_hz = guest_tsc_khz * 1000; 60 + u64 tsc_hz = guest_tsc_khz * 1000; 61 61 const uint32_t tmict = ~0u; 62 - uint64_t tsc0, tsc1, freq; 62 + u64 tsc0, tsc1, freq; 63 63 uint32_t tmcct; 64 64 int i; 65 65 ··· 121 121 } 122 122 } 123 123 124 - static void run_apic_bus_clock_test(uint64_t apic_hz, uint64_t delay_ms, 124 + static void run_apic_bus_clock_test(u64 apic_hz, u64 delay_ms, 125 125 bool x2apic) 126 126 { 127 127 struct kvm_vcpu *vcpu; ··· 168 168 * Arbitrarilty default to 25MHz for the APIC bus frequency, which is 169 169 * different enough from the default 1GHz to be interesting. 170 170 */ 171 - uint64_t apic_hz = 25 * 1000 * 1000; 172 - uint64_t delay_ms = 100; 171 + u64 apic_hz = 25 * 1000 * 1000; 172 + u64 delay_ms = 100; 173 173 int opt; 174 174 175 175 TEST_REQUIRE(kvm_has_cap(KVM_CAP_X86_APIC_BUS_CYCLES_NS));
+1 -1
tools/testing/selftests/kvm/x86/debug_regs.c
··· 86 86 struct kvm_run *run; 87 87 struct kvm_vm *vm; 88 88 struct ucall uc; 89 - uint64_t cmd; 89 + u64 cmd; 90 90 int i; 91 91 /* Instruction lengths starting at ss_start */ 92 92 int ss_size[6] = {
+8 -8
tools/testing/selftests/kvm/x86/dirty_log_page_splitting_test.c
··· 23 23 #define SLOTS 2 24 24 #define ITERATIONS 2 25 25 26 - static uint64_t guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 26 + static u64 guest_percpu_mem_size = DEFAULT_PER_VCPU_MEM_SIZE; 27 27 28 28 static enum vm_mem_backing_src_type backing_src = VM_MEM_SRC_ANONYMOUS_HUGETLB; 29 29 ··· 33 33 static int vcpu_last_completed_iteration[KVM_MAX_VCPUS]; 34 34 35 35 struct kvm_page_stats { 36 - uint64_t pages_4k; 37 - uint64_t pages_2m; 38 - uint64_t pages_1g; 39 - uint64_t hugepages; 36 + u64 pages_4k; 37 + u64 pages_2m; 38 + u64 pages_1g; 39 + u64 hugepages; 40 40 }; 41 41 42 42 static void get_page_stats(struct kvm_vm *vm, struct kvm_page_stats *stats, const char *stage) ··· 89 89 { 90 90 struct kvm_vm *vm; 91 91 unsigned long **bitmaps; 92 - uint64_t guest_num_pages; 93 - uint64_t host_num_pages; 94 - uint64_t pages_per_slot; 92 + u64 guest_num_pages; 93 + u64 host_num_pages; 94 + u64 pages_per_slot; 95 95 int i; 96 96 struct kvm_page_stats stats_populated; 97 97 struct kvm_page_stats stats_dirty_logging_enabled;
+1 -1
tools/testing/selftests/kvm/x86/evmcs_smm_controls_test.c
··· 35 35 0x0f, 0xaa, /* rsm */ 36 36 }; 37 37 38 - static inline void sync_with_host(uint64_t phase) 38 + static inline void sync_with_host(u64 phase) 39 39 { 40 40 asm volatile("in $" XSTR(SYNC_PORT) ", %%al \n" 41 41 : "+a" (phase));
+19 -19
tools/testing/selftests/kvm/x86/fastops_test.c
··· 28 28 #define guest_test_fastop_1(insn, type_t, __val) \ 29 29 ({ \ 30 30 type_t val = __val, ex_val = __val, input = __val; \ 31 - uint64_t flags, ex_flags; \ 31 + u64 flags, ex_flags; \ 32 32 \ 33 33 guest_execute_fastop_1("", insn, ex_val, ex_flags); \ 34 34 guest_execute_fastop_1(KVM_FEP, insn, val, flags); \ 35 35 \ 36 36 __GUEST_ASSERT(val == ex_val, \ 37 37 "Wanted 0x%lx for '%s 0x%lx', got 0x%lx", \ 38 - (uint64_t)ex_val, insn, (uint64_t)input, (uint64_t)val); \ 38 + (u64)ex_val, insn, (u64)input, (u64)val); \ 39 39 __GUEST_ASSERT(flags == ex_flags, \ 40 40 "Wanted flags 0x%lx for '%s 0x%lx', got 0x%lx", \ 41 - ex_flags, insn, (uint64_t)input, flags); \ 41 + ex_flags, insn, (u64)input, flags); \ 42 42 }) 43 43 44 44 #define guest_execute_fastop_2(FEP, insn, __input, __output, __flags) \ ··· 52 52 #define guest_test_fastop_2(insn, type_t, __val1, __val2) \ 53 53 ({ \ 54 54 type_t input = __val1, input2 = __val2, output = __val2, ex_output = __val2; \ 55 - uint64_t flags, ex_flags; \ 55 + u64 flags, ex_flags; \ 56 56 \ 57 57 guest_execute_fastop_2("", insn, input, ex_output, ex_flags); \ 58 58 guest_execute_fastop_2(KVM_FEP, insn, input, output, flags); \ 59 59 \ 60 60 __GUEST_ASSERT(output == ex_output, \ 61 61 "Wanted 0x%lx for '%s 0x%lx 0x%lx', got 0x%lx", \ 62 - (uint64_t)ex_output, insn, (uint64_t)input, \ 63 - (uint64_t)input2, (uint64_t)output); \ 62 + (u64)ex_output, insn, (u64)input, \ 63 + (u64)input2, (u64)output); \ 64 64 __GUEST_ASSERT(flags == ex_flags, \ 65 65 "Wanted flags 0x%lx for '%s 0x%lx, 0x%lx', got 0x%lx", \ 66 - ex_flags, insn, (uint64_t)input, (uint64_t)input2, flags); \ 66 + ex_flags, insn, (u64)input, (u64)input2, flags); \ 67 67 }) 68 68 69 69 #define guest_execute_fastop_cl(FEP, insn, __shift, __output, __flags) \ ··· 78 78 ({ \ 79 79 type_t output = __val2, ex_output = __val2, input = __val2; \ 80 80 uint8_t shift = __val1; \ 81 - uint64_t flags, ex_flags; \ 81 + u64 flags, ex_flags; \ 82 82 \ 83 83 guest_execute_fastop_cl("", insn, shift, ex_output, ex_flags); \ 84 84 guest_execute_fastop_cl(KVM_FEP, insn, shift, output, flags); \ 85 85 \ 86 86 __GUEST_ASSERT(output == ex_output, \ 87 87 "Wanted 0x%lx for '%s 0x%x, 0x%lx', got 0x%lx", \ 88 - (uint64_t)ex_output, insn, shift, (uint64_t)input, \ 89 - (uint64_t)output); \ 88 + (u64)ex_output, insn, shift, (u64)input, \ 89 + (u64)output); \ 90 90 __GUEST_ASSERT(flags == ex_flags, \ 91 91 "Wanted flags 0x%lx for '%s 0x%x, 0x%lx', got 0x%lx", \ 92 - ex_flags, insn, shift, (uint64_t)input, flags); \ 92 + ex_flags, insn, shift, (u64)input, flags); \ 93 93 }) 94 94 95 95 #define guest_execute_fastop_div(__KVM_ASM_SAFE, insn, __a, __d, __rm, __flags) \ 96 96 ({ \ 97 - uint64_t ign_error_code; \ 97 + u64 ign_error_code; \ 98 98 uint8_t vector; \ 99 99 \ 100 100 __asm__ __volatile__(fastop(__KVM_ASM_SAFE(insn " %[denom]")) \ ··· 109 109 ({ \ 110 110 type_t _a = __val1, _d = __val1, rm = __val2; \ 111 111 type_t a = _a, d = _d, ex_a = _a, ex_d = _d; \ 112 - uint64_t flags, ex_flags; \ 112 + u64 flags, ex_flags; \ 113 113 uint8_t v, ex_v; \ 114 114 \ 115 115 ex_v = guest_execute_fastop_div(KVM_ASM_SAFE, insn, ex_a, ex_d, rm, ex_flags); \ ··· 118 118 GUEST_ASSERT_EQ(v, ex_v); \ 119 119 __GUEST_ASSERT(v == ex_v, \ 120 120 "Wanted vector 0x%x for '%s 0x%lx:0x%lx/0x%lx', got 0x%x", \ 121 - ex_v, insn, (uint64_t)_a, (uint64_t)_d, (uint64_t)rm, v); \ 121 + ex_v, insn, (u64)_a, (u64)_d, (u64)rm, v); \ 122 122 __GUEST_ASSERT(a == ex_a && d == ex_d, \ 123 123 "Wanted 0x%lx:0x%lx for '%s 0x%lx:0x%lx/0x%lx', got 0x%lx:0x%lx",\ 124 - (uint64_t)ex_a, (uint64_t)ex_d, insn, (uint64_t)_a, \ 125 - (uint64_t)_d, (uint64_t)rm, (uint64_t)a, (uint64_t)d); \ 124 + (u64)ex_a, (u64)ex_d, insn, (u64)_a, \ 125 + (u64)_d, (u64)rm, (u64)a, (u64)d); \ 126 126 __GUEST_ASSERT(v || ex_v || (flags == ex_flags), \ 127 127 "Wanted flags 0x%lx for '%s 0x%lx:0x%lx/0x%lx', got 0x%lx", \ 128 - ex_flags, insn, (uint64_t)_a, (uint64_t)_d, (uint64_t)rm, flags);\ 128 + ex_flags, insn, (u64)_a, (u64)_d, (u64)rm, flags);\ 129 129 }) 130 130 131 - static const uint64_t vals[] = { 131 + static const u64 vals[] = { 132 132 0, 133 133 1, 134 134 2, ··· 188 188 guest_test_fastops(uint8_t, "b"); 189 189 guest_test_fastops(uint16_t, "w"); 190 190 guest_test_fastops(uint32_t, "l"); 191 - guest_test_fastops(uint64_t, "q"); 191 + guest_test_fastops(u64, "q"); 192 192 193 193 GUEST_DONE(); 194 194 }
+2 -2
tools/testing/selftests/kvm/x86/feature_msrs_test.c
··· 41 41 42 42 static void test_feature_msr(uint32_t msr) 43 43 { 44 - const uint64_t supported_mask = kvm_get_feature_msr(msr); 45 - uint64_t reset_value = is_quirked_msr(msr) ? supported_mask : 0; 44 + const u64 supported_mask = kvm_get_feature_msr(msr); 45 + u64 reset_value = is_quirked_msr(msr) ? supported_mask : 0; 46 46 struct kvm_vcpu *vcpu; 47 47 struct kvm_vm *vm; 48 48
+5 -5
tools/testing/selftests/kvm/x86/fix_hypercall_test.c
··· 30 30 static const uint8_t svm_vmmcall[HYPERCALL_INSN_SIZE] = { 0x0f, 0x01, 0xd9 }; 31 31 32 32 extern uint8_t hypercall_insn[HYPERCALL_INSN_SIZE]; 33 - static uint64_t do_sched_yield(uint8_t apic_id) 33 + static u64 do_sched_yield(uint8_t apic_id) 34 34 { 35 - uint64_t ret; 35 + u64 ret; 36 36 37 37 asm volatile("hypercall_insn:\n\t" 38 38 ".byte 0xcc,0xcc,0xcc\n\t" 39 39 : "=a"(ret) 40 - : "a"((uint64_t)KVM_HC_SCHED_YIELD), "b"((uint64_t)apic_id) 40 + : "a"((u64)KVM_HC_SCHED_YIELD), "b"((u64)apic_id) 41 41 : "memory"); 42 42 43 43 return ret; ··· 47 47 { 48 48 const uint8_t *native_hypercall_insn; 49 49 const uint8_t *other_hypercall_insn; 50 - uint64_t ret; 50 + u64 ret; 51 51 52 52 if (host_cpu_is_intel) { 53 53 native_hypercall_insn = vmx_vmcall; ··· 72 72 * the "right" hypercall. 73 73 */ 74 74 if (quirk_disabled) { 75 - GUEST_ASSERT(ret == (uint64_t)-EFAULT); 75 + GUEST_ASSERT(ret == (u64)-EFAULT); 76 76 GUEST_ASSERT(!memcmp(other_hypercall_insn, hypercall_insn, 77 77 HYPERCALL_INSN_SIZE)); 78 78 } else {
+2 -2
tools/testing/selftests/kvm/x86/flds_emulation.h
··· 12 12 * KVM to emulate the instruction (e.g. by providing an MMIO address) to 13 13 * exercise emulation failures. 14 14 */ 15 - static inline void flds(uint64_t address) 15 + static inline void flds(u64 address) 16 16 { 17 17 __asm__ __volatile__(FLDS_MEM_EAX :: "a"(address)); 18 18 } ··· 22 22 struct kvm_run *run = vcpu->run; 23 23 struct kvm_regs regs; 24 24 uint8_t *insn_bytes; 25 - uint64_t flags; 25 + u64 flags; 26 26 27 27 TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_INTERNAL_ERROR); 28 28
+5 -5
tools/testing/selftests/kvm/x86/hwcr_msr_test.c
··· 10 10 11 11 void test_hwcr_bit(struct kvm_vcpu *vcpu, unsigned int bit) 12 12 { 13 - const uint64_t ignored = BIT_ULL(3) | BIT_ULL(6) | BIT_ULL(8); 14 - const uint64_t valid = BIT_ULL(18) | BIT_ULL(24); 15 - const uint64_t legal = ignored | valid; 16 - uint64_t val = BIT_ULL(bit); 17 - uint64_t actual; 13 + const u64 ignored = BIT_ULL(3) | BIT_ULL(6) | BIT_ULL(8); 14 + const u64 valid = BIT_ULL(18) | BIT_ULL(24); 15 + const u64 legal = ignored | valid; 16 + u64 val = BIT_ULL(bit); 17 + u64 actual; 18 18 int r; 19 19 20 20 r = _vcpu_set_msr(vcpu, MSR_K7_HWCR, val);
+4 -4
tools/testing/selftests/kvm/x86/hyperv_extended_hypercalls.c
··· 18 18 static void guest_code(gpa_t in_pg_gpa, gpa_t out_pg_gpa, 19 19 gva_t out_pg_gva) 20 20 { 21 - uint64_t *output_gva; 21 + u64 *output_gva; 22 22 23 23 wrmsr(HV_X64_MSR_GUEST_OS_ID, HYPERV_LINUX_OS_ID); 24 24 wrmsr(HV_X64_MSR_HYPERCALL, in_pg_gpa); 25 25 26 - output_gva = (uint64_t *)out_pg_gva; 26 + output_gva = (u64 *)out_pg_gva; 27 27 28 28 hyperv_hypercall(HV_EXT_CALL_QUERY_CAPABILITIES, in_pg_gpa, out_pg_gpa); 29 29 30 - /* TLFS states output will be a uint64_t value */ 30 + /* TLFS states output will be a u64 value */ 31 31 GUEST_ASSERT_EQ(*output_gva, EXT_CAPABILITIES); 32 32 33 33 GUEST_DONE(); ··· 40 40 struct kvm_vcpu *vcpu; 41 41 struct kvm_run *run; 42 42 struct kvm_vm *vm; 43 - uint64_t *outval; 43 + u64 *outval; 44 44 struct ucall uc; 45 45 46 46 TEST_REQUIRE(kvm_has_cap(KVM_CAP_HYPERV_CPUID));
+3 -3
tools/testing/selftests/kvm/x86/hyperv_features.c
··· 29 29 }; 30 30 31 31 struct hcall_data { 32 - uint64_t control; 33 - uint64_t expect; 32 + u64 control; 33 + u64 expect; 34 34 bool ud_expected; 35 35 }; 36 36 ··· 42 42 static void guest_msr(struct msr_data *msr) 43 43 { 44 44 uint8_t vector = 0; 45 - uint64_t msr_val = 0; 45 + u64 msr_val = 0; 46 46 47 47 GUEST_ASSERT(msr->idx); 48 48
+1 -1
tools/testing/selftests/kvm/x86/hyperv_ipi.c
··· 18 18 19 19 #define IPI_VECTOR 0xfe 20 20 21 - static volatile uint64_t ipis_rcvd[RECEIVER_VCPU_ID_2 + 1]; 21 + static volatile u64 ipis_rcvd[RECEIVER_VCPU_ID_2 + 1]; 22 22 23 23 struct hv_vpset { 24 24 u64 format;
+4 -4
tools/testing/selftests/kvm/x86/hyperv_tlb_flush.c
··· 135 135 */ 136 136 static void swap_two_test_pages(gpa_t pte_gva1, gpa_t pte_gva2) 137 137 { 138 - uint64_t tmp = *(uint64_t *)pte_gva1; 138 + u64 tmp = *(u64 *)pte_gva1; 139 139 140 - *(uint64_t *)pte_gva1 = *(uint64_t *)pte_gva2; 141 - *(uint64_t *)pte_gva2 = tmp; 140 + *(u64 *)pte_gva1 = *(u64 *)pte_gva2; 141 + *(u64 *)pte_gva2 = tmp; 142 142 } 143 143 144 144 /* ··· 583 583 pthread_t threads[2]; 584 584 gva_t test_data_page, gva; 585 585 gpa_t gpa; 586 - uint64_t *pte; 586 + u64 *pte; 587 587 struct test_data *data; 588 588 struct ucall uc; 589 589 int stage = 1, r, i;
+2 -2
tools/testing/selftests/kvm/x86/kvm_clock_test.c
··· 17 17 #include "processor.h" 18 18 19 19 struct test_case { 20 - uint64_t kvmclock_base; 20 + u64 kvmclock_base; 21 21 int64_t realtime_offset; 22 22 }; 23 23 ··· 52 52 static void handle_sync(struct ucall *uc, struct kvm_clock_data *start, 53 53 struct kvm_clock_data *end) 54 54 { 55 - uint64_t obs, exp_lo, exp_hi; 55 + u64 obs, exp_lo, exp_hi; 56 56 57 57 obs = uc->args[2]; 58 58 exp_lo = start->clock;
+3 -3
tools/testing/selftests/kvm/x86/kvm_pv_test.c
··· 40 40 41 41 static void test_msr(struct msr_data *msr) 42 42 { 43 - uint64_t ignored; 43 + u64 ignored; 44 44 uint8_t vector; 45 45 46 46 PR_MSR(msr); ··· 53 53 } 54 54 55 55 struct hcall_data { 56 - uint64_t nr; 56 + u64 nr; 57 57 const char *name; 58 58 }; 59 59 ··· 73 73 74 74 static void test_hcall(struct hcall_data *hc) 75 75 { 76 - uint64_t r; 76 + u64 r; 77 77 78 78 PR_HCALL(hc); 79 79 r = kvm_hypercall(hc->nr, 0, 0, 0, 0);
+1 -1
tools/testing/selftests/kvm/x86/monitor_mwait_test.c
··· 67 67 68 68 int main(int argc, char *argv[]) 69 69 { 70 - uint64_t disabled_quirks; 70 + u64 disabled_quirks; 71 71 struct kvm_vcpu *vcpu; 72 72 struct kvm_vm *vm; 73 73 struct ucall uc;
+2 -2
tools/testing/selftests/kvm/x86/nested_set_state_test.c
··· 250 250 251 251 static void vcpu_efer_enable_svm(struct kvm_vcpu *vcpu) 252 252 { 253 - uint64_t old_efer = vcpu_get_msr(vcpu, MSR_EFER); 253 + u64 old_efer = vcpu_get_msr(vcpu, MSR_EFER); 254 254 255 255 vcpu_set_msr(vcpu, MSR_EFER, old_efer | EFER_SVME); 256 256 } 257 257 258 258 static void vcpu_efer_disable_svm(struct kvm_vcpu *vcpu) 259 259 { 260 - uint64_t old_efer = vcpu_get_msr(vcpu, MSR_EFER); 260 + u64 old_efer = vcpu_get_msr(vcpu, MSR_EFER); 261 261 262 262 vcpu_set_msr(vcpu, MSR_EFER, old_efer & ~EFER_SVME); 263 263 }
+1 -1
tools/testing/selftests/kvm/x86/nested_tsc_adjust_test.c
··· 64 64 65 65 static void l2_guest_code(void) 66 66 { 67 - uint64_t l1_tsc = rdtsc() - TSC_OFFSET_VALUE; 67 + u64 l1_tsc = rdtsc() - TSC_OFFSET_VALUE; 68 68 69 69 wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); 70 70 check_ia32_tsc_adjust(-2 * TSC_ADJUST_VALUE);
+10 -10
tools/testing/selftests/kvm/x86/nested_tsc_scaling_test.c
··· 19 19 /* L2 is scaled up (from L1's perspective) by this factor */ 20 20 #define L2_SCALE_FACTOR 4ULL 21 21 22 - #define TSC_OFFSET_L2 ((uint64_t) -33125236320908) 22 + #define TSC_OFFSET_L2 ((u64)-33125236320908) 23 23 #define TSC_MULTIPLIER_L2 (L2_SCALE_FACTOR << 48) 24 24 25 25 #define L2_GUEST_STACK_SIZE 64 ··· 35 35 * measurements, a difference of 1% between the actual and the expected value 36 36 * is tolerated. 37 37 */ 38 - static void compare_tsc_freq(uint64_t actual, uint64_t expected) 38 + static void compare_tsc_freq(u64 actual, u64 expected) 39 39 { 40 - uint64_t tolerance, thresh_low, thresh_high; 40 + u64 tolerance, thresh_low, thresh_high; 41 41 42 42 tolerance = expected / 100; 43 43 thresh_low = expected - tolerance; ··· 55 55 56 56 static void check_tsc_freq(int level) 57 57 { 58 - uint64_t tsc_start, tsc_end, tsc_freq; 58 + u64 tsc_start, tsc_end, tsc_freq; 59 59 60 60 /* 61 61 * Reading the TSC twice with about a second's difference should give ··· 154 154 struct kvm_vm *vm; 155 155 gva_t guest_gva = 0; 156 156 157 - uint64_t tsc_start, tsc_end; 158 - uint64_t tsc_khz; 159 - uint64_t l1_scale_factor; 160 - uint64_t l0_tsc_freq = 0; 161 - uint64_t l1_tsc_freq = 0; 162 - uint64_t l2_tsc_freq = 0; 157 + u64 tsc_start, tsc_end; 158 + u64 tsc_khz; 159 + u64 l1_scale_factor; 160 + u64 l0_tsc_freq = 0; 161 + u64 l1_tsc_freq = 0; 162 + u64 l2_tsc_freq = 0; 163 163 164 164 TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX) || 165 165 kvm_cpu_has(X86_FEATURE_SVM));
+9 -9
tools/testing/selftests/kvm/x86/nx_huge_pages_test.c
··· 32 32 #define RETURN_OPCODE 0xC3 33 33 34 34 /* Call the specified memory address. */ 35 - static void guest_do_CALL(uint64_t target) 35 + static void guest_do_CALL(u64 target) 36 36 { 37 37 ((void (*)(void)) target)(); 38 38 } ··· 46 46 */ 47 47 void guest_code(void) 48 48 { 49 - uint64_t hpage_1 = HPAGE_GVA; 50 - uint64_t hpage_2 = hpage_1 + (PAGE_SIZE * 512); 51 - uint64_t hpage_3 = hpage_2 + (PAGE_SIZE * 512); 49 + u64 hpage_1 = HPAGE_GVA; 50 + u64 hpage_2 = hpage_1 + (PAGE_SIZE * 512); 51 + u64 hpage_3 = hpage_2 + (PAGE_SIZE * 512); 52 52 53 - READ_ONCE(*(uint64_t *)hpage_1); 53 + READ_ONCE(*(u64 *)hpage_1); 54 54 GUEST_SYNC(1); 55 55 56 - READ_ONCE(*(uint64_t *)hpage_2); 56 + READ_ONCE(*(u64 *)hpage_2); 57 57 GUEST_SYNC(2); 58 58 59 59 guest_do_CALL(hpage_1); ··· 62 62 guest_do_CALL(hpage_3); 63 63 GUEST_SYNC(4); 64 64 65 - READ_ONCE(*(uint64_t *)hpage_1); 65 + READ_ONCE(*(u64 *)hpage_1); 66 66 GUEST_SYNC(5); 67 67 68 - READ_ONCE(*(uint64_t *)hpage_3); 68 + READ_ONCE(*(u64 *)hpage_3); 69 69 GUEST_SYNC(6); 70 70 } 71 71 ··· 107 107 { 108 108 struct kvm_vcpu *vcpu; 109 109 struct kvm_vm *vm; 110 - uint64_t nr_bytes; 110 + u64 nr_bytes; 111 111 void *hva; 112 112 int r; 113 113
+2 -2
tools/testing/selftests/kvm/x86/platform_info_test.c
··· 23 23 24 24 static void guest_code(void) 25 25 { 26 - uint64_t msr_platform_info; 26 + u64 msr_platform_info; 27 27 uint8_t vector; 28 28 29 29 GUEST_SYNC(true); ··· 42 42 { 43 43 struct kvm_vcpu *vcpu; 44 44 struct kvm_vm *vm; 45 - uint64_t msr_platform_info; 45 + u64 msr_platform_info; 46 46 struct ucall uc; 47 47 48 48 TEST_REQUIRE(kvm_has_cap(KVM_CAP_MSR_PLATFORM_INFO));
+16 -16
tools/testing/selftests/kvm/x86/pmu_counters_test.c
··· 90 90 static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, 91 91 void *guest_code, 92 92 uint8_t pmu_version, 93 - uint64_t perf_capabilities) 93 + u64 perf_capabilities) 94 94 { 95 95 struct kvm_vm *vm; 96 96 ··· 155 155 */ 156 156 static void guest_assert_event_count(uint8_t idx, uint32_t pmc, uint32_t pmc_msr) 157 157 { 158 - uint64_t count; 158 + u64 count; 159 159 160 160 count = _rdpmc(pmc); 161 161 if (!(hardware_pmu_arch_events & BIT(idx))) ··· 256 256 } while (0) 257 257 258 258 static void __guest_test_arch_event(uint8_t idx, uint32_t pmc, uint32_t pmc_msr, 259 - uint32_t ctrl_msr, uint64_t ctrl_msr_value) 259 + uint32_t ctrl_msr, u64 ctrl_msr_value) 260 260 { 261 261 GUEST_TEST_EVENT(idx, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, ""); 262 262 ··· 289 289 GUEST_ASSERT(nr_gp_counters); 290 290 291 291 for (i = 0; i < nr_gp_counters; i++) { 292 - uint64_t eventsel = ARCH_PERFMON_EVENTSEL_OS | 292 + u64 eventsel = ARCH_PERFMON_EVENTSEL_OS | 293 293 ARCH_PERFMON_EVENTSEL_ENABLE | 294 294 intel_pmu_arch_events[idx]; 295 295 ··· 328 328 GUEST_DONE(); 329 329 } 330 330 331 - static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities, 331 + static void test_arch_events(uint8_t pmu_version, u64 perf_capabilities, 332 332 uint8_t length, uint32_t unavailable_mask) 333 333 { 334 334 struct kvm_vcpu *vcpu; ··· 374 374 msr, expected, val); 375 375 376 376 static void guest_test_rdpmc(uint32_t rdpmc_idx, bool expect_success, 377 - uint64_t expected_val) 377 + u64 expected_val) 378 378 { 379 379 uint8_t vector; 380 - uint64_t val; 380 + u64 val; 381 381 382 382 vector = rdpmc_safe(rdpmc_idx, &val); 383 383 GUEST_ASSERT_PMC_MSR_ACCESS(RDPMC, rdpmc_idx, !expect_success, vector); ··· 404 404 * TODO: Test a value that validates full-width writes and the 405 405 * width of the counters. 406 406 */ 407 - const uint64_t test_val = 0xffff; 407 + const u64 test_val = 0xffff; 408 408 const uint32_t msr = base_msr + i; 409 409 410 410 /* ··· 418 418 * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are 419 419 * unsupported, i.e. doesn't #GP and reads back '0'. 420 420 */ 421 - const uint64_t expected_val = expect_success ? test_val : 0; 421 + const u64 expected_val = expect_success ? test_val : 0; 422 422 const bool expect_gp = !expect_success && msr != MSR_P6_PERFCTR0 && 423 423 msr != MSR_P6_PERFCTR1; 424 424 uint32_t rdpmc_idx; 425 425 uint8_t vector; 426 - uint64_t val; 426 + u64 val; 427 427 428 428 vector = wrmsr_safe(msr, test_val); 429 429 GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); ··· 477 477 * counters, of which there are none. 478 478 */ 479 479 if (pmu_version > 1) { 480 - uint64_t global_ctrl = rdmsr(MSR_CORE_PERF_GLOBAL_CTRL); 480 + u64 global_ctrl = rdmsr(MSR_CORE_PERF_GLOBAL_CTRL); 481 481 482 482 if (nr_gp_counters) 483 483 GUEST_ASSERT_EQ(global_ctrl, GENMASK_ULL(nr_gp_counters - 1, 0)); ··· 495 495 GUEST_DONE(); 496 496 } 497 497 498 - static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabilities, 498 + static void test_gp_counters(uint8_t pmu_version, u64 perf_capabilities, 499 499 uint8_t nr_gp_counters) 500 500 { 501 501 struct kvm_vcpu *vcpu; ··· 514 514 515 515 static void guest_test_fixed_counters(void) 516 516 { 517 - uint64_t supported_bitmask = 0; 517 + u64 supported_bitmask = 0; 518 518 uint8_t nr_fixed_counters = 0; 519 519 uint8_t i; 520 520 ··· 534 534 535 535 for (i = 0; i < MAX_NR_FIXED_COUNTERS; i++) { 536 536 uint8_t vector; 537 - uint64_t val; 537 + u64 val; 538 538 539 539 if (i >= nr_fixed_counters && !(supported_bitmask & BIT_ULL(i))) { 540 540 vector = wrmsr_safe(MSR_CORE_PERF_FIXED_CTR_CTRL, ··· 561 561 GUEST_DONE(); 562 562 } 563 563 564 - static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabilities, 564 + static void test_fixed_counters(uint8_t pmu_version, u64 perf_capabilities, 565 565 uint8_t nr_fixed_counters, 566 566 uint32_t supported_bitmask) 567 567 { ··· 590 590 uint8_t v, j; 591 591 uint32_t k; 592 592 593 - const uint64_t perf_caps[] = { 593 + const u64 perf_caps[] = { 594 594 0, 595 595 PMU_CAP_FW_WRITES, 596 596 };
+39 -39
tools/testing/selftests/kvm/x86/pmu_event_filter_test.c
··· 53 53 }; 54 54 55 55 struct { 56 - uint64_t loads; 57 - uint64_t stores; 58 - uint64_t loads_stores; 59 - uint64_t branches_retired; 60 - uint64_t instructions_retired; 56 + u64 loads; 57 + u64 stores; 58 + u64 loads_stores; 59 + u64 branches_retired; 60 + u64 instructions_retired; 61 61 } pmc_results; 62 62 63 63 /* ··· 75 75 * 76 76 * Return on success. GUEST_SYNC(0) on error. 77 77 */ 78 - static void check_msr(uint32_t msr, uint64_t bits_to_flip) 78 + static void check_msr(uint32_t msr, u64 bits_to_flip) 79 79 { 80 - uint64_t v = rdmsr(msr) ^ bits_to_flip; 80 + u64 v = rdmsr(msr) ^ bits_to_flip; 81 81 82 82 wrmsr(msr, v); 83 83 if (rdmsr(msr) != v) ··· 91 91 92 92 static void run_and_measure_loop(uint32_t msr_base) 93 93 { 94 - const uint64_t branches_retired = rdmsr(msr_base + 0); 95 - const uint64_t insn_retired = rdmsr(msr_base + 1); 94 + const u64 branches_retired = rdmsr(msr_base + 0); 95 + const u64 insn_retired = rdmsr(msr_base + 1); 96 96 97 97 __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); 98 98 ··· 147 147 * Run the VM to the next GUEST_SYNC(value), and return the value passed 148 148 * to the sync. Any other exit from the guest is fatal. 149 149 */ 150 - static uint64_t run_vcpu_to_sync(struct kvm_vcpu *vcpu) 150 + static u64 run_vcpu_to_sync(struct kvm_vcpu *vcpu) 151 151 { 152 152 struct ucall uc; 153 153 ··· 161 161 162 162 static void run_vcpu_and_sync_pmc_results(struct kvm_vcpu *vcpu) 163 163 { 164 - uint64_t r; 164 + u64 r; 165 165 166 166 memset(&pmc_results, 0, sizeof(pmc_results)); 167 167 sync_global_to_guest(vcpu->vm, pmc_results); ··· 182 182 */ 183 183 static bool sanity_check_pmu(struct kvm_vcpu *vcpu) 184 184 { 185 - uint64_t r; 185 + u64 r; 186 186 187 187 vm_install_exception_handler(vcpu->vm, GP_VECTOR, guest_gp_handler); 188 188 r = run_vcpu_to_sync(vcpu); ··· 195 195 * Remove the first occurrence of 'event' (if any) from the filter's 196 196 * event list. 197 197 */ 198 - static void remove_event(struct __kvm_pmu_event_filter *f, uint64_t event) 198 + static void remove_event(struct __kvm_pmu_event_filter *f, u64 event) 199 199 { 200 200 bool found = false; 201 201 int i; ··· 212 212 213 213 #define ASSERT_PMC_COUNTING_INSTRUCTIONS() \ 214 214 do { \ 215 - uint64_t br = pmc_results.branches_retired; \ 216 - uint64_t ir = pmc_results.instructions_retired; \ 215 + u64 br = pmc_results.branches_retired; \ 216 + u64 ir = pmc_results.instructions_retired; \ 217 217 bool br_matched = this_pmu_has_errata(BRANCHES_RETIRED_OVERCOUNT) ? \ 218 218 br >= NUM_BRANCHES : br == NUM_BRANCHES; \ 219 219 \ ··· 228 228 229 229 #define ASSERT_PMC_NOT_COUNTING_INSTRUCTIONS() \ 230 230 do { \ 231 - uint64_t br = pmc_results.branches_retired; \ 232 - uint64_t ir = pmc_results.instructions_retired; \ 231 + u64 br = pmc_results.branches_retired; \ 232 + u64 ir = pmc_results.instructions_retired; \ 233 233 \ 234 234 TEST_ASSERT(!br, "%s: Branch instructions retired = %lu (expected 0)", \ 235 235 __func__, br); \ ··· 421 421 * The actual value of the counters don't determine the outcome of 422 422 * the test. Only that they are zero or non-zero. 423 423 */ 424 - const uint64_t loads = rdmsr(msr_base + 0); 425 - const uint64_t stores = rdmsr(msr_base + 1); 426 - const uint64_t loads_stores = rdmsr(msr_base + 2); 424 + const u64 loads = rdmsr(msr_base + 0); 425 + const u64 stores = rdmsr(msr_base + 1); 426 + const u64 loads_stores = rdmsr(msr_base + 2); 427 427 int val; 428 428 429 429 ··· 476 476 } 477 477 478 478 static void run_masked_events_test(struct kvm_vcpu *vcpu, 479 - const uint64_t masked_events[], 479 + const u64 masked_events[], 480 480 const int nmasked_events) 481 481 { 482 482 struct __kvm_pmu_event_filter f = { ··· 485 485 .flags = KVM_PMU_EVENT_FLAG_MASKED_EVENTS, 486 486 }; 487 487 488 - memcpy(f.events, masked_events, sizeof(uint64_t) * nmasked_events); 488 + memcpy(f.events, masked_events, sizeof(u64) * nmasked_events); 489 489 test_with_filter(vcpu, &f); 490 490 } 491 491 ··· 494 494 #define ALLOW_LOADS_STORES BIT(2) 495 495 496 496 struct masked_events_test { 497 - uint64_t intel_events[MAX_TEST_EVENTS]; 498 - uint64_t intel_event_end; 499 - uint64_t amd_events[MAX_TEST_EVENTS]; 500 - uint64_t amd_event_end; 497 + u64 intel_events[MAX_TEST_EVENTS]; 498 + u64 intel_event_end; 499 + u64 amd_events[MAX_TEST_EVENTS]; 500 + u64 amd_event_end; 501 501 const char *msg; 502 502 uint32_t flags; 503 503 }; ··· 582 582 }; 583 583 584 584 static int append_test_events(const struct masked_events_test *test, 585 - uint64_t *events, int nevents) 585 + u64 *events, int nevents) 586 586 { 587 - const uint64_t *evts; 587 + const u64 *evts; 588 588 int i; 589 589 590 590 evts = use_intel_pmu() ? test->intel_events : test->amd_events; ··· 603 603 return a == b; 604 604 } 605 605 606 - static void run_masked_events_tests(struct kvm_vcpu *vcpu, uint64_t *events, 606 + static void run_masked_events_tests(struct kvm_vcpu *vcpu, u64 *events, 607 607 int nevents) 608 608 { 609 609 int ntests = ARRAY_SIZE(test_cases); ··· 630 630 } 631 631 } 632 632 633 - static void add_dummy_events(uint64_t *events, int nevents) 633 + static void add_dummy_events(u64 *events, int nevents) 634 634 { 635 635 int i; 636 636 ··· 650 650 static void test_masked_events(struct kvm_vcpu *vcpu) 651 651 { 652 652 int nevents = KVM_PMU_EVENT_FILTER_MAX_EVENTS - MAX_TEST_EVENTS; 653 - uint64_t events[KVM_PMU_EVENT_FILTER_MAX_EVENTS]; 653 + u64 events[KVM_PMU_EVENT_FILTER_MAX_EVENTS]; 654 654 655 655 /* Run the test cases against a sparse PMU event filter. */ 656 656 run_masked_events_tests(vcpu, events, 0); ··· 668 668 return __vm_ioctl(vcpu->vm, KVM_SET_PMU_EVENT_FILTER, f); 669 669 } 670 670 671 - static int set_pmu_single_event_filter(struct kvm_vcpu *vcpu, uint64_t event, 671 + static int set_pmu_single_event_filter(struct kvm_vcpu *vcpu, u64 event, 672 672 uint32_t flags, uint32_t action) 673 673 { 674 674 struct __kvm_pmu_event_filter f = { ··· 687 687 { 688 688 uint8_t nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); 689 689 struct __kvm_pmu_event_filter f; 690 - uint64_t e = ~0ul; 690 + u64 e = ~0ul; 691 691 int r; 692 692 693 693 /* ··· 745 745 } 746 746 } 747 747 748 - static uint64_t test_with_fixed_counter_filter(struct kvm_vcpu *vcpu, 749 - uint32_t action, uint32_t bitmap) 748 + static u64 test_with_fixed_counter_filter(struct kvm_vcpu *vcpu, 749 + uint32_t action, uint32_t bitmap) 750 750 { 751 751 struct __kvm_pmu_event_filter f = { 752 752 .action = action, ··· 757 757 return run_vcpu_to_sync(vcpu); 758 758 } 759 759 760 - static uint64_t test_set_gp_and_fixed_event_filter(struct kvm_vcpu *vcpu, 761 - uint32_t action, 762 - uint32_t bitmap) 760 + static u64 test_set_gp_and_fixed_event_filter(struct kvm_vcpu *vcpu, 761 + uint32_t action, 762 + uint32_t bitmap) 763 763 { 764 764 struct __kvm_pmu_event_filter f = base_event_filter; 765 765 ··· 775 775 { 776 776 unsigned int i; 777 777 uint32_t bitmap; 778 - uint64_t count; 778 + u64 count; 779 779 780 780 TEST_ASSERT(nr_fixed_counters < sizeof(bitmap) * 8, 781 781 "Invalid nr_fixed_counters");
+25 -25
tools/testing/selftests/kvm/x86/private_mem_conversions_test.c
··· 23 23 #include <processor.h> 24 24 25 25 #define BASE_DATA_SLOT 10 26 - #define BASE_DATA_GPA ((uint64_t)(1ull << 32)) 27 - #define PER_CPU_DATA_SIZE ((uint64_t)(SZ_2M + PAGE_SIZE)) 26 + #define BASE_DATA_GPA ((u64)(1ull << 32)) 27 + #define PER_CPU_DATA_SIZE ((u64)(SZ_2M + PAGE_SIZE)) 28 28 29 29 /* Horrific macro so that the line info is captured accurately :-( */ 30 30 #define memcmp_g(gpa, pattern, size) \ ··· 38 38 pattern, i, gpa + i, mem[i]); \ 39 39 } while (0) 40 40 41 - static void memcmp_h(uint8_t *mem, uint64_t gpa, uint8_t pattern, size_t size) 41 + static void memcmp_h(uint8_t *mem, u64 gpa, uint8_t pattern, size_t size) 42 42 { 43 43 size_t i; 44 44 ··· 70 70 SYNC_PRIVATE, 71 71 }; 72 72 73 - static void guest_sync_shared(uint64_t gpa, uint64_t size, 73 + static void guest_sync_shared(u64 gpa, u64 size, 74 74 uint8_t current_pattern, uint8_t new_pattern) 75 75 { 76 76 GUEST_SYNC5(SYNC_SHARED, gpa, size, current_pattern, new_pattern); 77 77 } 78 78 79 - static void guest_sync_private(uint64_t gpa, uint64_t size, uint8_t pattern) 79 + static void guest_sync_private(u64 gpa, u64 size, uint8_t pattern) 80 80 { 81 81 GUEST_SYNC4(SYNC_PRIVATE, gpa, size, pattern); 82 82 } ··· 86 86 #define MAP_GPA_SHARED BIT(1) 87 87 #define MAP_GPA_DO_FALLOCATE BIT(2) 88 88 89 - static void guest_map_mem(uint64_t gpa, uint64_t size, bool map_shared, 89 + static void guest_map_mem(u64 gpa, u64 size, bool map_shared, 90 90 bool do_fallocate) 91 91 { 92 - uint64_t flags = MAP_GPA_SET_ATTRIBUTES; 92 + u64 flags = MAP_GPA_SET_ATTRIBUTES; 93 93 94 94 if (map_shared) 95 95 flags |= MAP_GPA_SHARED; ··· 98 98 kvm_hypercall_map_gpa_range(gpa, size, flags); 99 99 } 100 100 101 - static void guest_map_shared(uint64_t gpa, uint64_t size, bool do_fallocate) 101 + static void guest_map_shared(u64 gpa, u64 size, bool do_fallocate) 102 102 { 103 103 guest_map_mem(gpa, size, true, do_fallocate); 104 104 } 105 105 106 - static void guest_map_private(uint64_t gpa, uint64_t size, bool do_fallocate) 106 + static void guest_map_private(u64 gpa, u64 size, bool do_fallocate) 107 107 { 108 108 guest_map_mem(gpa, size, false, do_fallocate); 109 109 } 110 110 111 111 struct { 112 - uint64_t offset; 113 - uint64_t size; 112 + u64 offset; 113 + u64 size; 114 114 } static const test_ranges[] = { 115 115 GUEST_STAGE(0, PAGE_SIZE), 116 116 GUEST_STAGE(0, SZ_2M), ··· 119 119 GUEST_STAGE(SZ_2M, PAGE_SIZE), 120 120 }; 121 121 122 - static void guest_test_explicit_conversion(uint64_t base_gpa, bool do_fallocate) 122 + static void guest_test_explicit_conversion(u64 base_gpa, bool do_fallocate) 123 123 { 124 124 const uint8_t def_p = 0xaa; 125 125 const uint8_t init_p = 0xcc; 126 - uint64_t j; 126 + u64 j; 127 127 int i; 128 128 129 129 /* Memory should be shared by default. */ ··· 134 134 memcmp_g(base_gpa, init_p, PER_CPU_DATA_SIZE); 135 135 136 136 for (i = 0; i < ARRAY_SIZE(test_ranges); i++) { 137 - uint64_t gpa = base_gpa + test_ranges[i].offset; 138 - uint64_t size = test_ranges[i].size; 137 + u64 gpa = base_gpa + test_ranges[i].offset; 138 + u64 size = test_ranges[i].size; 139 139 uint8_t p1 = 0x11; 140 140 uint8_t p2 = 0x22; 141 141 uint8_t p3 = 0x33; ··· 214 214 } 215 215 } 216 216 217 - static void guest_punch_hole(uint64_t gpa, uint64_t size) 217 + static void guest_punch_hole(u64 gpa, u64 size) 218 218 { 219 219 /* "Mapping" memory shared via fallocate() is done via PUNCH_HOLE. */ 220 - uint64_t flags = MAP_GPA_SHARED | MAP_GPA_DO_FALLOCATE; 220 + u64 flags = MAP_GPA_SHARED | MAP_GPA_DO_FALLOCATE; 221 221 222 222 kvm_hypercall_map_gpa_range(gpa, size, flags); 223 223 } ··· 227 227 * proper conversion. Freeing (PUNCH_HOLE) should zap SPTEs, and reallocating 228 228 * (subsequent fault) should zero memory. 229 229 */ 230 - static void guest_test_punch_hole(uint64_t base_gpa, bool precise) 230 + static void guest_test_punch_hole(u64 base_gpa, bool precise) 231 231 { 232 232 const uint8_t init_p = 0xcc; 233 233 int i; ··· 239 239 guest_map_private(base_gpa, PER_CPU_DATA_SIZE, false); 240 240 241 241 for (i = 0; i < ARRAY_SIZE(test_ranges); i++) { 242 - uint64_t gpa = base_gpa + test_ranges[i].offset; 243 - uint64_t size = test_ranges[i].size; 242 + u64 gpa = base_gpa + test_ranges[i].offset; 243 + u64 size = test_ranges[i].size; 244 244 245 245 /* 246 246 * Free all memory before each iteration, even for the !precise ··· 268 268 } 269 269 } 270 270 271 - static void guest_code(uint64_t base_gpa) 271 + static void guest_code(u64 base_gpa) 272 272 { 273 273 /* 274 274 * Run the conversion test twice, with and without doing fallocate() on ··· 289 289 static void handle_exit_hypercall(struct kvm_vcpu *vcpu) 290 290 { 291 291 struct kvm_run *run = vcpu->run; 292 - uint64_t gpa = run->hypercall.args[0]; 293 - uint64_t size = run->hypercall.args[1] * PAGE_SIZE; 292 + u64 gpa = run->hypercall.args[0]; 293 + u64 size = run->hypercall.args[1] * PAGE_SIZE; 294 294 bool set_attributes = run->hypercall.args[2] & MAP_GPA_SET_ATTRIBUTES; 295 295 bool map_shared = run->hypercall.args[2] & MAP_GPA_SHARED; 296 296 bool do_fallocate = run->hypercall.args[2] & MAP_GPA_DO_FALLOCATE; ··· 337 337 case UCALL_ABORT: 338 338 REPORT_GUEST_ASSERT(uc); 339 339 case UCALL_SYNC: { 340 - uint64_t gpa = uc.args[1]; 340 + u64 gpa = uc.args[1]; 341 341 size_t size = uc.args[2]; 342 342 size_t i; 343 343 ··· 402 402 KVM_MEM_GUEST_MEMFD, memfd, slot_size * i); 403 403 404 404 for (i = 0; i < nr_vcpus; i++) { 405 - uint64_t gpa = BASE_DATA_GPA + i * per_cpu_size; 405 + u64 gpa = BASE_DATA_GPA + i * per_cpu_size; 406 406 407 407 vcpu_args_set(vcpus[i], 1, gpa); 408 408
+4 -4
tools/testing/selftests/kvm/x86/private_mem_kvm_exits_test.c
··· 17 17 #define EXITS_TEST_SIZE (EXITS_TEST_NPAGES * PAGE_SIZE) 18 18 #define EXITS_TEST_SLOT 10 19 19 20 - static uint64_t guest_repeatedly_read(void) 20 + static u64 guest_repeatedly_read(void) 21 21 { 22 - volatile uint64_t value; 22 + volatile u64 value; 23 23 24 24 while (true) 25 - value = *((uint64_t *) EXITS_TEST_GVA); 25 + value = *((u64 *)EXITS_TEST_GVA); 26 26 27 27 return value; 28 28 } ··· 72 72 vm_mem_region_delete(vm, EXITS_TEST_SLOT); 73 73 74 74 pthread_join(vm_thread, &thread_return); 75 - exit_reason = (uint32_t)(uint64_t)thread_return; 75 + exit_reason = (uint32_t)(u64)thread_return; 76 76 77 77 TEST_ASSERT_EQ(exit_reason, KVM_EXIT_MEMORY_FAULT); 78 78 TEST_ASSERT_EQ(vcpu->run->memory_fault.flags, KVM_MEMORY_EXIT_FLAG_PRIVATE);
+3 -3
tools/testing/selftests/kvm/x86/set_sregs_test.c
··· 46 46 X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \ 47 47 X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) 48 48 49 - static uint64_t calc_supported_cr4_feature_bits(void) 49 + static u64 calc_supported_cr4_feature_bits(void) 50 50 { 51 - uint64_t cr4 = KVM_ALWAYS_ALLOWED_CR4; 51 + u64 cr4 = KVM_ALWAYS_ALLOWED_CR4; 52 52 53 53 if (kvm_cpu_has(X86_FEATURE_UMIP)) 54 54 cr4 |= X86_CR4_UMIP; ··· 74 74 return cr4; 75 75 } 76 76 77 - static void test_cr_bits(struct kvm_vcpu *vcpu, uint64_t cr4) 77 + static void test_cr_bits(struct kvm_vcpu *vcpu, u64 cr4) 78 78 { 79 79 struct kvm_sregs sregs; 80 80 int rc, i;
+2 -2
tools/testing/selftests/kvm/x86/sev_init2_tests.c
··· 34 34 { 35 35 struct kvm_sev_cmd cmd = { 36 36 .id = cmd_id, 37 - .data = (uint64_t)data, 37 + .data = (u64)data, 38 38 .sev_fd = open_sev_dev_path_or_exit(), 39 39 }; 40 40 int ret; ··· 104 104 "invalid flag"); 105 105 } 106 106 107 - void test_features(uint32_t vm_type, uint64_t supported_features) 107 + void test_features(uint32_t vm_type, u64 supported_features) 108 108 { 109 109 int i; 110 110
+7 -7
tools/testing/selftests/kvm/x86/sev_smoke_test.c
··· 15 15 16 16 static void guest_sev_test_msr(uint32_t msr) 17 17 { 18 - uint64_t val = rdmsr(msr); 18 + u64 val = rdmsr(msr); 19 19 20 20 wrmsr(msr, val); 21 21 GUEST_ASSERT(val == rdmsr(msr)); ··· 23 23 24 24 #define guest_sev_test_reg(reg) \ 25 25 do { \ 26 - uint64_t val = get_##reg(); \ 26 + u64 val = get_##reg(); \ 27 27 \ 28 28 set_##reg(val); \ 29 29 GUEST_ASSERT(val == get_##reg()); \ ··· 42 42 43 43 static void guest_snp_code(void) 44 44 { 45 - uint64_t sev_msr = rdmsr(MSR_AMD64_SEV); 45 + u64 sev_msr = rdmsr(MSR_AMD64_SEV); 46 46 47 47 GUEST_ASSERT(sev_msr & MSR_AMD64_SEV_ENABLED); 48 48 GUEST_ASSERT(sev_msr & MSR_AMD64_SEV_ES_ENABLED); ··· 104 104 abort(); 105 105 } 106 106 107 - static void test_sync_vmsa(uint32_t type, uint64_t policy) 107 + static void test_sync_vmsa(uint32_t type, u64 policy) 108 108 { 109 109 struct kvm_vcpu *vcpu; 110 110 struct kvm_vm *vm; ··· 150 150 kvm_vm_free(vm); 151 151 } 152 152 153 - static void test_sev(void *guest_code, uint32_t type, uint64_t policy) 153 + static void test_sev(void *guest_code, uint32_t type, u64 policy) 154 154 { 155 155 struct kvm_vcpu *vcpu; 156 156 struct kvm_vm *vm; ··· 201 201 __asm__ __volatile__("ud2"); 202 202 } 203 203 204 - static void test_sev_shutdown(uint32_t type, uint64_t policy) 204 + static void test_sev_shutdown(uint32_t type, u64 policy) 205 205 { 206 206 struct kvm_vcpu *vcpu; 207 207 struct kvm_vm *vm; ··· 218 218 kvm_vm_free(vm); 219 219 } 220 220 221 - static void test_sev_smoke(void *guest, uint32_t type, uint64_t policy) 221 + static void test_sev_smoke(void *guest, uint32_t type, u64 policy) 222 222 { 223 223 const u64 xf_mask = XFEATURE_MASK_X87_AVX; 224 224
+4 -4
tools/testing/selftests/kvm/x86/smaller_maxphyaddr_emulation_test.c
··· 20 20 21 21 static void guest_code(bool tdp_enabled) 22 22 { 23 - uint64_t error_code; 24 - uint64_t vector; 23 + u64 error_code; 24 + u64 vector; 25 25 26 26 vector = kvm_asm_safe_ec(FLDS_MEM_EAX, error_code, "a"(MEM_REGION_GVA)); 27 27 ··· 47 47 struct kvm_vcpu *vcpu; 48 48 struct kvm_vm *vm; 49 49 struct ucall uc; 50 - uint64_t *hva; 51 - uint64_t gpa; 50 + u64 *hva; 51 + u64 gpa; 52 52 int rc; 53 53 54 54 TEST_REQUIRE(kvm_has_cap(KVM_CAP_SMALLER_MAXPHYADDR));
+2 -2
tools/testing/selftests/kvm/x86/smm_test.c
··· 40 40 0x0f, 0xaa, /* rsm */ 41 41 }; 42 42 43 - static inline void sync_with_host(uint64_t phase) 43 + static inline void sync_with_host(u64 phase) 44 44 { 45 45 asm volatile("in $" XSTR(SYNC_PORT)", %%al \n" 46 46 : "+a" (phase)); ··· 65 65 { 66 66 #define L2_GUEST_STACK_SIZE 64 67 67 unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE]; 68 - uint64_t apicbase = rdmsr(MSR_IA32_APICBASE); 68 + u64 apicbase = rdmsr(MSR_IA32_APICBASE); 69 69 struct svm_test_data *svm = arg; 70 70 struct vmx_pages *vmx_pages = arg; 71 71
+4 -4
tools/testing/selftests/kvm/x86/state_test.c
··· 144 144 GUEST_SYNC(1); 145 145 146 146 if (this_cpu_has(X86_FEATURE_XSAVE)) { 147 - uint64_t supported_xcr0 = this_cpu_supported_xcr0(); 147 + u64 supported_xcr0 = this_cpu_supported_xcr0(); 148 148 uint8_t buffer[PAGE_SIZE]; 149 149 150 150 memset(buffer, 0xcc, sizeof(buffer)); ··· 172 172 } 173 173 174 174 if (this_cpu_has(X86_FEATURE_MPX)) { 175 - uint64_t bounds[2] = { 10, 0xffffffffull }; 176 - uint64_t output[2] = { }; 175 + u64 bounds[2] = { 10, 0xffffffffull }; 176 + u64 output[2] = { }; 177 177 178 178 GUEST_ASSERT(supported_xcr0 & XFEATURE_MASK_BNDREGS); 179 179 GUEST_ASSERT(supported_xcr0 & XFEATURE_MASK_BNDCSR); ··· 257 257 258 258 int main(int argc, char *argv[]) 259 259 { 260 - uint64_t *xstate_bv, saved_xstate_bv; 260 + u64 *xstate_bv, saved_xstate_bv; 261 261 gva_t nested_gva = 0; 262 262 struct kvm_cpuid2 empty_cpuid = {}; 263 263 struct kvm_regs regs1, regs2;
+2 -2
tools/testing/selftests/kvm/x86/svm_nested_soft_inject_test.c
··· 76 76 ud2(); 77 77 } 78 78 79 - static void l1_guest_code(struct svm_test_data *svm, uint64_t is_nmi, uint64_t idt_alt) 79 + static void l1_guest_code(struct svm_test_data *svm, u64 is_nmi, u64 idt_alt) 80 80 { 81 81 #define L2_GUEST_STACK_SIZE 64 82 82 unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE]; ··· 168 168 } else { 169 169 idt_alt_vm = 0; 170 170 } 171 - vcpu_args_set(vcpu, 3, svm_gva, (uint64_t)is_nmi, (uint64_t)idt_alt_vm); 171 + vcpu_args_set(vcpu, 3, svm_gva, (u64)is_nmi, (u64)idt_alt_vm); 172 172 173 173 memset(&debug, 0, sizeof(debug)); 174 174 vcpu_guest_debug_set(vcpu, &debug);
+1 -1
tools/testing/selftests/kvm/x86/tsc_msrs_test.c
··· 95 95 { 96 96 struct kvm_vcpu *vcpu; 97 97 struct kvm_vm *vm; 98 - uint64_t val; 98 + u64 val; 99 99 100 100 ksft_print_header(); 101 101 ksft_set_plan(5);
+2 -2
tools/testing/selftests/kvm/x86/tsc_scaling_sync.c
··· 21 21 #define TEST_TSC_KHZ 2345678UL 22 22 #define TEST_TSC_OFFSET 200000000 23 23 24 - uint64_t tsc_sync; 24 + u64 tsc_sync; 25 25 static void guest_code(void) 26 26 { 27 - uint64_t start_tsc, local_tsc, tmp; 27 + u64 start_tsc, local_tsc, tmp; 28 28 29 29 start_tsc = rdtsc(); 30 30 do {
+22 -21
tools/testing/selftests/kvm/x86/ucna_injection_test.c
··· 45 45 46 46 #define MCI_CTL2_RESERVED_BIT BIT_ULL(29) 47 47 48 - static uint64_t supported_mcg_caps; 48 + static u64 supported_mcg_caps; 49 49 50 50 /* 51 51 * Record states about the injected UCNA. ··· 53 53 * handler. Variables without the 'i_' prefixes are recorded in guest main 54 54 * execution thread. 55 55 */ 56 - static volatile uint64_t i_ucna_rcvd; 57 - static volatile uint64_t i_ucna_addr; 58 - static volatile uint64_t ucna_addr; 59 - static volatile uint64_t ucna_addr2; 56 + static volatile u64 i_ucna_rcvd; 57 + static volatile u64 i_ucna_addr; 58 + static volatile u64 ucna_addr; 59 + static volatile u64 ucna_addr2; 60 60 61 61 struct thread_params { 62 62 struct kvm_vcpu *vcpu; 63 - uint64_t *p_i_ucna_rcvd; 64 - uint64_t *p_i_ucna_addr; 65 - uint64_t *p_ucna_addr; 66 - uint64_t *p_ucna_addr2; 63 + u64 *p_i_ucna_rcvd; 64 + u64 *p_i_ucna_addr; 65 + u64 *p_ucna_addr; 66 + u64 *p_ucna_addr2; 67 67 }; 68 68 69 69 static void verify_apic_base_addr(void) 70 70 { 71 - uint64_t msr = rdmsr(MSR_IA32_APICBASE); 72 - uint64_t base = GET_APIC_BASE(msr); 71 + u64 msr = rdmsr(MSR_IA32_APICBASE); 72 + u64 base = GET_APIC_BASE(msr); 73 73 74 74 GUEST_ASSERT(base == APIC_DEFAULT_GPA); 75 75 } 76 76 77 77 static void ucna_injection_guest_code(void) 78 78 { 79 - uint64_t ctl2; 79 + u64 ctl2; 80 80 verify_apic_base_addr(); 81 81 xapic_enable(); 82 82 ··· 106 106 107 107 static void cmci_disabled_guest_code(void) 108 108 { 109 - uint64_t ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); 109 + u64 ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); 110 110 wrmsr(MSR_IA32_MCx_CTL2(UCNA_BANK), ctl2 | MCI_CTL2_CMCI_EN); 111 111 112 112 GUEST_DONE(); ··· 114 114 115 115 static void cmci_enabled_guest_code(void) 116 116 { 117 - uint64_t ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); 117 + u64 ctl2 = rdmsr(MSR_IA32_MCx_CTL2(UCNA_BANK)); 118 118 wrmsr(MSR_IA32_MCx_CTL2(UCNA_BANK), ctl2 | MCI_CTL2_RESERVED_BIT); 119 119 120 120 GUEST_DONE(); ··· 145 145 printf("vCPU received GP in guest.\n"); 146 146 } 147 147 148 - static void inject_ucna(struct kvm_vcpu *vcpu, uint64_t addr) { 148 + static void inject_ucna(struct kvm_vcpu *vcpu, u64 addr) 149 + { 149 150 /* 150 151 * A UCNA error is indicated with VAL=1, UC=1, PCC=0, S=0 and AR=0 in 151 152 * the IA32_MCi_STATUS register. 152 153 * MSCOD=1 (BIT[16] - MscodDataRdErr). 153 154 * MCACOD=0x0090 (Memory controller error format, channel 0) 154 155 */ 155 - uint64_t status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN | 156 + u64 status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN | 156 157 MCI_STATUS_MISCV | MCI_STATUS_ADDRV | 0x10090; 157 158 struct kvm_x86_mce mce = {}; 158 159 mce.status = status; ··· 217 216 { 218 217 struct kvm_vm *vm = vcpu->vm; 219 218 params->vcpu = vcpu; 220 - params->p_i_ucna_rcvd = (uint64_t *)addr_gva2hva(vm, (uint64_t)&i_ucna_rcvd); 221 - params->p_i_ucna_addr = (uint64_t *)addr_gva2hva(vm, (uint64_t)&i_ucna_addr); 222 - params->p_ucna_addr = (uint64_t *)addr_gva2hva(vm, (uint64_t)&ucna_addr); 223 - params->p_ucna_addr2 = (uint64_t *)addr_gva2hva(vm, (uint64_t)&ucna_addr2); 219 + params->p_i_ucna_rcvd = (u64 *)addr_gva2hva(vm, (u64)&i_ucna_rcvd); 220 + params->p_i_ucna_addr = (u64 *)addr_gva2hva(vm, (u64)&i_ucna_addr); 221 + params->p_ucna_addr = (u64 *)addr_gva2hva(vm, (u64)&ucna_addr); 222 + params->p_ucna_addr2 = (u64 *)addr_gva2hva(vm, (u64)&ucna_addr2); 224 223 225 224 run_ucna_injection(params); 226 225 ··· 243 242 244 243 static void setup_mce_cap(struct kvm_vcpu *vcpu, bool enable_cmci_p) 245 244 { 246 - uint64_t mcg_caps = MCG_CTL_P | MCG_SER_P | MCG_LMCE_P | KVM_MAX_MCE_BANKS; 245 + u64 mcg_caps = MCG_CTL_P | MCG_SER_P | MCG_LMCE_P | KVM_MAX_MCE_BANKS; 247 246 if (enable_cmci_p) 248 247 mcg_caps |= MCG_CMCI_P; 249 248
+12 -12
tools/testing/selftests/kvm/x86/userspace_msr_exit_test.c
··· 66 66 }, 67 67 }; 68 68 69 - static uint64_t msr_non_existent_data; 69 + static u64 msr_non_existent_data; 70 70 static int guest_exception_count; 71 71 static u32 msr_reads, msr_writes; 72 72 ··· 142 142 * Note: Force test_rdmsr() to not be inlined to prevent the labels, 143 143 * rdmsr_start and rdmsr_end, from being defined multiple times. 144 144 */ 145 - static noinline uint64_t test_rdmsr(uint32_t msr) 145 + static noinline u64 test_rdmsr(uint32_t msr) 146 146 { 147 147 uint32_t a, d; 148 148 ··· 151 151 __asm__ __volatile__("rdmsr_start: rdmsr; rdmsr_end:" : 152 152 "=a"(a), "=d"(d) : "c"(msr) : "memory"); 153 153 154 - return a | ((uint64_t) d << 32); 154 + return a | ((u64)d << 32); 155 155 } 156 156 157 157 /* 158 158 * Note: Force test_wrmsr() to not be inlined to prevent the labels, 159 159 * wrmsr_start and wrmsr_end, from being defined multiple times. 160 160 */ 161 - static noinline void test_wrmsr(uint32_t msr, uint64_t value) 161 + static noinline void test_wrmsr(uint32_t msr, u64 value) 162 162 { 163 163 uint32_t a = value; 164 164 uint32_t d = value >> 32; ··· 176 176 * Note: Force test_em_rdmsr() to not be inlined to prevent the labels, 177 177 * rdmsr_start and rdmsr_end, from being defined multiple times. 178 178 */ 179 - static noinline uint64_t test_em_rdmsr(uint32_t msr) 179 + static noinline u64 test_em_rdmsr(uint32_t msr) 180 180 { 181 181 uint32_t a, d; 182 182 ··· 185 185 __asm__ __volatile__(KVM_FEP "em_rdmsr_start: rdmsr; em_rdmsr_end:" : 186 186 "=a"(a), "=d"(d) : "c"(msr) : "memory"); 187 187 188 - return a | ((uint64_t) d << 32); 188 + return a | ((u64)d << 32); 189 189 } 190 190 191 191 /* 192 192 * Note: Force test_em_wrmsr() to not be inlined to prevent the labels, 193 193 * wrmsr_start and wrmsr_end, from being defined multiple times. 194 194 */ 195 - static noinline void test_em_wrmsr(uint32_t msr, uint64_t value) 195 + static noinline void test_em_wrmsr(uint32_t msr, u64 value) 196 196 { 197 197 uint32_t a = value; 198 198 uint32_t d = value >> 32; ··· 208 208 209 209 static void guest_code_filter_allow(void) 210 210 { 211 - uint64_t data; 211 + u64 data; 212 212 213 213 /* 214 214 * Test userspace intercepting rdmsr / wrmsr for MSR_IA32_XSS. ··· 328 328 329 329 static void guest_code_permission_bitmap(void) 330 330 { 331 - uint64_t data; 331 + u64 data; 332 332 333 333 data = test_rdmsr(MSR_FS_BASE); 334 334 GUEST_ASSERT(data == MSR_FS_BASE); ··· 464 464 uc.cmd, UCALL_DONE); 465 465 } 466 466 467 - static uint64_t process_ucall(struct kvm_vcpu *vcpu) 467 + static u64 process_ucall(struct kvm_vcpu *vcpu) 468 468 { 469 469 struct ucall uc = {}; 470 470 ··· 502 502 process_wrmsr(vcpu, msr_index); 503 503 } 504 504 505 - static uint64_t run_guest_then_process_ucall(struct kvm_vcpu *vcpu) 505 + static u64 run_guest_then_process_ucall(struct kvm_vcpu *vcpu) 506 506 { 507 507 vcpu_run(vcpu); 508 508 return process_ucall(vcpu); ··· 519 519 KVM_ONE_VCPU_TEST(user_msr, msr_filter_allow, guest_code_filter_allow) 520 520 { 521 521 struct kvm_vm *vm = vcpu->vm; 522 - uint64_t cmd; 522 + u64 cmd; 523 523 int rc; 524 524 525 525 rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR);
+9 -9
tools/testing/selftests/kvm/x86/vmx_msrs_test.c
··· 13 13 #include "vmx.h" 14 14 15 15 static void vmx_fixed1_msr_test(struct kvm_vcpu *vcpu, uint32_t msr_index, 16 - uint64_t mask) 16 + u64 mask) 17 17 { 18 - uint64_t val = vcpu_get_msr(vcpu, msr_index); 19 - uint64_t bit; 18 + u64 val = vcpu_get_msr(vcpu, msr_index); 19 + u64 bit; 20 20 21 21 mask &= val; 22 22 ··· 27 27 } 28 28 29 29 static void vmx_fixed0_msr_test(struct kvm_vcpu *vcpu, uint32_t msr_index, 30 - uint64_t mask) 30 + u64 mask) 31 31 { 32 - uint64_t val = vcpu_get_msr(vcpu, msr_index); 33 - uint64_t bit; 32 + u64 val = vcpu_get_msr(vcpu, msr_index); 33 + u64 bit; 34 34 35 35 mask = ~mask | val; 36 36 ··· 68 68 } 69 69 70 70 static void __ia32_feature_control_msr_test(struct kvm_vcpu *vcpu, 71 - uint64_t msr_bit, 71 + u64 msr_bit, 72 72 struct kvm_x86_cpu_feature feature) 73 73 { 74 - uint64_t val; 74 + u64 val; 75 75 76 76 vcpu_clear_cpuid_feature(vcpu, feature); 77 77 ··· 90 90 91 91 static void ia32_feature_control_msr_test(struct kvm_vcpu *vcpu) 92 92 { 93 - uint64_t supported_bits = FEAT_CTL_LOCKED | 93 + u64 supported_bits = FEAT_CTL_LOCKED | 94 94 FEAT_CTL_VMX_ENABLED_INSIDE_SMX | 95 95 FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX | 96 96 FEAT_CTL_SGX_LC_ENABLED |
+5 -5
tools/testing/selftests/kvm/x86/vmx_pmu_caps_test.c
··· 52 52 .pebs_format = -1, 53 53 }; 54 54 55 - static void guest_test_perf_capabilities_gp(uint64_t val) 55 + static void guest_test_perf_capabilities_gp(u64 val) 56 56 { 57 57 uint8_t vector = wrmsr_safe(MSR_IA32_PERF_CAPABILITIES, val); 58 58 ··· 61 61 val, ex_str(vector)); 62 62 } 63 63 64 - static void guest_code(uint64_t current_val) 64 + static void guest_code(u64 current_val) 65 65 { 66 66 int i; 67 67 ··· 129 129 130 130 KVM_ONE_VCPU_TEST(vmx_pmu_caps, fungible_perf_capabilities, guest_code) 131 131 { 132 - const uint64_t fungible_caps = host_cap.capabilities & ~immutable_caps.capabilities; 132 + const u64 fungible_caps = host_cap.capabilities & ~immutable_caps.capabilities; 133 133 int bit; 134 134 135 135 for_each_set_bit(bit, &fungible_caps, 64) { ··· 148 148 */ 149 149 KVM_ONE_VCPU_TEST(vmx_pmu_caps, immutable_perf_capabilities, guest_code) 150 150 { 151 - const uint64_t reserved_caps = (~host_cap.capabilities | 151 + const u64 reserved_caps = (~host_cap.capabilities | 152 152 immutable_caps.capabilities) & 153 153 ~format_caps.capabilities; 154 154 union perf_capabilities val = host_cap; ··· 210 210 211 211 KVM_ONE_VCPU_TEST(vmx_pmu_caps, perf_capabilities_unsupported, guest_code) 212 212 { 213 - uint64_t val; 213 + u64 val; 214 214 int i, r; 215 215 216 216 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
+19 -19
tools/testing/selftests/kvm/x86/xapic_ipi_test.c
··· 48 48 * Incremented in the IPI handler. Provides evidence to the sender that the IPI 49 49 * arrived at the destination 50 50 */ 51 - static volatile uint64_t ipis_rcvd; 51 + static volatile u64 ipis_rcvd; 52 52 53 53 /* Data struct shared between host main thread and vCPUs */ 54 54 struct test_data_page { 55 55 uint32_t halter_apic_id; 56 - volatile uint64_t hlt_count; 57 - volatile uint64_t wake_count; 58 - uint64_t ipis_sent; 59 - uint64_t migrations_attempted; 60 - uint64_t migrations_completed; 56 + volatile u64 hlt_count; 57 + volatile u64 wake_count; 58 + u64 ipis_sent; 59 + u64 migrations_attempted; 60 + u64 migrations_completed; 61 61 uint32_t icr; 62 62 uint32_t icr2; 63 63 uint32_t halter_tpr; ··· 75 75 struct thread_params { 76 76 struct test_data_page *data; 77 77 struct kvm_vcpu *vcpu; 78 - uint64_t *pipis_rcvd; /* host address of ipis_rcvd global */ 78 + u64 *pipis_rcvd; /* host address of ipis_rcvd global */ 79 79 }; 80 80 81 81 void verify_apic_base_addr(void) 82 82 { 83 - uint64_t msr = rdmsr(MSR_IA32_APICBASE); 84 - uint64_t base = GET_APIC_BASE(msr); 83 + u64 msr = rdmsr(MSR_IA32_APICBASE); 84 + u64 base = GET_APIC_BASE(msr); 85 85 86 86 GUEST_ASSERT(base == APIC_DEFAULT_GPA); 87 87 } ··· 125 125 126 126 static void sender_guest_code(struct test_data_page *data) 127 127 { 128 - uint64_t last_wake_count; 129 - uint64_t last_hlt_count; 130 - uint64_t last_ipis_rcvd_count; 128 + u64 last_wake_count; 129 + u64 last_hlt_count; 130 + u64 last_ipis_rcvd_count; 131 131 uint32_t icr_val; 132 132 uint32_t icr2_val; 133 - uint64_t tsc_start; 133 + u64 tsc_start; 134 134 135 135 verify_apic_base_addr(); 136 136 xapic_enable(); ··· 248 248 } 249 249 250 250 void do_migrations(struct test_data_page *data, int run_secs, int delay_usecs, 251 - uint64_t *pipis_rcvd) 251 + u64 *pipis_rcvd) 252 252 { 253 253 long pages_not_moved; 254 254 unsigned long nodemask = 0; ··· 259 259 int i; 260 260 int from, to; 261 261 unsigned long bit; 262 - uint64_t hlt_count; 263 - uint64_t wake_count; 264 - uint64_t ipis_sent; 262 + u64 hlt_count; 263 + u64 wake_count; 264 + u64 ipis_sent; 265 265 266 266 fprintf(stderr, "Calling migrate_pages every %d microseconds\n", 267 267 delay_usecs); ··· 398 398 pthread_t threads[2]; 399 399 struct thread_params params[2]; 400 400 struct kvm_vm *vm; 401 - uint64_t *pipis_rcvd; 401 + u64 *pipis_rcvd; 402 402 403 403 get_cmdline_args(argc, argv, &run_secs, &migrate, &delay_usecs); 404 404 if (run_secs <= 0) ··· 423 423 vcpu_args_set(params[0].vcpu, 1, test_data_page_vaddr); 424 424 vcpu_args_set(params[1].vcpu, 1, test_data_page_vaddr); 425 425 426 - pipis_rcvd = (uint64_t *)addr_gva2hva(vm, (uint64_t)&ipis_rcvd); 426 + pipis_rcvd = (u64 *)addr_gva2hva(vm, (u64)&ipis_rcvd); 427 427 params[0].pipis_rcvd = pipis_rcvd; 428 428 params[1].pipis_rcvd = pipis_rcvd; 429 429
+8 -8
tools/testing/selftests/kvm/x86/xapic_state_test.c
··· 23 23 xapic_enable(); 24 24 25 25 while (1) { 26 - uint64_t val = (u64)xapic_read_reg(APIC_IRR) | 26 + u64 val = (u64)xapic_read_reg(APIC_IRR) | 27 27 (u64)xapic_read_reg(APIC_IRR + 0x10) << 32; 28 28 29 29 xapic_write_reg(APIC_ICR2, val >> 32); ··· 43 43 x2apic_enable(); 44 44 45 45 do { 46 - uint64_t val = x2apic_read_reg(APIC_IRR) | 46 + u64 val = x2apic_read_reg(APIC_IRR) | 47 47 x2apic_read_reg(APIC_IRR + 0x10) << 32; 48 48 49 49 if (val & X2APIC_RSVD_BITS_MASK) { ··· 56 56 } while (1); 57 57 } 58 58 59 - static void ____test_icr(struct xapic_vcpu *x, uint64_t val) 59 + static void ____test_icr(struct xapic_vcpu *x, u64 val) 60 60 { 61 61 struct kvm_vcpu *vcpu = x->vcpu; 62 62 struct kvm_lapic_state xapic; 63 63 struct ucall uc; 64 - uint64_t icr; 64 + u64 icr; 65 65 66 66 /* 67 67 * Tell the guest what ICR value to write. Use the IRR to pass info, ··· 93 93 TEST_ASSERT_EQ(icr, val & ~APIC_ICR_BUSY); 94 94 } 95 95 96 - static void __test_icr(struct xapic_vcpu *x, uint64_t val) 96 + static void __test_icr(struct xapic_vcpu *x, u64 val) 97 97 { 98 98 /* 99 99 * The BUSY bit is reserved on both AMD and Intel, but only AMD treats ··· 109 109 static void test_icr(struct xapic_vcpu *x) 110 110 { 111 111 struct kvm_vcpu *vcpu = x->vcpu; 112 - uint64_t icr, i, j; 112 + u64 icr, i, j; 113 113 114 114 icr = APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_FIXED; 115 115 for (i = 0; i <= 0xff; i++) ··· 142 142 __test_icr(x, -1ull & ~APIC_DM_FIXED_MASK); 143 143 } 144 144 145 - static void __test_apic_id(struct kvm_vcpu *vcpu, uint64_t apic_base) 145 + static void __test_apic_id(struct kvm_vcpu *vcpu, u64 apic_base) 146 146 { 147 147 uint32_t apic_id, expected; 148 148 struct kvm_lapic_state xapic; ··· 172 172 { 173 173 const uint32_t NR_VCPUS = 3; 174 174 struct kvm_vcpu *vcpus[NR_VCPUS]; 175 - uint64_t apic_base; 175 + u64 apic_base; 176 176 struct kvm_vm *vm; 177 177 int i; 178 178
+1 -1
tools/testing/selftests/kvm/x86/xapic_tpr_test.c
··· 95 95 96 96 static uint8_t tpr_guest_cr8_get(void) 97 97 { 98 - uint64_t cr8; 98 + u64 cr8; 99 99 100 100 asm volatile ("mov %%cr8, %[cr8]\n\t" : [cr8] "=r"(cr8)); 101 101
+4 -4
tools/testing/selftests/kvm/x86/xcr0_cpuid_test.c
··· 21 21 */ 22 22 #define ASSERT_XFEATURE_DEPENDENCIES(supported_xcr0, xfeatures, dependencies) \ 23 23 do { \ 24 - uint64_t __supported = (supported_xcr0) & ((xfeatures) | (dependencies)); \ 24 + u64 __supported = (supported_xcr0) & ((xfeatures) | (dependencies)); \ 25 25 \ 26 26 __GUEST_ASSERT((__supported & (xfeatures)) != (xfeatures) || \ 27 27 __supported == ((xfeatures) | (dependencies)), \ ··· 39 39 */ 40 40 #define ASSERT_ALL_OR_NONE_XFEATURE(supported_xcr0, xfeatures) \ 41 41 do { \ 42 - uint64_t __supported = (supported_xcr0) & (xfeatures); \ 42 + u64 __supported = (supported_xcr0) & (xfeatures); \ 43 43 \ 44 44 __GUEST_ASSERT(!__supported || __supported == (xfeatures), \ 45 45 "supported = 0x%lx, xfeatures = 0x%llx", \ ··· 48 48 49 49 static void guest_code(void) 50 50 { 51 - uint64_t initial_xcr0; 52 - uint64_t supported_xcr0; 51 + u64 initial_xcr0; 52 + u64 supported_xcr0; 53 53 int i, vector; 54 54 55 55 set_cr4(get_cr4() | X86_CR4_OSXSAVE);
+6 -6
tools/testing/selftests/kvm/x86/xen_shinfo_test.c
··· 117 117 118 118 struct vcpu_runstate_info { 119 119 uint32_t state; 120 - uint64_t state_entry_time; 121 - uint64_t time[5]; /* Extra field for overrun check */ 120 + u64 state_entry_time; 121 + u64 time[5]; /* Extra field for overrun check */ 122 122 }; 123 123 124 124 struct compat_vcpu_runstate_info { 125 125 uint32_t state; 126 - uint64_t state_entry_time; 127 - uint64_t time[5]; 126 + u64 state_entry_time; 127 + u64 time[5]; 128 128 } __attribute__((__packed__)); 129 129 130 130 struct arch_vcpu_info { ··· 658 658 printf("Testing RUNSTATE_ADJUST\n"); 659 659 rst.type = KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST; 660 660 memset(&rst.u, 0, sizeof(rst.u)); 661 - rst.u.runstate.state = (uint64_t)-1; 661 + rst.u.runstate.state = (u64)-1; 662 662 rst.u.runstate.time_blocked = 663 663 0x5a - rs->time[RUNSTATE_blocked]; 664 664 rst.u.runstate.time_offline = ··· 1113 1113 /* Don't change the address, just trigger a write */ 1114 1114 struct kvm_xen_vcpu_attr adj = { 1115 1115 .type = KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST, 1116 - .u.runstate.state = (uint64_t)-1 1116 + .u.runstate.state = (u64)-1 1117 1117 }; 1118 1118 vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &adj); 1119 1119
+1 -1
tools/testing/selftests/kvm/x86/xss_msr_test.c
··· 17 17 bool xss_in_msr_list; 18 18 struct kvm_vm *vm; 19 19 struct kvm_vcpu *vcpu; 20 - uint64_t xss_val; 20 + u64 xss_val; 21 21 int i, r; 22 22 23 23 /* Create VM */