+2

Documentation/ABI/testing/configfs-usb-gadget-uac2

reviewed

··· 35 35 req_number the number of pre-allocated requests 36 36 for both capture and playback 37 37 function_name name of the interface 38 38 + c_terminal_type code of the capture terminal type 39 39 + p_terminal_type code of the playback terminal type 38 40 ===================== =======================================

+9

Documentation/ABI/testing/sysfs-bus-usb

reviewed

··· 313 313 Inter-Chip SSIC devices support asymmetric lanes up to 4 lanes per 314 314 direction. Devices before USB 3.2 are single lane (tx_lanes = 1) 315 315 316 316 + What: /sys/bus/usb/devices/.../typec 317 317 + Date: November 2023 318 318 + Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> 319 319 + Description: 320 320 + Symlink to the USB Type-C partner device. USB Type-C partner 321 321 + represents the component that communicates over the 322 322 + Configuration Channel (CC signal on USB Type-C connectors and 323 323 + cables) with the local port. 324 324 + 316 325 What: /sys/bus/usb/devices/usbX/bAlternateSetting 317 326 Description: 318 327 The current interface alternate setting number, in decimal.

+7

Documentation/ABI/testing/sysfs-class-usb_power_delivery

reviewed

··· 124 124 Description: 125 125 The voltage the supply supports in millivolts. 126 126 127 127 + What: /sys/class/usb_power_delivery/.../source-capabilities/<position>:fixed_supply/peak_current 128 128 + Date: October 2023 129 129 + Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> 130 130 + Description: 131 131 + This file shows the value of the Fixed Power Source Peak Current 132 132 + Capability field. 133 133 + 127 134 What: /sys/class/usb_power_delivery/.../source-capabilities/<position>:fixed_supply/maximum_current 128 135 Date: May 2022 129 136 Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>

+2

Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml

reviewed

··· 20 20 - qcom,qcm2290-qmp-usb3-phy 21 21 - qcom,sa8775p-qmp-usb3-uni-phy 22 22 - qcom,sc8280xp-qmp-usb3-uni-phy 23 23 + - qcom,sdx75-qmp-usb3-uni-phy 23 24 - qcom,sm6115-qmp-usb3-phy 24 25 25 26 reg: ··· 76 75 contains: 77 76 enum: 78 77 - qcom,ipq9574-qmp-usb3-phy 78 78 + - qcom,sdx75-qmp-usb3-uni-phy 79 79 then: 80 80 properties: 81 81 clock-names:

+6 -1

Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml

reviewed

··· 14 14 15 15 properties: 16 16 compatible: 17 17 - const: qcom,sm8550-snps-eusb2-phy 17 17 + oneOf: 18 18 + - items: 19 19 + - enum: 20 20 + - qcom,sdx75-snps-eusb2-phy 21 21 + - const: qcom,sm8550-snps-eusb2-phy 22 22 + - const: qcom,sm8550-snps-eusb2-phy 18 23 19 24 reg: 20 25 maxItems: 1

+19

Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml

reviewed

··· 35 35 '#size-cells': 36 36 const: 0 37 37 38 38 + orientation-gpios: 39 39 + description: Array of input gpios for the Type-C connector orientation indication. 40 40 + The GPIO indication is used to detect the orientation of the Type-C connector. 41 41 + The array should contain a gpio entry for each PMIC Glink connector, in reg order. 42 42 + It is defined that GPIO active level means "CC2" or Reversed/Flipped orientation. 43 43 + 38 44 patternProperties: 39 45 '^connector@\d$': 40 46 $ref: /schemas/connector/usb-connector.yaml# ··· 49 43 50 44 required: 51 45 - compatible 46 46 + 47 47 + allOf: 48 48 + - if: 49 49 + not: 50 50 + properties: 51 51 + compatible: 52 52 + contains: 53 53 + enum: 54 54 + - qcom,sm8450-pmic-glink 55 55 + - qcom,sm8550-pmic-glink 56 56 + then: 57 57 + properties: 58 58 + orientation-gpios: false 52 59 53 60 additionalProperties: false 54 61

+7

Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml

reviewed

··· 15 15 oneOf: 16 16 - enum: 17 17 - chipidea,usb2 18 18 + - fsl,imx27-usb 18 19 - lsi,zevio-usb 20 20 + - nuvoton,npcm750-udc 19 21 - nvidia,tegra20-ehci 20 22 - nvidia,tegra20-udc 21 23 - nvidia,tegra30-ehci ··· 68 66 - items: 69 67 - const: xlnx,zynq-usb-2.20a 70 68 - const: chipidea,usb2 69 69 + - items: 70 70 + - enum: 71 71 + - nuvoton,npcm845-udc 72 72 + - const: nuvoton,npcm750-udc 71 73 72 74 reg: 73 75 minItems: 1 ··· 394 388 enum: 395 389 - chipidea,usb2 396 390 - lsi,zevio-usb 391 391 + - nuvoton,npcm750-udc 397 392 - nvidia,tegra20-udc 398 393 - nvidia,tegra30-udc 399 394 - nvidia,tegra114-udc

+40 -3

Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml

reviewed

··· 11 11 12 12 properties: 13 13 compatible: 14 14 - enum: 15 15 - - fcs,fsa4480 14 14 + oneOf: 15 15 + - const: fcs,fsa4480 16 16 + - items: 17 17 + - enum: 18 18 + - ocs,ocp96011 19 19 + - const: fcs,fsa4480 16 20 17 21 reg: 18 22 maxItems: 1 ··· 36 32 type: boolean 37 33 38 34 port: 39 39 - $ref: /schemas/graph.yaml#/properties/port 35 35 + $ref: /schemas/graph.yaml#/$defs/port-base 40 36 description: 41 37 A port node to link the FSA4480 to a TypeC controller for the purpose of 42 38 handling altmode muxing and orientation switching. 39 39 + unevaluatedProperties: false 40 40 + 41 41 + properties: 42 42 + endpoint: 43 43 + $ref: /schemas/graph.yaml#/$defs/endpoint-base 44 44 + unevaluatedProperties: false 45 45 + 46 46 + properties: 47 47 + data-lanes: 48 48 + $ref: /schemas/types.yaml#/definitions/uint32-array 49 49 + description: 50 50 + Specifies how the AUX+/- lines are connected to SBU1/2. 51 51 + oneOf: 52 52 + - items: 53 53 + - const: 0 54 54 + - const: 1 55 55 + description: | 56 56 + Default AUX/SBU layout (FSA4480) 57 57 + - AUX+ connected to SBU2 58 58 + - AUX- connected to SBU1 59 59 + Default AUX/SBU layout (OCP96011) 60 60 + - AUX+ connected to SBU1 61 61 + - AUX- connected to SBU2 62 62 + - items: 63 63 + - const: 1 64 64 + - const: 0 65 65 + description: | 66 66 + Swapped AUX/SBU layout (FSA4480) 67 67 + - AUX+ connected to SBU1 68 68 + - AUX- connected to SBU2 69 69 + Swapped AUX/SBU layout (OCP96011) 70 70 + - AUX+ connected to SBU2 71 71 + - AUX- connected to SBU1 43 72 44 73 required: 45 74 - compatible

+2 -1

Documentation/devicetree/bindings/usb/genesys,gl850g.yaml

reviewed

··· 4 4 $id: http://devicetree.org/schemas/usb/genesys,gl850g.yaml# 5 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 7 - title: Genesys Logic GL850G USB 2.0 hub controller 7 7 + title: Genesys Logic USB hub controller 8 8 9 9 maintainers: 10 10 - Icenowy Zheng <uwu@icenowy.me> ··· 18 18 - usb5e3,608 19 19 - usb5e3,610 20 20 - usb5e3,620 21 21 + - usb5e3,626 21 22 22 23 reg: true 23 24

+1 -1

Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml

reviewed

··· 19 19 compatible: 20 20 items: 21 21 - enum: 22 22 + - nxp,cbdtu02043 22 23 - onnn,fsusb43l10x 23 24 - pericom,pi3usb102 24 25 - const: gpio-sbu-mux ··· 51 50 - compatible 52 51 - enable-gpios 53 52 - select-gpios 54 54 - - mode-switch 55 53 - orientation-switch 56 54 - port 57 55

+94

Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 2 + %YAML 1.2 3 3 + --- 4 4 + $id: http://devicetree.org/schemas/usb/nxp,ptn36502.yaml# 5 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 + 7 7 + title: NXP PTN36502 Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo redriver 8 8 + 9 9 + maintainers: 10 10 + - Luca Weiss <luca.weiss@fairphone.com> 11 11 + 12 12 + properties: 13 13 + compatible: 14 14 + enum: 15 15 + - nxp,ptn36502 16 16 + 17 17 + reg: 18 18 + maxItems: 1 19 19 + 20 20 + vdd18-supply: 21 21 + description: Power supply for VDD18 pin 22 22 + 23 23 + retimer-switch: 24 24 + description: Flag the port as possible handle of SuperSpeed signals retiming 25 25 + type: boolean 26 26 + 27 27 + orientation-switch: 28 28 + description: Flag the port as possible handler of orientation switching 29 29 + type: boolean 30 30 + 31 31 + ports: 32 32 + $ref: /schemas/graph.yaml#/properties/ports 33 33 + properties: 34 34 + port@0: 35 35 + $ref: /schemas/graph.yaml#/properties/port 36 36 + description: Super Speed (SS) Output endpoint to the Type-C connector 37 37 + 38 38 + port@1: 39 39 + $ref: /schemas/graph.yaml#/properties/port 40 40 + description: Super Speed (SS) Input endpoint from the Super-Speed PHY 41 41 + 42 42 + port@2: 43 43 + $ref: /schemas/graph.yaml#/properties/port 44 44 + description: 45 45 + Sideband Use (SBU) AUX lines endpoint to the Type-C connector for the purpose of 46 46 + handling altmode muxing and orientation switching. 47 47 + 48 48 + required: 49 49 + - compatible 50 50 + - reg 51 51 + 52 52 + additionalProperties: false 53 53 + 54 54 + examples: 55 55 + - | 56 56 + i2c { 57 57 + #address-cells = <1>; 58 58 + #size-cells = <0>; 59 59 + 60 60 + typec-mux@1a { 61 61 + compatible = "nxp,ptn36502"; 62 62 + reg = <0x1a>; 63 63 + 64 64 + vdd18-supply = <&usb_redrive_1v8>; 65 65 + 66 66 + retimer-switch; 67 67 + orientation-switch; 68 68 + 69 69 + ports { 70 70 + #address-cells = <1>; 71 71 + #size-cells = <0>; 72 72 + 73 73 + port@0 { 74 74 + reg = <0>; 75 75 + usb_con_ss: endpoint { 76 76 + remote-endpoint = <&typec_con_ss>; 77 77 + }; 78 78 + }; 79 79 + port@1 { 80 80 + reg = <1>; 81 81 + phy_con_ss: endpoint { 82 82 + remote-endpoint = <&usb_phy_ss>; 83 83 + }; 84 84 + }; 85 85 + port@2 { 86 86 + reg = <2>; 87 87 + usb_con_sbu: endpoint { 88 88 + remote-endpoint = <&typec_dp_aux>; 89 89 + }; 90 90 + }; 91 91 + }; 92 92 + }; 93 93 + }; 94 94 + ...

+7

Documentation/devicetree/bindings/usb/qcom,dwc3.yaml

reviewed

··· 14 14 items: 15 15 - enum: 16 16 - qcom,ipq4019-dwc3 17 17 + - qcom,ipq5018-dwc3 17 18 - qcom,ipq5332-dwc3 18 19 - qcom,ipq6018-dwc3 19 20 - qcom,ipq8064-dwc3 ··· 35 34 - qcom,sdm845-dwc3 36 35 - qcom,sdx55-dwc3 37 36 - qcom,sdx65-dwc3 37 37 + - qcom,sdx75-dwc3 38 38 - qcom,sm4250-dwc3 39 39 - qcom,sm6115-dwc3 40 40 - qcom,sm6125-dwc3 ··· 182 180 - qcom,sdm670-dwc3 183 181 - qcom,sdm845-dwc3 184 182 - qcom,sdx55-dwc3 183 183 + - qcom,sdx65-dwc3 184 184 + - qcom,sdx75-dwc3 185 185 - qcom,sm6350-dwc3 186 186 then: 187 187 properties: ··· 242 238 compatible: 243 239 contains: 244 240 enum: 241 241 + - qcom,ipq5018-dwc3 245 242 - qcom,ipq5332-dwc3 246 243 - qcom,msm8994-dwc3 247 244 - qcom,qcs404-dwc3 ··· 368 363 - qcom,sdm845-dwc3 369 364 - qcom,sdx55-dwc3 370 365 - qcom,sdx65-dwc3 366 366 + - qcom,sdx75-dwc3 371 367 - qcom,sm4250-dwc3 372 368 - qcom,sm6125-dwc3 373 369 - qcom,sm6350-dwc3 ··· 417 411 compatible: 418 412 contains: 419 413 enum: 414 414 + - qcom,ipq5018-dwc3 420 415 - qcom,ipq5332-dwc3 421 416 - qcom,sdm660-dwc3 422 417 then:

+80

Documentation/devicetree/bindings/usb/realtek,rtd-dwc3.yaml

reviewed

··· 1 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 2 + # Copyright 2023 Realtek Semiconductor Corporation 3 3 + %YAML 1.2 4 4 + --- 5 5 + $id: http://devicetree.org/schemas/usb/realtek,rtd-dwc3.yaml# 6 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 7 + 8 8 + title: Realtek DWC3 USB SoC Controller Glue 9 9 + 10 10 + maintainers: 11 11 + - Stanley Chang <stanley_chang@realtek.com> 12 12 + 13 13 + description: 14 14 + The Realtek DHC SoC embeds a DWC3 USB IP Core configured for USB 2.0 15 15 + and USB 3.0 in host or dual-role mode. 16 16 + 17 17 + properties: 18 18 + compatible: 19 19 + items: 20 20 + - enum: 21 21 + - realtek,rtd1295-dwc3 22 22 + - realtek,rtd1315e-dwc3 23 23 + - realtek,rtd1319-dwc3 24 24 + - realtek,rtd1319d-dwc3 25 25 + - realtek,rtd1395-dwc3 26 26 + - realtek,rtd1619-dwc3 27 27 + - realtek,rtd1619b-dwc3 28 28 + - const: realtek,rtd-dwc3 29 29 + 30 30 + reg: 31 31 + items: 32 32 + - description: Address and length of register set for wrapper of dwc3 core. 33 33 + - description: Address and length of register set for pm control. 34 34 + 35 35 + '#address-cells': 36 36 + const: 1 37 37 + 38 38 + '#size-cells': 39 39 + const: 1 40 40 + 41 41 + ranges: true 42 42 + 43 43 + patternProperties: 44 44 + "^usb@[0-9a-f]+$": 45 45 + $ref: snps,dwc3.yaml# 46 46 + description: Required child node 47 47 + 48 48 + required: 49 49 + - compatible 50 50 + - reg 51 51 + - "#address-cells" 52 52 + - "#size-cells" 53 53 + - ranges 54 54 + 55 55 + additionalProperties: false 56 56 + 57 57 + examples: 58 58 + - | 59 59 + usb@98013e00 { 60 60 + compatible = "realtek,rtd1319d-dwc3", "realtek,rtd-dwc3"; 61 61 + reg = <0x98013e00 0x140>, <0x98013f60 0x4>; 62 62 + #address-cells = <1>; 63 63 + #size-cells = <1>; 64 64 + ranges; 65 65 + 66 66 + usb@98050000 { 67 67 + compatible = "snps,dwc3"; 68 68 + reg = <0x98050000 0x9000>; 69 69 + interrupts = <0 94 4>; 70 70 + phys = <&usb2phy &usb3phy>; 71 71 + phy-names = "usb2-phy", "usb3-phy"; 72 72 + dr_mode = "otg"; 73 73 + usb-role-switch; 74 74 + role-switch-default-mode = "host"; 75 75 + snps,dis_u2_susphy_quirk; 76 76 + snps,parkmode-disable-ss-quirk; 77 77 + snps,parkmode-disable-hs-quirk; 78 78 + maximum-speed = "high-speed"; 79 79 + }; 80 80 + };

+55 -5

Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml

reviewed

··· 20 20 Type-C PHY 21 21 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt 22 22 23 23 - allOf: 24 24 - - $ref: snps,dwc3.yaml# 25 25 - 26 23 select: 27 24 properties: 28 25 compatible: ··· 27 30 enum: 28 31 - rockchip,rk3328-dwc3 29 32 - rockchip,rk3568-dwc3 33 33 + - rockchip,rk3588-dwc3 30 34 required: 31 35 - compatible 32 36 ··· 37 39 - enum: 38 40 - rockchip,rk3328-dwc3 39 41 - rockchip,rk3568-dwc3 42 42 + - rockchip,rk3588-dwc3 40 43 - const: snps,dwc3 41 44 42 45 reg: ··· 57 58 Master/Core clock, must to be >= 62.5 MHz for SS 58 59 operation and >= 30MHz for HS operation 59 60 - description: 60 60 - Controller grf clock 61 61 + Controller grf clock OR UTMI clock 62 62 + - description: 63 63 + PIPE clock 61 64 62 65 clock-names: 63 66 minItems: 3 ··· 67 66 - const: ref_clk 68 67 - const: suspend_clk 69 68 - const: bus_clk 70 70 - - const: grf_clk 69 69 + - enum: 70 70 + - grf_clk 71 71 + - utmi 72 72 + - const: pipe 71 73 72 74 power-domains: 73 75 maxItems: 1 ··· 89 85 - interrupts 90 86 - clocks 91 87 - clock-names 88 88 + 89 89 + allOf: 90 90 + - $ref: snps,dwc3.yaml# 91 91 + - if: 92 92 + properties: 93 93 + compatible: 94 94 + contains: 95 95 + const: rockchip,rk3328-dwc3 96 96 + then: 97 97 + properties: 98 98 + clocks: 99 99 + minItems: 3 100 100 + maxItems: 4 101 101 + clock-names: 102 102 + minItems: 3 103 103 + items: 104 104 + - const: ref_clk 105 105 + - const: suspend_clk 106 106 + - const: bus_clk 107 107 + - const: grf_clk 108 108 + - if: 109 109 + properties: 110 110 + compatible: 111 111 + contains: 112 112 + const: rockchip,rk3568-dwc3 113 113 + then: 114 114 + properties: 115 115 + clocks: 116 116 + maxItems: 3 117 117 + clock-names: 118 118 + maxItems: 3 119 119 + - if: 120 120 + properties: 121 121 + compatible: 122 122 + contains: 123 123 + const: rockchip,rk3588-dwc3 124 124 + then: 125 125 + properties: 126 126 + clock-names: 127 127 + minItems: 3 128 128 + items: 129 129 + - const: ref_clk 130 130 + - const: suspend_clk 131 131 + - const: bus_clk 132 132 + - const: utmi 133 133 + - const: pipe 92 134 93 135 examples: 94 136 - |

+56

Documentation/devicetree/bindings/usb/snps,dwc3.yaml

reviewed

··· 310 310 maximum: 62 311 311 deprecated: true 312 312 313 313 + snps,rx-thr-num-pkt: 314 314 + description: 315 315 + USB RX packet threshold count. In host mode, this field specifies 316 316 + the space that must be available in the RX FIFO before the core can 317 317 + start the corresponding USB RX transaction (burst). 318 318 + In device mode, this field specifies the space that must be 319 319 + available in the RX FIFO before the core can send ERDY for a 320 320 + flow-controlled endpoint. It is only used for SuperSpeed. 321 321 + The valid values for this field are from 1 to 15. (DWC3 SuperSpeed 322 322 + USB 3.0 Controller Databook) 323 323 + $ref: /schemas/types.yaml#/definitions/uint8 324 324 + minimum: 1 325 325 + maximum: 15 326 326 + 327 327 + snps,rx-max-burst: 328 328 + description: 329 329 + Max USB RX burst size. In host mode, this field specifies the 330 330 + Maximum Bulk IN burst the DWC_usb3 core can perform. When the system 331 331 + bus is slower than the USB, RX FIFO can overrun during a long burst. 332 332 + You can program a smaller value to this field to limit the RX burst 333 333 + size that the core can perform. It only applies to SS Bulk, 334 334 + Isochronous, and Interrupt IN endpoints in the host mode. 335 335 + In device mode, this field specifies the NUMP value that is sent in 336 336 + ERDY for an OUT endpoint. 337 337 + The valid values for this field are from 1 to 16. (DWC3 SuperSpeed 338 338 + USB 3.0 Controller Databook) 339 339 + $ref: /schemas/types.yaml#/definitions/uint8 340 340 + minimum: 1 341 341 + maximum: 16 342 342 + 343 343 + snps,tx-thr-num-pkt: 344 344 + description: 345 345 + USB TX packet threshold count. This field specifies the number of 346 346 + packets that must be in the TXFIFO before the core can start 347 347 + transmission for the corresponding USB transaction (burst). 348 348 + This count is valid in both host and device modes. It is only used 349 349 + for SuperSpeed operation. 350 350 + Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller 351 351 + Databook) 352 352 + $ref: /schemas/types.yaml#/definitions/uint8 353 353 + minimum: 1 354 354 + maximum: 15 355 355 + 356 356 + snps,tx-max-burst: 357 357 + description: 358 358 + Max USB TX burst size. When the system bus is slower than the USB, 359 359 + TX FIFO can underrun during a long burst. Program a smaller value 360 360 + to this field to limit the TX burst size that the core can execute. 361 361 + In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt 362 362 + OUT endpoints. This value is not used in device mode. 363 363 + Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller 364 364 + Databook) 365 365 + $ref: /schemas/types.yaml#/definitions/uint8 366 366 + minimum: 1 367 367 + maximum: 16 368 368 + 313 369 snps,rx-thr-num-pkt-prd: 314 370 description: 315 371 Periodic ESS RX packet threshold count (host mode only). Set this and

+80 -1

Documentation/devicetree/bindings/usb/ti,tps6598x.yaml

reviewed

··· 20 20 enum: 21 21 - ti,tps6598x 22 22 - apple,cd321x 23 23 + - ti,tps25750 24 24 + 23 25 reg: 24 24 - maxItems: 1 26 26 + minItems: 1 27 27 + items: 28 28 + - description: main PD controller address 29 29 + - description: | 30 30 + I2C slave address field in PBMs input data 31 31 + which is used as the device address when writing the 32 32 + patch for TPS25750. 33 33 + The patch address can be any value except 0x00, 0x20, 34 34 + 0x21, 0x22, and 0x23 35 35 + 36 36 + reg-names: 37 37 + items: 38 38 + - const: main 39 39 + - const: patch-address 25 40 26 41 wakeup-source: true 27 42 ··· 50 35 connector: 51 36 $ref: /schemas/connector/usb-connector.yaml# 52 37 38 38 + firmware-name: 39 39 + description: | 40 40 + Should contain the name of the default patch binary 41 41 + file located on the firmware search path which is 42 42 + used to switch the controller into APP mode. 43 43 + This is used when tps25750 doesn't have an EEPROM 44 44 + connected to it. 45 45 + maxItems: 1 46 46 + 53 47 required: 54 48 - compatible 55 49 - reg 50 50 + 51 51 + allOf: 52 52 + - if: 53 53 + properties: 54 54 + compatible: 55 55 + contains: 56 56 + const: ti,tps25750 57 57 + then: 58 58 + properties: 59 59 + reg: 60 60 + maxItems: 2 61 61 + 62 62 + connector: 63 63 + required: 64 64 + - data-role 65 65 + 66 66 + required: 67 67 + - connector 68 68 + - reg-names 69 69 + else: 70 70 + properties: 71 71 + reg: 72 72 + maxItems: 1 56 73 57 74 additionalProperties: false 58 75 ··· 112 65 label = "USB-C"; 113 66 port { 114 67 typec_ep: endpoint { 68 68 + remote-endpoint = <&otg_ep>; 69 69 + }; 70 70 + }; 71 71 + }; 72 72 + }; 73 73 + }; 74 74 + 75 75 + - | 76 76 + #include <dt-bindings/interrupt-controller/irq.h> 77 77 + i2c { 78 78 + #address-cells = <1>; 79 79 + #size-cells = <0>; 80 80 + 81 81 + typec@21 { 82 82 + compatible = "ti,tps25750"; 83 83 + reg = <0x21>, <0x0f>; 84 84 + reg-names = "main", "patch-address"; 85 85 + 86 86 + interrupt-parent = <&msmgpio>; 87 87 + interrupts = <100 IRQ_TYPE_LEVEL_LOW>; 88 88 + interrupt-names = "irq"; 89 89 + firmware-name = "tps25750.bin"; 90 90 + 91 91 + pinctrl-names = "default"; 92 92 + pinctrl-0 = <&typec_pins>; 93 93 + 94 94 + typec_con0: connector { 95 95 + compatible = "usb-c-connector"; 96 96 + label = "USB-C"; 97 97 + data-role = "dual"; 98 98 + port { 99 99 + typec_ep0: endpoint { 115 100 remote-endpoint = <&otg_ep>; 116 101 }; 117 102 };

-1

Documentation/devicetree/bindings/usb/vialab,vl817.yaml

reviewed

··· 37 37 required: 38 38 - compatible 39 39 - reg 40 40 - - reset-gpios 41 40 - vdd-supply 42 41 - peer-hub 43 42

+11 -37

Documentation/driver-api/usb/dma.rst

reviewed

··· 93 93 driver can safely be used with such DMA mapping. (See the first section 94 94 of Documentation/core-api/dma-api-howto.rst, titled "What memory is DMA-able?") 95 95 96 96 - - When you're using scatterlists, you can map everything at once. On some 97 97 - systems, this kicks in an IOMMU and turns the scatterlists into single 98 98 - DMA transactions:: 96 96 + - When you have the scatterlists which have been mapped for the USB controller, 97 97 + you could use the new ``usb_sg_*()`` calls, which would turn scatterlist 98 98 + into URBs:: 99 99 100 100 - int usb_buffer_map_sg (struct usb_device *dev, unsigned pipe, 101 101 - struct scatterlist *sg, int nents); 100 100 + int usb_sg_init(struct usb_sg_request *io, struct usb_device *dev, 101 101 + unsigned pipe, unsigned period, struct scatterlist *sg, 102 102 + int nents, size_t length, gfp_t mem_flags); 102 103 103 103 - void usb_buffer_dmasync_sg (struct usb_device *dev, unsigned pipe, 104 104 - struct scatterlist *sg, int n_hw_ents); 104 104 + void usb_sg_wait(struct usb_sg_request *io); 105 105 106 106 - void usb_buffer_unmap_sg (struct usb_device *dev, unsigned pipe, 107 107 - struct scatterlist *sg, int n_hw_ents); 106 106 + void usb_sg_cancel(struct usb_sg_request *io); 108 107 109 109 - It's probably easier to use the new ``usb_sg_*()`` calls, which do the DMA 110 110 - mapping and apply other tweaks to make scatterlist i/o be fast. 111 111 - 112 112 - - Some drivers may prefer to work with the model that they're mapping large 113 113 - buffers, synchronizing their safe re-use. (If there's no re-use, then let 114 114 - usbcore do the map/unmap.) Large periodic transfers make good examples 115 115 - here, since it's cheaper to just synchronize the buffer than to unmap it 116 116 - each time an urb completes and then re-map it on during resubmission. 117 117 - 118 118 - These calls all work with initialized urbs: ``urb->dev``, ``urb->pipe``, 119 119 - ``urb->transfer_buffer``, and ``urb->transfer_buffer_length`` must all be 120 120 - valid when these calls are used (``urb->setup_packet`` must be valid too 121 121 - if urb is a control request):: 122 122 - 123 123 - struct urb *usb_buffer_map (struct urb *urb); 124 124 - 125 125 - void usb_buffer_dmasync (struct urb *urb); 126 126 - 127 127 - void usb_buffer_unmap (struct urb *urb); 128 128 - 129 129 - The calls manage ``urb->transfer_dma`` for you, and set 130 130 - ``URB_NO_TRANSFER_DMA_MAP`` so that usbcore won't map or unmap the buffer. 131 131 - They cannot be used for setup_packet buffers in control requests. 132 132 - 133 133 - Note that several of those interfaces are currently commented out, since 134 134 - they don't have current users. See the source code. Other than the dmasync 135 135 - calls (where the underlying DMA primitives have changed), most of them can 136 136 - easily be commented back in if you want to use them. 108 108 + When the USB controller doesn't support DMA, the ``usb_sg_init()`` would try 109 109 + to submit URBs in PIO way as long as the page in scatterlists is not in the 110 110 + Highmem, which could be very rare in modern architectures.

+2

Documentation/usb/gadget-testing.rst

reviewed

··· 755 755 req_number the number of pre-allocated request for both capture 756 756 and playback 757 757 function_name name of the interface 758 758 + c_terminal_type code of the capture terminal type 759 759 + p_terminal_type code of the playback terminal type 758 760 ================ ==================================================== 759 761 760 762 The attributes have sane default values.

+1

arch/arm64/boot/dts/qcom/sm8550-mtp.dts

reviewed

··· 59 59 compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink"; 60 60 #address-cells = <1>; 61 61 #size-cells = <0>; 62 62 + orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>; 62 63 63 64 connector@0 { 64 65 compatible = "usb-c-connector";

+1

arch/arm64/boot/dts/qcom/sm8550-qrd.dts

reviewed

··· 77 77 compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink"; 78 78 #address-cells = <1>; 79 79 #size-cells = <0>; 80 80 + orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>; 80 81 81 82 connector@0 { 82 83 compatible = "usb-c-connector";

+21

arch/arm64/boot/dts/rockchip/rk3588s.dtsi

reviewed

··· 443 443 status = "disabled"; 444 444 }; 445 445 446 446 + usb_host2_xhci: usb@fcd00000 { 447 447 + compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; 448 448 + reg = <0x0 0xfcd00000 0x0 0x400000>; 449 449 + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH 0>; 450 450 + clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>, 451 451 + <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>, 452 452 + <&cru CLK_PIPEPHY2_PIPE_U3_G>; 453 453 + clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi", "pipe"; 454 454 + dr_mode = "host"; 455 455 + phys = <&combphy2_psu PHY_TYPE_USB3>; 456 456 + phy-names = "usb3-phy"; 457 457 + phy_type = "utmi_wide"; 458 458 + resets = <&cru SRST_A_USB3OTG2>; 459 459 + snps,dis_enblslpm_quirk; 460 460 + snps,dis-u2-freeclk-exists-quirk; 461 461 + snps,dis-del-phy-power-chg-quirk; 462 462 + snps,dis-tx-ipgap-linecheck-quirk; 463 463 + snps,dis_rxdet_inp3_quirk; 464 464 + status = "disabled"; 465 465 + }; 466 466 + 446 467 pmu1grf: syscon@fd58a000 { 447 468 compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd"; 448 469 reg = <0x0 0xfd58a000 0x0 0x10000>;

+2 -2

drivers/gpio/Kconfig

reviewed

··· 1312 1312 1313 1313 config GPIO_LJCA 1314 1314 tristate "INTEL La Jolla Cove Adapter GPIO support" 1315 1315 - depends on MFD_LJCA 1315 1315 + depends on USB_LJCA 1316 1316 select GPIOLIB_IRQCHIP 1317 1317 - default MFD_LJCA 1317 1317 + default USB_LJCA 1318 1318 help 1319 1319 Select this option to enable GPIO driver for the INTEL 1320 1320 La Jolla Cove Adapter (LJCA) board.

+143 -102

drivers/gpio/gpio-ljca.c

reviewed

··· 6 6 */ 7 7 8 8 #include <linux/acpi.h> 9 9 + #include <linux/auxiliary_bus.h> 9 10 #include <linux/bitfield.h> 10 11 #include <linux/bitops.h> 11 12 #include <linux/dev_printk.h> ··· 14 13 #include <linux/irq.h> 15 14 #include <linux/kernel.h> 16 15 #include <linux/kref.h> 17 17 - #include <linux/mfd/ljca.h> 18 16 #include <linux/module.h> 19 19 - #include <linux/platform_device.h> 20 17 #include <linux/slab.h> 21 18 #include <linux/types.h> 19 19 + #include <linux/usb/ljca.h> 22 20 23 21 /* GPIO commands */ 24 24 - #define LJCA_GPIO_CONFIG 1 25 25 - #define LJCA_GPIO_READ 2 26 26 - #define LJCA_GPIO_WRITE 3 27 27 - #define LJCA_GPIO_INT_EVENT 4 28 28 - #define LJCA_GPIO_INT_MASK 5 29 29 - #define LJCA_GPIO_INT_UNMASK 6 22 22 + #define LJCA_GPIO_CONFIG 1 23 23 + #define LJCA_GPIO_READ 2 24 24 + #define LJCA_GPIO_WRITE 3 25 25 + #define LJCA_GPIO_INT_EVENT 4 26 26 + #define LJCA_GPIO_INT_MASK 5 27 27 + #define LJCA_GPIO_INT_UNMASK 6 30 28 31 29 #define LJCA_GPIO_CONF_DISABLE BIT(0) 32 30 #define LJCA_GPIO_CONF_INPUT BIT(1) ··· 36 36 #define LJCA_GPIO_CONF_INTERRUPT BIT(6) 37 37 #define LJCA_GPIO_INT_TYPE BIT(7) 38 38 39 39 - #define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1) 40 40 - #define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0) 39 39 + #define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1) 40 40 + #define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0) 41 41 42 42 /* Intentional overlap with PULLUP / PULLDOWN */ 43 43 - #define LJCA_GPIO_CONF_SET BIT(3) 44 44 - #define LJCA_GPIO_CONF_CLR BIT(4) 43 43 + #define LJCA_GPIO_CONF_SET BIT(3) 44 44 + #define LJCA_GPIO_CONF_CLR BIT(4) 45 45 46 46 - struct gpio_op { 46 46 + #define LJCA_GPIO_BUF_SIZE 60u 47 47 + 48 48 + struct ljca_gpio_op { 47 49 u8 index; 48 50 u8 value; 49 51 } __packed; 50 52 51 51 - struct gpio_packet { 53 53 + struct ljca_gpio_packet { 52 54 u8 num; 53 53 - struct gpio_op item[]; 55 55 + struct ljca_gpio_op item[] __counted_by(num); 54 56 } __packed; 55 57 56 56 - #define LJCA_GPIO_BUF_SIZE 60 57 58 struct ljca_gpio_dev { 58 58 - struct platform_device *pdev; 59 59 + struct ljca_client *ljca; 59 60 struct gpio_chip gc; 60 61 struct ljca_gpio_info *gpio_info; 61 62 DECLARE_BITMAP(unmasked_irqs, LJCA_MAX_GPIO_NUM); 62 63 DECLARE_BITMAP(enabled_irqs, LJCA_MAX_GPIO_NUM); 63 64 DECLARE_BITMAP(reenable_irqs, LJCA_MAX_GPIO_NUM); 65 65 + DECLARE_BITMAP(output_enabled, LJCA_MAX_GPIO_NUM); 64 66 u8 *connect_mode; 65 65 - /* mutex to protect irq bus */ 67 67 + /* protect irq bus */ 66 68 struct mutex irq_lock; 67 69 struct work_struct work; 68 68 - /* lock to protect package transfer to Hardware */ 70 70 + /* protect package transfer to hardware */ 69 71 struct mutex trans_lock; 70 72 71 73 u8 obuf[LJCA_GPIO_BUF_SIZE]; 72 74 u8 ibuf[LJCA_GPIO_BUF_SIZE]; 73 75 }; 74 76 75 75 - static int gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, u8 config) 77 77 + static int ljca_gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, 78 78 + u8 config) 76 79 { 77 77 - struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 80 80 + struct ljca_gpio_packet *packet = 81 81 + (struct ljca_gpio_packet *)ljca_gpio->obuf; 78 82 int ret; 79 83 80 84 mutex_lock(&ljca_gpio->trans_lock); ··· 86 82 packet->item[0].value = config | ljca_gpio->connect_mode[gpio_id]; 87 83 packet->num = 1; 88 84 89 89 - ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_CONFIG, packet, 90 90 - struct_size(packet, item, packet->num), NULL, NULL); 85 85 + ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_CONFIG, (u8 *)packet, 86 86 + struct_size(packet, item, packet->num), NULL, 0); 91 87 mutex_unlock(&ljca_gpio->trans_lock); 92 92 - return ret; 88 88 + 89 89 + return ret < 0 ? ret : 0; 93 90 } 94 91 95 92 static int ljca_gpio_read(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id) 96 93 { 97 97 - struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 98 98 - struct gpio_packet *ack_packet = (struct gpio_packet *)ljca_gpio->ibuf; 99 99 - unsigned int ibuf_len = LJCA_GPIO_BUF_SIZE; 94 94 + struct ljca_gpio_packet *ack_packet = 95 95 + (struct ljca_gpio_packet *)ljca_gpio->ibuf; 96 96 + struct ljca_gpio_packet *packet = 97 97 + (struct ljca_gpio_packet *)ljca_gpio->obuf; 100 98 int ret; 101 99 102 100 mutex_lock(&ljca_gpio->trans_lock); 103 101 packet->num = 1; 104 102 packet->item[0].index = gpio_id; 105 105 - ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_READ, packet, 106 106 - struct_size(packet, item, packet->num), ljca_gpio->ibuf, &ibuf_len); 107 107 - if (ret) 108 108 - goto out_unlock; 103 103 + ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_READ, (u8 *)packet, 104 104 + struct_size(packet, item, packet->num), 105 105 + ljca_gpio->ibuf, LJCA_GPIO_BUF_SIZE); 109 106 110 110 - if (!ibuf_len || ack_packet->num != packet->num) { 111 111 - dev_err(&ljca_gpio->pdev->dev, "failed gpio_id:%u %u", gpio_id, ack_packet->num); 112 112 - ret = -EIO; 107 107 + if (ret <= 0 || ack_packet->num != packet->num) { 108 108 + dev_err(&ljca_gpio->ljca->auxdev.dev, 109 109 + "read package error, gpio_id: %u num: %u ret: %d\n", 110 110 + gpio_id, ack_packet->num, ret); 111 111 + ret = ret < 0 ? ret : -EIO; 113 112 } 114 114 - 115 115 - out_unlock: 116 113 mutex_unlock(&ljca_gpio->trans_lock); 117 117 - if (ret) 118 118 - return ret; 119 119 - return ack_packet->item[0].value > 0; 114 114 + 115 115 + return ret < 0 ? ret : ack_packet->item[0].value > 0; 120 116 } 121 117 122 122 - static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, 123 123 - int value) 118 118 + static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, int value) 124 119 { 125 125 - struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 120 120 + struct ljca_gpio_packet *packet = 121 121 + (struct ljca_gpio_packet *)ljca_gpio->obuf; 126 122 int ret; 127 123 128 124 mutex_lock(&ljca_gpio->trans_lock); ··· 130 126 packet->item[0].index = gpio_id; 131 127 packet->item[0].value = value & 1; 132 128 133 133 - ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_WRITE, packet, 134 134 - struct_size(packet, item, packet->num), NULL, NULL); 129 129 + ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_WRITE, (u8 *)packet, 130 130 + struct_size(packet, item, packet->num), NULL, 0); 135 131 mutex_unlock(&ljca_gpio->trans_lock); 136 136 - return ret; 132 132 + 133 133 + return ret < 0 ? ret : 0; 137 134 } 138 135 139 136 static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset) ··· 152 147 153 148 ret = ljca_gpio_write(ljca_gpio, offset, val); 154 149 if (ret) 155 155 - dev_err(chip->parent, "offset:%u val:%d set value failed %d\n", offset, val, ret); 150 150 + dev_err(chip->parent, 151 151 + "set value failed offset: %u val: %d ret: %d\n", 152 152 + offset, val, ret); 156 153 } 157 154 158 158 - static int ljca_gpio_direction_input(struct gpio_chip *chip, 159 159 - unsigned int offset) 155 155 + static int ljca_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) 160 156 { 161 157 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 162 158 u8 config = LJCA_GPIO_CONF_INPUT | LJCA_GPIO_CONF_CLR; 159 159 + int ret; 163 160 164 164 - return gpio_config(ljca_gpio, offset, config); 161 161 + ret = ljca_gpio_config(ljca_gpio, offset, config); 162 162 + if (ret) 163 163 + return ret; 164 164 + 165 165 + clear_bit(offset, ljca_gpio->output_enabled); 166 166 + 167 167 + return 0; 165 168 } 166 169 167 170 static int ljca_gpio_direction_output(struct gpio_chip *chip, ··· 179 166 u8 config = LJCA_GPIO_CONF_OUTPUT | LJCA_GPIO_CONF_CLR; 180 167 int ret; 181 168 182 182 - ret = gpio_config(ljca_gpio, offset, config); 169 169 + ret = ljca_gpio_config(ljca_gpio, offset, config); 183 170 if (ret) 184 171 return ret; 185 172 186 173 ljca_gpio_set_value(chip, offset, val); 174 174 + set_bit(offset, ljca_gpio->output_enabled); 175 175 + 187 176 return 0; 177 177 + } 178 178 + 179 179 + static int ljca_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 180 180 + { 181 181 + struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 182 182 + 183 183 + if (test_bit(offset, ljca_gpio->output_enabled)) 184 184 + return GPIO_LINE_DIRECTION_OUT; 185 185 + 186 186 + return GPIO_LINE_DIRECTION_IN; 188 187 } 189 188 190 189 static int ljca_gpio_set_config(struct gpio_chip *chip, unsigned int offset, ··· 222 197 return 0; 223 198 } 224 199 225 225 - static int ljca_gpio_init_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, 200 200 + static int ljca_gpio_init_valid_mask(struct gpio_chip *chip, 201 201 + unsigned long *valid_mask, 226 202 unsigned int ngpios) 227 203 { 228 204 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); ··· 234 208 return 0; 235 209 } 236 210 237 237 - static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, 211 211 + static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip, 212 212 + unsigned long *valid_mask, 238 213 unsigned int ngpios) 239 214 { 240 215 ljca_gpio_init_valid_mask(chip, valid_mask, ngpios); 241 216 } 242 217 243 243 - static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id, bool enable) 218 218 + static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id, 219 219 + bool enable) 244 220 { 245 245 - struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 221 221 + struct ljca_gpio_packet *packet = 222 222 + (struct ljca_gpio_packet *)ljca_gpio->obuf; 246 223 int ret; 247 224 248 225 mutex_lock(&ljca_gpio->trans_lock); ··· 253 224 packet->item[0].index = gpio_id; 254 225 packet->item[0].value = 0; 255 226 256 256 - ret = ljca_transfer(ljca_gpio->gpio_info->ljca, 257 257 - enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK, packet, 258 258 - struct_size(packet, item, packet->num), NULL, NULL); 227 227 + ret = ljca_transfer(ljca_gpio->ljca, 228 228 + enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK, 229 229 + (u8 *)packet, struct_size(packet, item, packet->num), 230 230 + NULL, 0); 259 231 mutex_unlock(&ljca_gpio->trans_lock); 260 260 - return ret; 232 232 + 233 233 + return ret < 0 ? ret : 0; 261 234 } 262 235 263 236 static void ljca_gpio_async(struct work_struct *work) 264 237 { 265 265 - struct ljca_gpio_dev *ljca_gpio = container_of(work, struct ljca_gpio_dev, work); 266 266 - int gpio_id; 267 267 - int unmasked; 238 238 + struct ljca_gpio_dev *ljca_gpio = 239 239 + container_of(work, struct ljca_gpio_dev, work); 240 240 + int gpio_id, unmasked; 268 241 269 242 for_each_set_bit(gpio_id, ljca_gpio->reenable_irqs, ljca_gpio->gc.ngpio) { 270 243 clear_bit(gpio_id, ljca_gpio->reenable_irqs); ··· 276 245 } 277 246 } 278 247 279 279 - static void ljca_gpio_event_cb(void *context, u8 cmd, const void *evt_data, int len) 248 248 + static void ljca_gpio_event_cb(void *context, u8 cmd, const void *evt_data, 249 249 + int len) 280 250 { 281 281 - const struct gpio_packet *packet = evt_data; 251 251 + const struct ljca_gpio_packet *packet = evt_data; 282 252 struct ljca_gpio_dev *ljca_gpio = context; 283 283 - int i; 284 284 - int irq; 253 253 + int i, irq; 285 254 286 255 if (cmd != LJCA_GPIO_INT_EVENT) 287 256 return; 288 257 289 258 for (i = 0; i < packet->num; i++) { 290 290 - irq = irq_find_mapping(ljca_gpio->gc.irq.domain, packet->item[i].index); 259 259 + irq = irq_find_mapping(ljca_gpio->gc.irq.domain, 260 260 + packet->item[i].index); 291 261 if (!irq) { 292 292 - dev_err(ljca_gpio->gc.parent, "gpio_id %u does not mapped to IRQ yet\n", 262 262 + dev_err(ljca_gpio->gc.parent, 263 263 + "gpio_id %u does not mapped to IRQ yet\n", 293 264 packet->item[i].index); 294 265 return; 295 266 } ··· 332 299 ljca_gpio->connect_mode[gpio_id] = LJCA_GPIO_CONF_INTERRUPT; 333 300 switch (type) { 334 301 case IRQ_TYPE_LEVEL_HIGH: 335 335 - ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLUP); 302 302 + ljca_gpio->connect_mode[gpio_id] |= 303 303 + (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLUP); 336 304 break; 337 305 case IRQ_TYPE_LEVEL_LOW: 338 338 - ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLDOWN); 306 306 + ljca_gpio->connect_mode[gpio_id] |= 307 307 + (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLDOWN); 339 308 break; 340 309 case IRQ_TYPE_EDGE_BOTH: 341 310 break; 342 311 case IRQ_TYPE_EDGE_RISING: 343 343 - ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLUP); 312 312 + ljca_gpio->connect_mode[gpio_id] |= 313 313 + (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLUP); 344 314 break; 345 315 case IRQ_TYPE_EDGE_FALLING: 346 346 - ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLDOWN); 316 316 + ljca_gpio->connect_mode[gpio_id] |= 317 317 + (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLDOWN); 347 318 break; 348 319 default: 349 320 return -EINVAL; ··· 369 332 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); 370 333 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc); 371 334 int gpio_id = irqd_to_hwirq(irqd); 372 372 - int enabled; 373 373 - int unmasked; 335 335 + int enabled, unmasked; 374 336 375 337 enabled = test_bit(gpio_id, ljca_gpio->enabled_irqs); 376 338 unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs); 377 339 378 340 if (enabled != unmasked) { 379 341 if (unmasked) { 380 380 - gpio_config(ljca_gpio, gpio_id, 0); 342 342 + ljca_gpio_config(ljca_gpio, gpio_id, 0); 381 343 ljca_enable_irq(ljca_gpio, gpio_id, true); 382 344 set_bit(gpio_id, ljca_gpio->enabled_irqs); 383 345 } else { ··· 399 363 GPIOCHIP_IRQ_RESOURCE_HELPERS, 400 364 }; 401 365 402 402 - static int ljca_gpio_probe(struct platform_device *pdev) 366 366 + static int ljca_gpio_probe(struct auxiliary_device *auxdev, 367 367 + const struct auxiliary_device_id *aux_dev_id) 403 368 { 369 369 + struct ljca_client *ljca = auxiliary_dev_to_ljca_client(auxdev); 404 370 struct ljca_gpio_dev *ljca_gpio; 405 371 struct gpio_irq_chip *girq; 406 372 int ret; 407 373 408 408 - ljca_gpio = devm_kzalloc(&pdev->dev, sizeof(*ljca_gpio), GFP_KERNEL); 374 374 + ljca_gpio = devm_kzalloc(&auxdev->dev, sizeof(*ljca_gpio), GFP_KERNEL); 409 375 if (!ljca_gpio) 410 376 return -ENOMEM; 411 377 412 412 - ljca_gpio->gpio_info = dev_get_platdata(&pdev->dev); 413 413 - ljca_gpio->connect_mode = devm_kcalloc(&pdev->dev, ljca_gpio->gpio_info->num, 414 414 - sizeof(*ljca_gpio->connect_mode), GFP_KERNEL); 378 378 + ljca_gpio->ljca = ljca; 379 379 + ljca_gpio->gpio_info = dev_get_platdata(&auxdev->dev); 380 380 + ljca_gpio->connect_mode = devm_kcalloc(&auxdev->dev, 381 381 + ljca_gpio->gpio_info->num, 382 382 + sizeof(*ljca_gpio->connect_mode), 383 383 + GFP_KERNEL); 415 384 if (!ljca_gpio->connect_mode) 416 385 return -ENOMEM; 417 386 418 387 mutex_init(&ljca_gpio->irq_lock); 419 388 mutex_init(&ljca_gpio->trans_lock); 420 420 - ljca_gpio->pdev = pdev; 421 389 ljca_gpio->gc.direction_input = ljca_gpio_direction_input; 422 390 ljca_gpio->gc.direction_output = ljca_gpio_direction_output; 391 391 + ljca_gpio->gc.get_direction = ljca_gpio_get_direction; 423 392 ljca_gpio->gc.get = ljca_gpio_get_value; 424 393 ljca_gpio->gc.set = ljca_gpio_set_value; 425 394 ljca_gpio->gc.set_config = ljca_gpio_set_config; 426 395 ljca_gpio->gc.init_valid_mask = ljca_gpio_init_valid_mask; 427 396 ljca_gpio->gc.can_sleep = true; 428 428 - ljca_gpio->gc.parent = &pdev->dev; 397 397 + ljca_gpio->gc.parent = &auxdev->dev; 429 398 430 399 ljca_gpio->gc.base = -1; 431 400 ljca_gpio->gc.ngpio = ljca_gpio->gpio_info->num; 432 432 - ljca_gpio->gc.label = ACPI_COMPANION(&pdev->dev) ? 433 433 - acpi_dev_name(ACPI_COMPANION(&pdev->dev)) : 434 434 - dev_name(&pdev->dev); 401 401 + ljca_gpio->gc.label = ACPI_COMPANION(&auxdev->dev) ? 402 402 + acpi_dev_name(ACPI_COMPANION(&auxdev->dev)) : 403 403 + dev_name(&auxdev->dev); 435 404 ljca_gpio->gc.owner = THIS_MODULE; 436 405 437 437 - platform_set_drvdata(pdev, ljca_gpio); 438 438 - ljca_register_event_cb(ljca_gpio->gpio_info->ljca, ljca_gpio_event_cb, ljca_gpio); 406 406 + auxiliary_set_drvdata(auxdev, ljca_gpio); 407 407 + ljca_register_event_cb(ljca, ljca_gpio_event_cb, ljca_gpio); 439 408 440 409 girq = &ljca_gpio->gc.irq; 441 410 gpio_irq_chip_set_chip(girq, &ljca_gpio_irqchip); ··· 454 413 INIT_WORK(&ljca_gpio->work, ljca_gpio_async); 455 414 ret = gpiochip_add_data(&ljca_gpio->gc, ljca_gpio); 456 415 if (ret) { 457 457 - ljca_unregister_event_cb(ljca_gpio->gpio_info->ljca); 416 416 + ljca_unregister_event_cb(ljca); 458 417 mutex_destroy(&ljca_gpio->irq_lock); 459 418 mutex_destroy(&ljca_gpio->trans_lock); 460 419 } ··· 462 421 return ret; 463 422 } 464 423 465 465 - static void ljca_gpio_remove(struct platform_device *pdev) 424 424 + static void ljca_gpio_remove(struct auxiliary_device *auxdev) 466 425 { 467 467 - struct ljca_gpio_dev *ljca_gpio = platform_get_drvdata(pdev); 426 426 + struct ljca_gpio_dev *ljca_gpio = auxiliary_get_drvdata(auxdev); 468 427 469 428 gpiochip_remove(&ljca_gpio->gc); 470 470 - ljca_unregister_event_cb(ljca_gpio->gpio_info->ljca); 429 429 + ljca_unregister_event_cb(ljca_gpio->ljca); 430 430 + cancel_work_sync(&ljca_gpio->work); 471 431 mutex_destroy(&ljca_gpio->irq_lock); 472 432 mutex_destroy(&ljca_gpio->trans_lock); 473 433 } 474 434 475 475 - #define LJCA_GPIO_DRV_NAME "ljca-gpio" 476 476 - static const struct platform_device_id ljca_gpio_id[] = { 477 477 - { LJCA_GPIO_DRV_NAME, 0 }, 478 478 - { /* sentinel */ } 435 435 + static const struct auxiliary_device_id ljca_gpio_id_table[] = { 436 436 + { "usb_ljca.ljca-gpio", 0 }, 437 437 + { /* sentinel */ }, 479 438 }; 480 480 - MODULE_DEVICE_TABLE(platform, ljca_gpio_id); 439 439 + MODULE_DEVICE_TABLE(auxiliary, ljca_gpio_id_table); 481 440 482 482 - static struct platform_driver ljca_gpio_driver = { 483 483 - .driver.name = LJCA_GPIO_DRV_NAME, 441 441 + static struct auxiliary_driver ljca_gpio_driver = { 484 442 .probe = ljca_gpio_probe, 485 485 - .remove_new = ljca_gpio_remove, 443 443 + .remove = ljca_gpio_remove, 444 444 + .id_table = ljca_gpio_id_table, 486 445 }; 487 487 - module_platform_driver(ljca_gpio_driver); 446 446 + module_auxiliary_driver(ljca_gpio_driver); 488 447 489 489 - MODULE_AUTHOR("Ye Xiang <xiang.ye@intel.com>"); 490 490 - MODULE_AUTHOR("Wang Zhifeng <zhifeng.wang@intel.com>"); 491 491 - MODULE_AUTHOR("Zhang Lixu <lixu.zhang@intel.com>"); 448 448 + MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>"); 449 449 + MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>"); 450 450 + MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>"); 492 451 MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-GPIO driver"); 493 452 MODULE_LICENSE("GPL"); 494 453 MODULE_IMPORT_NS(LJCA);

+11

drivers/i2c/busses/Kconfig

reviewed

··· 1264 1264 This driver can also be built as a module. If so, the module 1265 1265 will be called i2c-dln2. 1266 1266 1267 1267 + config I2C_LJCA 1268 1268 + tristate "I2C functionality of Intel La Jolla Cove Adapter" 1269 1269 + depends on USB_LJCA 1270 1270 + default USB_LJCA 1271 1271 + help 1272 1272 + If you say yes to this option, I2C functionality support of Intel 1273 1273 + La Jolla Cove Adapter (LJCA) will be included. 1274 1274 + 1275 1275 + This driver can also be built as a module. If so, the module 1276 1276 + will be called i2c-ljca. 1277 1277 + 1267 1278 config I2C_CP2615 1268 1279 tristate "Silicon Labs CP2615 USB sound card and I2C adapter" 1269 1280 depends on USB

+1

drivers/i2c/busses/Makefile

reviewed

··· 133 133 # External I2C/SMBus adapter drivers 134 134 obj-$(CONFIG_I2C_DIOLAN_U2C) += i2c-diolan-u2c.o 135 135 obj-$(CONFIG_I2C_DLN2) += i2c-dln2.o 136 136 + obj-$(CONFIG_I2C_LJCA) += i2c-ljca.o 136 137 obj-$(CONFIG_I2C_CP2615) += i2c-cp2615.o 137 138 obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o 138 139 obj-$(CONFIG_I2C_PCI1XXXX) += i2c-mchp-pci1xxxx.o

+343

drivers/i2c/busses/i2c-ljca.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-only 2 2 + /* 3 3 + * Intel La Jolla Cove Adapter USB-I2C driver 4 4 + * 5 5 + * Copyright (c) 2023, Intel Corporation. 6 6 + */ 7 7 + 8 8 + #include <linux/acpi.h> 9 9 + #include <linux/auxiliary_bus.h> 10 10 + #include <linux/bitfield.h> 11 11 + #include <linux/bits.h> 12 12 + #include <linux/dev_printk.h> 13 13 + #include <linux/i2c.h> 14 14 + #include <linux/module.h> 15 15 + #include <linux/usb/ljca.h> 16 16 + 17 17 + /* I2C init flags */ 18 18 + #define LJCA_I2C_INIT_FLAG_MODE BIT(0) 19 19 + #define LJCA_I2C_INIT_FLAG_MODE_POLLING FIELD_PREP(LJCA_I2C_INIT_FLAG_MODE, 0) 20 20 + #define LJCA_I2C_INIT_FLAG_MODE_INTERRUPT FIELD_PREP(LJCA_I2C_INIT_FLAG_MODE, 1) 21 21 + 22 22 + #define LJCA_I2C_INIT_FLAG_ADDR_16BIT BIT(0) 23 23 + 24 24 + #define LJCA_I2C_INIT_FLAG_FREQ GENMASK(2, 1) 25 25 + #define LJCA_I2C_INIT_FLAG_FREQ_100K FIELD_PREP(LJCA_I2C_INIT_FLAG_FREQ, 0) 26 26 + #define LJCA_I2C_INIT_FLAG_FREQ_400K FIELD_PREP(LJCA_I2C_INIT_FLAG_FREQ, 1) 27 27 + #define LJCA_I2C_INIT_FLAG_FREQ_1M FIELD_PREP(LJCA_I2C_INIT_FLAG_FREQ, 2) 28 28 + 29 29 + #define LJCA_I2C_BUF_SIZE 60u 30 30 + #define LJCA_I2C_MAX_XFER_SIZE (LJCA_I2C_BUF_SIZE - sizeof(struct ljca_i2c_rw_packet)) 31 31 + 32 32 + /* I2C commands */ 33 33 + enum ljca_i2c_cmd { 34 34 + LJCA_I2C_INIT = 1, 35 35 + LJCA_I2C_XFER, 36 36 + LJCA_I2C_START, 37 37 + LJCA_I2C_STOP, 38 38 + LJCA_I2C_READ, 39 39 + LJCA_I2C_WRITE, 40 40 + }; 41 41 + 42 42 + enum ljca_xfer_type { 43 43 + LJCA_I2C_WRITE_XFER_TYPE, 44 44 + LJCA_I2C_READ_XFER_TYPE, 45 45 + }; 46 46 + 47 47 + /* I2C raw commands: Init/Start/Read/Write/Stop */ 48 48 + struct ljca_i2c_rw_packet { 49 49 + u8 id; 50 50 + __le16 len; 51 51 + u8 data[] __counted_by(len); 52 52 + } __packed; 53 53 + 54 54 + struct ljca_i2c_dev { 55 55 + struct ljca_client *ljca; 56 56 + struct ljca_i2c_info *i2c_info; 57 57 + struct i2c_adapter adap; 58 58 + 59 59 + u8 obuf[LJCA_I2C_BUF_SIZE]; 60 60 + u8 ibuf[LJCA_I2C_BUF_SIZE]; 61 61 + }; 62 62 + 63 63 + static int ljca_i2c_init(struct ljca_i2c_dev *ljca_i2c, u8 id) 64 64 + { 65 65 + struct ljca_i2c_rw_packet *w_packet = 66 66 + (struct ljca_i2c_rw_packet *)ljca_i2c->obuf; 67 67 + int ret; 68 68 + 69 69 + w_packet->id = id; 70 70 + w_packet->len = cpu_to_le16(sizeof(*w_packet->data)); 71 71 + w_packet->data[0] = LJCA_I2C_INIT_FLAG_FREQ_400K; 72 72 + 73 73 + ret = ljca_transfer(ljca_i2c->ljca, LJCA_I2C_INIT, (u8 *)w_packet, 74 74 + struct_size(w_packet, data, 1), NULL, 0); 75 75 + 76 76 + return ret < 0 ? ret : 0; 77 77 + } 78 78 + 79 79 + static int ljca_i2c_start(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr, 80 80 + enum ljca_xfer_type type) 81 81 + { 82 82 + struct ljca_i2c_rw_packet *w_packet = 83 83 + (struct ljca_i2c_rw_packet *)ljca_i2c->obuf; 84 84 + struct ljca_i2c_rw_packet *r_packet = 85 85 + (struct ljca_i2c_rw_packet *)ljca_i2c->ibuf; 86 86 + s16 rp_len; 87 87 + int ret; 88 88 + 89 89 + w_packet->id = ljca_i2c->i2c_info->id; 90 90 + w_packet->len = cpu_to_le16(sizeof(*w_packet->data)); 91 91 + w_packet->data[0] = (slave_addr << 1) | type; 92 92 + 93 93 + ret = ljca_transfer(ljca_i2c->ljca, LJCA_I2C_START, (u8 *)w_packet, 94 94 + struct_size(w_packet, data, 1), (u8 *)r_packet, 95 95 + LJCA_I2C_BUF_SIZE); 96 96 + if (ret < 0 || ret < sizeof(*r_packet)) 97 97 + return ret < 0 ? ret : -EIO; 98 98 + 99 99 + rp_len = le16_to_cpu(r_packet->len); 100 100 + if (rp_len < 0 || r_packet->id != w_packet->id) { 101 101 + dev_dbg(&ljca_i2c->adap.dev, 102 102 + "i2c start failed len: %d id: %d %d\n", 103 103 + rp_len, r_packet->id, w_packet->id); 104 104 + return -EIO; 105 105 + } 106 106 + 107 107 + return 0; 108 108 + } 109 109 + 110 110 + static void ljca_i2c_stop(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr) 111 111 + { 112 112 + struct ljca_i2c_rw_packet *w_packet = 113 113 + (struct ljca_i2c_rw_packet *)ljca_i2c->obuf; 114 114 + struct ljca_i2c_rw_packet *r_packet = 115 115 + (struct ljca_i2c_rw_packet *)ljca_i2c->ibuf; 116 116 + s16 rp_len; 117 117 + int ret; 118 118 + 119 119 + w_packet->id = ljca_i2c->i2c_info->id; 120 120 + w_packet->len = cpu_to_le16(sizeof(*w_packet->data)); 121 121 + w_packet->data[0] = 0; 122 122 + 123 123 + ret = ljca_transfer(ljca_i2c->ljca, LJCA_I2C_STOP, (u8 *)w_packet, 124 124 + struct_size(w_packet, data, 1), (u8 *)r_packet, 125 125 + LJCA_I2C_BUF_SIZE); 126 126 + if (ret < 0 || ret < sizeof(*r_packet)) { 127 127 + dev_dbg(&ljca_i2c->adap.dev, 128 128 + "i2c stop failed ret: %d id: %d\n", 129 129 + ret, w_packet->id); 130 130 + return; 131 131 + } 132 132 + 133 133 + rp_len = le16_to_cpu(r_packet->len); 134 134 + if (rp_len < 0 || r_packet->id != w_packet->id) 135 135 + dev_dbg(&ljca_i2c->adap.dev, 136 136 + "i2c stop failed len: %d id: %d %d\n", 137 137 + rp_len, r_packet->id, w_packet->id); 138 138 + } 139 139 + 140 140 + static int ljca_i2c_pure_read(struct ljca_i2c_dev *ljca_i2c, u8 *data, u8 len) 141 141 + { 142 142 + struct ljca_i2c_rw_packet *w_packet = 143 143 + (struct ljca_i2c_rw_packet *)ljca_i2c->obuf; 144 144 + struct ljca_i2c_rw_packet *r_packet = 145 145 + (struct ljca_i2c_rw_packet *)ljca_i2c->ibuf; 146 146 + s16 rp_len; 147 147 + int ret; 148 148 + 149 149 + w_packet->id = ljca_i2c->i2c_info->id; 150 150 + w_packet->len = cpu_to_le16(len); 151 151 + w_packet->data[0] = 0; 152 152 + 153 153 + ret = ljca_transfer(ljca_i2c->ljca, LJCA_I2C_READ, (u8 *)w_packet, 154 154 + struct_size(w_packet, data, 1), (u8 *)r_packet, 155 155 + LJCA_I2C_BUF_SIZE); 156 156 + if (ret < 0 || ret < sizeof(*r_packet)) 157 157 + return ret < 0 ? ret : -EIO; 158 158 + 159 159 + rp_len = le16_to_cpu(r_packet->len); 160 160 + if (rp_len != len || r_packet->id != w_packet->id) { 161 161 + dev_dbg(&ljca_i2c->adap.dev, 162 162 + "i2c raw read failed len: %d id: %d %d\n", 163 163 + rp_len, r_packet->id, w_packet->id); 164 164 + return -EIO; 165 165 + } 166 166 + 167 167 + memcpy(data, r_packet->data, len); 168 168 + 169 169 + return 0; 170 170 + } 171 171 + 172 172 + static int ljca_i2c_read(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr, u8 *data, 173 173 + u8 len) 174 174 + { 175 175 + int ret; 176 176 + 177 177 + ret = ljca_i2c_start(ljca_i2c, slave_addr, LJCA_I2C_READ_XFER_TYPE); 178 178 + if (!ret) 179 179 + ret = ljca_i2c_pure_read(ljca_i2c, data, len); 180 180 + 181 181 + ljca_i2c_stop(ljca_i2c, slave_addr); 182 182 + 183 183 + return ret; 184 184 + } 185 185 + 186 186 + static int ljca_i2c_pure_write(struct ljca_i2c_dev *ljca_i2c, u8 *data, u8 len) 187 187 + { 188 188 + struct ljca_i2c_rw_packet *w_packet = 189 189 + (struct ljca_i2c_rw_packet *)ljca_i2c->obuf; 190 190 + struct ljca_i2c_rw_packet *r_packet = 191 191 + (struct ljca_i2c_rw_packet *)ljca_i2c->ibuf; 192 192 + s16 rplen; 193 193 + int ret; 194 194 + 195 195 + w_packet->id = ljca_i2c->i2c_info->id; 196 196 + w_packet->len = cpu_to_le16(len); 197 197 + memcpy(w_packet->data, data, len); 198 198 + 199 199 + ret = ljca_transfer(ljca_i2c->ljca, LJCA_I2C_WRITE, (u8 *)w_packet, 200 200 + struct_size(w_packet, data, len), (u8 *)r_packet, 201 201 + LJCA_I2C_BUF_SIZE); 202 202 + if (ret < 0 || ret < sizeof(*r_packet)) 203 203 + return ret < 0 ? ret : -EIO; 204 204 + 205 205 + rplen = le16_to_cpu(r_packet->len); 206 206 + if (rplen != len || r_packet->id != w_packet->id) { 207 207 + dev_dbg(&ljca_i2c->adap.dev, 208 208 + "i2c write failed len: %d id: %d/%d\n", 209 209 + rplen, r_packet->id, w_packet->id); 210 210 + return -EIO; 211 211 + } 212 212 + 213 213 + return 0; 214 214 + } 215 215 + 216 216 + static int ljca_i2c_write(struct ljca_i2c_dev *ljca_i2c, u8 slave_addr, 217 217 + u8 *data, u8 len) 218 218 + { 219 219 + int ret; 220 220 + 221 221 + ret = ljca_i2c_start(ljca_i2c, slave_addr, LJCA_I2C_WRITE_XFER_TYPE); 222 222 + if (!ret) 223 223 + ret = ljca_i2c_pure_write(ljca_i2c, data, len); 224 224 + 225 225 + ljca_i2c_stop(ljca_i2c, slave_addr); 226 226 + 227 227 + return ret; 228 228 + } 229 229 + 230 230 + static int ljca_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msg, 231 231 + int num) 232 232 + { 233 233 + struct ljca_i2c_dev *ljca_i2c; 234 234 + struct i2c_msg *cur_msg; 235 235 + int i, ret; 236 236 + 237 237 + ljca_i2c = i2c_get_adapdata(adapter); 238 238 + if (!ljca_i2c) 239 239 + return -EINVAL; 240 240 + 241 241 + for (i = 0; i < num; i++) { 242 242 + cur_msg = &msg[i]; 243 243 + if (cur_msg->flags & I2C_M_RD) 244 244 + ret = ljca_i2c_read(ljca_i2c, cur_msg->addr, 245 245 + cur_msg->buf, cur_msg->len); 246 246 + else 247 247 + ret = ljca_i2c_write(ljca_i2c, cur_msg->addr, 248 248 + cur_msg->buf, cur_msg->len); 249 249 + 250 250 + if (ret) 251 251 + return ret; 252 252 + } 253 253 + 254 254 + return num; 255 255 + } 256 256 + 257 257 + static u32 ljca_i2c_func(struct i2c_adapter *adap) 258 258 + { 259 259 + return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK); 260 260 + } 261 261 + 262 262 + static const struct i2c_adapter_quirks ljca_i2c_quirks = { 263 263 + .flags = I2C_AQ_NO_ZERO_LEN, 264 264 + .max_read_len = LJCA_I2C_MAX_XFER_SIZE, 265 265 + .max_write_len = LJCA_I2C_MAX_XFER_SIZE, 266 266 + }; 267 267 + 268 268 + static const struct i2c_algorithm ljca_i2c_algo = { 269 269 + .master_xfer = ljca_i2c_xfer, 270 270 + .functionality = ljca_i2c_func, 271 271 + }; 272 272 + 273 273 + static int ljca_i2c_probe(struct auxiliary_device *auxdev, 274 274 + const struct auxiliary_device_id *aux_dev_id) 275 275 + { 276 276 + struct ljca_client *ljca = auxiliary_dev_to_ljca_client(auxdev); 277 277 + struct ljca_i2c_dev *ljca_i2c; 278 278 + int ret; 279 279 + 280 280 + ljca_i2c = devm_kzalloc(&auxdev->dev, sizeof(*ljca_i2c), GFP_KERNEL); 281 281 + if (!ljca_i2c) 282 282 + return -ENOMEM; 283 283 + 284 284 + ljca_i2c->ljca = ljca; 285 285 + ljca_i2c->i2c_info = dev_get_platdata(&auxdev->dev); 286 286 + 287 287 + ljca_i2c->adap.owner = THIS_MODULE; 288 288 + ljca_i2c->adap.class = I2C_CLASS_HWMON; 289 289 + ljca_i2c->adap.algo = &ljca_i2c_algo; 290 290 + ljca_i2c->adap.quirks = &ljca_i2c_quirks; 291 291 + ljca_i2c->adap.dev.parent = &auxdev->dev; 292 292 + 293 293 + snprintf(ljca_i2c->adap.name, sizeof(ljca_i2c->adap.name), "%s-%s-%d", 294 294 + dev_name(&auxdev->dev), dev_name(auxdev->dev.parent), 295 295 + ljca_i2c->i2c_info->id); 296 296 + 297 297 + device_set_node(&ljca_i2c->adap.dev, dev_fwnode(&auxdev->dev)); 298 298 + 299 299 + i2c_set_adapdata(&ljca_i2c->adap, ljca_i2c); 300 300 + auxiliary_set_drvdata(auxdev, ljca_i2c); 301 301 + 302 302 + ret = ljca_i2c_init(ljca_i2c, ljca_i2c->i2c_info->id); 303 303 + if (ret) 304 304 + return dev_err_probe(&auxdev->dev, -EIO, 305 305 + "i2c init failed id: %d\n", 306 306 + ljca_i2c->i2c_info->id); 307 307 + 308 308 + ret = devm_i2c_add_adapter(&auxdev->dev, &ljca_i2c->adap); 309 309 + if (ret) 310 310 + return ret; 311 311 + 312 312 + if (has_acpi_companion(&ljca_i2c->adap.dev)) 313 313 + acpi_dev_clear_dependencies(ACPI_COMPANION(&ljca_i2c->adap.dev)); 314 314 + 315 315 + return 0; 316 316 + } 317 317 + 318 318 + static void ljca_i2c_remove(struct auxiliary_device *auxdev) 319 319 + { 320 320 + struct ljca_i2c_dev *ljca_i2c = auxiliary_get_drvdata(auxdev); 321 321 + 322 322 + i2c_del_adapter(&ljca_i2c->adap); 323 323 + } 324 324 + 325 325 + static const struct auxiliary_device_id ljca_i2c_id_table[] = { 326 326 + { "usb_ljca.ljca-i2c", 0 }, 327 327 + { /* sentinel */ } 328 328 + }; 329 329 + MODULE_DEVICE_TABLE(auxiliary, ljca_i2c_id_table); 330 330 + 331 331 + static struct auxiliary_driver ljca_i2c_driver = { 332 332 + .probe = ljca_i2c_probe, 333 333 + .remove = ljca_i2c_remove, 334 334 + .id_table = ljca_i2c_id_table, 335 335 + }; 336 336 + module_auxiliary_driver(ljca_i2c_driver); 337 337 + 338 338 + MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>"); 339 339 + MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>"); 340 340 + MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>"); 341 341 + MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-I2C driver"); 342 342 + MODULE_LICENSE("GPL"); 343 343 + MODULE_IMPORT_NS(LJCA);

+28

drivers/platform/chrome/cros_ec_typec.c

reviewed

··· 492 492 { 493 493 struct cros_typec_port *port = typec->ports[port_num]; 494 494 struct typec_displayport_data dp_data; 495 495 + u32 cable_tbt_vdo; 496 496 + u32 cable_dp_vdo; 495 497 int ret; 496 498 497 499 if (typec->pd_ctrl_ver < 2) { ··· 525 523 526 524 port->state.data = &dp_data; 527 525 port->state.mode = TYPEC_MODAL_STATE(ffs(pd_ctrl->dp_mode)); 526 526 + 527 527 + /* Get cable VDO for cables with DPSID to check DPAM2.1 is supported */ 528 528 + cable_dp_vdo = cros_typec_get_cable_vdo(port, USB_TYPEC_DP_SID); 529 529 + 530 530 + /** 531 531 + * Get cable VDO for thunderbolt cables and cables with DPSID but does not 532 532 + * support DPAM2.1. 533 533 + */ 534 534 + cable_tbt_vdo = cros_typec_get_cable_vdo(port, USB_TYPEC_TBT_SID); 535 535 + 536 536 + if (cable_dp_vdo & DP_CAP_DPAM_VERSION) { 537 537 + dp_data.conf |= cable_dp_vdo; 538 538 + } else if (cable_tbt_vdo) { 539 539 + dp_data.conf |= TBT_CABLE_SPEED(cable_tbt_vdo) << DP_CONF_SIGNALLING_SHIFT; 540 540 + 541 541 + /* Cable Type */ 542 542 + if (cable_tbt_vdo & TBT_CABLE_OPTICAL) 543 543 + dp_data.conf |= DP_CONF_CABLE_TYPE_OPTICAL << DP_CONF_CABLE_TYPE_SHIFT; 544 544 + else if (cable_tbt_vdo & TBT_CABLE_RETIMER) 545 545 + dp_data.conf |= DP_CONF_CABLE_TYPE_RE_TIMER << DP_CONF_CABLE_TYPE_SHIFT; 546 546 + else if (cable_tbt_vdo & TBT_CABLE_ACTIVE_PASSIVE) 547 547 + dp_data.conf |= DP_CONF_CABLE_TYPE_RE_DRIVER << DP_CONF_CABLE_TYPE_SHIFT; 548 548 + } else if (PD_IDH_PTYPE(port->c_identity.id_header) == IDH_PTYPE_PCABLE) { 549 549 + dp_data.conf |= VDO_TYPEC_CABLE_SPEED(port->c_identity.vdo[0]) << 550 550 + DP_CONF_SIGNALLING_SHIFT; 551 551 + } 528 552 529 553 ret = cros_typec_retimer_set(port->retimer, port->state); 530 554 if (!ret)

+1 -1

drivers/power/supply/tps65217_charger.c

reviewed

··· 237 237 for (i = 0; i < NUM_CHARGER_IRQS; i++) { 238 238 ret = devm_request_threaded_irq(&pdev->dev, irq[i], NULL, 239 239 tps65217_charger_irq, 240 240 - IRQF_ONESHOT, "tps65217-charger", 240 240 + IRQF_SHARED, "tps65217-charger", 241 241 charger); 242 242 if (ret) { 243 243 dev_err(charger->dev,

+11

drivers/spi/Kconfig

reviewed

··· 616 616 From MPC8536, 85xx platform uses the controller, and all P10xx, 617 617 P20xx, P30xx,P40xx, P50xx uses this controller. 618 618 619 619 + config SPI_LJCA 620 620 + tristate "Intel La Jolla Cove Adapter SPI support" 621 621 + depends on USB_LJCA 622 622 + default USB_LJCA 623 623 + help 624 624 + Select this option to enable SPI driver for the Intel 625 625 + La Jolla Cove Adapter (LJCA) board. 626 626 + 627 627 + This driver can also be built as a module. If so, the module 628 628 + will be called spi-ljca. 629 629 + 619 630 config SPI_MESON_SPICC 620 631 tristate "Amlogic Meson SPICC controller" 621 632 depends on COMMON_CLK

+1

drivers/spi/Makefile

reviewed

··· 71 71 obj-$(CONFIG_SPI_INTEL_PLATFORM) += spi-intel-platform.o 72 72 obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o 73 73 obj-$(CONFIG_SPI_JCORE) += spi-jcore.o 74 74 + obj-$(CONFIG_SPI_LJCA) += spi-ljca.o 74 75 obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o 75 76 obj-$(CONFIG_SPI_LOONGSON_CORE) += spi-loongson-core.o 76 77 obj-$(CONFIG_SPI_LOONGSON_PCI) += spi-loongson-pci.o

+297

drivers/spi/spi-ljca.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-only 2 2 + /* 3 3 + * Intel La Jolla Cove Adapter USB-SPI driver 4 4 + * 5 5 + * Copyright (c) 2023, Intel Corporation. 6 6 + */ 7 7 + 8 8 + #include <linux/auxiliary_bus.h> 9 9 + #include <linux/bitfield.h> 10 10 + #include <linux/bits.h> 11 11 + #include <linux/dev_printk.h> 12 12 + #include <linux/module.h> 13 13 + #include <linux/spi/spi.h> 14 14 + #include <linux/usb/ljca.h> 15 15 + 16 16 + #define LJCA_SPI_BUS_MAX_HZ 48000000 17 17 + 18 18 + #define LJCA_SPI_BUF_SIZE 60u 19 19 + #define LJCA_SPI_MAX_XFER_SIZE \ 20 20 + (LJCA_SPI_BUF_SIZE - sizeof(struct ljca_spi_xfer_packet)) 21 21 + 22 22 + #define LJCA_SPI_CLK_MODE_POLARITY BIT(0) 23 23 + #define LJCA_SPI_CLK_MODE_PHASE BIT(1) 24 24 + 25 25 + #define LJCA_SPI_XFER_INDICATOR_ID GENMASK(5, 0) 26 26 + #define LJCA_SPI_XFER_INDICATOR_CMPL BIT(6) 27 27 + #define LJCA_SPI_XFER_INDICATOR_INDEX BIT(7) 28 28 + 29 29 + /* SPI commands */ 30 30 + enum ljca_spi_cmd { 31 31 + LJCA_SPI_INIT = 1, 32 32 + LJCA_SPI_READ, 33 33 + LJCA_SPI_WRITE, 34 34 + LJCA_SPI_WRITEREAD, 35 35 + LJCA_SPI_DEINIT, 36 36 + }; 37 37 + 38 38 + enum { 39 39 + LJCA_SPI_BUS_SPEED_24M, 40 40 + LJCA_SPI_BUS_SPEED_12M, 41 41 + LJCA_SPI_BUS_SPEED_8M, 42 42 + LJCA_SPI_BUS_SPEED_6M, 43 43 + LJCA_SPI_BUS_SPEED_4_8M, /*4.8MHz*/ 44 44 + LJCA_SPI_BUS_SPEED_MIN = LJCA_SPI_BUS_SPEED_4_8M, 45 45 + }; 46 46 + 47 47 + enum { 48 48 + LJCA_SPI_CLOCK_LOW_POLARITY, 49 49 + LJCA_SPI_CLOCK_HIGH_POLARITY, 50 50 + }; 51 51 + 52 52 + enum { 53 53 + LJCA_SPI_CLOCK_FIRST_PHASE, 54 54 + LJCA_SPI_CLOCK_SECOND_PHASE, 55 55 + }; 56 56 + 57 57 + struct ljca_spi_init_packet { 58 58 + u8 index; 59 59 + u8 speed; 60 60 + u8 mode; 61 61 + } __packed; 62 62 + 63 63 + struct ljca_spi_xfer_packet { 64 64 + u8 indicator; 65 65 + u8 len; 66 66 + u8 data[] __counted_by(len); 67 67 + } __packed; 68 68 + 69 69 + struct ljca_spi_dev { 70 70 + struct ljca_client *ljca; 71 71 + struct spi_controller *controller; 72 72 + struct ljca_spi_info *spi_info; 73 73 + u8 speed; 74 74 + u8 mode; 75 75 + 76 76 + u8 obuf[LJCA_SPI_BUF_SIZE]; 77 77 + u8 ibuf[LJCA_SPI_BUF_SIZE]; 78 78 + }; 79 79 + 80 80 + static int ljca_spi_read_write(struct ljca_spi_dev *ljca_spi, const u8 *w_data, 81 81 + u8 *r_data, int len, int id, int complete, 82 82 + int cmd) 83 83 + { 84 84 + struct ljca_spi_xfer_packet *w_packet = 85 85 + (struct ljca_spi_xfer_packet *)ljca_spi->obuf; 86 86 + struct ljca_spi_xfer_packet *r_packet = 87 87 + (struct ljca_spi_xfer_packet *)ljca_spi->ibuf; 88 88 + int ret; 89 89 + 90 90 + w_packet->indicator = FIELD_PREP(LJCA_SPI_XFER_INDICATOR_ID, id) | 91 91 + FIELD_PREP(LJCA_SPI_XFER_INDICATOR_CMPL, complete) | 92 92 + FIELD_PREP(LJCA_SPI_XFER_INDICATOR_INDEX, 93 93 + ljca_spi->spi_info->id); 94 94 + 95 95 + if (cmd == LJCA_SPI_READ) { 96 96 + w_packet->len = sizeof(u16); 97 97 + *(__le16 *)&w_packet->data[0] = cpu_to_le16(len); 98 98 + } else { 99 99 + w_packet->len = len; 100 100 + memcpy(w_packet->data, w_data, len); 101 101 + } 102 102 + 103 103 + ret = ljca_transfer(ljca_spi->ljca, cmd, (u8 *)w_packet, 104 104 + struct_size(w_packet, data, w_packet->len), 105 105 + (u8 *)r_packet, LJCA_SPI_BUF_SIZE); 106 106 + if (ret < 0) 107 107 + return ret; 108 108 + else if (ret < sizeof(*r_packet) || r_packet->len <= 0) 109 109 + return -EIO; 110 110 + 111 111 + if (r_data) 112 112 + memcpy(r_data, r_packet->data, r_packet->len); 113 113 + 114 114 + return 0; 115 115 + } 116 116 + 117 117 + static int ljca_spi_init(struct ljca_spi_dev *ljca_spi, u8 div, u8 mode) 118 118 + { 119 119 + struct ljca_spi_init_packet w_packet = {}; 120 120 + int ret; 121 121 + 122 122 + if (ljca_spi->mode == mode && ljca_spi->speed == div) 123 123 + return 0; 124 124 + 125 125 + w_packet.index = ljca_spi->spi_info->id; 126 126 + w_packet.speed = div; 127 127 + w_packet.mode = FIELD_PREP(LJCA_SPI_CLK_MODE_POLARITY, 128 128 + (mode & SPI_CPOL) ? LJCA_SPI_CLOCK_HIGH_POLARITY : 129 129 + LJCA_SPI_CLOCK_LOW_POLARITY) | 130 130 + FIELD_PREP(LJCA_SPI_CLK_MODE_PHASE, 131 131 + (mode & SPI_CPHA) ? LJCA_SPI_CLOCK_SECOND_PHASE : 132 132 + LJCA_SPI_CLOCK_FIRST_PHASE); 133 133 + 134 134 + ret = ljca_transfer(ljca_spi->ljca, LJCA_SPI_INIT, (u8 *)&w_packet, 135 135 + sizeof(w_packet), NULL, 0); 136 136 + if (ret < 0) 137 137 + return ret; 138 138 + 139 139 + ljca_spi->mode = mode; 140 140 + ljca_spi->speed = div; 141 141 + 142 142 + return 0; 143 143 + } 144 144 + 145 145 + static int ljca_spi_deinit(struct ljca_spi_dev *ljca_spi) 146 146 + { 147 147 + struct ljca_spi_init_packet w_packet = {}; 148 148 + int ret; 149 149 + 150 150 + w_packet.index = ljca_spi->spi_info->id; 151 151 + 152 152 + ret = ljca_transfer(ljca_spi->ljca, LJCA_SPI_DEINIT, (u8 *)&w_packet, 153 153 + sizeof(w_packet), NULL, 0); 154 154 + 155 155 + return ret < 0 ? ret : 0; 156 156 + } 157 157 + 158 158 + static inline int ljca_spi_transfer(struct ljca_spi_dev *ljca_spi, 159 159 + const u8 *tx_data, u8 *rx_data, u16 len) 160 160 + { 161 161 + int complete, cur_len; 162 162 + int remaining = len; 163 163 + int cmd, ret, i; 164 164 + int offset = 0; 165 165 + 166 166 + if (tx_data && rx_data) 167 167 + cmd = LJCA_SPI_WRITEREAD; 168 168 + else if (tx_data) 169 169 + cmd = LJCA_SPI_WRITE; 170 170 + else if (rx_data) 171 171 + cmd = LJCA_SPI_READ; 172 172 + else 173 173 + return -EINVAL; 174 174 + 175 175 + for (i = 0; remaining > 0; i++) { 176 176 + cur_len = min_t(unsigned int, remaining, LJCA_SPI_MAX_XFER_SIZE); 177 177 + complete = (cur_len == remaining); 178 178 + 179 179 + ret = ljca_spi_read_write(ljca_spi, 180 180 + tx_data ? tx_data + offset : NULL, 181 181 + rx_data ? rx_data + offset : NULL, 182 182 + cur_len, i, complete, cmd); 183 183 + if (ret) 184 184 + return ret; 185 185 + 186 186 + offset += cur_len; 187 187 + remaining -= cur_len; 188 188 + } 189 189 + 190 190 + return 0; 191 191 + } 192 192 + 193 193 + static int ljca_spi_transfer_one(struct spi_controller *controller, 194 194 + struct spi_device *spi, 195 195 + struct spi_transfer *xfer) 196 196 + { 197 197 + u8 div = DIV_ROUND_UP(controller->max_speed_hz, xfer->speed_hz) / 2 - 1; 198 198 + struct ljca_spi_dev *ljca_spi = spi_controller_get_devdata(controller); 199 199 + int ret; 200 200 + 201 201 + div = min_t(u8, LJCA_SPI_BUS_SPEED_MIN, div); 202 202 + 203 203 + ret = ljca_spi_init(ljca_spi, div, spi->mode); 204 204 + if (ret) { 205 205 + dev_err(&ljca_spi->ljca->auxdev.dev, 206 206 + "cannot initialize transfer ret %d\n", ret); 207 207 + return ret; 208 208 + } 209 209 + 210 210 + ret = ljca_spi_transfer(ljca_spi, xfer->tx_buf, xfer->rx_buf, xfer->len); 211 211 + if (ret) 212 212 + dev_err(&ljca_spi->ljca->auxdev.dev, 213 213 + "transfer failed len: %d\n", xfer->len); 214 214 + 215 215 + return ret; 216 216 + } 217 217 + 218 218 + static int ljca_spi_probe(struct auxiliary_device *auxdev, 219 219 + const struct auxiliary_device_id *aux_dev_id) 220 220 + { 221 221 + struct ljca_client *ljca = auxiliary_dev_to_ljca_client(auxdev); 222 222 + struct spi_controller *controller; 223 223 + struct ljca_spi_dev *ljca_spi; 224 224 + int ret; 225 225 + 226 226 + controller = devm_spi_alloc_master(&auxdev->dev, sizeof(*ljca_spi)); 227 227 + if (!controller) 228 228 + return -ENOMEM; 229 229 + 230 230 + ljca_spi = spi_controller_get_devdata(controller); 231 231 + ljca_spi->ljca = ljca; 232 232 + ljca_spi->spi_info = dev_get_platdata(&auxdev->dev); 233 233 + ljca_spi->controller = controller; 234 234 + 235 235 + controller->bus_num = -1; 236 236 + controller->mode_bits = SPI_CPHA | SPI_CPOL; 237 237 + controller->transfer_one = ljca_spi_transfer_one; 238 238 + controller->auto_runtime_pm = false; 239 239 + controller->max_speed_hz = LJCA_SPI_BUS_MAX_HZ; 240 240 + 241 241 + device_set_node(&ljca_spi->controller->dev, dev_fwnode(&auxdev->dev)); 242 242 + auxiliary_set_drvdata(auxdev, controller); 243 243 + 244 244 + ret = spi_register_controller(controller); 245 245 + if (ret) 246 246 + dev_err(&auxdev->dev, "Failed to register controller\n"); 247 247 + 248 248 + return ret; 249 249 + } 250 250 + 251 251 + static void ljca_spi_dev_remove(struct auxiliary_device *auxdev) 252 252 + { 253 253 + struct spi_controller *controller = auxiliary_get_drvdata(auxdev); 254 254 + struct ljca_spi_dev *ljca_spi = spi_controller_get_devdata(controller); 255 255 + 256 256 + spi_unregister_controller(controller); 257 257 + ljca_spi_deinit(ljca_spi); 258 258 + } 259 259 + 260 260 + static int ljca_spi_dev_suspend(struct device *dev) 261 261 + { 262 262 + struct spi_controller *controller = dev_get_drvdata(dev); 263 263 + 264 264 + return spi_controller_suspend(controller); 265 265 + } 266 266 + 267 267 + static int ljca_spi_dev_resume(struct device *dev) 268 268 + { 269 269 + struct spi_controller *controller = dev_get_drvdata(dev); 270 270 + 271 271 + return spi_controller_resume(controller); 272 272 + } 273 273 + 274 274 + static const struct dev_pm_ops ljca_spi_pm = { 275 275 + SYSTEM_SLEEP_PM_OPS(ljca_spi_dev_suspend, ljca_spi_dev_resume) 276 276 + }; 277 277 + 278 278 + static const struct auxiliary_device_id ljca_spi_id_table[] = { 279 279 + { "usb_ljca.ljca-spi", 0 }, 280 280 + { /* sentinel */ } 281 281 + }; 282 282 + MODULE_DEVICE_TABLE(auxiliary, ljca_spi_id_table); 283 283 + 284 284 + static struct auxiliary_driver ljca_spi_driver = { 285 285 + .driver.pm = &ljca_spi_pm, 286 286 + .probe = ljca_spi_probe, 287 287 + .remove = ljca_spi_dev_remove, 288 288 + .id_table = ljca_spi_id_table, 289 289 + }; 290 290 + module_auxiliary_driver(ljca_spi_driver); 291 291 + 292 292 + MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>"); 293 293 + MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>"); 294 294 + MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>"); 295 295 + MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-SPI driver"); 296 296 + MODULE_LICENSE("GPL"); 297 297 + MODULE_IMPORT_NS(LJCA);

+25 -22

drivers/thunderbolt/clx.c

reviewed

··· 175 175 } 176 176 177 177 /** 178 178 + * tb_switch_clx_is_supported() - Is CLx supported on this type of router 179 179 + * @sw: The router to check CLx support for 180 180 + */ 181 181 + static bool tb_switch_clx_is_supported(const struct tb_switch *sw) 182 182 + { 183 183 + if (!clx_enabled) 184 184 + return false; 185 185 + 186 186 + if (sw->quirks & QUIRK_NO_CLX) 187 187 + return false; 188 188 + 189 189 + /* 190 190 + * CLx is not enabled and validated on Intel USB4 platforms 191 191 + * before Alder Lake. 192 192 + */ 193 193 + if (tb_switch_is_tiger_lake(sw)) 194 194 + return false; 195 195 + 196 196 + return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw); 197 197 + } 198 198 + 199 199 + /** 178 200 * tb_switch_clx_init() - Initialize router CL states 179 201 * @sw: Router 180 202 * ··· 293 271 294 272 return tb_sw_write(sw, &val, TB_CFG_SWITCH, 295 273 sw->cap_lp + offset, ARRAY_SIZE(val)); 296 296 - } 297 297 - 298 298 - /** 299 299 - * tb_switch_clx_is_supported() - Is CLx supported on this type of router 300 300 - * @sw: The router to check CLx support for 301 301 - */ 302 302 - bool tb_switch_clx_is_supported(const struct tb_switch *sw) 303 303 - { 304 304 - if (!clx_enabled) 305 305 - return false; 306 306 - 307 307 - if (sw->quirks & QUIRK_NO_CLX) 308 308 - return false; 309 309 - 310 310 - /* 311 311 - * CLx is not enabled and validated on Intel USB4 platforms 312 312 - * before Alder Lake. 313 313 - */ 314 314 - if (tb_switch_is_tiger_lake(sw)) 315 315 - return false; 316 316 - 317 317 - return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw); 318 274 } 319 275 320 276 static bool validate_mask(unsigned int clx) ··· 404 404 405 405 if (!clx) 406 406 return 0; 407 407 + 408 408 + if (sw->is_unplugged) 409 409 + return clx; 407 410 408 411 up = tb_upstream_port(sw); 409 412 down = tb_switch_downstream_port(sw);

+5 -9

drivers/thunderbolt/dma_test.c

reviewed

··· 101 101 unsigned int packets_sent; 102 102 unsigned int packets_received; 103 103 unsigned int link_speed; 104 104 - unsigned int link_width; 104 104 + enum tb_link_width link_width; 105 105 unsigned int crc_errors; 106 106 unsigned int buffer_overflow_errors; 107 107 enum dma_test_result result; ··· 465 465 static int dma_test_set_bonding(struct dma_test *dt) 466 466 { 467 467 switch (dt->link_width) { 468 468 - case 2: 468 468 + case TB_LINK_WIDTH_DUAL: 469 469 return tb_xdomain_lane_bonding_enable(dt->xd); 470 470 - case 1: 470 470 + case TB_LINK_WIDTH_SINGLE: 471 471 tb_xdomain_lane_bonding_disable(dt->xd); 472 472 fallthrough; 473 473 default: ··· 490 490 if (!dt->error_code) { 491 491 if (dt->link_speed && dt->xd->link_speed != dt->link_speed) { 492 492 dt->error_code = DMA_TEST_SPEED_ERROR; 493 493 - } else if (dt->link_width) { 494 494 - const struct tb_xdomain *xd = dt->xd; 495 495 - 496 496 - if ((dt->link_width == 1 && xd->link_width != TB_LINK_WIDTH_SINGLE) || 497 497 - (dt->link_width == 2 && xd->link_width < TB_LINK_WIDTH_DUAL)) 498 498 - dt->error_code = DMA_TEST_WIDTH_ERROR; 493 493 + } else if (dt->link_width && dt->link_width != dt->xd->link_width) { 494 494 + dt->error_code = DMA_TEST_WIDTH_ERROR; 499 495 } else if (dt->packets_to_send != dt->packets_sent || 500 496 dt->packets_to_receive != dt->packets_received || 501 497 dt->crc_errors || dt->buffer_overflow_errors) {

+4 -3

drivers/thunderbolt/path.c

reviewed

··· 19 19 20 20 tb_port_dbg(port, " In HopID: %d => Out port: %d Out HopID: %d\n", 21 21 hop->in_hop_index, regs->out_port, regs->next_hop); 22 22 - tb_port_dbg(port, " Weight: %d Priority: %d Credits: %d Drop: %d\n", 23 23 - regs->weight, regs->priority, 24 24 - regs->initial_credits, regs->drop_packages); 22 22 + tb_port_dbg(port, " Weight: %d Priority: %d Credits: %d Drop: %d PM: %d\n", 23 23 + regs->weight, regs->priority, regs->initial_credits, 24 24 + regs->drop_packages, regs->pmps); 25 25 tb_port_dbg(port, " Counter enabled: %d Counter index: %d\n", 26 26 regs->counter_enable, regs->counter); 27 27 tb_port_dbg(port, " Flow Control (In/Eg): %d/%d Shared Buffer (In/Eg): %d/%d\n", ··· 535 535 hop.next_hop = path->hops[i].next_hop_index; 536 536 hop.out_port = path->hops[i].out_port->port; 537 537 hop.initial_credits = path->hops[i].initial_credits; 538 538 + hop.pmps = path->hops[i].pm_support; 538 539 hop.unknown1 = 0; 539 540 hop.enable = 1; 540 541

+3

drivers/thunderbolt/quirks.c

reviewed

··· 31 31 { 32 32 struct tb_port *port; 33 33 34 34 + if (tb_switch_is_icm(sw)) 35 35 + return; 36 36 + 34 37 tb_switch_for_each_port(sw, port) { 35 38 if (!tb_port_is_usb3_down(port)) 36 39 continue;

+1

drivers/thunderbolt/retimer.c

reviewed

··· 94 94 goto err_nvm; 95 95 96 96 rt->nvm = nvm; 97 97 + dev_dbg(&rt->dev, "NVM version %x.%x\n", nvm->major, nvm->minor); 97 98 return 0; 98 99 99 100 err_nvm:

+285 -52

drivers/thunderbolt/switch.c

reviewed

··· 372 372 ret = tb_nvm_add_active(nvm, nvm_read); 373 373 if (ret) 374 374 goto err_nvm; 375 375 + tb_sw_dbg(sw, "NVM version %x.%x\n", nvm->major, nvm->minor); 375 376 } 376 377 377 378 if (!sw->no_nvm_upgrade) { ··· 916 915 } 917 916 918 917 /** 918 918 + * tb_port_get_link_generation() - Returns link generation 919 919 + * @port: Lane adapter 920 920 + * 921 921 + * Returns link generation as number or negative errno in case of 922 922 + * failure. Does not distinguish between Thunderbolt 1 and Thunderbolt 2 923 923 + * links so for those always returns 2. 924 924 + */ 925 925 + int tb_port_get_link_generation(struct tb_port *port) 926 926 + { 927 927 + int ret; 928 928 + 929 929 + ret = tb_port_get_link_speed(port); 930 930 + if (ret < 0) 931 931 + return ret; 932 932 + 933 933 + switch (ret) { 934 934 + case 40: 935 935 + return 4; 936 936 + case 20: 937 937 + return 3; 938 938 + default: 939 939 + return 2; 940 940 + } 941 941 + } 942 942 + 943 943 + static const char *width_name(enum tb_link_width width) 944 944 + { 945 945 + switch (width) { 946 946 + case TB_LINK_WIDTH_SINGLE: 947 947 + return "symmetric, single lane"; 948 948 + case TB_LINK_WIDTH_DUAL: 949 949 + return "symmetric, dual lanes"; 950 950 + case TB_LINK_WIDTH_ASYM_TX: 951 951 + return "asymmetric, 3 transmitters, 1 receiver"; 952 952 + case TB_LINK_WIDTH_ASYM_RX: 953 953 + return "asymmetric, 3 receivers, 1 transmitter"; 954 954 + default: 955 955 + return "unknown"; 956 956 + } 957 957 + } 958 958 + 959 959 + /** 919 960 * tb_port_get_link_width() - Get current link width 920 961 * @port: Port to check (USB4 or CIO) 921 962 * ··· 982 939 LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT; 983 940 } 984 941 985 985 - static bool tb_port_is_width_supported(struct tb_port *port, 986 986 - unsigned int width_mask) 942 942 + /** 943 943 + * tb_port_width_supported() - Is the given link width supported 944 944 + * @port: Port to check 945 945 + * @width: Widths to check (bitmask) 946 946 + * 947 947 + * Can be called to any lane adapter. Checks if given @width is 948 948 + * supported by the hardware and returns %true if it is. 949 949 + */ 950 950 + bool tb_port_width_supported(struct tb_port *port, unsigned int width) 987 951 { 988 952 u32 phy, widths; 989 953 int ret; ··· 998 948 if (!port->cap_phy) 999 949 return false; 1000 950 951 951 + if (width & (TB_LINK_WIDTH_ASYM_TX | TB_LINK_WIDTH_ASYM_RX)) { 952 952 + if (tb_port_get_link_generation(port) < 4 || 953 953 + !usb4_port_asym_supported(port)) 954 954 + return false; 955 955 + } 956 956 + 1001 957 ret = tb_port_read(port, &phy, TB_CFG_PORT, 1002 958 port->cap_phy + LANE_ADP_CS_0, 1); 1003 959 if (ret) 1004 960 return false; 1005 961 1006 1006 - widths = (phy & LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK) >> 1007 1007 - LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT; 1008 1008 - 1009 1009 - return widths & width_mask; 1010 1010 - } 1011 1011 - 1012 1012 - static bool is_gen4_link(struct tb_port *port) 1013 1013 - { 1014 1014 - return tb_port_get_link_speed(port) > 20; 962 962 + /* 963 963 + * The field encoding is the same as &enum tb_link_width (which is 964 964 + * passed to @width). 965 965 + */ 966 966 + widths = FIELD_GET(LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK, phy); 967 967 + return widths & width; 1015 968 } 1016 969 1017 970 /** ··· 1044 991 switch (width) { 1045 992 case TB_LINK_WIDTH_SINGLE: 1046 993 /* Gen 4 link cannot be single */ 1047 1047 - if (is_gen4_link(port)) 994 994 + if (tb_port_get_link_generation(port) >= 4) 1048 995 return -EOPNOTSUPP; 1049 996 val |= LANE_ADP_CS_1_TARGET_WIDTH_SINGLE << 1050 997 LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; 1051 998 break; 999 999 + 1052 1000 case TB_LINK_WIDTH_DUAL: 1001 1001 + if (tb_port_get_link_generation(port) >= 4) 1002 1002 + return usb4_port_asym_set_link_width(port, width); 1053 1003 val |= LANE_ADP_CS_1_TARGET_WIDTH_DUAL << 1054 1004 LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; 1055 1005 break; 1006 1006 + 1007 1007 + case TB_LINK_WIDTH_ASYM_TX: 1008 1008 + case TB_LINK_WIDTH_ASYM_RX: 1009 1009 + return usb4_port_asym_set_link_width(port, width); 1010 1010 + 1056 1011 default: 1057 1012 return -EINVAL; 1058 1013 } ··· 1185 1124 /** 1186 1125 * tb_port_wait_for_link_width() - Wait until link reaches specific width 1187 1126 * @port: Port to wait for 1188 1188 - * @width_mask: Expected link width mask 1127 1127 + * @width: Expected link width (bitmask) 1189 1128 * @timeout_msec: Timeout in ms how long to wait 1190 1129 * 1191 1130 * Should be used after both ends of the link have been bonded (or ··· 1194 1133 * within the given timeout, %0 if it did. Can be passed a mask of 1195 1134 * expected widths and succeeds if any of the widths is reached. 1196 1135 */ 1197 1197 - int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width_mask, 1136 1136 + int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width, 1198 1137 int timeout_msec) 1199 1138 { 1200 1139 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); 1201 1140 int ret; 1202 1141 1203 1142 /* Gen 4 link does not support single lane */ 1204 1204 - if ((width_mask & TB_LINK_WIDTH_SINGLE) && is_gen4_link(port)) 1143 1143 + if ((width & TB_LINK_WIDTH_SINGLE) && 1144 1144 + tb_port_get_link_generation(port) >= 4) 1205 1145 return -EOPNOTSUPP; 1206 1146 1207 1147 do { ··· 1215 1153 */ 1216 1154 if (ret != -EACCES) 1217 1155 return ret; 1218 1218 - } else if (ret & width_mask) { 1156 1156 + } else if (ret & width) { 1219 1157 return 0; 1220 1158 } 1221 1159 ··· 1394 1332 * tb_dp_port_hpd_is_active() - Is HPD already active 1395 1333 * @port: DP out port to check 1396 1334 * 1397 1397 - * Checks if the DP OUT adapter port has HDP bit already set. 1335 1335 + * Checks if the DP OUT adapter port has HPD bit already set. 1398 1336 */ 1399 1337 int tb_dp_port_hpd_is_active(struct tb_port *port) 1400 1338 { ··· 1406 1344 if (ret) 1407 1345 return ret; 1408 1346 1409 1409 - return !!(data & ADP_DP_CS_2_HDP); 1347 1347 + return !!(data & ADP_DP_CS_2_HPD); 1410 1348 } 1411 1349 1412 1350 /** 1413 1351 * tb_dp_port_hpd_clear() - Clear HPD from DP IN port 1414 1352 * @port: Port to clear HPD 1415 1353 * 1416 1416 - * If the DP IN port has HDP set, this function can be used to clear it. 1354 1354 + * If the DP IN port has HPD set, this function can be used to clear it. 1417 1355 */ 1418 1356 int tb_dp_port_hpd_clear(struct tb_port *port) 1419 1357 { ··· 1425 1363 if (ret) 1426 1364 return ret; 1427 1365 1428 1428 - data |= ADP_DP_CS_3_HDPC; 1366 1366 + data |= ADP_DP_CS_3_HPDC; 1429 1367 return tb_port_write(port, &data, TB_CFG_PORT, 1430 1368 port->cap_adap + ADP_DP_CS_3, 1); 1431 1369 } ··· 2759 2697 return 0; 2760 2698 } 2761 2699 2700 2700 + /* Must be called after tb_switch_update_link_attributes() */ 2701 2701 + static void tb_switch_link_init(struct tb_switch *sw) 2702 2702 + { 2703 2703 + struct tb_port *up, *down; 2704 2704 + bool bonded; 2705 2705 + 2706 2706 + if (!tb_route(sw) || tb_switch_is_icm(sw)) 2707 2707 + return; 2708 2708 + 2709 2709 + tb_sw_dbg(sw, "current link speed %u.0 Gb/s\n", sw->link_speed); 2710 2710 + tb_sw_dbg(sw, "current link width %s\n", width_name(sw->link_width)); 2711 2711 + 2712 2712 + bonded = sw->link_width >= TB_LINK_WIDTH_DUAL; 2713 2713 + 2714 2714 + /* 2715 2715 + * Gen 4 links come up as bonded so update the port structures 2716 2716 + * accordingly. 2717 2717 + */ 2718 2718 + up = tb_upstream_port(sw); 2719 2719 + down = tb_switch_downstream_port(sw); 2720 2720 + 2721 2721 + up->bonded = bonded; 2722 2722 + if (up->dual_link_port) 2723 2723 + up->dual_link_port->bonded = bonded; 2724 2724 + tb_port_update_credits(up); 2725 2725 + 2726 2726 + down->bonded = bonded; 2727 2727 + if (down->dual_link_port) 2728 2728 + down->dual_link_port->bonded = bonded; 2729 2729 + tb_port_update_credits(down); 2730 2730 + } 2731 2731 + 2762 2732 /** 2763 2733 * tb_switch_lane_bonding_enable() - Enable lane bonding 2764 2734 * @sw: Switch to enable lane bonding ··· 2799 2705 * switch. If conditions are correct and both switches support the feature, 2800 2706 * lanes are bonded. It is safe to call this to any switch. 2801 2707 */ 2802 2802 - int tb_switch_lane_bonding_enable(struct tb_switch *sw) 2708 2708 + static int tb_switch_lane_bonding_enable(struct tb_switch *sw) 2803 2709 { 2804 2710 struct tb_port *up, *down; 2805 2805 - u64 route = tb_route(sw); 2806 2806 - unsigned int width_mask; 2711 2711 + unsigned int width; 2807 2712 int ret; 2808 2808 - 2809 2809 - if (!route) 2810 2810 - return 0; 2811 2713 2812 2714 if (!tb_switch_lane_bonding_possible(sw)) 2813 2715 return 0; ··· 2811 2721 up = tb_upstream_port(sw); 2812 2722 down = tb_switch_downstream_port(sw); 2813 2723 2814 2814 - if (!tb_port_is_width_supported(up, TB_LINK_WIDTH_DUAL) || 2815 2815 - !tb_port_is_width_supported(down, TB_LINK_WIDTH_DUAL)) 2724 2724 + if (!tb_port_width_supported(up, TB_LINK_WIDTH_DUAL) || 2725 2725 + !tb_port_width_supported(down, TB_LINK_WIDTH_DUAL)) 2816 2726 return 0; 2817 2727 2818 2728 /* ··· 2836 2746 } 2837 2747 2838 2748 /* Any of the widths are all bonded */ 2839 2839 - width_mask = TB_LINK_WIDTH_DUAL | TB_LINK_WIDTH_ASYM_TX | 2840 2840 - TB_LINK_WIDTH_ASYM_RX; 2749 2749 + width = TB_LINK_WIDTH_DUAL | TB_LINK_WIDTH_ASYM_TX | 2750 2750 + TB_LINK_WIDTH_ASYM_RX; 2841 2751 2842 2842 - ret = tb_port_wait_for_link_width(down, width_mask, 100); 2843 2843 - if (ret) { 2844 2844 - tb_port_warn(down, "timeout enabling lane bonding\n"); 2845 2845 - return ret; 2846 2846 - } 2847 2847 - 2848 2848 - tb_port_update_credits(down); 2849 2849 - tb_port_update_credits(up); 2850 2850 - tb_switch_update_link_attributes(sw); 2851 2851 - 2852 2852 - tb_sw_dbg(sw, "lane bonding enabled\n"); 2853 2853 - return ret; 2752 2752 + return tb_port_wait_for_link_width(down, width, 100); 2854 2753 } 2855 2754 2856 2755 /** ··· 2849 2770 * Disables lane bonding between @sw and parent. This can be called even 2850 2771 * if lanes were not bonded originally. 2851 2772 */ 2852 2852 - void tb_switch_lane_bonding_disable(struct tb_switch *sw) 2773 2773 + static int tb_switch_lane_bonding_disable(struct tb_switch *sw) 2853 2774 { 2854 2775 struct tb_port *up, *down; 2855 2776 int ret; 2856 2777 2857 2857 - if (!tb_route(sw)) 2858 2858 - return; 2859 2859 - 2860 2778 up = tb_upstream_port(sw); 2861 2779 if (!up->bonded) 2862 2862 - return; 2780 2780 + return 0; 2781 2781 + 2782 2782 + /* 2783 2783 + * If the link is Gen 4 there is no way to switch the link to 2784 2784 + * two single lane links so avoid that here. Also don't bother 2785 2785 + * if the link is not up anymore (sw is unplugged). 2786 2786 + */ 2787 2787 + ret = tb_port_get_link_generation(up); 2788 2788 + if (ret < 0) 2789 2789 + return ret; 2790 2790 + if (ret >= 4) 2791 2791 + return -EOPNOTSUPP; 2863 2792 2864 2793 down = tb_switch_downstream_port(sw); 2865 2865 - 2866 2794 tb_port_lane_bonding_disable(up); 2867 2795 tb_port_lane_bonding_disable(down); 2868 2796 ··· 2877 2791 * It is fine if we get other errors as the router might have 2878 2792 * been unplugged. 2879 2793 */ 2880 2880 - ret = tb_port_wait_for_link_width(down, TB_LINK_WIDTH_SINGLE, 100); 2881 2881 - if (ret == -ETIMEDOUT) 2882 2882 - tb_sw_warn(sw, "timeout disabling lane bonding\n"); 2794 2794 + return tb_port_wait_for_link_width(down, TB_LINK_WIDTH_SINGLE, 100); 2795 2795 + } 2796 2796 + 2797 2797 + static int tb_switch_asym_enable(struct tb_switch *sw, enum tb_link_width width) 2798 2798 + { 2799 2799 + struct tb_port *up, *down, *port; 2800 2800 + enum tb_link_width down_width; 2801 2801 + int ret; 2802 2802 + 2803 2803 + up = tb_upstream_port(sw); 2804 2804 + down = tb_switch_downstream_port(sw); 2805 2805 + 2806 2806 + if (width == TB_LINK_WIDTH_ASYM_TX) { 2807 2807 + down_width = TB_LINK_WIDTH_ASYM_RX; 2808 2808 + port = down; 2809 2809 + } else { 2810 2810 + down_width = TB_LINK_WIDTH_ASYM_TX; 2811 2811 + port = up; 2812 2812 + } 2813 2813 + 2814 2814 + ret = tb_port_set_link_width(up, width); 2815 2815 + if (ret) 2816 2816 + return ret; 2817 2817 + 2818 2818 + ret = tb_port_set_link_width(down, down_width); 2819 2819 + if (ret) 2820 2820 + return ret; 2821 2821 + 2822 2822 + /* 2823 2823 + * Initiate the change in the router that one of its TX lanes is 2824 2824 + * changing to RX but do so only if there is an actual change. 2825 2825 + */ 2826 2826 + if (sw->link_width != width) { 2827 2827 + ret = usb4_port_asym_start(port); 2828 2828 + if (ret) 2829 2829 + return ret; 2830 2830 + 2831 2831 + ret = tb_port_wait_for_link_width(up, width, 100); 2832 2832 + if (ret) 2833 2833 + return ret; 2834 2834 + } 2835 2835 + 2836 2836 + sw->link_width = width; 2837 2837 + return 0; 2838 2838 + } 2839 2839 + 2840 2840 + static int tb_switch_asym_disable(struct tb_switch *sw) 2841 2841 + { 2842 2842 + struct tb_port *up, *down; 2843 2843 + int ret; 2844 2844 + 2845 2845 + up = tb_upstream_port(sw); 2846 2846 + down = tb_switch_downstream_port(sw); 2847 2847 + 2848 2848 + ret = tb_port_set_link_width(up, TB_LINK_WIDTH_DUAL); 2849 2849 + if (ret) 2850 2850 + return ret; 2851 2851 + 2852 2852 + ret = tb_port_set_link_width(down, TB_LINK_WIDTH_DUAL); 2853 2853 + if (ret) 2854 2854 + return ret; 2855 2855 + 2856 2856 + /* 2857 2857 + * Initiate the change in the router that has three TX lanes and 2858 2858 + * is changing one of its TX lanes to RX but only if there is a 2859 2859 + * change in the link width. 2860 2860 + */ 2861 2861 + if (sw->link_width > TB_LINK_WIDTH_DUAL) { 2862 2862 + if (sw->link_width == TB_LINK_WIDTH_ASYM_TX) 2863 2863 + ret = usb4_port_asym_start(up); 2864 2864 + else 2865 2865 + ret = usb4_port_asym_start(down); 2866 2866 + if (ret) 2867 2867 + return ret; 2868 2868 + 2869 2869 + ret = tb_port_wait_for_link_width(up, TB_LINK_WIDTH_DUAL, 100); 2870 2870 + if (ret) 2871 2871 + return ret; 2872 2872 + } 2873 2873 + 2874 2874 + sw->link_width = TB_LINK_WIDTH_DUAL; 2875 2875 + return 0; 2876 2876 + } 2877 2877 + 2878 2878 + /** 2879 2879 + * tb_switch_set_link_width() - Configure router link width 2880 2880 + * @sw: Router to configure 2881 2881 + * @width: The new link width 2882 2882 + * 2883 2883 + * Set device router link width to @width from router upstream port 2884 2884 + * perspective. Supports also asymmetric links if the routers boths side 2885 2885 + * of the link supports it. 2886 2886 + * 2887 2887 + * Does nothing for host router. 2888 2888 + * 2889 2889 + * Returns %0 in case of success, negative errno otherwise. 2890 2890 + */ 2891 2891 + int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width) 2892 2892 + { 2893 2893 + struct tb_port *up, *down; 2894 2894 + int ret = 0; 2895 2895 + 2896 2896 + if (!tb_route(sw)) 2897 2897 + return 0; 2898 2898 + 2899 2899 + up = tb_upstream_port(sw); 2900 2900 + down = tb_switch_downstream_port(sw); 2901 2901 + 2902 2902 + switch (width) { 2903 2903 + case TB_LINK_WIDTH_SINGLE: 2904 2904 + ret = tb_switch_lane_bonding_disable(sw); 2905 2905 + break; 2906 2906 + 2907 2907 + case TB_LINK_WIDTH_DUAL: 2908 2908 + if (sw->link_width == TB_LINK_WIDTH_ASYM_TX || 2909 2909 + sw->link_width == TB_LINK_WIDTH_ASYM_RX) { 2910 2910 + ret = tb_switch_asym_disable(sw); 2911 2911 + if (ret) 2912 2912 + break; 2913 2913 + } 2914 2914 + ret = tb_switch_lane_bonding_enable(sw); 2915 2915 + break; 2916 2916 + 2917 2917 + case TB_LINK_WIDTH_ASYM_TX: 2918 2918 + case TB_LINK_WIDTH_ASYM_RX: 2919 2919 + ret = tb_switch_asym_enable(sw, width); 2920 2920 + break; 2921 2921 + } 2922 2922 + 2923 2923 + switch (ret) { 2924 2924 + case 0: 2925 2925 + break; 2926 2926 + 2927 2927 + case -ETIMEDOUT: 2928 2928 + tb_sw_warn(sw, "timeout changing link width\n"); 2929 2929 + return ret; 2930 2930 + 2931 2931 + case -ENOTCONN: 2932 2932 + case -EOPNOTSUPP: 2933 2933 + case -ENODEV: 2934 2934 + return ret; 2935 2935 + 2936 2936 + default: 2937 2937 + tb_sw_dbg(sw, "failed to change link width: %d\n", ret); 2938 2938 + return ret; 2939 2939 + } 2883 2940 2884 2941 tb_port_update_credits(down); 2885 2942 tb_port_update_credits(up); 2943 2943 + 2886 2944 tb_switch_update_link_attributes(sw); 2887 2945 2888 2888 - tb_sw_dbg(sw, "lane bonding disabled\n"); 2946 2946 + tb_sw_dbg(sw, "link width set to %s\n", width_name(width)); 2947 2947 + return ret; 2889 2948 } 2890 2949 2891 2950 /** ··· 3189 2958 ret = tb_switch_update_link_attributes(sw); 3190 2959 if (ret) 3191 2960 return ret; 2961 2961 + 2962 2962 + tb_switch_link_init(sw); 3192 2963 3193 2964 ret = tb_switch_clx_init(sw); 3194 2965 if (ret)

+632 -170

drivers/thunderbolt/tb.c

reviewed

··· 16 16 #include "tb_regs.h" 17 17 #include "tunnel.h" 18 18 19 19 - #define TB_TIMEOUT 100 /* ms */ 20 20 - #define MAX_GROUPS 7 /* max Group_ID is 7 */ 19 19 + #define TB_TIMEOUT 100 /* ms */ 20 20 + 21 21 + /* 22 22 + * Minimum bandwidth (in Mb/s) that is needed in the single transmitter/receiver 23 23 + * direction. This is 40G - 10% guard band bandwidth. 24 24 + */ 25 25 + #define TB_ASYM_MIN (40000 * 90 / 100) 26 26 + 27 27 + /* 28 28 + * Threshold bandwidth (in Mb/s) that is used to switch the links to 29 29 + * asymmetric and back. This is selected as 45G which means when the 30 30 + * request is higher than this, we switch the link to asymmetric, and 31 31 + * when it is less than this we switch it back. The 45G is selected so 32 32 + * that we still have 27G (of the total 72G) for bulk PCIe traffic when 33 33 + * switching back to symmetric. 34 34 + */ 35 35 + #define TB_ASYM_THRESHOLD 45000 36 36 + 37 37 + #define MAX_GROUPS 7 /* max Group_ID is 7 */ 38 38 + 39 39 + static unsigned int asym_threshold = TB_ASYM_THRESHOLD; 40 40 + module_param_named(asym_threshold, asym_threshold, uint, 0444); 41 41 + MODULE_PARM_DESC(asym_threshold, 42 42 + "threshold (Mb/s) when to Gen 4 switch link symmetry. 0 disables. (default: " 43 43 + __MODULE_STRING(TB_ASYM_THRESHOLD) ")"); 21 44 22 45 /** 23 46 * struct tb_cm - Simple Thunderbolt connection manager ··· 213 190 if (!tb_switch_query_dp_resource(sw, port)) 214 191 continue; 215 192 216 216 - list_add_tail(&port->list, &tcm->dp_resources); 193 193 + list_add(&port->list, &tcm->dp_resources); 217 194 tb_port_dbg(port, "DP IN resource available\n"); 218 195 } 219 196 } ··· 278 255 * this in the future to cover the whole topology if it turns 279 256 * out to be beneficial. 280 257 */ 281 281 - while (sw && sw->config.depth > 1) 258 258 + while (sw && tb_switch_depth(sw) > 1) 282 259 sw = tb_switch_parent(sw); 283 260 284 261 if (!sw) 285 262 return 0; 286 263 287 287 - if (sw->config.depth != 1) 264 264 + if (tb_switch_depth(sw) != 1) 288 265 return 0; 289 266 290 267 /* ··· 308 285 return ret == -EOPNOTSUPP ? 0 : ret; 309 286 } 310 287 311 311 - /* Disables CL states up to the host router */ 312 312 - static void tb_disable_clx(struct tb_switch *sw) 288 288 + /** 289 289 + * tb_disable_clx() - Disable CL states up to host router 290 290 + * @sw: Router to start 291 291 + * 292 292 + * Disables CL states from @sw up to the host router. Returns true if 293 293 + * any CL state were disabled. This can be used to figure out whether 294 294 + * the link was setup by us or the boot firmware so we don't 295 295 + * accidentally enable them if they were not enabled during discovery. 296 296 + */ 297 297 + static bool tb_disable_clx(struct tb_switch *sw) 313 298 { 299 299 + bool disabled = false; 300 300 + 314 301 do { 315 315 - if (tb_switch_clx_disable(sw) < 0) 302 302 + int ret; 303 303 + 304 304 + ret = tb_switch_clx_disable(sw); 305 305 + if (ret > 0) 306 306 + disabled = true; 307 307 + else if (ret < 0) 316 308 tb_sw_warn(sw, "failed to disable CL states\n"); 309 309 + 317 310 sw = tb_switch_parent(sw); 318 311 } while (sw); 312 312 + 313 313 + return disabled; 319 314 } 320 315 321 316 static int tb_increase_switch_tmu_accuracy(struct device *dev, void *data) ··· 594 553 struct tb_switch *sw; 595 554 596 555 /* Pick the router that is deepest in the topology */ 597 597 - if (dst_port->sw->config.depth > src_port->sw->config.depth) 556 556 + if (tb_port_path_direction_downstream(src_port, dst_port)) 598 557 sw = dst_port->sw; 599 558 else 600 559 sw = src_port->sw; ··· 613 572 return tb_find_tunnel(tb, TB_TUNNEL_USB3, usb3_down, NULL); 614 573 } 615 574 616 616 - static int tb_available_bandwidth(struct tb *tb, struct tb_port *src_port, 617 617 - struct tb_port *dst_port, int *available_up, int *available_down) 575 575 + /** 576 576 + * tb_consumed_usb3_pcie_bandwidth() - Consumed USB3/PCIe bandwidth over a single link 577 577 + * @tb: Domain structure 578 578 + * @src_port: Source protocol adapter 579 579 + * @dst_port: Destination protocol adapter 580 580 + * @port: USB4 port the consumed bandwidth is calculated 581 581 + * @consumed_up: Consumed upsream bandwidth (Mb/s) 582 582 + * @consumed_down: Consumed downstream bandwidth (Mb/s) 583 583 + * 584 584 + * Calculates consumed USB3 and PCIe bandwidth at @port between path 585 585 + * from @src_port to @dst_port. Does not take tunnel starting from 586 586 + * @src_port and ending from @src_port into account. 587 587 + */ 588 588 + static int tb_consumed_usb3_pcie_bandwidth(struct tb *tb, 589 589 + struct tb_port *src_port, 590 590 + struct tb_port *dst_port, 591 591 + struct tb_port *port, 592 592 + int *consumed_up, 593 593 + int *consumed_down) 618 594 { 619 619 - int usb3_consumed_up, usb3_consumed_down, ret; 620 620 - struct tb_cm *tcm = tb_priv(tb); 595 595 + int pci_consumed_up, pci_consumed_down; 621 596 struct tb_tunnel *tunnel; 622 622 - struct tb_port *port; 623 597 624 624 - tb_dbg(tb, "calculating available bandwidth between %llx:%u <-> %llx:%u\n", 625 625 - tb_route(src_port->sw), src_port->port, tb_route(dst_port->sw), 626 626 - dst_port->port); 598 598 + *consumed_up = *consumed_down = 0; 627 599 628 600 tunnel = tb_find_first_usb3_tunnel(tb, src_port, dst_port); 629 601 if (tunnel && tunnel->src_port != src_port && 630 602 tunnel->dst_port != dst_port) { 631 631 - ret = tb_tunnel_consumed_bandwidth(tunnel, &usb3_consumed_up, 632 632 - &usb3_consumed_down); 603 603 + int ret; 604 604 + 605 605 + ret = tb_tunnel_consumed_bandwidth(tunnel, consumed_up, 606 606 + consumed_down); 633 607 if (ret) 634 608 return ret; 635 635 - } else { 636 636 - usb3_consumed_up = 0; 637 637 - usb3_consumed_down = 0; 638 609 } 610 610 + 611 611 + /* 612 612 + * If there is anything reserved for PCIe bulk traffic take it 613 613 + * into account here too. 614 614 + */ 615 615 + if (tb_tunnel_reserved_pci(port, &pci_consumed_up, &pci_consumed_down)) { 616 616 + *consumed_up += pci_consumed_up; 617 617 + *consumed_down += pci_consumed_down; 618 618 + } 619 619 + 620 620 + return 0; 621 621 + } 622 622 + 623 623 + /** 624 624 + * tb_consumed_dp_bandwidth() - Consumed DP bandwidth over a single link 625 625 + * @tb: Domain structure 626 626 + * @src_port: Source protocol adapter 627 627 + * @dst_port: Destination protocol adapter 628 628 + * @port: USB4 port the consumed bandwidth is calculated 629 629 + * @consumed_up: Consumed upsream bandwidth (Mb/s) 630 630 + * @consumed_down: Consumed downstream bandwidth (Mb/s) 631 631 + * 632 632 + * Calculates consumed DP bandwidth at @port between path from @src_port 633 633 + * to @dst_port. Does not take tunnel starting from @src_port and ending 634 634 + * from @src_port into account. 635 635 + */ 636 636 + static int tb_consumed_dp_bandwidth(struct tb *tb, 637 637 + struct tb_port *src_port, 638 638 + struct tb_port *dst_port, 639 639 + struct tb_port *port, 640 640 + int *consumed_up, 641 641 + int *consumed_down) 642 642 + { 643 643 + struct tb_cm *tcm = tb_priv(tb); 644 644 + struct tb_tunnel *tunnel; 645 645 + int ret; 646 646 + 647 647 + *consumed_up = *consumed_down = 0; 648 648 + 649 649 + /* 650 650 + * Find all DP tunnels that cross the port and reduce 651 651 + * their consumed bandwidth from the available. 652 652 + */ 653 653 + list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 654 654 + int dp_consumed_up, dp_consumed_down; 655 655 + 656 656 + if (tb_tunnel_is_invalid(tunnel)) 657 657 + continue; 658 658 + 659 659 + if (!tb_tunnel_is_dp(tunnel)) 660 660 + continue; 661 661 + 662 662 + if (!tb_tunnel_port_on_path(tunnel, port)) 663 663 + continue; 664 664 + 665 665 + /* 666 666 + * Ignore the DP tunnel between src_port and dst_port 667 667 + * because it is the same tunnel and we may be 668 668 + * re-calculating estimated bandwidth. 669 669 + */ 670 670 + if (tunnel->src_port == src_port && 671 671 + tunnel->dst_port == dst_port) 672 672 + continue; 673 673 + 674 674 + ret = tb_tunnel_consumed_bandwidth(tunnel, &dp_consumed_up, 675 675 + &dp_consumed_down); 676 676 + if (ret) 677 677 + return ret; 678 678 + 679 679 + *consumed_up += dp_consumed_up; 680 680 + *consumed_down += dp_consumed_down; 681 681 + } 682 682 + 683 683 + return 0; 684 684 + } 685 685 + 686 686 + static bool tb_asym_supported(struct tb_port *src_port, struct tb_port *dst_port, 687 687 + struct tb_port *port) 688 688 + { 689 689 + bool downstream = tb_port_path_direction_downstream(src_port, dst_port); 690 690 + enum tb_link_width width; 691 691 + 692 692 + if (tb_is_upstream_port(port)) 693 693 + width = downstream ? TB_LINK_WIDTH_ASYM_RX : TB_LINK_WIDTH_ASYM_TX; 694 694 + else 695 695 + width = downstream ? TB_LINK_WIDTH_ASYM_TX : TB_LINK_WIDTH_ASYM_RX; 696 696 + 697 697 + return tb_port_width_supported(port, width); 698 698 + } 699 699 + 700 700 + /** 701 701 + * tb_maximum_bandwidth() - Maximum bandwidth over a single link 702 702 + * @tb: Domain structure 703 703 + * @src_port: Source protocol adapter 704 704 + * @dst_port: Destination protocol adapter 705 705 + * @port: USB4 port the total bandwidth is calculated 706 706 + * @max_up: Maximum upstream bandwidth (Mb/s) 707 707 + * @max_down: Maximum downstream bandwidth (Mb/s) 708 708 + * @include_asym: Include bandwidth if the link is switched from 709 709 + * symmetric to asymmetric 710 710 + * 711 711 + * Returns maximum possible bandwidth in @max_up and @max_down over a 712 712 + * single link at @port. If @include_asym is set then includes the 713 713 + * additional banwdith if the links are transitioned into asymmetric to 714 714 + * direction from @src_port to @dst_port. 715 715 + */ 716 716 + static int tb_maximum_bandwidth(struct tb *tb, struct tb_port *src_port, 717 717 + struct tb_port *dst_port, struct tb_port *port, 718 718 + int *max_up, int *max_down, bool include_asym) 719 719 + { 720 720 + bool downstream = tb_port_path_direction_downstream(src_port, dst_port); 721 721 + int link_speed, link_width, up_bw, down_bw; 722 722 + 723 723 + /* 724 724 + * Can include asymmetric, only if it is actually supported by 725 725 + * the lane adapter. 726 726 + */ 727 727 + if (!tb_asym_supported(src_port, dst_port, port)) 728 728 + include_asym = false; 729 729 + 730 730 + if (tb_is_upstream_port(port)) { 731 731 + link_speed = port->sw->link_speed; 732 732 + /* 733 733 + * sw->link_width is from upstream perspective so we use 734 734 + * the opposite for downstream of the host router. 735 735 + */ 736 736 + if (port->sw->link_width == TB_LINK_WIDTH_ASYM_TX) { 737 737 + up_bw = link_speed * 3 * 1000; 738 738 + down_bw = link_speed * 1 * 1000; 739 739 + } else if (port->sw->link_width == TB_LINK_WIDTH_ASYM_RX) { 740 740 + up_bw = link_speed * 1 * 1000; 741 741 + down_bw = link_speed * 3 * 1000; 742 742 + } else if (include_asym) { 743 743 + /* 744 744 + * The link is symmetric at the moment but we 745 745 + * can switch it to asymmetric as needed. Report 746 746 + * this bandwidth as available (even though it 747 747 + * is not yet enabled). 748 748 + */ 749 749 + if (downstream) { 750 750 + up_bw = link_speed * 1 * 1000; 751 751 + down_bw = link_speed * 3 * 1000; 752 752 + } else { 753 753 + up_bw = link_speed * 3 * 1000; 754 754 + down_bw = link_speed * 1 * 1000; 755 755 + } 756 756 + } else { 757 757 + up_bw = link_speed * port->sw->link_width * 1000; 758 758 + down_bw = up_bw; 759 759 + } 760 760 + } else { 761 761 + link_speed = tb_port_get_link_speed(port); 762 762 + if (link_speed < 0) 763 763 + return link_speed; 764 764 + 765 765 + link_width = tb_port_get_link_width(port); 766 766 + if (link_width < 0) 767 767 + return link_width; 768 768 + 769 769 + if (link_width == TB_LINK_WIDTH_ASYM_TX) { 770 770 + up_bw = link_speed * 1 * 1000; 771 771 + down_bw = link_speed * 3 * 1000; 772 772 + } else if (link_width == TB_LINK_WIDTH_ASYM_RX) { 773 773 + up_bw = link_speed * 3 * 1000; 774 774 + down_bw = link_speed * 1 * 1000; 775 775 + } else if (include_asym) { 776 776 + /* 777 777 + * The link is symmetric at the moment but we 778 778 + * can switch it to asymmetric as needed. Report 779 779 + * this bandwidth as available (even though it 780 780 + * is not yet enabled). 781 781 + */ 782 782 + if (downstream) { 783 783 + up_bw = link_speed * 1 * 1000; 784 784 + down_bw = link_speed * 3 * 1000; 785 785 + } else { 786 786 + up_bw = link_speed * 3 * 1000; 787 787 + down_bw = link_speed * 1 * 1000; 788 788 + } 789 789 + } else { 790 790 + up_bw = link_speed * link_width * 1000; 791 791 + down_bw = up_bw; 792 792 + } 793 793 + } 794 794 + 795 795 + /* Leave 10% guard band */ 796 796 + *max_up = up_bw - up_bw / 10; 797 797 + *max_down = down_bw - down_bw / 10; 798 798 + 799 799 + tb_port_dbg(port, "link maximum bandwidth %d/%d Mb/s\n", *max_up, *max_down); 800 800 + return 0; 801 801 + } 802 802 + 803 803 + /** 804 804 + * tb_available_bandwidth() - Available bandwidth for tunneling 805 805 + * @tb: Domain structure 806 806 + * @src_port: Source protocol adapter 807 807 + * @dst_port: Destination protocol adapter 808 808 + * @available_up: Available bandwidth upstream (Mb/s) 809 809 + * @available_down: Available bandwidth downstream (Mb/s) 810 810 + * @include_asym: Include bandwidth if the link is switched from 811 811 + * symmetric to asymmetric 812 812 + * 813 813 + * Calculates maximum available bandwidth for protocol tunneling between 814 814 + * @src_port and @dst_port at the moment. This is minimum of maximum 815 815 + * link bandwidth across all links reduced by currently consumed 816 816 + * bandwidth on that link. 817 817 + * 818 818 + * If @include_asym is true then includes also bandwidth that can be 819 819 + * added when the links are transitioned into asymmetric (but does not 820 820 + * transition the links). 821 821 + */ 822 822 + static int tb_available_bandwidth(struct tb *tb, struct tb_port *src_port, 823 823 + struct tb_port *dst_port, int *available_up, 824 824 + int *available_down, bool include_asym) 825 825 + { 826 826 + struct tb_port *port; 827 827 + int ret; 639 828 640 829 /* Maximum possible bandwidth asymmetric Gen 4 link is 120 Gb/s */ 641 830 *available_up = *available_down = 120000; 642 831 643 832 /* Find the minimum available bandwidth over all links */ 644 833 tb_for_each_port_on_path(src_port, dst_port, port) { 645 645 - int link_speed, link_width, up_bw, down_bw; 834 834 + int max_up, max_down, consumed_up, consumed_down; 646 835 647 836 if (!tb_port_is_null(port)) 648 837 continue; 649 838 650 650 - if (tb_is_upstream_port(port)) { 651 651 - link_speed = port->sw->link_speed; 652 652 - /* 653 653 - * sw->link_width is from upstream perspective 654 654 - * so we use the opposite for downstream of the 655 655 - * host router. 656 656 - */ 657 657 - if (port->sw->link_width == TB_LINK_WIDTH_ASYM_TX) { 658 658 - up_bw = link_speed * 3 * 1000; 659 659 - down_bw = link_speed * 1 * 1000; 660 660 - } else if (port->sw->link_width == TB_LINK_WIDTH_ASYM_RX) { 661 661 - up_bw = link_speed * 1 * 1000; 662 662 - down_bw = link_speed * 3 * 1000; 663 663 - } else { 664 664 - up_bw = link_speed * port->sw->link_width * 1000; 665 665 - down_bw = up_bw; 666 666 - } 667 667 - } else { 668 668 - link_speed = tb_port_get_link_speed(port); 669 669 - if (link_speed < 0) 670 670 - return link_speed; 839 839 + ret = tb_maximum_bandwidth(tb, src_port, dst_port, port, 840 840 + &max_up, &max_down, include_asym); 841 841 + if (ret) 842 842 + return ret; 671 843 672 672 - link_width = tb_port_get_link_width(port); 673 673 - if (link_width < 0) 674 674 - return link_width; 844 844 + ret = tb_consumed_usb3_pcie_bandwidth(tb, src_port, dst_port, 845 845 + port, &consumed_up, 846 846 + &consumed_down); 847 847 + if (ret) 848 848 + return ret; 849 849 + max_up -= consumed_up; 850 850 + max_down -= consumed_down; 675 851 676 676 - if (link_width == TB_LINK_WIDTH_ASYM_TX) { 677 677 - up_bw = link_speed * 1 * 1000; 678 678 - down_bw = link_speed * 3 * 1000; 679 679 - } else if (link_width == TB_LINK_WIDTH_ASYM_RX) { 680 680 - up_bw = link_speed * 3 * 1000; 681 681 - down_bw = link_speed * 1 * 1000; 682 682 - } else { 683 683 - up_bw = link_speed * link_width * 1000; 684 684 - down_bw = up_bw; 685 685 - } 686 686 - } 852 852 + ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, port, 853 853 + &consumed_up, &consumed_down); 854 854 + if (ret) 855 855 + return ret; 856 856 + max_up -= consumed_up; 857 857 + max_down -= consumed_down; 687 858 688 688 - /* Leave 10% guard band */ 689 689 - up_bw -= up_bw / 10; 690 690 - down_bw -= down_bw / 10; 691 691 - 692 692 - tb_port_dbg(port, "link total bandwidth %d/%d Mb/s\n", up_bw, 693 693 - down_bw); 694 694 - 695 695 - /* 696 696 - * Find all DP tunnels that cross the port and reduce 697 697 - * their consumed bandwidth from the available. 698 698 - */ 699 699 - list_for_each_entry(tunnel, &tcm->tunnel_list, list) { 700 700 - int dp_consumed_up, dp_consumed_down; 701 701 - 702 702 - if (tb_tunnel_is_invalid(tunnel)) 703 703 - continue; 704 704 - 705 705 - if (!tb_tunnel_is_dp(tunnel)) 706 706 - continue; 707 707 - 708 708 - if (!tb_tunnel_port_on_path(tunnel, port)) 709 709 - continue; 710 710 - 711 711 - /* 712 712 - * Ignore the DP tunnel between src_port and 713 713 - * dst_port because it is the same tunnel and we 714 714 - * may be re-calculating estimated bandwidth. 715 715 - */ 716 716 - if (tunnel->src_port == src_port && 717 717 - tunnel->dst_port == dst_port) 718 718 - continue; 719 719 - 720 720 - ret = tb_tunnel_consumed_bandwidth(tunnel, 721 721 - &dp_consumed_up, 722 722 - &dp_consumed_down); 723 723 - if (ret) 724 724 - return ret; 725 725 - 726 726 - up_bw -= dp_consumed_up; 727 727 - down_bw -= dp_consumed_down; 728 728 - } 729 729 - 730 730 - /* 731 731 - * If USB3 is tunneled from the host router down to the 732 732 - * branch leading to port we need to take USB3 consumed 733 733 - * bandwidth into account regardless whether it actually 734 734 - * crosses the port. 735 735 - */ 736 736 - up_bw -= usb3_consumed_up; 737 737 - down_bw -= usb3_consumed_down; 738 738 - 739 739 - if (up_bw < *available_up) 740 740 - *available_up = up_bw; 741 741 - if (down_bw < *available_down) 742 742 - *available_down = down_bw; 859 859 + if (max_up < *available_up) 860 860 + *available_up = max_up; 861 861 + if (max_down < *available_down) 862 862 + *available_down = max_down; 743 863 } 744 864 745 865 if (*available_up < 0) ··· 931 729 if (!tunnel) 932 730 return; 933 731 934 934 - tb_dbg(tb, "reclaiming unused bandwidth for USB3\n"); 732 732 + tb_tunnel_dbg(tunnel, "reclaiming unused bandwidth\n"); 935 733 936 734 /* 937 735 * Calculate available bandwidth for the first hop USB3 tunnel. 938 736 * That determines the whole USB3 bandwidth for this branch. 939 737 */ 940 738 ret = tb_available_bandwidth(tb, tunnel->src_port, tunnel->dst_port, 941 941 - &available_up, &available_down); 739 739 + &available_up, &available_down, false); 942 740 if (ret) { 943 943 - tb_warn(tb, "failed to calculate available bandwidth\n"); 741 741 + tb_tunnel_warn(tunnel, "failed to calculate available bandwidth\n"); 944 742 return; 945 743 } 946 744 947 947 - tb_dbg(tb, "available bandwidth for USB3 %d/%d Mb/s\n", 948 948 - available_up, available_down); 745 745 + tb_tunnel_dbg(tunnel, "available bandwidth %d/%d Mb/s\n", available_up, 746 746 + available_down); 949 747 950 748 tb_tunnel_reclaim_available_bandwidth(tunnel, &available_up, &available_down); 951 749 } ··· 996 794 return ret; 997 795 } 998 796 999 999 - ret = tb_available_bandwidth(tb, down, up, &available_up, 1000 1000 - &available_down); 797 797 + ret = tb_available_bandwidth(tb, down, up, &available_up, &available_down, 798 798 + false); 1001 799 if (ret) 1002 800 goto err_reclaim; 1003 801 ··· 1056 854 } 1057 855 1058 856 return 0; 857 857 + } 858 858 + 859 859 + /** 860 860 + * tb_configure_asym() - Transition links to asymmetric if needed 861 861 + * @tb: Domain structure 862 862 + * @src_port: Source adapter to start the transition 863 863 + * @dst_port: Destination adapter 864 864 + * @requested_up: Additional bandwidth (Mb/s) required upstream 865 865 + * @requested_down: Additional bandwidth (Mb/s) required downstream 866 866 + * 867 867 + * Transition links between @src_port and @dst_port into asymmetric, with 868 868 + * three lanes in the direction from @src_port towards @dst_port and one lane 869 869 + * in the opposite direction, if the bandwidth requirements 870 870 + * (requested + currently consumed) on that link exceed @asym_threshold. 871 871 + * 872 872 + * Must be called with available >= requested over all links. 873 873 + */ 874 874 + static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, 875 875 + struct tb_port *dst_port, int requested_up, 876 876 + int requested_down) 877 877 + { 878 878 + struct tb_switch *sw; 879 879 + bool clx, downstream; 880 880 + struct tb_port *up; 881 881 + int ret = 0; 882 882 + 883 883 + if (!asym_threshold) 884 884 + return 0; 885 885 + 886 886 + /* Disable CL states before doing any transitions */ 887 887 + downstream = tb_port_path_direction_downstream(src_port, dst_port); 888 888 + /* Pick up router deepest in the hierarchy */ 889 889 + if (downstream) 890 890 + sw = dst_port->sw; 891 891 + else 892 892 + sw = src_port->sw; 893 893 + 894 894 + clx = tb_disable_clx(sw); 895 895 + 896 896 + tb_for_each_upstream_port_on_path(src_port, dst_port, up) { 897 897 + int consumed_up, consumed_down; 898 898 + enum tb_link_width width; 899 899 + 900 900 + ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, up, 901 901 + &consumed_up, &consumed_down); 902 902 + if (ret) 903 903 + break; 904 904 + 905 905 + if (downstream) { 906 906 + /* 907 907 + * Downstream so make sure upstream is within the 36G 908 908 + * (40G - guard band 10%), and the requested is above 909 909 + * what the threshold is. 910 910 + */ 911 911 + if (consumed_up + requested_up >= TB_ASYM_MIN) { 912 912 + ret = -ENOBUFS; 913 913 + break; 914 914 + } 915 915 + /* Does consumed + requested exceed the threshold */ 916 916 + if (consumed_down + requested_down < asym_threshold) 917 917 + continue; 918 918 + 919 919 + width = TB_LINK_WIDTH_ASYM_RX; 920 920 + } else { 921 921 + /* Upstream, the opposite of above */ 922 922 + if (consumed_down + requested_down >= TB_ASYM_MIN) { 923 923 + ret = -ENOBUFS; 924 924 + break; 925 925 + } 926 926 + if (consumed_up + requested_up < asym_threshold) 927 927 + continue; 928 928 + 929 929 + width = TB_LINK_WIDTH_ASYM_TX; 930 930 + } 931 931 + 932 932 + if (up->sw->link_width == width) 933 933 + continue; 934 934 + 935 935 + if (!tb_port_width_supported(up, width)) 936 936 + continue; 937 937 + 938 938 + tb_sw_dbg(up->sw, "configuring asymmetric link\n"); 939 939 + 940 940 + /* 941 941 + * Here requested + consumed > threshold so we need to 942 942 + * transtion the link into asymmetric now. 943 943 + */ 944 944 + ret = tb_switch_set_link_width(up->sw, width); 945 945 + if (ret) { 946 946 + tb_sw_warn(up->sw, "failed to set link width\n"); 947 947 + break; 948 948 + } 949 949 + } 950 950 + 951 951 + /* Re-enable CL states if they were previosly enabled */ 952 952 + if (clx) 953 953 + tb_enable_clx(sw); 954 954 + 955 955 + return ret; 956 956 + } 957 957 + 958 958 + /** 959 959 + * tb_configure_sym() - Transition links to symmetric if possible 960 960 + * @tb: Domain structure 961 961 + * @src_port: Source adapter to start the transition 962 962 + * @dst_port: Destination adapter 963 963 + * @requested_up: New lower bandwidth request upstream (Mb/s) 964 964 + * @requested_down: New lower bandwidth request downstream (Mb/s) 965 965 + * 966 966 + * Goes over each link from @src_port to @dst_port and tries to 967 967 + * transition the link to symmetric if the currently consumed bandwidth 968 968 + * allows. 969 969 + */ 970 970 + static int tb_configure_sym(struct tb *tb, struct tb_port *src_port, 971 971 + struct tb_port *dst_port, int requested_up, 972 972 + int requested_down) 973 973 + { 974 974 + struct tb_switch *sw; 975 975 + bool clx, downstream; 976 976 + struct tb_port *up; 977 977 + int ret = 0; 978 978 + 979 979 + if (!asym_threshold) 980 980 + return 0; 981 981 + 982 982 + /* Disable CL states before doing any transitions */ 983 983 + downstream = tb_port_path_direction_downstream(src_port, dst_port); 984 984 + /* Pick up router deepest in the hierarchy */ 985 985 + if (downstream) 986 986 + sw = dst_port->sw; 987 987 + else 988 988 + sw = src_port->sw; 989 989 + 990 990 + clx = tb_disable_clx(sw); 991 991 + 992 992 + tb_for_each_upstream_port_on_path(src_port, dst_port, up) { 993 993 + int consumed_up, consumed_down; 994 994 + 995 995 + /* Already symmetric */ 996 996 + if (up->sw->link_width <= TB_LINK_WIDTH_DUAL) 997 997 + continue; 998 998 + /* Unplugged, no need to switch */ 999 999 + if (up->sw->is_unplugged) 1000 1000 + continue; 1001 1001 + 1002 1002 + ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, up, 1003 1003 + &consumed_up, &consumed_down); 1004 1004 + if (ret) 1005 1005 + break; 1006 1006 + 1007 1007 + if (downstream) { 1008 1008 + /* 1009 1009 + * Downstream so we want the consumed_down < threshold. 1010 1010 + * Upstream traffic should be less than 36G (40G 1011 1011 + * guard band 10%) as the link was configured asymmetric 1012 1012 + * already. 1013 1013 + */ 1014 1014 + if (consumed_down + requested_down >= asym_threshold) 1015 1015 + continue; 1016 1016 + } else { 1017 1017 + if (consumed_up + requested_up >= asym_threshold) 1018 1018 + continue; 1019 1019 + } 1020 1020 + 1021 1021 + if (up->sw->link_width == TB_LINK_WIDTH_DUAL) 1022 1022 + continue; 1023 1023 + 1024 1024 + tb_sw_dbg(up->sw, "configuring symmetric link\n"); 1025 1025 + 1026 1026 + ret = tb_switch_set_link_width(up->sw, TB_LINK_WIDTH_DUAL); 1027 1027 + if (ret) { 1028 1028 + tb_sw_warn(up->sw, "failed to set link width\n"); 1029 1029 + break; 1030 1030 + } 1031 1031 + } 1032 1032 + 1033 1033 + /* Re-enable CL states if they were previosly enabled */ 1034 1034 + if (clx) 1035 1035 + tb_enable_clx(sw); 1036 1036 + 1037 1037 + return ret; 1038 1038 + } 1039 1039 + 1040 1040 + static void tb_configure_link(struct tb_port *down, struct tb_port *up, 1041 1041 + struct tb_switch *sw) 1042 1042 + { 1043 1043 + struct tb *tb = sw->tb; 1044 1044 + 1045 1045 + /* Link the routers using both links if available */ 1046 1046 + down->remote = up; 1047 1047 + up->remote = down; 1048 1048 + if (down->dual_link_port && up->dual_link_port) { 1049 1049 + down->dual_link_port->remote = up->dual_link_port; 1050 1050 + up->dual_link_port->remote = down->dual_link_port; 1051 1051 + } 1052 1052 + 1053 1053 + /* 1054 1054 + * Enable lane bonding if the link is currently two single lane 1055 1055 + * links. 1056 1056 + */ 1057 1057 + if (sw->link_width < TB_LINK_WIDTH_DUAL) 1058 1058 + tb_switch_set_link_width(sw, TB_LINK_WIDTH_DUAL); 1059 1059 + 1060 1060 + /* 1061 1061 + * Device router that comes up as symmetric link is 1062 1062 + * connected deeper in the hierarchy, we transition the links 1063 1063 + * above into symmetric if bandwidth allows. 1064 1064 + */ 1065 1065 + if (tb_switch_depth(sw) > 1 && 1066 1066 + tb_port_get_link_generation(up) >= 4 && 1067 1067 + up->sw->link_width == TB_LINK_WIDTH_DUAL) { 1068 1068 + struct tb_port *host_port; 1069 1069 + 1070 1070 + host_port = tb_port_at(tb_route(sw), tb->root_switch); 1071 1071 + tb_configure_sym(tb, host_port, up, 0, 0); 1072 1072 + } 1073 1073 + 1074 1074 + /* Set the link configured */ 1075 1075 + tb_switch_configure_link(sw); 1059 1076 } 1060 1077 1061 1078 static void tb_scan_port(struct tb_port *port); ··· 1385 964 goto out_rpm_put; 1386 965 } 1387 966 1388 1388 - /* Link the switches using both links if available */ 1389 967 upstream_port = tb_upstream_port(sw); 1390 1390 - port->remote = upstream_port; 1391 1391 - upstream_port->remote = port; 1392 1392 - if (port->dual_link_port && upstream_port->dual_link_port) { 1393 1393 - port->dual_link_port->remote = upstream_port->dual_link_port; 1394 1394 - upstream_port->dual_link_port->remote = port->dual_link_port; 1395 1395 - } 968 968 + tb_configure_link(port, upstream_port, sw); 1396 969 1397 1397 - /* Enable lane bonding if supported */ 1398 1398 - tb_switch_lane_bonding_enable(sw); 1399 1399 - /* Set the link configured */ 1400 1400 - tb_switch_configure_link(sw); 1401 970 /* 1402 971 * CL0s and CL1 are enabled and supported together. 1403 972 * Silently ignore CLx enabling in case CLx is not supported. ··· 1451 1040 * deallocated properly. 1452 1041 */ 1453 1042 tb_switch_dealloc_dp_resource(src_port->sw, src_port); 1043 1043 + /* 1044 1044 + * If bandwidth on a link is < asym_threshold 1045 1045 + * transition the link to symmetric. 1046 1046 + */ 1047 1047 + tb_configure_sym(tb, src_port, dst_port, 0, 0); 1454 1048 /* Now we can allow the domain to runtime suspend again */ 1455 1049 pm_runtime_mark_last_busy(&dst_port->sw->dev); 1456 1050 pm_runtime_put_autosuspend(&dst_port->sw->dev); ··· 1508 1092 tb_retimer_remove_all(port); 1509 1093 tb_remove_dp_resources(port->remote->sw); 1510 1094 tb_switch_unconfigure_link(port->remote->sw); 1511 1511 - tb_switch_lane_bonding_disable(port->remote->sw); 1095 1095 + tb_switch_set_link_width(port->remote->sw, 1096 1096 + TB_LINK_WIDTH_SINGLE); 1512 1097 tb_switch_remove(port->remote->sw); 1513 1098 port->remote = NULL; 1514 1099 if (port->dual_link_port) ··· 1605 1188 ret = tb_release_unused_usb3_bandwidth(tb, 1606 1189 first_tunnel->src_port, first_tunnel->dst_port); 1607 1190 if (ret) { 1608 1608 - tb_port_warn(in, 1191 1191 + tb_tunnel_warn(tunnel, 1609 1192 "failed to release unused bandwidth\n"); 1610 1193 break; 1611 1194 } ··· 1613 1196 1614 1197 out = tunnel->dst_port; 1615 1198 ret = tb_available_bandwidth(tb, in, out, &estimated_up, 1616 1616 - &estimated_down); 1199 1199 + &estimated_down, true); 1617 1200 if (ret) { 1618 1618 - tb_port_warn(in, 1201 1201 + tb_tunnel_warn(tunnel, 1619 1202 "failed to re-calculate estimated bandwidth\n"); 1620 1203 break; 1621 1204 } ··· 1626 1209 * - available bandwidth along the path 1627 1210 * - bandwidth allocated for USB 3.x but not used. 1628 1211 */ 1629 1629 - tb_port_dbg(in, "re-calculated estimated bandwidth %u/%u Mb/s\n", 1630 1630 - estimated_up, estimated_down); 1212 1212 + tb_tunnel_dbg(tunnel, 1213 1213 + "re-calculated estimated bandwidth %u/%u Mb/s\n", 1214 1214 + estimated_up, estimated_down); 1631 1215 1632 1632 - if (in->sw->config.depth < out->sw->config.depth) 1216 1216 + if (tb_port_path_direction_downstream(in, out)) 1633 1217 estimated_bw = estimated_down; 1634 1218 else 1635 1219 estimated_bw = estimated_up; 1636 1220 1637 1221 if (usb4_dp_port_set_estimated_bandwidth(in, estimated_bw)) 1638 1638 - tb_port_warn(in, "failed to update estimated bandwidth\n"); 1222 1222 + tb_tunnel_warn(tunnel, 1223 1223 + "failed to update estimated bandwidth\n"); 1639 1224 } 1640 1225 1641 1226 if (first_tunnel) ··· 1701 1282 return NULL; 1702 1283 } 1703 1284 1704 1704 - static void tb_tunnel_dp(struct tb *tb) 1285 1285 + static bool tb_tunnel_one_dp(struct tb *tb) 1705 1286 { 1706 1287 int available_up, available_down, ret, link_nr; 1707 1288 struct tb_cm *tcm = tb_priv(tb); 1708 1289 struct tb_port *port, *in, *out; 1290 1290 + int consumed_up, consumed_down; 1709 1291 struct tb_tunnel *tunnel; 1710 1710 - 1711 1711 - if (!tb_acpi_may_tunnel_dp()) { 1712 1712 - tb_dbg(tb, "DP tunneling disabled, not creating tunnel\n"); 1713 1713 - return; 1714 1714 - } 1715 1292 1716 1293 /* 1717 1294 * Find pair of inactive DP IN and DP OUT adapters and then ··· 1726 1311 continue; 1727 1312 } 1728 1313 1729 1729 - tb_port_dbg(port, "DP IN available\n"); 1314 1314 + in = port; 1315 1315 + tb_port_dbg(in, "DP IN available\n"); 1730 1316 1731 1317 out = tb_find_dp_out(tb, port); 1732 1732 - if (out) { 1733 1733 - in = port; 1318 1318 + if (out) 1734 1319 break; 1735 1735 - } 1736 1320 } 1737 1321 1738 1322 if (!in) { 1739 1323 tb_dbg(tb, "no suitable DP IN adapter available, not tunneling\n"); 1740 1740 - return; 1324 1324 + return false; 1741 1325 } 1742 1326 if (!out) { 1743 1327 tb_dbg(tb, "no suitable DP OUT adapter available, not tunneling\n"); 1744 1744 - return; 1328 1328 + return false; 1745 1329 } 1746 1330 1747 1331 /* ··· 1783 1369 goto err_detach_group; 1784 1370 } 1785 1371 1786 1786 - ret = tb_available_bandwidth(tb, in, out, &available_up, &available_down); 1372 1372 + ret = tb_available_bandwidth(tb, in, out, &available_up, &available_down, 1373 1373 + true); 1787 1374 if (ret) 1788 1375 goto err_reclaim_usb; 1789 1376 ··· 1806 1391 list_add_tail(&tunnel->list, &tcm->tunnel_list); 1807 1392 tb_reclaim_usb3_bandwidth(tb, in, out); 1808 1393 1394 1394 + /* 1395 1395 + * Transition the links to asymmetric if the consumption exceeds 1396 1396 + * the threshold. 1397 1397 + */ 1398 1398 + if (!tb_tunnel_consumed_bandwidth(tunnel, &consumed_up, &consumed_down)) 1399 1399 + tb_configure_asym(tb, in, out, consumed_up, consumed_down); 1400 1400 + 1809 1401 /* Update the domain with the new bandwidth estimation */ 1810 1402 tb_recalc_estimated_bandwidth(tb); 1811 1403 ··· 1821 1399 * TMU mode to HiFi for CL0s to work. 1822 1400 */ 1823 1401 tb_increase_tmu_accuracy(tunnel); 1824 1824 - return; 1402 1402 + return true; 1825 1403 1826 1404 err_free: 1827 1405 tb_tunnel_free(tunnel); ··· 1836 1414 pm_runtime_put_autosuspend(&out->sw->dev); 1837 1415 pm_runtime_mark_last_busy(&in->sw->dev); 1838 1416 pm_runtime_put_autosuspend(&in->sw->dev); 1417 1417 + 1418 1418 + return false; 1419 1419 + } 1420 1420 + 1421 1421 + static void tb_tunnel_dp(struct tb *tb) 1422 1422 + { 1423 1423 + if (!tb_acpi_may_tunnel_dp()) { 1424 1424 + tb_dbg(tb, "DP tunneling disabled, not creating tunnel\n"); 1425 1425 + return; 1426 1426 + } 1427 1427 + 1428 1428 + while (tb_tunnel_one_dp(tb)) 1429 1429 + ; 1839 1430 } 1840 1431 1841 1432 static void tb_dp_resource_unavailable(struct tb *tb, struct tb_port *port) ··· 2136 1701 tb_remove_dp_resources(port->remote->sw); 2137 1702 tb_switch_tmu_disable(port->remote->sw); 2138 1703 tb_switch_unconfigure_link(port->remote->sw); 2139 2139 - tb_switch_lane_bonding_disable(port->remote->sw); 1704 1704 + tb_switch_set_link_width(port->remote->sw, 1705 1705 + TB_LINK_WIDTH_SINGLE); 2140 1706 tb_switch_remove(port->remote->sw); 2141 1707 port->remote = NULL; 2142 1708 if (port->dual_link_port) ··· 2217 1781 in = tunnel->src_port; 2218 1782 out = tunnel->dst_port; 2219 1783 2220 2220 - tb_port_dbg(in, "bandwidth allocated currently %d/%d Mb/s\n", 2221 2221 - allocated_up, allocated_down); 1784 1784 + tb_tunnel_dbg(tunnel, "bandwidth allocated currently %d/%d Mb/s\n", 1785 1785 + allocated_up, allocated_down); 2222 1786 2223 1787 /* 2224 1788 * If we get rounded up request from graphics side, say HBR2 x 4 ··· 2259 1823 else if (requested_down_corrected < 0) 2260 1824 requested_down_corrected = 0; 2261 1825 2262 2262 - tb_port_dbg(in, "corrected bandwidth request %d/%d Mb/s\n", 2263 2263 - requested_up_corrected, requested_down_corrected); 1826 1826 + tb_tunnel_dbg(tunnel, "corrected bandwidth request %d/%d Mb/s\n", 1827 1827 + requested_up_corrected, requested_down_corrected); 2264 1828 2265 1829 if ((*requested_up >= 0 && requested_up_corrected > max_up_rounded) || 2266 1830 (*requested_down >= 0 && requested_down_corrected > max_down_rounded)) { 2267 2267 - tb_port_dbg(in, "bandwidth request too high (%d/%d Mb/s > %d/%d Mb/s)\n", 2268 2268 - requested_up_corrected, requested_down_corrected, 2269 2269 - max_up_rounded, max_down_rounded); 1831 1831 + tb_tunnel_dbg(tunnel, 1832 1832 + "bandwidth request too high (%d/%d Mb/s > %d/%d Mb/s)\n", 1833 1833 + requested_up_corrected, requested_down_corrected, 1834 1834 + max_up_rounded, max_down_rounded); 2270 1835 return -ENOBUFS; 2271 1836 } 2272 1837 2273 1838 if ((*requested_up >= 0 && requested_up_corrected <= allocated_up) || 2274 1839 (*requested_down >= 0 && requested_down_corrected <= allocated_down)) { 1840 1840 + /* 1841 1841 + * If bandwidth on a link is < asym_threshold transition 1842 1842 + * the link to symmetric. 1843 1843 + */ 1844 1844 + tb_configure_sym(tb, in, out, *requested_up, *requested_down); 2275 1845 /* 2276 1846 * If requested bandwidth is less or equal than what is 2277 1847 * currently allocated to that tunnel we simply change ··· 2303 1861 * are also in the same group but we use the same function here 2304 1862 * that we use with the normal bandwidth allocation). 2305 1863 */ 2306 2306 - ret = tb_available_bandwidth(tb, in, out, &available_up, &available_down); 1864 1864 + ret = tb_available_bandwidth(tb, in, out, &available_up, &available_down, 1865 1865 + true); 2307 1866 if (ret) 2308 1867 goto reclaim; 2309 1868 2310 2310 - tb_port_dbg(in, "bandwidth available for allocation %d/%d Mb/s\n", 2311 2311 - available_up, available_down); 1869 1869 + tb_tunnel_dbg(tunnel, "bandwidth available for allocation %d/%d Mb/s\n", 1870 1870 + available_up, available_down); 2312 1871 2313 1872 if ((*requested_up >= 0 && available_up >= requested_up_corrected) || 2314 1873 (*requested_down >= 0 && available_down >= requested_down_corrected)) { 1874 1874 + /* 1875 1875 + * If bandwidth on a link is >= asym_threshold 1876 1876 + * transition the link to asymmetric. 1877 1877 + */ 1878 1878 + ret = tb_configure_asym(tb, in, out, *requested_up, 1879 1879 + *requested_down); 1880 1880 + if (ret) { 1881 1881 + tb_configure_sym(tb, in, out, 0, 0); 1882 1882 + return ret; 1883 1883 + } 1884 1884 + 2315 1885 ret = tb_tunnel_alloc_bandwidth(tunnel, requested_up, 2316 1886 requested_down); 1887 1887 + if (ret) { 1888 1888 + tb_tunnel_warn(tunnel, "failed to allocate bandwidth\n"); 1889 1889 + tb_configure_sym(tb, in, out, 0, 0); 1890 1890 + } 2317 1891 } else { 2318 1892 ret = -ENOBUFS; 2319 1893 } ··· 2395 1937 2396 1938 out = tunnel->dst_port; 2397 1939 2398 2398 - if (in->sw->config.depth < out->sw->config.depth) { 1940 1940 + if (tb_port_path_direction_downstream(in, out)) { 2399 1941 requested_up = -1; 2400 1942 requested_down = requested_bw; 2401 1943 } else { ··· 2406 1948 ret = tb_alloc_dp_bandwidth(tunnel, &requested_up, &requested_down); 2407 1949 if (ret) { 2408 1950 if (ret == -ENOBUFS) 2409 2409 - tb_port_warn(in, "not enough bandwidth available\n"); 1951 1951 + tb_tunnel_warn(tunnel, 1952 1952 + "not enough bandwidth available\n"); 2410 1953 else 2411 2411 - tb_port_warn(in, "failed to change bandwidth allocation\n"); 1954 1954 + tb_tunnel_warn(tunnel, 1955 1955 + "failed to change bandwidth allocation\n"); 2412 1956 } else { 2413 2413 - tb_port_dbg(in, "bandwidth allocation changed to %d/%d Mb/s\n", 2414 2414 - requested_up, requested_down); 1957 1957 + tb_tunnel_dbg(tunnel, 1958 1958 + "bandwidth allocation changed to %d/%d Mb/s\n", 1959 1959 + requested_up, requested_down); 2415 1960 2416 1961 /* Update other clients about the allocation change */ 2417 1962 tb_recalc_estimated_bandwidth(tb); ··· 2642 2181 continue; 2643 2182 2644 2183 if (port->remote) { 2645 2645 - tb_switch_lane_bonding_enable(port->remote->sw); 2184 2184 + tb_switch_set_link_width(port->remote->sw, 2185 2185 + port->remote->sw->link_width); 2646 2186 tb_switch_configure_link(port->remote->sw); 2647 2187 2648 2188 tb_restore_children(port->remote->sw);

+50 -10

drivers/thunderbolt/tb.h

reviewed

··· 162 162 * switches) you need to have domain lock held. 163 163 * 164 164 * In USB4 terminology this structure represents a router. 165 165 - * 166 166 - * Note @link_width is not the same as whether link is bonded or not. 167 167 - * For Gen 4 links the link is also bonded when it is asymmetric. The 168 168 - * correct way to find out whether the link is bonded or not is to look 169 169 - * @bonded field of the upstream port. 170 165 */ 171 166 struct tb_switch { 172 167 struct device dev; ··· 343 348 * the path 344 349 * @nfc_credits: Number of non-flow controlled buffers allocated for the 345 350 * @in_port. 351 351 + * @pm_support: Set path PM packet support bit to 1 (for USB4 v2 routers) 346 352 * 347 353 * Hop configuration is always done on the IN port of a switch. 348 354 * in_port and out_port have to be on the same switch. Packets arriving on ··· 364 368 int next_hop_index; 365 369 unsigned int initial_credits; 366 370 unsigned int nfc_credits; 371 371 + bool pm_support; 367 372 }; 368 373 369 374 /** ··· 861 864 return tb_port_at(tb_route(sw), tb_switch_parent(sw)); 862 865 } 863 866 867 867 + /** 868 868 + * tb_switch_depth() - Returns depth of the connected router 869 869 + * @sw: Router 870 870 + */ 871 871 + static inline int tb_switch_depth(const struct tb_switch *sw) 872 872 + { 873 873 + return sw->config.depth; 874 874 + } 875 875 + 864 876 static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw) 865 877 { 866 878 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL && ··· 962 956 return !sw->config.enabled; 963 957 } 964 958 965 965 - int tb_switch_lane_bonding_enable(struct tb_switch *sw); 966 966 - void tb_switch_lane_bonding_disable(struct tb_switch *sw); 959 959 + int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width); 967 960 int tb_switch_configure_link(struct tb_switch *sw); 968 961 void tb_switch_unconfigure_link(struct tb_switch *sw); 969 962 ··· 1006 1001 bool tb_port_clx_is_enabled(struct tb_port *port, unsigned int clx); 1007 1002 1008 1003 int tb_switch_clx_init(struct tb_switch *sw); 1009 1009 - bool tb_switch_clx_is_supported(const struct tb_switch *sw); 1010 1004 int tb_switch_clx_enable(struct tb_switch *sw, unsigned int clx); 1011 1005 int tb_switch_clx_disable(struct tb_switch *sw); 1012 1006 ··· 1044 1040 struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, 1045 1041 struct tb_port *prev); 1046 1042 1043 1043 + /** 1044 1044 + * tb_port_path_direction_downstream() - Checks if path directed downstream 1045 1045 + * @src: Source adapter 1046 1046 + * @dst: Destination adapter 1047 1047 + * 1048 1048 + * Returns %true only if the specified path from source adapter (@src) 1049 1049 + * to destination adapter (@dst) is directed downstream. 1050 1050 + */ 1051 1051 + static inline bool 1052 1052 + tb_port_path_direction_downstream(const struct tb_port *src, 1053 1053 + const struct tb_port *dst) 1054 1054 + { 1055 1055 + return src->sw->config.depth < dst->sw->config.depth; 1056 1056 + } 1057 1057 + 1047 1058 static inline bool tb_port_use_credit_allocation(const struct tb_port *port) 1048 1059 { 1049 1060 return tb_port_is_null(port) && port->sw->credit_allocation; ··· 1076 1057 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \ 1077 1058 (p) = tb_next_port_on_path((src), (dst), (p))) 1078 1059 1060 1060 + /** 1061 1061 + * tb_for_each_upstream_port_on_path() - Iterate over each upstreamm port on path 1062 1062 + * @src: Source port 1063 1063 + * @dst: Destination port 1064 1064 + * @p: Port used as iterator 1065 1065 + * 1066 1066 + * Walks over each upstream lane adapter on path from @src to @dst. 1067 1067 + */ 1068 1068 + #define tb_for_each_upstream_port_on_path(src, dst, p) \ 1069 1069 + for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \ 1070 1070 + (p) = tb_next_port_on_path((src), (dst), (p))) \ 1071 1071 + if (!tb_port_is_null((p)) || !tb_is_upstream_port((p))) {\ 1072 1072 + continue; \ 1073 1073 + } else 1074 1074 + 1079 1075 int tb_port_get_link_speed(struct tb_port *port); 1076 1076 + int tb_port_get_link_generation(struct tb_port *port); 1080 1077 int tb_port_get_link_width(struct tb_port *port); 1078 1078 + bool tb_port_width_supported(struct tb_port *port, unsigned int width); 1081 1079 int tb_port_set_link_width(struct tb_port *port, enum tb_link_width width); 1082 1080 int tb_port_lane_bonding_enable(struct tb_port *port); 1083 1081 void tb_port_lane_bonding_disable(struct tb_port *port); 1084 1084 - int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width_mask, 1082 1082 + int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width, 1085 1083 int timeout_msec); 1086 1084 int tb_port_update_credits(struct tb_port *port); 1087 1085 ··· 1292 1256 int usb4_port_enumerate_retimers(struct tb_port *port); 1293 1257 bool usb4_port_clx_supported(struct tb_port *port); 1294 1258 int usb4_port_margining_caps(struct tb_port *port, u32 *caps); 1259 1259 + 1260 1260 + bool usb4_port_asym_supported(struct tb_port *port); 1261 1261 + int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width); 1262 1262 + int usb4_port_asym_start(struct tb_port *port); 1263 1263 + 1295 1264 int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes, 1296 1265 unsigned int ber_level, bool timing, bool right_high, 1297 1266 u32 *results); ··· 1324 1283 unsigned int address, void *buf, size_t size); 1325 1284 1326 1285 int usb4_usb3_port_max_link_rate(struct tb_port *port); 1327 1327 - int usb4_usb3_port_actual_link_rate(struct tb_port *port); 1328 1286 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw, 1329 1287 int *downstream_bw); 1330 1288 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,

+12 -7

drivers/thunderbolt/tb_regs.h

reviewed

··· 346 346 #define LANE_ADP_CS_1 0x01 347 347 #define LANE_ADP_CS_1_TARGET_SPEED_MASK GENMASK(3, 0) 348 348 #define LANE_ADP_CS_1_TARGET_SPEED_GEN3 0xc 349 349 - #define LANE_ADP_CS_1_TARGET_WIDTH_MASK GENMASK(9, 4) 349 349 + #define LANE_ADP_CS_1_TARGET_WIDTH_MASK GENMASK(5, 4) 350 350 #define LANE_ADP_CS_1_TARGET_WIDTH_SHIFT 4 351 351 #define LANE_ADP_CS_1_TARGET_WIDTH_SINGLE 0x1 352 352 #define LANE_ADP_CS_1_TARGET_WIDTH_DUAL 0x3 353 353 + #define LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK GENMASK(7, 6) 354 354 + #define LANE_ADP_CS_1_TARGET_WIDTH_ASYM_TX 0x1 355 355 + #define LANE_ADP_CS_1_TARGET_WIDTH_ASYM_RX 0x2 356 356 + #define LANE_ADP_CS_1_TARGET_WIDTH_ASYM_DUAL 0x0 353 357 #define LANE_ADP_CS_1_CL0S_ENABLE BIT(10) 354 358 #define LANE_ADP_CS_1_CL1_ENABLE BIT(11) 355 359 #define LANE_ADP_CS_1_CL2_ENABLE BIT(12) ··· 386 382 #define PORT_CS_18_WOCS BIT(16) 387 383 #define PORT_CS_18_WODS BIT(17) 388 384 #define PORT_CS_18_WOU4S BIT(18) 385 385 + #define PORT_CS_18_CSA BIT(22) 386 386 + #define PORT_CS_18_TIP BIT(24) 389 387 #define PORT_CS_19 0x13 390 388 #define PORT_CS_19_PC BIT(3) 391 389 #define PORT_CS_19_PID BIT(4) 392 390 #define PORT_CS_19_WOC BIT(16) 393 391 #define PORT_CS_19_WOD BIT(17) 394 392 #define PORT_CS_19_WOU4 BIT(18) 393 393 + #define PORT_CS_19_START_ASYM BIT(24) 395 394 396 395 /* Display Port adapter registers */ 397 396 #define ADP_DP_CS_0 0x00 ··· 407 400 #define ADP_DP_CS_1_AUX_RX_HOPID_SHIFT 11 408 401 #define ADP_DP_CS_2 0x02 409 402 #define ADP_DP_CS_2_NRD_MLC_MASK GENMASK(2, 0) 410 410 - #define ADP_DP_CS_2_HDP BIT(6) 403 403 + #define ADP_DP_CS_2_HPD BIT(6) 411 404 #define ADP_DP_CS_2_NRD_MLR_MASK GENMASK(9, 7) 412 405 #define ADP_DP_CS_2_NRD_MLR_SHIFT 7 413 406 #define ADP_DP_CS_2_CA BIT(10) ··· 424 417 #define ADP_DP_CS_2_ESTIMATED_BW_MASK GENMASK(31, 24) 425 418 #define ADP_DP_CS_2_ESTIMATED_BW_SHIFT 24 426 419 #define ADP_DP_CS_3 0x03 427 427 - #define ADP_DP_CS_3_HDPC BIT(9) 420 420 + #define ADP_DP_CS_3_HPDC BIT(9) 428 421 #define DP_LOCAL_CAP 0x04 429 422 #define DP_REMOTE_CAP 0x05 430 423 /* For DP IN adapter */ ··· 491 484 #define ADP_USB3_CS_3 0x03 492 485 #define ADP_USB3_CS_3_SCALE_MASK GENMASK(5, 0) 493 486 #define ADP_USB3_CS_4 0x04 494 494 - #define ADP_USB3_CS_4_ALR_MASK GENMASK(6, 0) 495 495 - #define ADP_USB3_CS_4_ALR_20G 0x1 496 496 - #define ADP_USB3_CS_4_ULV BIT(7) 497 487 #define ADP_USB3_CS_4_MSLR_MASK GENMASK(18, 12) 498 488 #define ADP_USB3_CS_4_MSLR_SHIFT 12 499 489 #define ADP_USB3_CS_4_MSLR_20G 0x1 ··· 503 499 * out_port (on the incoming port of the next switch) 504 500 */ 505 501 u32 out_port:6; /* next port of the path (on the same switch) */ 506 506 - u32 initial_credits:8; 502 502 + u32 initial_credits:7; 503 503 + u32 pmps:1; 507 504 u32 unknown1:6; /* set to zero */ 508 505 bool enable:1; 509 506

+165 -98

drivers/thunderbolt/tunnel.c

reviewed

··· 21 21 #define TB_PCI_PATH_DOWN 0 22 22 #define TB_PCI_PATH_UP 1 23 23 24 24 + #define TB_PCI_PRIORITY 3 25 25 + #define TB_PCI_WEIGHT 1 26 26 + 24 27 /* USB3 adapters use always HopID of 8 for both directions */ 25 28 #define TB_USB3_HOPID 8 26 29 27 30 #define TB_USB3_PATH_DOWN 0 28 31 #define TB_USB3_PATH_UP 1 32 32 + 33 33 + #define TB_USB3_PRIORITY 3 34 34 + #define TB_USB3_WEIGHT 2 29 35 30 36 /* DP adapters use HopID 8 for AUX and 9 for Video */ 31 37 #define TB_DP_AUX_TX_HOPID 8 ··· 42 36 #define TB_DP_AUX_PATH_OUT 1 43 37 #define TB_DP_AUX_PATH_IN 2 44 38 39 39 + #define TB_DP_VIDEO_PRIORITY 1 40 40 + #define TB_DP_VIDEO_WEIGHT 1 41 41 + 42 42 + #define TB_DP_AUX_PRIORITY 2 43 43 + #define TB_DP_AUX_WEIGHT 1 44 44 + 45 45 /* Minimum number of credits needed for PCIe path */ 46 46 #define TB_MIN_PCIE_CREDITS 6U 47 47 /* ··· 57 45 #define TB_DMA_CREDITS 14 58 46 /* Minimum number of credits for DMA path */ 59 47 #define TB_MIN_DMA_CREDITS 1 48 48 + 49 49 + #define TB_DMA_PRIORITY 5 50 50 + #define TB_DMA_WEIGHT 1 51 51 + 52 52 + /* 53 53 + * Reserve additional bandwidth for USB 3.x and PCIe bulk traffic 54 54 + * according to USB4 v2 Connection Manager guide. This ends up reserving 55 55 + * 1500 Mb/s for PCIe and 3000 Mb/s for USB 3.x taking weights into 56 56 + * account. 57 57 + */ 58 58 + #define USB4_V2_PCI_MIN_BANDWIDTH (1500 * TB_PCI_WEIGHT) 59 59 + #define USB4_V2_USB3_MIN_BANDWIDTH (1500 * TB_USB3_WEIGHT) 60 60 61 61 static unsigned int dma_credits = TB_DMA_CREDITS; 62 62 module_param(dma_credits, uint, 0444); ··· 81 57 "enable bandwidth allocation mode if supported (default: true)"); 82 58 83 59 static const char * const tb_tunnel_names[] = { "PCI", "DP", "DMA", "USB3" }; 84 84 - 85 85 - #define __TB_TUNNEL_PRINT(level, tunnel, fmt, arg...) \ 86 86 - do { \ 87 87 - struct tb_tunnel *__tunnel = (tunnel); \ 88 88 - level(__tunnel->tb, "%llx:%u <-> %llx:%u (%s): " fmt, \ 89 89 - tb_route(__tunnel->src_port->sw), \ 90 90 - __tunnel->src_port->port, \ 91 91 - tb_route(__tunnel->dst_port->sw), \ 92 92 - __tunnel->dst_port->port, \ 93 93 - tb_tunnel_names[__tunnel->type], \ 94 94 - ## arg); \ 95 95 - } while (0) 96 96 - 97 97 - #define tb_tunnel_WARN(tunnel, fmt, arg...) \ 98 98 - __TB_TUNNEL_PRINT(tb_WARN, tunnel, fmt, ##arg) 99 99 - #define tb_tunnel_warn(tunnel, fmt, arg...) \ 100 100 - __TB_TUNNEL_PRINT(tb_warn, tunnel, fmt, ##arg) 101 101 - #define tb_tunnel_info(tunnel, fmt, arg...) \ 102 102 - __TB_TUNNEL_PRINT(tb_info, tunnel, fmt, ##arg) 103 103 - #define tb_tunnel_dbg(tunnel, fmt, arg...) \ 104 104 - __TB_TUNNEL_PRINT(tb_dbg, tunnel, fmt, ##arg) 105 60 106 61 static inline unsigned int tb_usable_credits(const struct tb_port *port) 107 62 { ··· 134 131 return credits > 0 ? credits : 0; 135 132 } 136 133 134 134 + static void tb_init_pm_support(struct tb_path_hop *hop) 135 135 + { 136 136 + struct tb_port *out_port = hop->out_port; 137 137 + struct tb_port *in_port = hop->in_port; 138 138 + 139 139 + if (tb_port_is_null(in_port) && tb_port_is_null(out_port) && 140 140 + usb4_switch_version(in_port->sw) >= 2) 141 141 + hop->pm_support = true; 142 142 + } 143 143 + 137 144 static struct tb_tunnel *tb_tunnel_alloc(struct tb *tb, size_t npaths, 138 145 enum tb_tunnel_type type) 139 146 { ··· 169 156 170 157 static int tb_pci_set_ext_encapsulation(struct tb_tunnel *tunnel, bool enable) 171 158 { 159 159 + struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw); 172 160 int ret; 173 161 174 162 /* Only supported of both routers are at least USB4 v2 */ 175 175 - if (usb4_switch_version(tunnel->src_port->sw) < 2 || 176 176 - usb4_switch_version(tunnel->dst_port->sw) < 2) 163 163 + if (tb_port_get_link_generation(port) < 4) 177 164 return 0; 178 165 179 166 ret = usb4_pci_port_set_ext_encapsulation(tunnel->src_port, enable); ··· 247 234 path->egress_shared_buffer = TB_PATH_NONE; 248 235 path->ingress_fc_enable = TB_PATH_ALL; 249 236 path->ingress_shared_buffer = TB_PATH_NONE; 250 250 - path->priority = 3; 251 251 - path->weight = 1; 237 237 + path->priority = TB_PCI_PRIORITY; 238 238 + path->weight = TB_PCI_WEIGHT; 252 239 path->drop_packages = 0; 253 240 254 241 tb_path_for_each_hop(path, hop) { ··· 387 374 err_free: 388 375 tb_tunnel_free(tunnel); 389 376 return NULL; 377 377 + } 378 378 + 379 379 + /** 380 380 + * tb_tunnel_reserved_pci() - Amount of bandwidth to reserve for PCIe 381 381 + * @port: Lane 0 adapter 382 382 + * @reserved_up: Upstream bandwidth in Mb/s to reserve 383 383 + * @reserved_down: Downstream bandwidth in Mb/s to reserve 384 384 + * 385 385 + * Can be called to any connected lane 0 adapter to find out how much 386 386 + * bandwidth needs to be left in reserve for possible PCIe bulk traffic. 387 387 + * Returns true if there is something to be reserved and writes the 388 388 + * amount to @reserved_down/@reserved_up. Otherwise returns false and 389 389 + * does not touch the parameters. 390 390 + */ 391 391 + bool tb_tunnel_reserved_pci(struct tb_port *port, int *reserved_up, 392 392 + int *reserved_down) 393 393 + { 394 394 + if (WARN_ON_ONCE(!port->remote)) 395 395 + return false; 396 396 + 397 397 + if (!tb_acpi_may_tunnel_pcie()) 398 398 + return false; 399 399 + 400 400 + if (tb_port_get_link_generation(port) < 4) 401 401 + return false; 402 402 + 403 403 + /* Must have PCIe adapters */ 404 404 + if (tb_is_upstream_port(port)) { 405 405 + if (!tb_switch_find_port(port->sw, TB_TYPE_PCIE_UP)) 406 406 + return false; 407 407 + if (!tb_switch_find_port(port->remote->sw, TB_TYPE_PCIE_DOWN)) 408 408 + return false; 409 409 + } else { 410 410 + if (!tb_switch_find_port(port->sw, TB_TYPE_PCIE_DOWN)) 411 411 + return false; 412 412 + if (!tb_switch_find_port(port->remote->sw, TB_TYPE_PCIE_UP)) 413 413 + return false; 414 414 + } 415 415 + 416 416 + *reserved_up = USB4_V2_PCI_MIN_BANDWIDTH; 417 417 + *reserved_down = USB4_V2_PCI_MIN_BANDWIDTH; 418 418 + 419 419 + tb_port_dbg(port, "reserving %u/%u Mb/s for PCIe\n", *reserved_up, 420 420 + *reserved_down); 421 421 + return true; 390 422 } 391 423 392 424 static bool tb_dp_is_usb4(const struct tb_switch *sw) ··· 672 614 673 615 in_rate = tb_dp_cap_get_rate(in_dp_cap); 674 616 in_lanes = tb_dp_cap_get_lanes(in_dp_cap); 675 675 - tb_port_dbg(in, "maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 676 676 - in_rate, in_lanes, tb_dp_bandwidth(in_rate, in_lanes)); 617 617 + tb_tunnel_dbg(tunnel, 618 618 + "DP IN maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 619 619 + in_rate, in_lanes, tb_dp_bandwidth(in_rate, in_lanes)); 677 620 678 621 /* 679 622 * If the tunnel bandwidth is limited (max_bw is set) then see ··· 683 624 out_rate = tb_dp_cap_get_rate(out_dp_cap); 684 625 out_lanes = tb_dp_cap_get_lanes(out_dp_cap); 685 626 bw = tb_dp_bandwidth(out_rate, out_lanes); 686 686 - tb_port_dbg(out, "maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 687 687 - out_rate, out_lanes, bw); 627 627 + tb_tunnel_dbg(tunnel, 628 628 + "DP OUT maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 629 629 + out_rate, out_lanes, bw); 688 630 689 689 - if (in->sw->config.depth < out->sw->config.depth) 631 631 + if (tb_port_path_direction_downstream(in, out)) 690 632 max_bw = tunnel->max_down; 691 633 else 692 634 max_bw = tunnel->max_up; ··· 699 639 out_rate, out_lanes, &new_rate, 700 640 &new_lanes); 701 641 if (ret) { 702 702 - tb_port_info(out, "not enough bandwidth for DP tunnel\n"); 642 642 + tb_tunnel_info(tunnel, "not enough bandwidth\n"); 703 643 return ret; 704 644 } 705 645 706 646 new_bw = tb_dp_bandwidth(new_rate, new_lanes); 707 707 - tb_port_dbg(out, "bandwidth reduced to %u Mb/s x%u = %u Mb/s\n", 708 708 - new_rate, new_lanes, new_bw); 647 647 + tb_tunnel_dbg(tunnel, 648 648 + "bandwidth reduced to %u Mb/s x%u = %u Mb/s\n", 649 649 + new_rate, new_lanes, new_bw); 709 650 710 651 /* 711 652 * Set new rate and number of lanes before writing it to ··· 723 662 */ 724 663 if (tb_route(out->sw) && tb_switch_is_titan_ridge(out->sw)) { 725 664 out_dp_cap |= DP_COMMON_CAP_LTTPR_NS; 726 726 - tb_port_dbg(out, "disabling LTTPR\n"); 665 665 + tb_tunnel_dbg(tunnel, "disabling LTTPR\n"); 727 666 } 728 667 729 668 return tb_port_write(in, &out_dp_cap, TB_CFG_PORT, ··· 773 712 lanes = min(in_lanes, out_lanes); 774 713 tmp = tb_dp_bandwidth(rate, lanes); 775 714 776 776 - tb_port_dbg(in, "non-reduced bandwidth %u Mb/s x%u = %u Mb/s\n", rate, 777 777 - lanes, tmp); 715 715 + tb_tunnel_dbg(tunnel, "non-reduced bandwidth %u Mb/s x%u = %u Mb/s\n", 716 716 + rate, lanes, tmp); 778 717 779 718 ret = usb4_dp_port_set_nrd(in, rate, lanes); 780 719 if (ret) ··· 789 728 rate = min(in_rate, out_rate); 790 729 tmp = tb_dp_bandwidth(rate, lanes); 791 730 792 792 - tb_port_dbg(in, 793 793 - "maximum bandwidth through allocation mode %u Mb/s x%u = %u Mb/s\n", 794 794 - rate, lanes, tmp); 731 731 + tb_tunnel_dbg(tunnel, 732 732 + "maximum bandwidth through allocation mode %u Mb/s x%u = %u Mb/s\n", 733 733 + rate, lanes, tmp); 795 734 796 735 for (granularity = 250; tmp / granularity > 255 && granularity <= 1000; 797 736 granularity *= 2) 798 737 ; 799 738 800 800 - tb_port_dbg(in, "granularity %d Mb/s\n", granularity); 739 739 + tb_tunnel_dbg(tunnel, "granularity %d Mb/s\n", granularity); 801 740 802 741 /* 803 742 * Returns -EINVAL if granularity above is outside of the ··· 812 751 * max_up/down fields. For discovery we just read what the 813 752 * estimation was set to. 814 753 */ 815 815 - if (in->sw->config.depth < out->sw->config.depth) 754 754 + if (tb_port_path_direction_downstream(in, out)) 816 755 estimated_bw = tunnel->max_down; 817 756 else 818 757 estimated_bw = tunnel->max_up; 819 758 820 820 - tb_port_dbg(in, "estimated bandwidth %d Mb/s\n", estimated_bw); 759 759 + tb_tunnel_dbg(tunnel, "estimated bandwidth %d Mb/s\n", estimated_bw); 821 760 822 761 ret = usb4_dp_port_set_estimated_bandwidth(in, estimated_bw); 823 762 if (ret) ··· 828 767 if (ret) 829 768 return ret; 830 769 831 831 - tb_port_dbg(in, "bandwidth allocation mode enabled\n"); 770 770 + tb_tunnel_dbg(tunnel, "bandwidth allocation mode enabled\n"); 832 771 return 0; 833 772 } 834 773 ··· 849 788 if (!usb4_dp_port_bandwidth_mode_supported(in)) 850 789 return 0; 851 790 852 852 - tb_port_dbg(in, "bandwidth allocation mode supported\n"); 791 791 + tb_tunnel_dbg(tunnel, "bandwidth allocation mode supported\n"); 853 792 854 793 ret = usb4_dp_port_set_cm_id(in, tb->index); 855 794 if (ret) ··· 866 805 return; 867 806 if (usb4_dp_port_bandwidth_mode_enabled(in)) { 868 807 usb4_dp_port_set_cm_bandwidth_mode_supported(in, false); 869 869 - tb_port_dbg(in, "bandwidth allocation mode disabled\n"); 808 808 + tb_tunnel_dbg(tunnel, "bandwidth allocation mode disabled\n"); 870 809 } 871 810 } 872 811 ··· 982 921 if (allocated_bw == max_bw) 983 922 allocated_bw = ret; 984 923 985 985 - tb_port_dbg(in, "consumed bandwidth through allocation mode %d Mb/s\n", 986 986 - allocated_bw); 987 987 - 988 988 - if (in->sw->config.depth < out->sw->config.depth) { 924 924 + if (tb_port_path_direction_downstream(in, out)) { 989 925 *consumed_up = 0; 990 926 *consumed_down = allocated_bw; 991 927 } else { ··· 1017 959 if (allocated_bw == max_bw) 1018 960 allocated_bw = ret; 1019 961 1020 1020 - if (in->sw->config.depth < out->sw->config.depth) { 962 962 + if (tb_port_path_direction_downstream(in, out)) { 1021 963 *allocated_up = 0; 1022 964 *allocated_down = allocated_bw; 1023 965 } else { ··· 1045 987 if (ret < 0) 1046 988 return ret; 1047 989 1048 1048 - if (in->sw->config.depth < out->sw->config.depth) { 990 990 + if (tb_port_path_direction_downstream(in, out)) { 1049 991 tmp = min(*alloc_down, max_bw); 1050 992 ret = usb4_dp_port_allocate_bandwidth(in, tmp); 1051 993 if (ret) ··· 1064 1006 /* Now we can use BW mode registers to figure out the bandwidth */ 1065 1007 /* TODO: need to handle discovery too */ 1066 1008 tunnel->bw_mode = true; 1067 1067 - 1068 1068 - tb_port_dbg(in, "allocated bandwidth through allocation mode %d Mb/s\n", 1069 1069 - tmp); 1070 1009 return 0; 1071 1010 } 1072 1011 ··· 1090 1035 *rate = tb_dp_cap_get_rate(val); 1091 1036 *lanes = tb_dp_cap_get_lanes(val); 1092 1037 1093 1093 - tb_port_dbg(in, "consumed bandwidth through DPRX %d Mb/s\n", 1094 1094 - tb_dp_bandwidth(*rate, *lanes)); 1038 1038 + tb_tunnel_dbg(tunnel, "DPRX read done\n"); 1095 1039 return 0; 1096 1040 } 1097 1041 usleep_range(100, 150); ··· 1127 1073 1128 1074 *rate = tb_dp_cap_get_rate(val); 1129 1075 *lanes = tb_dp_cap_get_lanes(val); 1130 1130 - 1131 1131 - tb_port_dbg(in, "bandwidth from %#x capability %d Mb/s\n", cap, 1132 1132 - tb_dp_bandwidth(*rate, *lanes)); 1133 1076 return 0; 1134 1077 } 1135 1078 ··· 1143 1092 if (ret < 0) 1144 1093 return ret; 1145 1094 1146 1146 - if (in->sw->config.depth < tunnel->dst_port->sw->config.depth) { 1095 1095 + if (tb_port_path_direction_downstream(in, tunnel->dst_port)) { 1147 1096 *max_up = 0; 1148 1097 *max_down = ret; 1149 1098 } else { ··· 1201 1150 return 0; 1202 1151 } 1203 1152 1204 1204 - if (in->sw->config.depth < tunnel->dst_port->sw->config.depth) { 1153 1153 + if (tb_port_path_direction_downstream(in, tunnel->dst_port)) { 1205 1154 *consumed_up = 0; 1206 1155 *consumed_down = tb_dp_bandwidth(rate, lanes); 1207 1156 } else { ··· 1223 1172 hop->initial_credits = 1; 1224 1173 } 1225 1174 1226 1226 - static void tb_dp_init_aux_path(struct tb_path *path) 1175 1175 + static void tb_dp_init_aux_path(struct tb_path *path, bool pm_support) 1227 1176 { 1228 1177 struct tb_path_hop *hop; 1229 1178 ··· 1231 1180 path->egress_shared_buffer = TB_PATH_NONE; 1232 1181 path->ingress_fc_enable = TB_PATH_ALL; 1233 1182 path->ingress_shared_buffer = TB_PATH_NONE; 1234 1234 - path->priority = 2; 1235 1235 - path->weight = 1; 1183 1183 + path->priority = TB_DP_AUX_PRIORITY; 1184 1184 + path->weight = TB_DP_AUX_WEIGHT; 1236 1185 1237 1237 - tb_path_for_each_hop(path, hop) 1186 1186 + tb_path_for_each_hop(path, hop) { 1238 1187 tb_dp_init_aux_credits(hop); 1188 1188 + if (pm_support) 1189 1189 + tb_init_pm_support(hop); 1190 1190 + } 1239 1191 } 1240 1192 1241 1193 static int tb_dp_init_video_credits(struct tb_path_hop *hop) ··· 1270 1216 return 0; 1271 1217 } 1272 1218 1273 1273 - static int tb_dp_init_video_path(struct tb_path *path) 1219 1219 + static int tb_dp_init_video_path(struct tb_path *path, bool pm_support) 1274 1220 { 1275 1221 struct tb_path_hop *hop; 1276 1222 ··· 1278 1224 path->egress_shared_buffer = TB_PATH_NONE; 1279 1225 path->ingress_fc_enable = TB_PATH_NONE; 1280 1226 path->ingress_shared_buffer = TB_PATH_NONE; 1281 1281 - path->priority = 1; 1282 1282 - path->weight = 1; 1227 1227 + path->priority = TB_DP_VIDEO_PRIORITY; 1228 1228 + path->weight = TB_DP_VIDEO_WEIGHT; 1283 1229 1284 1230 tb_path_for_each_hop(path, hop) { 1285 1231 int ret; ··· 1287 1233 ret = tb_dp_init_video_credits(hop); 1288 1234 if (ret) 1289 1235 return ret; 1236 1236 + if (pm_support) 1237 1237 + tb_init_pm_support(hop); 1290 1238 } 1291 1239 1292 1240 return 0; ··· 1309 1253 rate = tb_dp_cap_get_rate(dp_cap); 1310 1254 lanes = tb_dp_cap_get_lanes(dp_cap); 1311 1255 1312 1312 - tb_port_dbg(in, "maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 1313 1313 - rate, lanes, tb_dp_bandwidth(rate, lanes)); 1256 1256 + tb_tunnel_dbg(tunnel, 1257 1257 + "DP IN maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 1258 1258 + rate, lanes, tb_dp_bandwidth(rate, lanes)); 1314 1259 1315 1260 out = tunnel->dst_port; 1316 1261 ··· 1322 1265 rate = tb_dp_cap_get_rate(dp_cap); 1323 1266 lanes = tb_dp_cap_get_lanes(dp_cap); 1324 1267 1325 1325 - tb_port_dbg(out, "maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 1326 1326 - rate, lanes, tb_dp_bandwidth(rate, lanes)); 1268 1268 + tb_tunnel_dbg(tunnel, 1269 1269 + "DP OUT maximum supported bandwidth %u Mb/s x%u = %u Mb/s\n", 1270 1270 + rate, lanes, tb_dp_bandwidth(rate, lanes)); 1327 1271 1328 1272 if (tb_port_read(in, &dp_cap, TB_CFG_PORT, 1329 1273 in->cap_adap + DP_REMOTE_CAP, 1)) ··· 1333 1275 rate = tb_dp_cap_get_rate(dp_cap); 1334 1276 lanes = tb_dp_cap_get_lanes(dp_cap); 1335 1277 1336 1336 - tb_port_dbg(in, "reduced bandwidth %u Mb/s x%u = %u Mb/s\n", 1337 1337 - rate, lanes, tb_dp_bandwidth(rate, lanes)); 1278 1278 + tb_tunnel_dbg(tunnel, "reduced bandwidth %u Mb/s x%u = %u Mb/s\n", 1279 1279 + rate, lanes, tb_dp_bandwidth(rate, lanes)); 1338 1280 } 1339 1281 1340 1282 /** ··· 1380 1322 goto err_free; 1381 1323 } 1382 1324 tunnel->paths[TB_DP_VIDEO_PATH_OUT] = path; 1383 1383 - if (tb_dp_init_video_path(tunnel->paths[TB_DP_VIDEO_PATH_OUT])) 1325 1325 + if (tb_dp_init_video_path(tunnel->paths[TB_DP_VIDEO_PATH_OUT], false)) 1384 1326 goto err_free; 1385 1327 1386 1328 path = tb_path_discover(in, TB_DP_AUX_TX_HOPID, NULL, -1, NULL, "AUX TX", ··· 1388 1330 if (!path) 1389 1331 goto err_deactivate; 1390 1332 tunnel->paths[TB_DP_AUX_PATH_OUT] = path; 1391 1391 - tb_dp_init_aux_path(tunnel->paths[TB_DP_AUX_PATH_OUT]); 1333 1333 + tb_dp_init_aux_path(tunnel->paths[TB_DP_AUX_PATH_OUT], false); 1392 1334 1393 1335 path = tb_path_discover(tunnel->dst_port, -1, in, TB_DP_AUX_RX_HOPID, 1394 1336 &port, "AUX RX", alloc_hopid); 1395 1337 if (!path) 1396 1338 goto err_deactivate; 1397 1339 tunnel->paths[TB_DP_AUX_PATH_IN] = path; 1398 1398 - tb_dp_init_aux_path(tunnel->paths[TB_DP_AUX_PATH_IN]); 1340 1340 + tb_dp_init_aux_path(tunnel->paths[TB_DP_AUX_PATH_IN], false); 1399 1341 1400 1342 /* Validate that the tunnel is complete */ 1401 1343 if (!tb_port_is_dpout(tunnel->dst_port)) { ··· 1450 1392 struct tb_tunnel *tunnel; 1451 1393 struct tb_path **paths; 1452 1394 struct tb_path *path; 1395 1395 + bool pm_support; 1453 1396 1454 1397 if (WARN_ON(!in->cap_adap || !out->cap_adap)) 1455 1398 return NULL; ··· 1472 1413 tunnel->max_down = max_down; 1473 1414 1474 1415 paths = tunnel->paths; 1416 1416 + pm_support = usb4_switch_version(in->sw) >= 2; 1475 1417 1476 1418 path = tb_path_alloc(tb, in, TB_DP_VIDEO_HOPID, out, TB_DP_VIDEO_HOPID, 1477 1419 link_nr, "Video"); 1478 1420 if (!path) 1479 1421 goto err_free; 1480 1480 - tb_dp_init_video_path(path); 1422 1422 + tb_dp_init_video_path(path, pm_support); 1481 1423 paths[TB_DP_VIDEO_PATH_OUT] = path; 1482 1424 1483 1425 path = tb_path_alloc(tb, in, TB_DP_AUX_TX_HOPID, out, 1484 1426 TB_DP_AUX_TX_HOPID, link_nr, "AUX TX"); 1485 1427 if (!path) 1486 1428 goto err_free; 1487 1487 - tb_dp_init_aux_path(path); 1429 1429 + tb_dp_init_aux_path(path, pm_support); 1488 1430 paths[TB_DP_AUX_PATH_OUT] = path; 1489 1431 1490 1432 path = tb_path_alloc(tb, out, TB_DP_AUX_RX_HOPID, in, 1491 1433 TB_DP_AUX_RX_HOPID, link_nr, "AUX RX"); 1492 1434 if (!path) 1493 1435 goto err_free; 1494 1494 - tb_dp_init_aux_path(path); 1436 1436 + tb_dp_init_aux_path(path, pm_support); 1495 1437 paths[TB_DP_AUX_PATH_IN] = path; 1496 1438 1497 1439 return tunnel; ··· 1557 1497 path->ingress_fc_enable = TB_PATH_ALL; 1558 1498 path->egress_shared_buffer = TB_PATH_NONE; 1559 1499 path->ingress_shared_buffer = TB_PATH_NONE; 1560 1560 - path->priority = 5; 1561 1561 - path->weight = 1; 1500 1500 + path->priority = TB_DMA_PRIORITY; 1501 1501 + path->weight = TB_DMA_WEIGHT; 1562 1502 path->clear_fc = true; 1563 1503 1564 1504 /* ··· 1591 1531 path->ingress_fc_enable = TB_PATH_ALL; 1592 1532 path->egress_shared_buffer = TB_PATH_NONE; 1593 1533 path->ingress_shared_buffer = TB_PATH_NONE; 1594 1594 - path->priority = 5; 1595 1595 - path->weight = 1; 1534 1534 + path->priority = TB_DMA_PRIORITY; 1535 1535 + path->weight = TB_DMA_WEIGHT; 1596 1536 path->clear_fc = true; 1597 1537 1598 1538 tb_path_for_each_hop(path, hop) { ··· 1818 1758 static int tb_usb3_consumed_bandwidth(struct tb_tunnel *tunnel, 1819 1759 int *consumed_up, int *consumed_down) 1820 1760 { 1821 1821 - int pcie_enabled = tb_acpi_may_tunnel_pcie(); 1761 1761 + struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw); 1762 1762 + int pcie_weight = tb_acpi_may_tunnel_pcie() ? TB_PCI_WEIGHT : 0; 1822 1763 1823 1764 /* 1824 1765 * PCIe tunneling, if enabled, affects the USB3 bandwidth so 1825 1766 * take that it into account here. 1826 1767 */ 1827 1827 - *consumed_up = tunnel->allocated_up * (3 + pcie_enabled) / 3; 1828 1828 - *consumed_down = tunnel->allocated_down * (3 + pcie_enabled) / 3; 1768 1768 + *consumed_up = tunnel->allocated_up * 1769 1769 + (TB_USB3_WEIGHT + pcie_weight) / TB_USB3_WEIGHT; 1770 1770 + *consumed_down = tunnel->allocated_down * 1771 1771 + (TB_USB3_WEIGHT + pcie_weight) / TB_USB3_WEIGHT; 1772 1772 + 1773 1773 + if (tb_port_get_link_generation(port) >= 4) { 1774 1774 + *consumed_up = max(*consumed_up, USB4_V2_USB3_MIN_BANDWIDTH); 1775 1775 + *consumed_down = max(*consumed_down, USB4_V2_USB3_MIN_BANDWIDTH); 1776 1776 + } 1777 1777 + 1829 1778 return 0; 1830 1779 } 1831 1780 ··· 1859 1790 { 1860 1791 int ret, max_rate, allocate_up, allocate_down; 1861 1792 1862 1862 - ret = usb4_usb3_port_actual_link_rate(tunnel->src_port); 1793 1793 + ret = tb_usb3_max_link_rate(tunnel->dst_port, tunnel->src_port); 1863 1794 if (ret < 0) { 1864 1864 - tb_tunnel_warn(tunnel, "failed to read actual link rate\n"); 1795 1795 + tb_tunnel_warn(tunnel, "failed to read maximum link rate\n"); 1865 1796 return; 1866 1866 - } else if (!ret) { 1867 1867 - /* Use maximum link rate if the link valid is not set */ 1868 1868 - ret = tb_usb3_max_link_rate(tunnel->dst_port, tunnel->src_port); 1869 1869 - if (ret < 0) { 1870 1870 - tb_tunnel_warn(tunnel, "failed to read maximum link rate\n"); 1871 1871 - return; 1872 1872 - } 1873 1797 } 1874 1798 1875 1799 /* ··· 1933 1871 path->egress_shared_buffer = TB_PATH_NONE; 1934 1872 path->ingress_fc_enable = TB_PATH_ALL; 1935 1873 path->ingress_shared_buffer = TB_PATH_NONE; 1936 1936 - path->priority = 3; 1937 1937 - path->weight = 3; 1874 1874 + path->priority = TB_USB3_PRIORITY; 1875 1875 + path->weight = TB_USB3_WEIGHT; 1938 1876 path->drop_packages = 0; 1939 1877 1940 1878 tb_path_for_each_hop(path, hop) ··· 2448 2386 if (tunnel->reclaim_available_bandwidth) 2449 2387 tunnel->reclaim_available_bandwidth(tunnel, available_up, 2450 2388 available_down); 2389 2389 + } 2390 2390 + 2391 2391 + const char *tb_tunnel_type_name(const struct tb_tunnel *tunnel) 2392 2392 + { 2393 2393 + return tb_tunnel_names[tunnel->type]; 2451 2394 }

+25 -1

drivers/thunderbolt/tunnel.h

reviewed

··· 80 80 bool alloc_hopid); 81 81 struct tb_tunnel *tb_tunnel_alloc_pci(struct tb *tb, struct tb_port *up, 82 82 struct tb_port *down); 83 83 + bool tb_tunnel_reserved_pci(struct tb_port *port, int *reserved_up, 84 84 + int *reserved_down); 83 85 struct tb_tunnel *tb_tunnel_discover_dp(struct tb *tb, struct tb_port *in, 84 86 bool alloc_hopid); 85 87 struct tb_tunnel *tb_tunnel_alloc_dp(struct tb *tb, struct tb_port *in, ··· 139 137 return tunnel->type == TB_TUNNEL_USB3; 140 138 } 141 139 142 142 - #endif 140 140 + const char *tb_tunnel_type_name(const struct tb_tunnel *tunnel); 143 141 142 142 + #define __TB_TUNNEL_PRINT(level, tunnel, fmt, arg...) \ 143 143 + do { \ 144 144 + struct tb_tunnel *__tunnel = (tunnel); \ 145 145 + level(__tunnel->tb, "%llx:%u <-> %llx:%u (%s): " fmt, \ 146 146 + tb_route(__tunnel->src_port->sw), \ 147 147 + __tunnel->src_port->port, \ 148 148 + tb_route(__tunnel->dst_port->sw), \ 149 149 + __tunnel->dst_port->port, \ 150 150 + tb_tunnel_type_name(__tunnel), \ 151 151 + ## arg); \ 152 152 + } while (0) 153 153 + 154 154 + #define tb_tunnel_WARN(tunnel, fmt, arg...) \ 155 155 + __TB_TUNNEL_PRINT(tb_WARN, tunnel, fmt, ##arg) 156 156 + #define tb_tunnel_warn(tunnel, fmt, arg...) \ 157 157 + __TB_TUNNEL_PRINT(tb_warn, tunnel, fmt, ##arg) 158 158 + #define tb_tunnel_info(tunnel, fmt, arg...) \ 159 159 + __TB_TUNNEL_PRINT(tb_info, tunnel, fmt, ##arg) 160 160 + #define tb_tunnel_dbg(tunnel, fmt, arg...) \ 161 161 + __TB_TUNNEL_PRINT(tb_dbg, tunnel, fmt, ##arg) 162 162 + 163 163 + #endif

+106 -29

drivers/thunderbolt/usb4.c

reviewed

··· 1455 1455 } 1456 1456 1457 1457 /** 1458 1458 + * usb4_port_asym_supported() - If the port supports asymmetric link 1459 1459 + * @port: USB4 port 1460 1460 + * 1461 1461 + * Checks if the port and the cable supports asymmetric link and returns 1462 1462 + * %true in that case. 1463 1463 + */ 1464 1464 + bool usb4_port_asym_supported(struct tb_port *port) 1465 1465 + { 1466 1466 + u32 val; 1467 1467 + 1468 1468 + if (!port->cap_usb4) 1469 1469 + return false; 1470 1470 + 1471 1471 + if (tb_port_read(port, &val, TB_CFG_PORT, port->cap_usb4 + PORT_CS_18, 1)) 1472 1472 + return false; 1473 1473 + 1474 1474 + return !!(val & PORT_CS_18_CSA); 1475 1475 + } 1476 1476 + 1477 1477 + /** 1478 1478 + * usb4_port_asym_set_link_width() - Set link width to asymmetric or symmetric 1479 1479 + * @port: USB4 port 1480 1480 + * @width: Asymmetric width to configure 1481 1481 + * 1482 1482 + * Sets USB4 port link width to @width. Can be called for widths where 1483 1483 + * usb4_port_asym_width_supported() returned @true. 1484 1484 + */ 1485 1485 + int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width) 1486 1486 + { 1487 1487 + u32 val; 1488 1488 + int ret; 1489 1489 + 1490 1490 + if (!port->cap_phy) 1491 1491 + return -EINVAL; 1492 1492 + 1493 1493 + ret = tb_port_read(port, &val, TB_CFG_PORT, 1494 1494 + port->cap_phy + LANE_ADP_CS_1, 1); 1495 1495 + if (ret) 1496 1496 + return ret; 1497 1497 + 1498 1498 + val &= ~LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK; 1499 1499 + switch (width) { 1500 1500 + case TB_LINK_WIDTH_DUAL: 1501 1501 + val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK, 1502 1502 + LANE_ADP_CS_1_TARGET_WIDTH_ASYM_DUAL); 1503 1503 + break; 1504 1504 + case TB_LINK_WIDTH_ASYM_TX: 1505 1505 + val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK, 1506 1506 + LANE_ADP_CS_1_TARGET_WIDTH_ASYM_TX); 1507 1507 + break; 1508 1508 + case TB_LINK_WIDTH_ASYM_RX: 1509 1509 + val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK, 1510 1510 + LANE_ADP_CS_1_TARGET_WIDTH_ASYM_RX); 1511 1511 + break; 1512 1512 + default: 1513 1513 + return -EINVAL; 1514 1514 + } 1515 1515 + 1516 1516 + return tb_port_write(port, &val, TB_CFG_PORT, 1517 1517 + port->cap_phy + LANE_ADP_CS_1, 1); 1518 1518 + } 1519 1519 + 1520 1520 + /** 1521 1521 + * usb4_port_asym_start() - Start symmetry change and wait for completion 1522 1522 + * @port: USB4 port 1523 1523 + * 1524 1524 + * Start symmetry change of the link to asymmetric or symmetric 1525 1525 + * (according to what was previously set in tb_port_set_link_width(). 1526 1526 + * Wait for completion of the change. 1527 1527 + * 1528 1528 + * Returns %0 in case of success, %-ETIMEDOUT if case of timeout or 1529 1529 + * a negative errno in case of a failure. 1530 1530 + */ 1531 1531 + int usb4_port_asym_start(struct tb_port *port) 1532 1532 + { 1533 1533 + int ret; 1534 1534 + u32 val; 1535 1535 + 1536 1536 + ret = tb_port_read(port, &val, TB_CFG_PORT, 1537 1537 + port->cap_usb4 + PORT_CS_19, 1); 1538 1538 + if (ret) 1539 1539 + return ret; 1540 1540 + 1541 1541 + val &= ~PORT_CS_19_START_ASYM; 1542 1542 + val |= FIELD_PREP(PORT_CS_19_START_ASYM, 1); 1543 1543 + 1544 1544 + ret = tb_port_write(port, &val, TB_CFG_PORT, 1545 1545 + port->cap_usb4 + PORT_CS_19, 1); 1546 1546 + if (ret) 1547 1547 + return ret; 1548 1548 + 1549 1549 + /* 1550 1550 + * Wait for PORT_CS_19_START_ASYM to be 0. This means the USB4 1551 1551 + * port started the symmetry transition. 1552 1552 + */ 1553 1553 + ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_19, 1554 1554 + PORT_CS_19_START_ASYM, 0, 1000); 1555 1555 + if (ret) 1556 1556 + return ret; 1557 1557 + 1558 1558 + /* Then wait for the transtion to be completed */ 1559 1559 + return usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_18, 1560 1560 + PORT_CS_18_TIP, 0, 5000); 1561 1561 + } 1562 1562 + 1563 1563 + /** 1458 1564 * usb4_port_margining_caps() - Read USB4 port marginig capabilities 1459 1565 * @port: USB4 port 1460 1566 * @caps: Array with at least two elements to hold the results ··· 2048 1942 2049 1943 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT; 2050 1944 ret = lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000; 2051 2051 - 2052 2052 - return usb4_usb3_port_max_bandwidth(port, ret); 2053 2053 - } 2054 2054 - 2055 2055 - /** 2056 2056 - * usb4_usb3_port_actual_link_rate() - Established USB3 link rate 2057 2057 - * @port: USB3 adapter port 2058 2058 - * 2059 2059 - * Return actual established link rate of a USB3 adapter in Mb/s. If the 2060 2060 - * link is not up returns %0 and negative errno in case of failure. 2061 2061 - */ 2062 2062 - int usb4_usb3_port_actual_link_rate(struct tb_port *port) 2063 2063 - { 2064 2064 - int ret, lr; 2065 2065 - u32 val; 2066 2066 - 2067 2067 - if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port)) 2068 2068 - return -EINVAL; 2069 2069 - 2070 2070 - ret = tb_port_read(port, &val, TB_CFG_PORT, 2071 2071 - port->cap_adap + ADP_USB3_CS_4, 1); 2072 2072 - if (ret) 2073 2073 - return ret; 2074 2074 - 2075 2075 - if (!(val & ADP_USB3_CS_4_ULV)) 2076 2076 - return 0; 2077 2077 - 2078 2078 - lr = val & ADP_USB3_CS_4_ALR_MASK; 2079 2079 - ret = lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000; 2080 1945 2081 1946 return usb4_usb3_port_max_bandwidth(port, ret); 2082 1947 }

+10

drivers/usb/Kconfig

reviewed

··· 91 91 If you have such a device you may say N here and PCI related code 92 92 will not be built in the USB driver. 93 93 94 94 + config USB_PCI_AMD 95 95 + bool "AMD PCI USB host support" 96 96 + depends on USB_PCI && HAS_IOPORT 97 97 + default X86 || MACH_LOONGSON64 || PPC_PASEMI 98 98 + help 99 99 + Enable workarounds for USB implementation quirks in SB600/SB700/SB800 100 100 + and later south bridge implementations. These are common on x86 PCs 101 101 + with AMD CPUs but rarely used elsewhere, with the exception of a few 102 102 + powerpc and mips desktop machines. 103 103 + 94 104 if USB 95 105 96 106 source "drivers/usb/core/Kconfig"

-1

drivers/usb/c67x00/c67x00-hcd.h

reviewed

··· 109 109 void c67x00_endpoint_disable(struct usb_hcd *hcd, 110 110 struct usb_host_endpoint *ep); 111 111 112 112 - void c67x00_hcd_msg_received(struct c67x00_sie *sie, u16 msg); 113 112 void c67x00_sched_kick(struct c67x00_hcd *c67x00); 114 113 int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00); 115 114 void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00);

-3

drivers/usb/cdns3/cdnsp-debug.h

reviewed

··· 131 131 return "Endpoint Not ready"; 132 132 case TRB_HALT_ENDPOINT: 133 133 return "Halt Endpoint"; 134 134 - case TRB_FLUSH_ENDPOINT: 135 135 - return "FLush Endpoint"; 136 134 default: 137 135 return "UNKNOWN"; 138 136 } ··· 326 328 break; 327 329 case TRB_RESET_EP: 328 330 case TRB_HALT_ENDPOINT: 329 329 - case TRB_FLUSH_ENDPOINT: 330 331 ret = snprintf(str, size, 331 332 "%s: ep%d%s(%d) ctx %08x%08x slot %ld flags %c", 332 333 cdnsp_trb_type_string(type),

+1 -5

drivers/usb/cdns3/cdnsp-gadget.c

reviewed

··· 1024 1024 pep->ep_state |= EP_DIS_IN_RROGRESS; 1025 1025 1026 1026 /* Endpoint was unconfigured by Reset Device command. */ 1027 1027 - if (!(pep->ep_state & EP_UNCONFIGURED)) { 1027 1027 + if (!(pep->ep_state & EP_UNCONFIGURED)) 1028 1028 cdnsp_cmd_stop_ep(pdev, pep); 1029 1029 - cdnsp_cmd_flush_ep(pdev, pep); 1030 1030 - } 1031 1029 1032 1030 /* Remove all queued USB requests. */ 1033 1031 while (!list_empty(&pep->pending_list)) { ··· 1421 1423 static void cdnsp_stop(struct cdnsp_device *pdev) 1422 1424 { 1423 1425 u32 temp; 1424 1424 - 1425 1425 - cdnsp_cmd_flush_ep(pdev, &pdev->eps[0]); 1426 1426 1427 1427 /* Remove internally queued request for ep0. */ 1428 1428 if (!list_empty(&pdev->eps[0].pending_list)) {

-5

drivers/usb/cdns3/cdnsp-gadget.h

reviewed

··· 1128 1128 #define TRB_HALT_ENDPOINT 54 1129 1129 /* Doorbell Overflow Event. */ 1130 1130 #define TRB_DRB_OVERFLOW 57 1131 1131 - /* Flush Endpoint Command. */ 1132 1132 - #define TRB_FLUSH_ENDPOINT 58 1133 1131 1134 1132 #define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) 1135 1133 #define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ ··· 1537 1539 void cdnsp_queue_reset_ep(struct cdnsp_device *pdev, unsigned int ep_index); 1538 1540 void cdnsp_queue_halt_endpoint(struct cdnsp_device *pdev, 1539 1541 unsigned int ep_index); 1540 1540 - void cdnsp_queue_flush_endpoint(struct cdnsp_device *pdev, 1541 1541 - unsigned int ep_index); 1542 1542 void cdnsp_force_header_wakeup(struct cdnsp_device *pdev, int intf_num); 1543 1543 void cdnsp_queue_reset_device(struct cdnsp_device *pdev); 1544 1544 void cdnsp_queue_new_dequeue_state(struct cdnsp_device *pdev, ··· 1570 1574 int cdnsp_halt_endpoint(struct cdnsp_device *pdev, 1571 1575 struct cdnsp_ep *pep, int value); 1572 1576 int cdnsp_cmd_stop_ep(struct cdnsp_device *pdev, struct cdnsp_ep *pep); 1573 1573 - int cdnsp_cmd_flush_ep(struct cdnsp_device *pdev, struct cdnsp_ep *pep); 1574 1577 void cdnsp_setup_analyze(struct cdnsp_device *pdev); 1575 1578 int cdnsp_status_stage(struct cdnsp_device *pdev); 1576 1579 int cdnsp_reset_device(struct cdnsp_device *pdev);

-24

drivers/usb/cdns3/cdnsp-ring.c

reviewed

··· 2123 2123 return ret; 2124 2124 } 2125 2125 2126 2126 - int cdnsp_cmd_flush_ep(struct cdnsp_device *pdev, struct cdnsp_ep *pep) 2127 2127 - { 2128 2128 - int ret; 2129 2129 - 2130 2130 - cdnsp_queue_flush_endpoint(pdev, pep->idx); 2131 2131 - cdnsp_ring_cmd_db(pdev); 2132 2132 - ret = cdnsp_wait_for_cmd_compl(pdev); 2133 2133 - 2134 2134 - trace_cdnsp_handle_cmd_flush_ep(pep->out_ctx); 2135 2135 - 2136 2136 - return ret; 2137 2137 - } 2138 2138 - 2139 2126 /* 2140 2127 * The transfer burst count field of the isochronous TRB defines the number of 2141 2128 * bursts that are required to move all packets in this TD. Only SuperSpeed ··· 2448 2461 void cdnsp_queue_halt_endpoint(struct cdnsp_device *pdev, unsigned int ep_index) 2449 2462 { 2450 2463 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(TRB_HALT_ENDPOINT) | 2451 2451 - SLOT_ID_FOR_TRB(pdev->slot_id) | 2452 2452 - EP_ID_FOR_TRB(ep_index)); 2453 2453 - } 2454 2454 - 2455 2455 - /* 2456 2456 - * Queue a flush endpoint request on the command ring. 2457 2457 - */ 2458 2458 - void cdnsp_queue_flush_endpoint(struct cdnsp_device *pdev, 2459 2459 - unsigned int ep_index) 2460 2460 - { 2461 2461 - cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(TRB_FLUSH_ENDPOINT) | 2462 2464 SLOT_ID_FOR_TRB(pdev->slot_id) | 2463 2465 EP_ID_FOR_TRB(ep_index)); 2464 2466 }

+4

drivers/usb/chipidea/Kconfig

reviewed

··· 43 43 tristate "Enable MSM hsusb glue driver" if EXPERT 44 44 default USB_CHIPIDEA 45 45 46 46 + config USB_CHIPIDEA_NPCM 47 47 + tristate "Enable NPCM hsusb glue driver" if EXPERT 48 48 + default USB_CHIPIDEA 49 49 + 46 50 config USB_CHIPIDEA_IMX 47 51 tristate "Enable i.MX USB glue driver" if EXPERT 48 52 depends on OF

+1

drivers/usb/chipidea/Makefile

reviewed

··· 13 13 14 14 obj-$(CONFIG_USB_CHIPIDEA_GENERIC) += ci_hdrc_usb2.o 15 15 obj-$(CONFIG_USB_CHIPIDEA_MSM) += ci_hdrc_msm.o 16 16 + obj-$(CONFIG_USB_CHIPIDEA_NPCM) += ci_hdrc_npcm.o 16 17 obj-$(CONFIG_USB_CHIPIDEA_PCI) += ci_hdrc_pci.o 17 18 obj-$(CONFIG_USB_CHIPIDEA_IMX) += usbmisc_imx.o ci_hdrc_imx.o 18 19 obj-$(CONFIG_USB_CHIPIDEA_TEGRA) += ci_hdrc_tegra.o

+114

drivers/usb/chipidea/ci_hdrc_npcm.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0 2 2 + // Copyright (c) 2023 Nuvoton Technology corporation. 3 3 + 4 4 + #include <linux/module.h> 5 5 + #include <linux/platform_device.h> 6 6 + #include <linux/pm_runtime.h> 7 7 + #include <linux/usb/chipidea.h> 8 8 + #include <linux/clk.h> 9 9 + #include <linux/io.h> 10 10 + #include <linux/reset-controller.h> 11 11 + #include <linux/of.h> 12 12 + 13 13 + #include "ci.h" 14 14 + 15 15 + struct npcm_udc_data { 16 16 + struct platform_device *ci; 17 17 + struct clk *core_clk; 18 18 + struct ci_hdrc_platform_data pdata; 19 19 + }; 20 20 + 21 21 + static int npcm_udc_notify_event(struct ci_hdrc *ci, unsigned event) 22 22 + { 23 23 + struct device *dev = ci->dev->parent; 24 24 + 25 25 + switch (event) { 26 26 + case CI_HDRC_CONTROLLER_RESET_EVENT: 27 27 + /* clear all mode bits */ 28 28 + hw_write(ci, OP_USBMODE, 0xffffffff, 0x0); 29 29 + break; 30 30 + default: 31 31 + dev_dbg(dev, "unknown ci_hdrc event (%d)\n",event); 32 32 + break; 33 33 + } 34 34 + 35 35 + return 0; 36 36 + } 37 37 + 38 38 + static int npcm_udc_probe(struct platform_device *pdev) 39 39 + { 40 40 + int ret; 41 41 + struct npcm_udc_data *ci; 42 42 + struct platform_device *plat_ci; 43 43 + struct device *dev = &pdev->dev; 44 44 + 45 45 + ci = devm_kzalloc(&pdev->dev, sizeof(*ci), GFP_KERNEL); 46 46 + if (!ci) 47 47 + return -ENOMEM; 48 48 + platform_set_drvdata(pdev, ci); 49 49 + 50 50 + ci->core_clk = devm_clk_get_optional(dev, NULL); 51 51 + if (IS_ERR(ci->core_clk)) 52 52 + return PTR_ERR(ci->core_clk); 53 53 + 54 54 + ret = clk_prepare_enable(ci->core_clk); 55 55 + if (ret) 56 56 + return dev_err_probe(dev, ret, "failed to enable the clock: %d\n", ret); 57 57 + 58 58 + ci->pdata.name = dev_name(dev); 59 59 + ci->pdata.capoffset = DEF_CAPOFFSET; 60 60 + ci->pdata.flags = CI_HDRC_REQUIRES_ALIGNED_DMA | 61 61 + CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS; 62 62 + ci->pdata.phy_mode = USBPHY_INTERFACE_MODE_UTMI; 63 63 + ci->pdata.notify_event = npcm_udc_notify_event; 64 64 + 65 65 + plat_ci = ci_hdrc_add_device(dev, pdev->resource, pdev->num_resources, 66 66 + &ci->pdata); 67 67 + if (IS_ERR(plat_ci)) { 68 68 + ret = PTR_ERR(plat_ci); 69 69 + dev_err(dev, "failed to register HDRC NPCM device: %d\n", ret); 70 70 + goto clk_err; 71 71 + } 72 72 + 73 73 + pm_runtime_no_callbacks(dev); 74 74 + pm_runtime_enable(dev); 75 75 + 76 76 + return 0; 77 77 + 78 78 + clk_err: 79 79 + clk_disable_unprepare(ci->core_clk); 80 80 + return ret; 81 81 + } 82 82 + 83 83 + static int npcm_udc_remove(struct platform_device *pdev) 84 84 + { 85 85 + struct npcm_udc_data *ci = platform_get_drvdata(pdev); 86 86 + 87 87 + pm_runtime_disable(&pdev->dev); 88 88 + ci_hdrc_remove_device(ci->ci); 89 89 + clk_disable_unprepare(ci->core_clk); 90 90 + 91 91 + return 0; 92 92 + } 93 93 + 94 94 + static const struct of_device_id npcm_udc_dt_match[] = { 95 95 + { .compatible = "nuvoton,npcm750-udc", }, 96 96 + { .compatible = "nuvoton,npcm845-udc", }, 97 97 + { } 98 98 + }; 99 99 + MODULE_DEVICE_TABLE(of, npcm_udc_dt_match); 100 100 + 101 101 + static struct platform_driver npcm_udc_driver = { 102 102 + .probe = npcm_udc_probe, 103 103 + .remove = npcm_udc_remove, 104 104 + .driver = { 105 105 + .name = "npcm_udc", 106 106 + .of_match_table = npcm_udc_dt_match, 107 107 + }, 108 108 + }; 109 109 + 110 110 + module_platform_driver(npcm_udc_driver); 111 111 + 112 112 + MODULE_DESCRIPTION("NPCM USB device controller driver"); 113 113 + MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>"); 114 114 + MODULE_LICENSE("GPL v2");

+7 -9

drivers/usb/chipidea/ci_hdrc_tegra.c

reviewed

··· 293 293 usb->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0); 294 294 if (IS_ERR(usb->phy)) 295 295 return dev_err_probe(&pdev->dev, PTR_ERR(usb->phy), 296 296 - "failed to get PHY\n"); 296 296 + "failed to get PHY"); 297 297 298 298 usb->clk = devm_clk_get(&pdev->dev, NULL); 299 299 - if (IS_ERR(usb->clk)) { 300 300 - err = PTR_ERR(usb->clk); 301 301 - dev_err(&pdev->dev, "failed to get clock: %d\n", err); 302 302 - return err; 303 303 - } 299 299 + if (IS_ERR(usb->clk)) 300 300 + return dev_err_probe(&pdev->dev, PTR_ERR(usb->clk), 301 301 + "failed to get clock"); 304 302 305 303 err = devm_tegra_core_dev_init_opp_table_common(&pdev->dev); 306 304 if (err) ··· 314 316 315 317 err = tegra_usb_reset_controller(&pdev->dev); 316 318 if (err) { 317 317 - dev_err(&pdev->dev, "failed to reset controller: %d\n", err); 319 319 + dev_err_probe(&pdev->dev, err, "failed to reset controller"); 318 320 goto fail_power_off; 319 321 } 320 322 ··· 345 347 usb->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource, 346 348 pdev->num_resources, &usb->data); 347 349 if (IS_ERR(usb->dev)) { 348 348 - err = PTR_ERR(usb->dev); 349 349 - dev_err(&pdev->dev, "failed to add HDRC device: %d\n", err); 350 350 + err = dev_err_probe(&pdev->dev, PTR_ERR(usb->dev), 351 351 + "failed to add HDRC device"); 350 352 goto phy_shutdown; 351 353 } 352 354

+6 -7

drivers/usb/chipidea/ci_hdrc_usb2.c

reviewed

··· 9 9 #include <linux/dma-mapping.h> 10 10 #include <linux/module.h> 11 11 #include <linux/of.h> 12 12 - #include <linux/of_platform.h> 13 12 #include <linux/phy/phy.h> 14 13 #include <linux/platform_device.h> 14 14 + #include <linux/property.h> 15 15 #include <linux/usb/chipidea.h> 16 16 #include <linux/usb/hcd.h> 17 17 #include <linux/usb/ulpi.h> ··· 51 51 struct device *dev = &pdev->dev; 52 52 struct ci_hdrc_usb2_priv *priv; 53 53 struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev); 54 54 + const struct ci_hdrc_platform_data *data; 54 55 int ret; 55 55 - const struct of_device_id *match; 56 56 57 57 if (!ci_pdata) { 58 58 ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL); ··· 61 61 *ci_pdata = ci_default_pdata; /* struct copy */ 62 62 } 63 63 64 64 - match = of_match_device(ci_hdrc_usb2_of_match, &pdev->dev); 65 65 - if (match && match->data) { 64 64 + data = device_get_match_data(&pdev->dev); 65 65 + if (data) 66 66 /* struct copy */ 67 67 - *ci_pdata = *(struct ci_hdrc_platform_data *)match->data; 68 68 - } 67 67 + *ci_pdata = *data; 69 68 70 69 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 71 70 if (!priv) ··· 119 120 .remove_new = ci_hdrc_usb2_remove, 120 121 .driver = { 121 122 .name = "chipidea-usb2", 122 122 - .of_match_table = of_match_ptr(ci_hdrc_usb2_of_match), 123 123 + .of_match_table = ci_hdrc_usb2_of_match, 123 124 }, 124 125 }; 125 126 module_platform_driver(ci_hdrc_usb2_driver);

+20 -28

drivers/usb/chipidea/host.c

reviewed

··· 30 30 }; 31 31 32 32 struct ci_hdrc_dma_aligned_buffer { 33 33 - void *kmalloc_ptr; 34 34 - void *old_xfer_buffer; 33 33 + void *original_buffer; 35 34 u8 data[]; 36 35 }; 37 36 ··· 379 380 return 0; 380 381 } 381 382 382 382 - static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb) 383 383 + static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb, bool copy_back) 383 384 { 384 385 struct ci_hdrc_dma_aligned_buffer *temp; 385 385 - size_t length; 386 386 387 387 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) 388 388 return; 389 389 + urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; 389 390 390 391 temp = container_of(urb->transfer_buffer, 391 392 struct ci_hdrc_dma_aligned_buffer, data); 393 393 + urb->transfer_buffer = temp->original_buffer; 392 394 393 393 - if (usb_urb_dir_in(urb)) { 395 395 + if (copy_back && usb_urb_dir_in(urb)) { 396 396 + size_t length; 397 397 + 394 398 if (usb_pipeisoc(urb->pipe)) 395 399 length = urb->transfer_buffer_length; 396 400 else 397 401 length = urb->actual_length; 398 402 399 399 - memcpy(temp->old_xfer_buffer, temp->data, length); 403 403 + memcpy(temp->original_buffer, temp->data, length); 400 404 } 401 401 - urb->transfer_buffer = temp->old_xfer_buffer; 402 402 - kfree(temp->kmalloc_ptr); 403 405 404 404 - urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; 406 406 + kfree(temp); 405 407 } 406 408 407 409 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) 408 410 { 409 409 - struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr; 410 410 - const unsigned int ci_hdrc_usb_dma_align = 32; 411 411 - size_t kmalloc_size; 411 411 + struct ci_hdrc_dma_aligned_buffer *temp; 412 412 413 413 - if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 || 414 414 - !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1))) 413 413 + if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0) 414 414 + return 0; 415 415 + if (IS_ALIGNED((uintptr_t)urb->transfer_buffer, 4) 416 416 + && IS_ALIGNED(urb->transfer_buffer_length, 4)) 415 417 return 0; 416 418 417 417 - /* Allocate a buffer with enough padding for alignment */ 418 418 - kmalloc_size = urb->transfer_buffer_length + 419 419 - sizeof(struct ci_hdrc_dma_aligned_buffer) + 420 420 - ci_hdrc_usb_dma_align - 1; 421 421 - 422 422 - kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); 423 423 - if (!kmalloc_ptr) 419 419 + temp = kmalloc(sizeof(*temp) + ALIGN(urb->transfer_buffer_length, 4), mem_flags); 420 420 + if (!temp) 424 421 return -ENOMEM; 425 422 426 426 - /* Position our struct dma_aligned_buffer such that data is aligned */ 427 427 - temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1; 428 428 - temp->kmalloc_ptr = kmalloc_ptr; 429 429 - temp->old_xfer_buffer = urb->transfer_buffer; 430 423 if (usb_urb_dir_out(urb)) 431 424 memcpy(temp->data, urb->transfer_buffer, 432 425 urb->transfer_buffer_length); 433 433 - urb->transfer_buffer = temp->data; 434 426 427 427 + temp->original_buffer = urb->transfer_buffer; 428 428 + urb->transfer_buffer = temp->data; 435 429 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; 436 430 437 431 return 0; ··· 441 449 442 450 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); 443 451 if (ret) 444 444 - ci_hdrc_free_dma_aligned_buffer(urb); 452 452 + ci_hdrc_free_dma_aligned_buffer(urb, false); 445 453 446 454 return ret; 447 455 } ··· 449 457 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) 450 458 { 451 459 usb_hcd_unmap_urb_for_dma(hcd, urb); 452 452 - ci_hdrc_free_dma_aligned_buffer(urb); 460 460 + ci_hdrc_free_dma_aligned_buffer(urb, true); 453 461 } 454 462 455 463 #ifdef CONFIG_PM_SLEEP

+4 -1

drivers/usb/chipidea/otg.c

reviewed

··· 130 130 131 131 void ci_handle_vbus_change(struct ci_hdrc *ci) 132 132 { 133 133 - if (!ci->is_otg) 133 133 + if (!ci->is_otg) { 134 134 + if (ci->platdata->flags & CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS) 135 135 + usb_gadget_vbus_connect(&ci->gadget); 134 136 return; 137 137 + } 135 138 136 139 if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active) 137 140 usb_gadget_vbus_connect(&ci->gadget);

+1 -2

drivers/usb/core/hcd-pci.c

reviewed

··· 206 206 goto free_irq_vectors; 207 207 } 208 208 209 209 - hcd->amd_resume_bug = (usb_hcd_amd_remote_wakeup_quirk(dev) && 210 210 - driver->flags & (HCD_USB11 | HCD_USB3)) ? 1 : 0; 209 209 + hcd->amd_resume_bug = usb_hcd_amd_resume_bug(dev, driver); 211 210 212 211 if (driver->flags & HCD_MEMORY) { 213 212 /* EHCI, OHCI */

+4

drivers/usb/core/hub.c

reviewed

··· 2274 2274 */ 2275 2275 if (!test_and_set_bit(port1, hub->child_usage_bits)) 2276 2276 pm_runtime_get_sync(&port_dev->dev); 2277 2277 + 2278 2278 + typec_deattach(port_dev->connector, &udev->dev); 2277 2279 } 2278 2280 2279 2281 usb_remove_ep_devs(&udev->ep0); ··· 2622 2620 2623 2621 if (!test_and_set_bit(port1, hub->child_usage_bits)) 2624 2622 pm_runtime_get_sync(&port_dev->dev); 2623 2623 + 2624 2624 + typec_attach(port_dev->connector, &udev->dev); 2625 2625 } 2626 2626 2627 2627 (void) usb_create_ep_devs(&udev->dev, &udev->ep0, udev);

+3

drivers/usb/core/hub.h

reviewed

··· 14 14 #include <linux/usb.h> 15 15 #include <linux/usb/ch11.h> 16 16 #include <linux/usb/hcd.h> 17 17 + #include <linux/usb/typec.h> 17 18 #include "usb.h" 18 19 19 20 struct usb_hub { ··· 83 82 * @dev: generic device interface 84 83 * @port_owner: port's owner 85 84 * @peer: related usb2 and usb3 ports (share the same connector) 85 85 + * @connector: USB Type-C connector 86 86 * @req: default pm qos request for hubs without port power control 87 87 * @connect_type: port's connect type 88 88 * @state: device state of the usb device attached to the port ··· 102 100 struct device dev; 103 101 struct usb_dev_state *port_owner; 104 102 struct usb_port *peer; 103 103 + struct typec_connector *connector; 105 104 struct dev_pm_qos_request *req; 106 105 enum usb_port_connect_type connect_type; 107 106 enum usb_device_state state;

+18 -4

drivers/usb/core/port.c

reviewed

··· 653 653 654 654 static int connector_bind(struct device *dev, struct device *connector, void *data) 655 655 { 656 656 + struct usb_port *port_dev = to_usb_port(dev); 656 657 int ret; 657 658 658 659 ret = sysfs_create_link(&dev->kobj, &connector->kobj, "connector"); ··· 661 660 return ret; 662 661 663 662 ret = sysfs_create_link(&connector->kobj, &dev->kobj, dev_name(dev)); 664 664 - if (ret) 663 663 + if (ret) { 665 664 sysfs_remove_link(&dev->kobj, "connector"); 665 665 + return ret; 666 666 + } 666 667 667 667 - return ret; 668 668 + port_dev->connector = data; 669 669 + 670 670 + /* 671 671 + * If there is already USB device connected to the port, letting the 672 672 + * Type-C connector know about it immediately. 673 673 + */ 674 674 + if (port_dev->child) 675 675 + typec_attach(port_dev->connector, &port_dev->child->dev); 676 676 + 677 677 + return 0; 668 678 } 669 679 670 680 static void connector_unbind(struct device *dev, struct device *connector, void *data) 671 681 { 682 682 + struct usb_port *port_dev = to_usb_port(dev); 683 683 + 672 684 sysfs_remove_link(&connector->kobj, dev_name(dev)); 673 685 sysfs_remove_link(&dev->kobj, "connector"); 686 686 + port_dev->connector = NULL; 674 687 } 675 688 676 689 static const struct component_ops connector_ops = { ··· 713 698 set_bit(port1, hub->power_bits); 714 699 port_dev->dev.parent = hub->intfdev; 715 700 if (hub_is_superspeed(hdev)) { 701 701 + port_dev->is_superspeed = 1; 716 702 port_dev->usb3_lpm_u1_permit = 1; 717 703 port_dev->usb3_lpm_u2_permit = 1; 718 704 port_dev->dev.groups = port_dev_usb3_group; ··· 721 705 port_dev->dev.groups = port_dev_group; 722 706 port_dev->dev.type = &usb_port_device_type; 723 707 port_dev->dev.driver = &usb_port_driver; 724 724 - if (hub_is_superspeed(hub->hdev)) 725 725 - port_dev->is_superspeed = 1; 726 708 dev_set_name(&port_dev->dev, "%s-port%d", dev_name(&hub->hdev->dev), 727 709 port1); 728 710 mutex_init(&port_dev->status_lock);

+1 -1

drivers/usb/dwc2/hcd.c

reviewed

··· 4769 4769 if (qh_allocated && qh->channel && qh->channel->qh == qh) 4770 4770 qh->channel->qh = NULL; 4771 4771 fail2: 4772 4772 - spin_unlock_irqrestore(&hsotg->lock, flags); 4773 4772 urb->hcpriv = NULL; 4773 4773 + spin_unlock_irqrestore(&hsotg->lock, flags); 4774 4774 kfree(qtd); 4775 4775 fail1: 4776 4776 if (qh_allocated) {

+6 -15

drivers/usb/dwc2/params.c

reviewed

··· 5 5 6 6 #include <linux/kernel.h> 7 7 #include <linux/module.h> 8 8 - #include <linux/of_device.h> 8 8 + #include <linux/of.h> 9 9 #include <linux/usb/of.h> 10 10 #include <linux/pci_ids.h> 11 11 #include <linux/pci.h> ··· 968 968 969 969 int dwc2_init_params(struct dwc2_hsotg *hsotg) 970 970 { 971 971 - const struct of_device_id *match; 972 971 set_params_cb set_params; 973 972 974 973 dwc2_set_default_params(hsotg); 975 974 dwc2_get_device_properties(hsotg); 976 975 977 977 - match = of_match_device(dwc2_of_match_table, hsotg->dev); 978 978 - if (match && match->data) { 979 979 - set_params = match->data; 976 976 + set_params = device_get_match_data(hsotg->dev); 977 977 + if (set_params) { 980 978 set_params(hsotg); 981 981 - } else if (!match) { 982 982 - const struct acpi_device_id *amatch; 983 983 - const struct pci_device_id *pmatch = NULL; 984 984 - 985 985 - amatch = acpi_match_device(dwc2_acpi_match, hsotg->dev); 986 986 - if (amatch && amatch->driver_data) { 987 987 - set_params = (set_params_cb)amatch->driver_data; 988 988 - set_params(hsotg); 989 989 - } else if (!amatch) 990 990 - pmatch = pci_match_id(dwc2_pci_ids, to_pci_dev(hsotg->dev->parent)); 979 979 + } else { 980 980 + const struct pci_device_id *pmatch = 981 981 + pci_match_id(dwc2_pci_ids, to_pci_dev(hsotg->dev->parent)); 991 982 992 983 if (pmatch && pmatch->driver_data) { 993 984 set_params = (set_params_cb)pmatch->driver_data;

+11

drivers/usb/dwc3/Kconfig

reviewed

··· 178 178 Only the host mode is currently supported. 179 179 Say 'Y' or 'M' here if you have one such device. 180 180 181 181 + config USB_DWC3_RTK 182 182 + tristate "Realtek DWC3 Platform Driver" 183 183 + depends on OF && ARCH_REALTEK 184 184 + default USB_DWC3 185 185 + select USB_ROLE_SWITCH 186 186 + help 187 187 + RTK DHC RTD SoCs with DesignWare Core USB3 IP inside, 188 188 + and IP Core configured for USB 2.0 and USB 3.0 in host 189 189 + or dual-role mode. 190 190 + Say 'Y' or 'M' if you have such device. 191 191 + 181 192 endif

+1

drivers/usb/dwc3/Makefile

reviewed

··· 55 55 obj-$(CONFIG_USB_DWC3_IMX8MP) += dwc3-imx8mp.o 56 56 obj-$(CONFIG_USB_DWC3_XILINX) += dwc3-xilinx.o 57 57 obj-$(CONFIG_USB_DWC3_OCTEON) += dwc3-octeon.o 58 58 + obj-$(CONFIG_USB_DWC3_RTK) += dwc3-rtk.o

+152 -36

drivers/usb/dwc3/core.c

reviewed

··· 854 854 if (ret) 855 855 goto disable_ref_clk; 856 856 857 857 + ret = clk_prepare_enable(dwc->utmi_clk); 858 858 + if (ret) 859 859 + goto disable_susp_clk; 860 860 + 861 861 + ret = clk_prepare_enable(dwc->pipe_clk); 862 862 + if (ret) 863 863 + goto disable_utmi_clk; 864 864 + 857 865 return 0; 858 866 867 867 + disable_utmi_clk: 868 868 + clk_disable_unprepare(dwc->utmi_clk); 869 869 + disable_susp_clk: 870 870 + clk_disable_unprepare(dwc->susp_clk); 859 871 disable_ref_clk: 860 872 clk_disable_unprepare(dwc->ref_clk); 861 873 disable_bus_clk: ··· 877 865 878 866 static void dwc3_clk_disable(struct dwc3 *dwc) 879 867 { 868 868 + clk_disable_unprepare(dwc->pipe_clk); 869 869 + clk_disable_unprepare(dwc->utmi_clk); 880 870 clk_disable_unprepare(dwc->susp_clk); 881 871 clk_disable_unprepare(dwc->ref_clk); 882 872 clk_disable_unprepare(dwc->bus_clk); ··· 1108 1094 } 1109 1095 } 1110 1096 1097 1097 + static void dwc3_config_threshold(struct dwc3 *dwc) 1098 1098 + { 1099 1099 + u32 reg; 1100 1100 + u8 rx_thr_num; 1101 1101 + u8 rx_maxburst; 1102 1102 + u8 tx_thr_num; 1103 1103 + u8 tx_maxburst; 1104 1104 + 1105 1105 + /* 1106 1106 + * Must config both number of packets and max burst settings to enable 1107 1107 + * RX and/or TX threshold. 1108 1108 + */ 1109 1109 + if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { 1110 1110 + rx_thr_num = dwc->rx_thr_num_pkt_prd; 1111 1111 + rx_maxburst = dwc->rx_max_burst_prd; 1112 1112 + tx_thr_num = dwc->tx_thr_num_pkt_prd; 1113 1113 + tx_maxburst = dwc->tx_max_burst_prd; 1114 1114 + 1115 1115 + if (rx_thr_num && rx_maxburst) { 1116 1116 + reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1117 1117 + reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1118 1118 + 1119 1119 + reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1120 1120 + reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1121 1121 + 1122 1122 + reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1123 1123 + reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1124 1124 + 1125 1125 + dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1126 1126 + } 1127 1127 + 1128 1128 + if (tx_thr_num && tx_maxburst) { 1129 1129 + reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1130 1130 + reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1131 1131 + 1132 1132 + reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1133 1133 + reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1134 1134 + 1135 1135 + reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1136 1136 + reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1137 1137 + 1138 1138 + dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1139 1139 + } 1140 1140 + } 1141 1141 + 1142 1142 + rx_thr_num = dwc->rx_thr_num_pkt; 1143 1143 + rx_maxburst = dwc->rx_max_burst; 1144 1144 + tx_thr_num = dwc->tx_thr_num_pkt; 1145 1145 + tx_maxburst = dwc->tx_max_burst; 1146 1146 + 1147 1147 + if (DWC3_IP_IS(DWC3)) { 1148 1148 + if (rx_thr_num && rx_maxburst) { 1149 1149 + reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1150 1150 + reg |= DWC3_GRXTHRCFG_PKTCNTSEL; 1151 1151 + 1152 1152 + reg &= ~DWC3_GRXTHRCFG_RXPKTCNT(~0); 1153 1153 + reg |= DWC3_GRXTHRCFG_RXPKTCNT(rx_thr_num); 1154 1154 + 1155 1155 + reg &= ~DWC3_GRXTHRCFG_MAXRXBURSTSIZE(~0); 1156 1156 + reg |= DWC3_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst); 1157 1157 + 1158 1158 + dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1159 1159 + } 1160 1160 + 1161 1161 + if (tx_thr_num && tx_maxburst) { 1162 1162 + reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1163 1163 + reg |= DWC3_GTXTHRCFG_PKTCNTSEL; 1164 1164 + 1165 1165 + reg &= ~DWC3_GTXTHRCFG_TXPKTCNT(~0); 1166 1166 + reg |= DWC3_GTXTHRCFG_TXPKTCNT(tx_thr_num); 1167 1167 + 1168 1168 + reg &= ~DWC3_GTXTHRCFG_MAXTXBURSTSIZE(~0); 1169 1169 + reg |= DWC3_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst); 1170 1170 + 1171 1171 + dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1172 1172 + } 1173 1173 + } else { 1174 1174 + if (rx_thr_num && rx_maxburst) { 1175 1175 + reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1176 1176 + reg |= DWC31_GRXTHRCFG_PKTCNTSEL; 1177 1177 + 1178 1178 + reg &= ~DWC31_GRXTHRCFG_RXPKTCNT(~0); 1179 1179 + reg |= DWC31_GRXTHRCFG_RXPKTCNT(rx_thr_num); 1180 1180 + 1181 1181 + reg &= ~DWC31_GRXTHRCFG_MAXRXBURSTSIZE(~0); 1182 1182 + reg |= DWC31_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst); 1183 1183 + 1184 1184 + dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1185 1185 + } 1186 1186 + 1187 1187 + if (tx_thr_num && tx_maxburst) { 1188 1188 + reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1189 1189 + reg |= DWC31_GTXTHRCFG_PKTCNTSEL; 1190 1190 + 1191 1191 + reg &= ~DWC31_GTXTHRCFG_TXPKTCNT(~0); 1192 1192 + reg |= DWC31_GTXTHRCFG_TXPKTCNT(tx_thr_num); 1193 1193 + 1194 1194 + reg &= ~DWC31_GTXTHRCFG_MAXTXBURSTSIZE(~0); 1195 1195 + reg |= DWC31_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst); 1196 1196 + 1197 1197 + dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1198 1198 + } 1199 1199 + } 1200 1200 + } 1201 1201 + 1111 1202 /** 1112 1203 * dwc3_core_init - Low-level initialization of DWC3 Core 1113 1204 * @dwc: Pointer to our controller context structure ··· 1365 1246 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1366 1247 } 1367 1248 1368 1368 - /* 1369 1369 - * Must config both number of packets and max burst settings to enable 1370 1370 - * RX and/or TX threshold. 1371 1371 - */ 1372 1372 - if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { 1373 1373 - u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 1374 1374 - u8 rx_maxburst = dwc->rx_max_burst_prd; 1375 1375 - u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 1376 1376 - u8 tx_maxburst = dwc->tx_max_burst_prd; 1377 1377 - 1378 1378 - if (rx_thr_num && rx_maxburst) { 1379 1379 - reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1380 1380 - reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1381 1381 - 1382 1382 - reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1383 1383 - reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1384 1384 - 1385 1385 - reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1386 1386 - reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1387 1387 - 1388 1388 - dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1389 1389 - } 1390 1390 - 1391 1391 - if (tx_thr_num && tx_maxburst) { 1392 1392 - reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1393 1393 - reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1394 1394 - 1395 1395 - reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1396 1396 - reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1397 1397 - 1398 1398 - reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1399 1399 - reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1400 1400 - 1401 1401 - dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1402 1402 - } 1403 1403 - } 1249 1249 + dwc3_config_threshold(dwc); 1404 1250 1405 1251 return 0; 1406 1252 ··· 1501 1417 u8 lpm_nyet_threshold; 1502 1418 u8 tx_de_emphasis; 1503 1419 u8 hird_threshold; 1420 1420 + u8 rx_thr_num_pkt = 0; 1421 1421 + u8 rx_max_burst = 0; 1422 1422 + u8 tx_thr_num_pkt = 0; 1423 1423 + u8 tx_max_burst = 0; 1504 1424 u8 rx_thr_num_pkt_prd = 0; 1505 1425 u8 rx_max_burst_prd = 0; 1506 1426 u8 tx_thr_num_pkt_prd = 0; ··· 1567 1479 "snps,usb2-lpm-disable"); 1568 1480 dwc->usb2_gadget_lpm_disable = device_property_read_bool(dev, 1569 1481 "snps,usb2-gadget-lpm-disable"); 1482 1482 + device_property_read_u8(dev, "snps,rx-thr-num-pkt", 1483 1483 + &rx_thr_num_pkt); 1484 1484 + device_property_read_u8(dev, "snps,rx-max-burst", 1485 1485 + &rx_max_burst); 1486 1486 + device_property_read_u8(dev, "snps,tx-thr-num-pkt", 1487 1487 + &tx_thr_num_pkt); 1488 1488 + device_property_read_u8(dev, "snps,tx-max-burst", 1489 1489 + &tx_max_burst); 1570 1490 device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", 1571 1491 &rx_thr_num_pkt_prd); 1572 1492 device_property_read_u8(dev, "snps,rx-max-burst-prd", ··· 1655 1559 dwc->tx_de_emphasis = tx_de_emphasis; 1656 1560 1657 1561 dwc->hird_threshold = hird_threshold; 1562 1562 + 1563 1563 + dwc->rx_thr_num_pkt = rx_thr_num_pkt; 1564 1564 + dwc->rx_max_burst = rx_max_burst; 1565 1565 + 1566 1566 + dwc->tx_thr_num_pkt = tx_thr_num_pkt; 1567 1567 + dwc->tx_max_burst = tx_max_burst; 1658 1568 1659 1569 dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; 1660 1570 dwc->rx_max_burst_prd = rx_max_burst_prd; ··· 1885 1783 return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), 1886 1784 "could not get suspend clock\n"); 1887 1785 } 1786 1786 + } 1787 1787 + 1788 1788 + /* specific to Rockchip RK3588 */ 1789 1789 + dwc->utmi_clk = devm_clk_get_optional(dev, "utmi"); 1790 1790 + if (IS_ERR(dwc->utmi_clk)) { 1791 1791 + return dev_err_probe(dev, PTR_ERR(dwc->utmi_clk), 1792 1792 + "could not get utmi clock\n"); 1793 1793 + } 1794 1794 + 1795 1795 + /* specific to Rockchip RK3588 */ 1796 1796 + dwc->pipe_clk = devm_clk_get_optional(dev, "pipe"); 1797 1797 + if (IS_ERR(dwc->pipe_clk)) { 1798 1798 + return dev_err_probe(dev, PTR_ERR(dwc->pipe_clk), 1799 1799 + "could not get pipe clock\n"); 1888 1800 } 1889 1801 1890 1802 return 0;

+19

drivers/usb/dwc3/core.h

reviewed

··· 211 211 #define DWC3_GRXTHRCFG_RXPKTCNT(n) (((n) & 0xf) << 24) 212 212 #define DWC3_GRXTHRCFG_PKTCNTSEL BIT(29) 213 213 214 214 + /* Global TX Threshold Configuration Register */ 215 215 + #define DWC3_GTXTHRCFG_MAXTXBURSTSIZE(n) (((n) & 0xff) << 16) 216 216 + #define DWC3_GTXTHRCFG_TXPKTCNT(n) (((n) & 0xf) << 24) 217 217 + #define DWC3_GTXTHRCFG_PKTCNTSEL BIT(29) 218 218 + 214 219 /* Global RX Threshold Configuration Register for DWC_usb31 only */ 215 220 #define DWC31_GRXTHRCFG_MAXRXBURSTSIZE(n) (((n) & 0x1f) << 16) 216 221 #define DWC31_GRXTHRCFG_RXPKTCNT(n) (((n) & 0x1f) << 21) ··· 996 991 * @bus_clk: clock for accessing the registers 997 992 * @ref_clk: reference clock 998 993 * @susp_clk: clock used when the SS phy is in low power (S3) state 994 994 + * @utmi_clk: clock used for USB2 PHY communication 995 995 + * @pipe_clk: clock used for USB3 PHY communication 999 996 * @reset: reset control 1000 997 * @regs: base address for our registers 1001 998 * @regs_size: address space size ··· 1052 1045 * @test_mode_nr: test feature selector 1053 1046 * @lpm_nyet_threshold: LPM NYET response threshold 1054 1047 * @hird_threshold: HIRD threshold 1048 1048 + * @rx_thr_num_pkt: USB receive packet count 1049 1049 + * @rx_max_burst: max USB receive burst size 1050 1050 + * @tx_thr_num_pkt: USB transmit packet count 1051 1051 + * @tx_max_burst: max USB transmit burst size 1055 1052 * @rx_thr_num_pkt_prd: periodic ESS receive packet count 1056 1053 * @rx_max_burst_prd: max periodic ESS receive burst size 1057 1054 * @tx_thr_num_pkt_prd: periodic ESS transmit packet count ··· 1117 1106 * instances in park mode. 1118 1107 * @parkmode_disable_hs_quirk: set if we need to disable all HishSpeed 1119 1108 * instances in park mode. 1109 1109 + * @gfladj_refclk_lpm_sel: set if we need to enable SOF/ITP counter 1110 1110 + * running based on ref_clk 1120 1111 * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk 1121 1112 * @tx_de_emphasis: Tx de-emphasis value 1122 1113 * 0 - -6dB de-emphasis ··· 1169 1156 struct clk *bus_clk; 1170 1157 struct clk *ref_clk; 1171 1158 struct clk *susp_clk; 1159 1159 + struct clk *utmi_clk; 1160 1160 + struct clk *pipe_clk; 1172 1161 1173 1162 struct reset_control *reset; 1174 1163 ··· 1288 1273 u8 test_mode_nr; 1289 1274 u8 lpm_nyet_threshold; 1290 1275 u8 hird_threshold; 1276 1276 + u8 rx_thr_num_pkt; 1277 1277 + u8 rx_max_burst; 1278 1278 + u8 tx_thr_num_pkt; 1279 1279 + u8 tx_max_burst; 1291 1280 u8 rx_thr_num_pkt_prd; 1292 1281 u8 rx_max_burst_prd; 1293 1282 u8 tx_thr_num_pkt_prd;

+475

drivers/usb/dwc3/dwc3-rtk.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0 2 2 + /* 3 3 + * dwc3-rtk.c - Realtek DWC3 Specific Glue layer 4 4 + * 5 5 + * Copyright (C) 2023 Realtek Semiconductor Corporation 6 6 + * 7 7 + */ 8 8 + 9 9 + #include <linux/module.h> 10 10 + #include <linux/kernel.h> 11 11 + #include <linux/platform_device.h> 12 12 + #include <linux/of.h> 13 13 + #include <linux/of_platform.h> 14 14 + #include <linux/suspend.h> 15 15 + #include <linux/sys_soc.h> 16 16 + #include <linux/usb/otg.h> 17 17 + #include <linux/usb/of.h> 18 18 + #include <linux/usb/role.h> 19 19 + 20 20 + #include "core.h" 21 21 + 22 22 + #define WRAP_CTR_REG 0x0 23 23 + #define DISABLE_MULTI_REQ BIT(1) 24 24 + #define DESC_R2W_MULTI_DISABLE BIT(9) 25 25 + #define FORCE_PIPE3_PHY_STATUS_TO_0 BIT(13) 26 26 + 27 27 + #define WRAP_USB2_PHY_UTMI_REG 0x8 28 28 + #define TXHSVM_EN BIT(3) 29 29 + 30 30 + #define WRAP_PHY_PIPE_REG 0xC 31 31 + #define RESET_DISABLE_PIPE3_P0 BIT(0) 32 32 + #define CLOCK_ENABLE_FOR_PIPE3_PCLK BIT(1) 33 33 + 34 34 + #define WRAP_USB_HMAC_CTR0_REG 0x60 35 35 + #define U3PORT_DIS BIT(8) 36 36 + 37 37 + #define WRAP_USB2_PHY_REG 0x70 38 38 + #define USB2_PHY_EN_PHY_PLL_PORT0 BIT(12) 39 39 + #define USB2_PHY_EN_PHY_PLL_PORT1 BIT(13) 40 40 + #define USB2_PHY_SWITCH_MASK 0x707 41 41 + #define USB2_PHY_SWITCH_DEVICE 0x0 42 42 + #define USB2_PHY_SWITCH_HOST 0x606 43 43 + 44 44 + #define WRAP_APHY_REG 0x128 45 45 + #define USB3_MBIAS_ENABLE BIT(1) 46 46 + 47 47 + /* pm control */ 48 48 + #define WRAP_USB_DBUS_PWR_CTRL_REG 0x160 49 49 + #define USB_DBUS_PWR_CTRL_REG 0x0 50 50 + #define DBUS_PWR_CTRL_EN BIT(0) 51 51 + 52 52 + struct dwc3_rtk { 53 53 + struct device *dev; 54 54 + void __iomem *regs; 55 55 + size_t regs_size; 56 56 + void __iomem *pm_base; 57 57 + 58 58 + struct dwc3 *dwc; 59 59 + 60 60 + enum usb_role cur_role; 61 61 + struct usb_role_switch *role_switch; 62 62 + }; 63 63 + 64 64 + static void switch_usb2_role(struct dwc3_rtk *rtk, enum usb_role role) 65 65 + { 66 66 + void __iomem *reg; 67 67 + int val; 68 68 + 69 69 + reg = rtk->regs + WRAP_USB2_PHY_REG; 70 70 + val = ~USB2_PHY_SWITCH_MASK & readl(reg); 71 71 + 72 72 + switch (role) { 73 73 + case USB_ROLE_DEVICE: 74 74 + writel(USB2_PHY_SWITCH_DEVICE | val, reg); 75 75 + break; 76 76 + case USB_ROLE_HOST: 77 77 + writel(USB2_PHY_SWITCH_HOST | val, reg); 78 78 + break; 79 79 + default: 80 80 + dev_dbg(rtk->dev, "%s: role=%d\n", __func__, role); 81 81 + break; 82 82 + } 83 83 + } 84 84 + 85 85 + static void switch_dwc3_role(struct dwc3_rtk *rtk, enum usb_role role) 86 86 + { 87 87 + if (!rtk->dwc->role_sw) 88 88 + return; 89 89 + 90 90 + usb_role_switch_set_role(rtk->dwc->role_sw, role); 91 91 + } 92 92 + 93 93 + static enum usb_role dwc3_rtk_get_role(struct dwc3_rtk *rtk) 94 94 + { 95 95 + enum usb_role role; 96 96 + 97 97 + role = rtk->cur_role; 98 98 + 99 99 + if (rtk->dwc && rtk->dwc->role_sw) 100 100 + role = usb_role_switch_get_role(rtk->dwc->role_sw); 101 101 + else 102 102 + dev_dbg(rtk->dev, "%s not usb_role_switch role=%d\n", __func__, role); 103 103 + 104 104 + return role; 105 105 + } 106 106 + 107 107 + static void dwc3_rtk_set_role(struct dwc3_rtk *rtk, enum usb_role role) 108 108 + { 109 109 + rtk->cur_role = role; 110 110 + 111 111 + switch_dwc3_role(rtk, role); 112 112 + mdelay(10); 113 113 + switch_usb2_role(rtk, role); 114 114 + } 115 115 + 116 116 + #if IS_ENABLED(CONFIG_USB_ROLE_SWITCH) 117 117 + static int dwc3_usb_role_switch_set(struct usb_role_switch *sw, enum usb_role role) 118 118 + { 119 119 + struct dwc3_rtk *rtk = usb_role_switch_get_drvdata(sw); 120 120 + 121 121 + dwc3_rtk_set_role(rtk, role); 122 122 + 123 123 + return 0; 124 124 + } 125 125 + 126 126 + static enum usb_role dwc3_usb_role_switch_get(struct usb_role_switch *sw) 127 127 + { 128 128 + struct dwc3_rtk *rtk = usb_role_switch_get_drvdata(sw); 129 129 + 130 130 + return dwc3_rtk_get_role(rtk); 131 131 + } 132 132 + 133 133 + static int dwc3_rtk_setup_role_switch(struct dwc3_rtk *rtk) 134 134 + { 135 135 + struct usb_role_switch_desc dwc3_role_switch = {NULL}; 136 136 + 137 137 + dwc3_role_switch.name = dev_name(rtk->dev); 138 138 + dwc3_role_switch.driver_data = rtk; 139 139 + dwc3_role_switch.allow_userspace_control = true; 140 140 + dwc3_role_switch.fwnode = dev_fwnode(rtk->dev); 141 141 + dwc3_role_switch.set = dwc3_usb_role_switch_set; 142 142 + dwc3_role_switch.get = dwc3_usb_role_switch_get; 143 143 + rtk->role_switch = usb_role_switch_register(rtk->dev, &dwc3_role_switch); 144 144 + if (IS_ERR(rtk->role_switch)) 145 145 + return PTR_ERR(rtk->role_switch); 146 146 + 147 147 + return 0; 148 148 + } 149 149 + 150 150 + static int dwc3_rtk_remove_role_switch(struct dwc3_rtk *rtk) 151 151 + { 152 152 + if (rtk->role_switch) 153 153 + usb_role_switch_unregister(rtk->role_switch); 154 154 + 155 155 + rtk->role_switch = NULL; 156 156 + 157 157 + return 0; 158 158 + } 159 159 + #else 160 160 + #define dwc3_rtk_setup_role_switch(x) 0 161 161 + #define dwc3_rtk_remove_role_switch(x) 0 162 162 + #endif 163 163 + 164 164 + static const char *const speed_names[] = { 165 165 + [USB_SPEED_UNKNOWN] = "UNKNOWN", 166 166 + [USB_SPEED_LOW] = "low-speed", 167 167 + [USB_SPEED_FULL] = "full-speed", 168 168 + [USB_SPEED_HIGH] = "high-speed", 169 169 + [USB_SPEED_WIRELESS] = "wireless", 170 170 + [USB_SPEED_SUPER] = "super-speed", 171 171 + [USB_SPEED_SUPER_PLUS] = "super-speed-plus", 172 172 + }; 173 173 + 174 174 + static enum usb_device_speed __get_dwc3_maximum_speed(struct device_node *np) 175 175 + { 176 176 + struct device_node *dwc3_np; 177 177 + const char *maximum_speed; 178 178 + int ret; 179 179 + 180 180 + dwc3_np = of_get_compatible_child(np, "snps,dwc3"); 181 181 + if (!dwc3_np) 182 182 + return USB_SPEED_UNKNOWN; 183 183 + 184 184 + ret = of_property_read_string(dwc3_np, "maximum-speed", &maximum_speed); 185 185 + if (ret < 0) 186 186 + return USB_SPEED_UNKNOWN; 187 187 + 188 188 + ret = match_string(speed_names, ARRAY_SIZE(speed_names), maximum_speed); 189 189 + 190 190 + return (ret < 0) ? USB_SPEED_UNKNOWN : ret; 191 191 + } 192 192 + 193 193 + static int dwc3_rtk_init(struct dwc3_rtk *rtk) 194 194 + { 195 195 + struct device *dev = rtk->dev; 196 196 + void __iomem *reg; 197 197 + int val; 198 198 + enum usb_device_speed maximum_speed; 199 199 + const struct soc_device_attribute rtk_soc_kylin_a00[] = { 200 200 + { .family = "Realtek Kylin", .revision = "A00", }, 201 201 + { /* empty */ } }; 202 202 + const struct soc_device_attribute rtk_soc_hercules[] = { 203 203 + { .family = "Realtek Hercules", }, { /* empty */ } }; 204 204 + const struct soc_device_attribute rtk_soc_thor[] = { 205 205 + { .family = "Realtek Thor", }, { /* empty */ } }; 206 206 + 207 207 + if (soc_device_match(rtk_soc_kylin_a00)) { 208 208 + reg = rtk->regs + WRAP_CTR_REG; 209 209 + val = readl(reg); 210 210 + writel(DISABLE_MULTI_REQ | val, reg); 211 211 + dev_info(dev, "[bug fixed] 1295/1296 A00: add workaround to disable multiple request for D-Bus"); 212 212 + } 213 213 + 214 214 + if (soc_device_match(rtk_soc_hercules)) { 215 215 + reg = rtk->regs + WRAP_USB2_PHY_REG; 216 216 + val = readl(reg); 217 217 + writel(USB2_PHY_EN_PHY_PLL_PORT1 | val, reg); 218 218 + dev_info(dev, "[bug fixed] 1395 add workaround to disable usb2 port 2 suspend!"); 219 219 + } 220 220 + 221 221 + reg = rtk->regs + WRAP_USB2_PHY_UTMI_REG; 222 222 + val = readl(reg); 223 223 + writel(TXHSVM_EN | val, reg); 224 224 + 225 225 + maximum_speed = __get_dwc3_maximum_speed(dev->of_node); 226 226 + if (maximum_speed != USB_SPEED_UNKNOWN && maximum_speed <= USB_SPEED_HIGH) { 227 227 + if (soc_device_match(rtk_soc_thor)) { 228 228 + reg = rtk->regs + WRAP_USB_HMAC_CTR0_REG; 229 229 + val = readl(reg); 230 230 + writel(U3PORT_DIS | val, reg); 231 231 + } else { 232 232 + reg = rtk->regs + WRAP_CTR_REG; 233 233 + val = readl(reg); 234 234 + writel(FORCE_PIPE3_PHY_STATUS_TO_0 | val, reg); 235 235 + 236 236 + reg = rtk->regs + WRAP_PHY_PIPE_REG; 237 237 + val = ~CLOCK_ENABLE_FOR_PIPE3_PCLK & readl(reg); 238 238 + writel(RESET_DISABLE_PIPE3_P0 | val, reg); 239 239 + 240 240 + reg = rtk->regs + WRAP_USB_HMAC_CTR0_REG; 241 241 + val = readl(reg); 242 242 + writel(U3PORT_DIS | val, reg); 243 243 + 244 244 + reg = rtk->regs + WRAP_APHY_REG; 245 245 + val = readl(reg); 246 246 + writel(~USB3_MBIAS_ENABLE & val, reg); 247 247 + 248 248 + dev_dbg(rtk->dev, "%s: disable usb 3.0 phy\n", __func__); 249 249 + } 250 250 + } 251 251 + 252 252 + reg = rtk->regs + WRAP_CTR_REG; 253 253 + val = readl(reg); 254 254 + writel(DESC_R2W_MULTI_DISABLE | val, reg); 255 255 + 256 256 + /* Set phy Dp/Dm initial state to host mode to avoid the Dp glitch */ 257 257 + reg = rtk->regs + WRAP_USB2_PHY_REG; 258 258 + val = ~USB2_PHY_SWITCH_MASK & readl(reg); 259 259 + writel(USB2_PHY_SWITCH_HOST | val, reg); 260 260 + 261 261 + if (rtk->pm_base) { 262 262 + reg = rtk->pm_base + USB_DBUS_PWR_CTRL_REG; 263 263 + val = DBUS_PWR_CTRL_EN | readl(reg); 264 264 + writel(val, reg); 265 265 + } 266 266 + 267 267 + return 0; 268 268 + } 269 269 + 270 270 + static int dwc3_rtk_probe_dwc3_core(struct dwc3_rtk *rtk) 271 271 + { 272 272 + struct device *dev = rtk->dev; 273 273 + struct device_node *node = dev->of_node; 274 274 + struct platform_device *dwc3_pdev; 275 275 + struct device *dwc3_dev; 276 276 + struct device_node *dwc3_node; 277 277 + enum usb_dr_mode dr_mode; 278 278 + int ret = 0; 279 279 + 280 280 + ret = dwc3_rtk_init(rtk); 281 281 + if (ret) 282 282 + return -EINVAL; 283 283 + 284 284 + ret = of_platform_populate(node, NULL, NULL, dev); 285 285 + if (ret) { 286 286 + dev_err(dev, "failed to add dwc3 core\n"); 287 287 + return ret; 288 288 + } 289 289 + 290 290 + dwc3_node = of_get_compatible_child(node, "snps,dwc3"); 291 291 + if (!dwc3_node) { 292 292 + dev_err(dev, "failed to find dwc3 core node\n"); 293 293 + ret = -ENODEV; 294 294 + goto depopulate; 295 295 + } 296 296 + 297 297 + dwc3_pdev = of_find_device_by_node(dwc3_node); 298 298 + if (!dwc3_pdev) { 299 299 + dev_err(dev, "failed to find dwc3 core platform_device\n"); 300 300 + ret = -ENODEV; 301 301 + goto err_node_put; 302 302 + } 303 303 + 304 304 + dwc3_dev = &dwc3_pdev->dev; 305 305 + rtk->dwc = platform_get_drvdata(dwc3_pdev); 306 306 + if (!rtk->dwc) { 307 307 + dev_err(dev, "failed to find dwc3 core\n"); 308 308 + ret = -ENODEV; 309 309 + goto err_pdev_put; 310 310 + } 311 311 + 312 312 + dr_mode = usb_get_dr_mode(dwc3_dev); 313 313 + if (dr_mode != rtk->dwc->dr_mode) { 314 314 + dev_info(dev, "dts set dr_mode=%d, but dwc3 set dr_mode=%d\n", 315 315 + dr_mode, rtk->dwc->dr_mode); 316 316 + dr_mode = rtk->dwc->dr_mode; 317 317 + } 318 318 + 319 319 + switch (dr_mode) { 320 320 + case USB_DR_MODE_PERIPHERAL: 321 321 + rtk->cur_role = USB_ROLE_DEVICE; 322 322 + break; 323 323 + case USB_DR_MODE_HOST: 324 324 + rtk->cur_role = USB_ROLE_HOST; 325 325 + break; 326 326 + default: 327 327 + dev_dbg(rtk->dev, "%s: dr_mode=%d\n", __func__, dr_mode); 328 328 + break; 329 329 + } 330 330 + 331 331 + if (device_property_read_bool(dwc3_dev, "usb-role-switch")) { 332 332 + ret = dwc3_rtk_setup_role_switch(rtk); 333 333 + if (ret) { 334 334 + dev_err(dev, "dwc3_rtk_setup_role_switch fail=%d\n", ret); 335 335 + goto err_pdev_put; 336 336 + } 337 337 + rtk->cur_role = dwc3_rtk_get_role(rtk); 338 338 + } 339 339 + 340 340 + switch_usb2_role(rtk, rtk->cur_role); 341 341 + 342 342 + return 0; 343 343 + 344 344 + err_pdev_put: 345 345 + platform_device_put(dwc3_pdev); 346 346 + err_node_put: 347 347 + of_node_put(dwc3_node); 348 348 + depopulate: 349 349 + of_platform_depopulate(dev); 350 350 + 351 351 + return ret; 352 352 + } 353 353 + 354 354 + static int dwc3_rtk_probe(struct platform_device *pdev) 355 355 + { 356 356 + struct dwc3_rtk *rtk; 357 357 + struct device *dev = &pdev->dev; 358 358 + struct resource *res; 359 359 + void __iomem *regs; 360 360 + int ret = 0; 361 361 + 362 362 + rtk = devm_kzalloc(dev, sizeof(*rtk), GFP_KERNEL); 363 363 + if (!rtk) { 364 364 + ret = -ENOMEM; 365 365 + goto out; 366 366 + } 367 367 + 368 368 + platform_set_drvdata(pdev, rtk); 369 369 + 370 370 + rtk->dev = dev; 371 371 + 372 372 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 373 373 + if (!res) { 374 374 + dev_err(dev, "missing memory resource\n"); 375 375 + ret = -ENODEV; 376 376 + goto out; 377 377 + } 378 378 + 379 379 + regs = devm_ioremap_resource(dev, res); 380 380 + if (IS_ERR(regs)) { 381 381 + ret = PTR_ERR(regs); 382 382 + goto out; 383 383 + } 384 384 + 385 385 + rtk->regs = regs; 386 386 + rtk->regs_size = resource_size(res); 387 387 + 388 388 + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 389 389 + if (res) { 390 390 + rtk->pm_base = devm_ioremap_resource(dev, res); 391 391 + if (IS_ERR(rtk->pm_base)) { 392 392 + ret = PTR_ERR(rtk->pm_base); 393 393 + goto out; 394 394 + } 395 395 + } 396 396 + 397 397 + ret = dwc3_rtk_probe_dwc3_core(rtk); 398 398 + 399 399 + out: 400 400 + return ret; 401 401 + } 402 402 + 403 403 + static void dwc3_rtk_remove(struct platform_device *pdev) 404 404 + { 405 405 + struct dwc3_rtk *rtk = platform_get_drvdata(pdev); 406 406 + 407 407 + rtk->dwc = NULL; 408 408 + 409 409 + dwc3_rtk_remove_role_switch(rtk); 410 410 + 411 411 + of_platform_depopulate(rtk->dev); 412 412 + } 413 413 + 414 414 + static void dwc3_rtk_shutdown(struct platform_device *pdev) 415 415 + { 416 416 + struct dwc3_rtk *rtk = platform_get_drvdata(pdev); 417 417 + 418 418 + of_platform_depopulate(rtk->dev); 419 419 + } 420 420 + 421 421 + static const struct of_device_id rtk_dwc3_match[] = { 422 422 + { .compatible = "realtek,rtd-dwc3" }, 423 423 + {}, 424 424 + }; 425 425 + MODULE_DEVICE_TABLE(of, rtk_dwc3_match); 426 426 + 427 427 + #ifdef CONFIG_PM_SLEEP 428 428 + static int dwc3_rtk_suspend(struct device *dev) 429 429 + { 430 430 + return 0; 431 431 + } 432 432 + 433 433 + static int dwc3_rtk_resume(struct device *dev) 434 434 + { 435 435 + struct dwc3_rtk *rtk = dev_get_drvdata(dev); 436 436 + 437 437 + dwc3_rtk_init(rtk); 438 438 + 439 439 + switch_usb2_role(rtk, rtk->cur_role); 440 440 + 441 441 + /* runtime set active to reflect active state. */ 442 442 + pm_runtime_disable(dev); 443 443 + pm_runtime_set_active(dev); 444 444 + pm_runtime_enable(dev); 445 445 + 446 446 + return 0; 447 447 + } 448 448 + 449 449 + static const struct dev_pm_ops dwc3_rtk_dev_pm_ops = { 450 450 + SET_SYSTEM_SLEEP_PM_OPS(dwc3_rtk_suspend, dwc3_rtk_resume) 451 451 + }; 452 452 + 453 453 + #define DEV_PM_OPS (&dwc3_rtk_dev_pm_ops) 454 454 + #else 455 455 + #define DEV_PM_OPS NULL 456 456 + #endif /* CONFIG_PM_SLEEP */ 457 457 + 458 458 + static struct platform_driver dwc3_rtk_driver = { 459 459 + .probe = dwc3_rtk_probe, 460 460 + .remove_new = dwc3_rtk_remove, 461 461 + .driver = { 462 462 + .name = "rtk-dwc3", 463 463 + .of_match_table = rtk_dwc3_match, 464 464 + .pm = DEV_PM_OPS, 465 465 + }, 466 466 + .shutdown = dwc3_rtk_shutdown, 467 467 + }; 468 468 + 469 469 + module_platform_driver(dwc3_rtk_driver); 470 470 + 471 471 + MODULE_AUTHOR("Stanley Chang <stanley_chang@realtek.com>"); 472 472 + MODULE_DESCRIPTION("DesignWare USB3 Realtek Glue Layer"); 473 473 + MODULE_ALIAS("platform:rtk-dwc3"); 474 474 + MODULE_LICENSE("GPL"); 475 475 + MODULE_SOFTDEP("pre: phy_rtk_usb2 phy_rtk_usb3");

+7 -7

drivers/usb/dwc3/dwc3-xilinx.c

reviewed

··· 32 32 #define XLNX_USB_TRAFFIC_ROUTE_CONFIG 0x005C 33 33 #define XLNX_USB_TRAFFIC_ROUTE_FPD 0x1 34 34 35 35 - /* Versal USB Reset ID */ 36 36 - #define VERSAL_USB_RESET_ID 0xC104036 37 37 - 38 35 #define XLNX_USB_FPD_PIPE_CLK 0x7c 39 36 #define PIPE_CLK_DESELECT 1 40 37 #define PIPE_CLK_SELECT 0 ··· 69 72 static int dwc3_xlnx_init_versal(struct dwc3_xlnx *priv_data) 70 73 { 71 74 struct device *dev = priv_data->dev; 75 75 + struct reset_control *crst; 72 76 int ret; 77 77 + 78 78 + crst = devm_reset_control_get_exclusive(dev, NULL); 79 79 + if (IS_ERR(crst)) 80 80 + return dev_err_probe(dev, PTR_ERR(crst), "failed to get reset signal\n"); 73 81 74 82 dwc3_xlnx_mask_phy_rst(priv_data, false); 75 83 76 84 /* Assert and De-assert reset */ 77 77 - ret = zynqmp_pm_reset_assert(VERSAL_USB_RESET_ID, 78 78 - PM_RESET_ACTION_ASSERT); 85 85 + ret = reset_control_assert(crst); 79 86 if (ret < 0) { 80 87 dev_err_probe(dev, ret, "failed to assert Reset\n"); 81 88 return ret; 82 89 } 83 90 84 84 - ret = zynqmp_pm_reset_assert(VERSAL_USB_RESET_ID, 85 85 - PM_RESET_ACTION_RELEASE); 91 91 + ret = reset_control_deassert(crst); 86 92 if (ret < 0) { 87 93 dev_err_probe(dev, ret, "failed to De-assert Reset\n"); 88 94 return ret;

+11 -16

drivers/usb/gadget/function/f_ncm.c

reviewed

··· 1410 1410 struct usb_composite_dev *cdev = c->cdev; 1411 1411 struct f_ncm *ncm = func_to_ncm(f); 1412 1412 struct usb_string *us; 1413 1413 - int status; 1413 1413 + int status = 0; 1414 1414 struct usb_ep *ep; 1415 1415 struct f_ncm_opts *ncm_opts; 1416 1416 ··· 1428 1428 f->os_desc_table[0].os_desc = &ncm_opts->ncm_os_desc; 1429 1429 } 1430 1430 1431 1431 - /* 1432 1432 - * in drivers/usb/gadget/configfs.c:configfs_composite_bind() 1433 1433 - * configurations are bound in sequence with list_for_each_entry, 1434 1434 - * in each configuration its functions are bound in sequence 1435 1435 - * with list_for_each_entry, so we assume no race condition 1436 1436 - * with regard to ncm_opts->bound access 1437 1437 - */ 1438 1438 - if (!ncm_opts->bound) { 1439 1439 - mutex_lock(&ncm_opts->lock); 1440 1440 - gether_set_gadget(ncm_opts->net, cdev->gadget); 1431 1431 + mutex_lock(&ncm_opts->lock); 1432 1432 + gether_set_gadget(ncm_opts->net, cdev->gadget); 1433 1433 + if (!ncm_opts->bound) 1441 1434 status = gether_register_netdev(ncm_opts->net); 1442 1442 - mutex_unlock(&ncm_opts->lock); 1443 1443 - if (status) 1444 1444 - goto fail; 1445 1445 - ncm_opts->bound = true; 1446 1446 - } 1435 1435 + mutex_unlock(&ncm_opts->lock); 1436 1436 + 1437 1437 + if (status) 1438 1438 + goto fail; 1439 1439 + 1440 1440 + ncm_opts->bound = true; 1441 1441 + 1447 1442 us = usb_gstrings_attach(cdev, ncm_strings, 1448 1443 ARRAY_SIZE(ncm_string_defs)); 1449 1444 if (IS_ERR(us)) {

+14 -2

drivers/usb/gadget/function/f_uac2.c

reviewed

··· 212 212 213 213 .bDescriptorSubtype = UAC_INPUT_TERMINAL, 214 214 /* .bTerminalID = DYNAMIC */ 215 215 - .wTerminalType = cpu_to_le16(UAC_INPUT_TERMINAL_MICROPHONE), 215 215 + /* .wTerminalType = DYNAMIC */ 216 216 .bAssocTerminal = 0, 217 217 /* .bCSourceID = DYNAMIC */ 218 218 .iChannelNames = 0, ··· 240 240 241 241 .bDescriptorSubtype = UAC_OUTPUT_TERMINAL, 242 242 /* .bTerminalID = DYNAMIC */ 243 243 - .wTerminalType = cpu_to_le16(UAC_OUTPUT_TERMINAL_SPEAKER), 243 243 + /* .wTerminalType = DYNAMIC */ 244 244 .bAssocTerminal = 0, 245 245 /* .bSourceID = DYNAMIC */ 246 246 /* .bCSourceID = DYNAMIC */ ··· 976 976 ac_hdr_desc.wTotalLength = cpu_to_le16(len); 977 977 iad_desc.bInterfaceCount++; 978 978 } 979 979 + 980 980 + io_in_it_desc.wTerminalType = cpu_to_le16(opts->c_terminal_type); 981 981 + io_out_ot_desc.wTerminalType = cpu_to_le16(opts->p_terminal_type); 979 982 980 983 setup_headers(opts, fs_audio_desc, USB_SPEED_FULL); 981 984 setup_headers(opts, hs_audio_desc, USB_SPEED_HIGH); ··· 2098 2095 UAC2_ATTRIBUTE(u32, fb_max); 2099 2096 UAC2_ATTRIBUTE_STRING(function_name); 2100 2097 2098 2098 + UAC2_ATTRIBUTE(s16, p_terminal_type); 2099 2099 + UAC2_ATTRIBUTE(s16, c_terminal_type); 2100 2100 + 2101 2101 static struct configfs_attribute *f_uac2_attrs[] = { 2102 2102 &f_uac2_opts_attr_p_chmask, 2103 2103 &f_uac2_opts_attr_p_srate, ··· 2127 2121 &f_uac2_opts_attr_c_volume_res, 2128 2122 2129 2123 &f_uac2_opts_attr_function_name, 2124 2124 + 2125 2125 + &f_uac2_opts_attr_p_terminal_type, 2126 2126 + &f_uac2_opts_attr_c_terminal_type, 2130 2127 2131 2128 NULL, 2132 2129 }; ··· 2188 2179 opts->fb_max = FBACK_FAST_MAX; 2189 2180 2190 2181 snprintf(opts->function_name, sizeof(opts->function_name), "Source/Sink"); 2182 2182 + 2183 2183 + opts->p_terminal_type = UAC2_DEF_P_TERM_TYPE; 2184 2184 + opts->c_terminal_type = UAC2_DEF_C_TERM_TYPE; 2191 2185 2192 2186 return &opts->func_inst; 2193 2187 }

+12 -2

drivers/usb/gadget/function/f_uvc.c

reviewed

··· 516 516 void *mem; 517 517 518 518 switch (speed) { 519 519 + case USB_SPEED_SUPER_PLUS: 519 520 case USB_SPEED_SUPER: 520 521 uvc_control_desc = uvc->desc.ss_control; 521 522 uvc_streaming_cls = uvc->desc.ss_streaming; ··· 565 564 bytes += uvc_interrupt_ep.bLength + uvc_interrupt_cs_ep.bLength; 566 565 n_desc += 2; 567 566 568 568 - if (speed == USB_SPEED_SUPER) { 567 567 + if (speed == USB_SPEED_SUPER || 568 568 + speed == USB_SPEED_SUPER_PLUS) { 569 569 bytes += uvc_ss_interrupt_comp.bLength; 570 570 n_desc += 1; 571 571 } ··· 621 619 622 620 if (uvc->enable_interrupt_ep) { 623 621 UVC_COPY_DESCRIPTOR(mem, dst, &uvc_interrupt_ep); 624 624 - if (speed == USB_SPEED_SUPER) 622 622 + if (speed == USB_SPEED_SUPER || 623 623 + speed == USB_SPEED_SUPER_PLUS) 625 624 UVC_COPY_DESCRIPTOR(mem, dst, &uvc_ss_interrupt_comp); 626 625 627 626 UVC_COPY_DESCRIPTOR(mem, dst, &uvc_interrupt_cs_ep); ··· 795 792 if (IS_ERR(f->ss_descriptors)) { 796 793 ret = PTR_ERR(f->ss_descriptors); 797 794 f->ss_descriptors = NULL; 795 795 + goto error; 796 796 + } 797 797 + 798 798 + f->ssp_descriptors = uvc_copy_descriptors(uvc, USB_SPEED_SUPER_PLUS); 799 799 + if (IS_ERR(f->ssp_descriptors)) { 800 800 + ret = PTR_ERR(f->ssp_descriptors); 801 801 + f->ssp_descriptors = NULL; 798 802 goto error; 799 803 } 800 804

+1 -1

drivers/usb/gadget/function/u_ether.c

reviewed

··· 1200 1200 1201 1201 DBG(dev, "%s\n", __func__); 1202 1202 1203 1203 - netif_stop_queue(dev->net); 1203 1203 + netif_device_detach(dev->net); 1204 1204 netif_carrier_off(dev->net); 1205 1205 1206 1206 /* disable endpoints, forcing (synchronous) completion

+8

drivers/usb/gadget/function/u_uac2.h

reviewed

··· 35 35 #define UAC2_DEF_REQ_NUM 2 36 36 #define UAC2_DEF_INT_REQ_NUM 10 37 37 38 38 + #define UAC2_DEF_P_TERM_TYPE 0x301 39 39 + /* UAC_OUTPUT_TERMINAL_SPEAKER */ 40 40 + #define UAC2_DEF_C_TERM_TYPE 0x201 41 41 + /* UAC_INPUT_TERMINAL_MICROPHONE*/ 42 42 + 38 43 struct f_uac2_opts { 39 44 struct usb_function_instance func_inst; 40 45 int p_chmask; ··· 69 64 bool bound; 70 65 71 66 char function_name[32]; 67 67 + 68 68 + s16 p_terminal_type; 69 69 + s16 c_terminal_type; 72 70 73 71 struct mutex lock; 74 72 int refcnt;

+16 -1

drivers/usb/gadget/legacy/inode.c

reviewed

··· 31 31 32 32 #include <linux/usb/gadgetfs.h> 33 33 #include <linux/usb/gadget.h> 34 34 + #include <linux/usb/composite.h> /* for USB_GADGET_DELAYED_STATUS */ 35 35 + 36 36 + /* Undef helpers from linux/usb/composite.h as gadgetfs redefines them */ 37 37 + #undef DBG 38 38 + #undef ERROR 39 39 + #undef INFO 34 40 35 41 36 42 /* ··· 1517 1511 event->u.setup = *ctrl; 1518 1512 ep0_readable (dev); 1519 1513 spin_unlock (&dev->lock); 1520 1520 - return 0; 1514 1514 + /* 1515 1515 + * Return USB_GADGET_DELAYED_STATUS as a workaround to 1516 1516 + * stop some UDC drivers (e.g. dwc3) from automatically 1517 1517 + * proceeding with the status stage for 0-length 1518 1518 + * transfers. 1519 1519 + * Should be removed once all UDC drivers are fixed to 1520 1520 + * always delay the status stage until a response is 1521 1521 + * queued to EP0. 1522 1522 + */ 1523 1523 + return w_length == 0 ? USB_GADGET_DELAYED_STATUS : 0; 1521 1524 } 1522 1525 } 1523 1526

+71 -20

drivers/usb/gadget/legacy/raw_gadget.c

reviewed

··· 25 25 #include <linux/usb/ch9.h> 26 26 #include <linux/usb/ch11.h> 27 27 #include <linux/usb/gadget.h> 28 28 + #include <linux/usb/composite.h> 28 29 29 30 #include <uapi/linux/usb/raw_gadget.h> 30 31 ··· 65 64 struct usb_raw_event *event; 66 65 67 66 spin_lock_irqsave(&queue->lock, flags); 68 68 - if (WARN_ON(queue->size >= RAW_EVENT_QUEUE_SIZE)) { 67 67 + if (queue->size >= RAW_EVENT_QUEUE_SIZE) { 69 68 spin_unlock_irqrestore(&queue->lock, flags); 70 69 return -ENOMEM; 71 70 } ··· 311 310 dev->eps_num = i; 312 311 spin_unlock_irqrestore(&dev->lock, flags); 313 312 313 313 + dev_dbg(&gadget->dev, "gadget connected\n"); 314 314 ret = raw_queue_event(dev, USB_RAW_EVENT_CONNECT, 0, NULL); 315 315 if (ret < 0) { 316 316 - dev_err(&gadget->dev, "failed to queue event\n"); 316 316 + dev_err(&gadget->dev, "failed to queue connect event\n"); 317 317 set_gadget_data(gadget, NULL); 318 318 return ret; 319 319 } ··· 359 357 360 358 ret = raw_queue_event(dev, USB_RAW_EVENT_CONTROL, sizeof(*ctrl), ctrl); 361 359 if (ret < 0) 362 362 - dev_err(&gadget->dev, "failed to queue event\n"); 360 360 + dev_err(&gadget->dev, "failed to queue control event\n"); 363 361 goto out; 364 362 365 363 out_unlock: 366 364 spin_unlock_irqrestore(&dev->lock, flags); 367 365 out: 366 366 + if (ret == 0 && ctrl->wLength == 0) { 367 367 + /* 368 368 + * Return USB_GADGET_DELAYED_STATUS as a workaround to stop 369 369 + * some UDC drivers (e.g. dwc3) from automatically proceeding 370 370 + * with the status stage for 0-length transfers. 371 371 + * Should be removed once all UDC drivers are fixed to always 372 372 + * delay the status stage until a response is queued to EP0. 373 373 + */ 374 374 + return USB_GADGET_DELAYED_STATUS; 375 375 + } 368 376 return ret; 369 377 } 370 378 371 371 - /* These are currently unused but present in case UDC driver requires them. */ 372 372 - static void gadget_disconnect(struct usb_gadget *gadget) { } 373 373 - static void gadget_suspend(struct usb_gadget *gadget) { } 374 374 - static void gadget_resume(struct usb_gadget *gadget) { } 375 375 - static void gadget_reset(struct usb_gadget *gadget) { } 379 379 + static void gadget_disconnect(struct usb_gadget *gadget) 380 380 + { 381 381 + struct raw_dev *dev = get_gadget_data(gadget); 382 382 + int ret; 383 383 + 384 384 + dev_dbg(&gadget->dev, "gadget disconnected\n"); 385 385 + ret = raw_queue_event(dev, USB_RAW_EVENT_DISCONNECT, 0, NULL); 386 386 + if (ret < 0) 387 387 + dev_err(&gadget->dev, "failed to queue disconnect event\n"); 388 388 + } 389 389 + static void gadget_suspend(struct usb_gadget *gadget) 390 390 + { 391 391 + struct raw_dev *dev = get_gadget_data(gadget); 392 392 + int ret; 393 393 + 394 394 + dev_dbg(&gadget->dev, "gadget suspended\n"); 395 395 + ret = raw_queue_event(dev, USB_RAW_EVENT_SUSPEND, 0, NULL); 396 396 + if (ret < 0) 397 397 + dev_err(&gadget->dev, "failed to queue suspend event\n"); 398 398 + } 399 399 + static void gadget_resume(struct usb_gadget *gadget) 400 400 + { 401 401 + struct raw_dev *dev = get_gadget_data(gadget); 402 402 + int ret; 403 403 + 404 404 + dev_dbg(&gadget->dev, "gadget resumed\n"); 405 405 + ret = raw_queue_event(dev, USB_RAW_EVENT_RESUME, 0, NULL); 406 406 + if (ret < 0) 407 407 + dev_err(&gadget->dev, "failed to queue resume event\n"); 408 408 + } 409 409 + static void gadget_reset(struct usb_gadget *gadget) 410 410 + { 411 411 + struct raw_dev *dev = get_gadget_data(gadget); 412 412 + int ret; 413 413 + 414 414 + dev_dbg(&gadget->dev, "gadget reset\n"); 415 415 + ret = raw_queue_event(dev, USB_RAW_EVENT_RESET, 0, NULL); 416 416 + if (ret < 0) 417 417 + dev_err(&gadget->dev, "failed to queue reset event\n"); 418 418 + } 376 419 377 420 /*----------------------------------------------------------------------*/ 378 421 ··· 710 663 if (WARN_ON(in && dev->ep0_out_pending)) { 711 664 ret = -ENODEV; 712 665 dev->state = STATE_DEV_FAILED; 713 713 - goto out_done; 666 666 + goto out_unlock; 714 667 } 715 668 if (WARN_ON(!in && dev->ep0_in_pending)) { 716 669 ret = -ENODEV; 717 670 dev->state = STATE_DEV_FAILED; 718 718 - goto out_done; 671 671 + goto out_unlock; 719 672 } 720 673 721 674 dev->req->buf = data; ··· 729 682 dev_err(&dev->gadget->dev, 730 683 "fail, usb_ep_queue returned %d\n", ret); 731 684 spin_lock_irqsave(&dev->lock, flags); 732 732 - dev->state = STATE_DEV_FAILED; 733 733 - goto out_done; 685 685 + goto out_queue_failed; 734 686 } 735 687 736 688 ret = wait_for_completion_interruptible(&dev->ep0_done); ··· 738 692 usb_ep_dequeue(dev->gadget->ep0, dev->req); 739 693 wait_for_completion(&dev->ep0_done); 740 694 spin_lock_irqsave(&dev->lock, flags); 741 741 - goto out_done; 695 695 + if (dev->ep0_status == -ECONNRESET) 696 696 + dev->ep0_status = -EINTR; 697 697 + goto out_interrupted; 742 698 } 743 699 744 700 spin_lock_irqsave(&dev->lock, flags); 745 745 - ret = dev->ep0_status; 746 701 747 747 - out_done: 702 702 + out_interrupted: 703 703 + ret = dev->ep0_status; 704 704 + out_queue_failed: 748 705 dev->ep0_urb_queued = false; 749 706 out_unlock: 750 707 spin_unlock_irqrestore(&dev->lock, flags); ··· 1115 1066 dev_err(&dev->gadget->dev, 1116 1067 "fail, usb_ep_queue returned %d\n", ret); 1117 1068 spin_lock_irqsave(&dev->lock, flags); 1118 1118 - dev->state = STATE_DEV_FAILED; 1119 1119 - goto out_done; 1069 1069 + goto out_queue_failed; 1120 1070 } 1121 1071 1122 1072 ret = wait_for_completion_interruptible(&done); ··· 1124 1076 usb_ep_dequeue(ep->ep, ep->req); 1125 1077 wait_for_completion(&done); 1126 1078 spin_lock_irqsave(&dev->lock, flags); 1127 1127 - goto out_done; 1079 1079 + if (ep->status == -ECONNRESET) 1080 1080 + ep->status = -EINTR; 1081 1081 + goto out_interrupted; 1128 1082 } 1129 1083 1130 1084 spin_lock_irqsave(&dev->lock, flags); 1131 1131 - ret = ep->status; 1132 1085 1133 1133 - out_done: 1086 1086 + out_interrupted: 1087 1087 + ret = ep->status; 1088 1088 + out_queue_failed: 1134 1089 ep->urb_queued = false; 1135 1090 out_unlock: 1136 1091 spin_unlock_irqrestore(&dev->lock, flags);

+13 -6

drivers/usb/gadget/udc/aspeed_udc.c

reviewed

··· 1432 1432 ast_udc_write(udc, 0, AST_UDC_EP0_CTRL); 1433 1433 } 1434 1434 1435 1435 - static int ast_udc_remove(struct platform_device *pdev) 1435 1435 + static void ast_udc_remove(struct platform_device *pdev) 1436 1436 { 1437 1437 struct ast_udc_dev *udc = platform_get_drvdata(pdev); 1438 1438 unsigned long flags; 1439 1439 u32 ctrl; 1440 1440 1441 1441 usb_del_gadget_udc(&udc->gadget); 1442 1442 - if (udc->driver) 1443 1443 - return -EBUSY; 1442 1442 + if (udc->driver) { 1443 1443 + /* 1444 1444 + * This is broken as only some cleanup is skipped, *udev is 1445 1445 + * freed and the register mapping goes away. Any further usage 1446 1446 + * probably crashes. Also the device is unbound, so the skipped 1447 1447 + * cleanup is never catched up later. 1448 1448 + */ 1449 1449 + dev_alert(&pdev->dev, 1450 1450 + "Driver is busy and still going away. Fasten your seat belts!\n"); 1451 1451 + return; 1452 1452 + } 1444 1453 1445 1454 spin_lock_irqsave(&udc->lock, flags); 1446 1455 ··· 1468 1459 udc->ep0_buf_dma); 1469 1460 1470 1461 udc->ep0_buf = NULL; 1471 1471 - 1472 1472 - return 0; 1473 1462 } 1474 1463 1475 1464 static int ast_udc_probe(struct platform_device *pdev) ··· 1588 1581 1589 1582 static struct platform_driver ast_udc_driver = { 1590 1583 .probe = ast_udc_probe, 1591 1591 - .remove = ast_udc_remove, 1584 1584 + .remove_new = ast_udc_remove, 1592 1585 .driver = { 1593 1586 .name = KBUILD_MODNAME, 1594 1587 .of_match_table = ast_udc_of_dt_ids,

+2 -1

drivers/usb/gadget/udc/at91_udc.c

reviewed

··· 2000 2000 #endif 2001 2001 2002 2002 static struct platform_driver at91_udc_driver = { 2003 2003 + .probe = at91udc_probe, 2003 2004 .remove = at91udc_remove, 2004 2005 .shutdown = at91udc_shutdown, 2005 2006 .suspend = at91udc_suspend, ··· 2011 2010 }, 2012 2011 }; 2013 2012 2014 2014 - module_platform_driver_probe(at91_udc_driver, at91udc_probe); 2013 2013 + module_platform_driver(at91_udc_driver); 2015 2014 2016 2015 MODULE_DESCRIPTION("AT91 udc driver"); 2017 2016 MODULE_AUTHOR("Thomas Rathbone, David Brownell");

+15 -4

drivers/usb/gadget/udc/core.c

reviewed

··· 1126 1126 /* ------------------------------------------------------------------------- */ 1127 1127 1128 1128 /* Acquire connect_lock before calling this function. */ 1129 1129 - static void usb_udc_connect_control_locked(struct usb_udc *udc) __must_hold(&udc->connect_lock) 1129 1129 + static int usb_udc_connect_control_locked(struct usb_udc *udc) __must_hold(&udc->connect_lock) 1130 1130 { 1131 1131 if (udc->vbus) 1132 1132 - usb_gadget_connect_locked(udc->gadget); 1132 1132 + return usb_gadget_connect_locked(udc->gadget); 1133 1133 else 1134 1134 - usb_gadget_disconnect_locked(udc->gadget); 1134 1134 + return usb_gadget_disconnect_locked(udc->gadget); 1135 1135 } 1136 1136 1137 1137 static void vbus_event_work(struct work_struct *work) ··· 1605 1605 } 1606 1606 usb_gadget_enable_async_callbacks(udc); 1607 1607 udc->allow_connect = true; 1608 1608 - usb_udc_connect_control_locked(udc); 1608 1608 + ret = usb_udc_connect_control_locked(udc); 1609 1609 + if (ret) 1610 1610 + goto err_connect_control; 1611 1611 + 1609 1612 mutex_unlock(&udc->connect_lock); 1610 1613 1611 1614 kobject_uevent(&udc->dev.kobj, KOBJ_CHANGE); 1612 1615 return 0; 1616 1616 + 1617 1617 + err_connect_control: 1618 1618 + udc->allow_connect = false; 1619 1619 + usb_gadget_disable_async_callbacks(udc); 1620 1620 + if (gadget->irq) 1621 1621 + synchronize_irq(gadget->irq); 1622 1622 + usb_gadget_udc_stop_locked(udc); 1623 1623 + mutex_unlock(&udc->connect_lock); 1613 1624 1614 1625 err_start: 1615 1626 driver->unbind(udc->gadget);

+3 -7

drivers/usb/gadget/udc/fsl_qe_udc.c

reviewed

··· 27 27 #include <linux/interrupt.h> 28 28 #include <linux/io.h> 29 29 #include <linux/moduleparam.h> 30 30 + #include <linux/of.h> 30 31 #include <linux/of_address.h> 31 32 #include <linux/of_irq.h> 32 32 - #include <linux/of_platform.h> 33 33 + #include <linux/platform_device.h> 33 34 #include <linux/dma-mapping.h> 34 35 #include <linux/usb/ch9.h> 35 36 #include <linux/usb/gadget.h> ··· 2472 2471 static int qe_udc_probe(struct platform_device *ofdev) 2473 2472 { 2474 2473 struct qe_udc *udc; 2475 2475 - const struct of_device_id *match; 2476 2474 struct device_node *np = ofdev->dev.of_node; 2477 2475 struct qe_ep *ep; 2478 2476 unsigned int ret = 0; 2479 2477 unsigned int i; 2480 2478 const void *prop; 2481 2481 - 2482 2482 - match = of_match_device(qe_udc_match, &ofdev->dev); 2483 2483 - if (!match) 2484 2484 - return -EINVAL; 2485 2479 2486 2480 prop = of_get_property(np, "mode", NULL); 2487 2481 if (!prop || strcmp(prop, "peripheral")) ··· 2489 2493 return -ENOMEM; 2490 2494 } 2491 2495 2492 2492 - udc->soc_type = (unsigned long)match->data; 2496 2496 + udc->soc_type = (unsigned long)device_get_match_data(&ofdev->dev); 2493 2497 udc->usb_regs = of_iomap(np, 0); 2494 2498 if (!udc->usb_regs) { 2495 2499 ret = -ENOMEM;

+2 -1

drivers/usb/gadget/udc/fsl_udc_core.c

reviewed

··· 2666 2666 }; 2667 2667 MODULE_DEVICE_TABLE(platform, fsl_udc_devtype); 2668 2668 static struct platform_driver udc_driver = { 2669 2669 + .probe = fsl_udc_probe, 2669 2670 .remove = fsl_udc_remove, 2670 2671 .id_table = fsl_udc_devtype, 2671 2672 /* these suspend and resume are not usb suspend and resume */ ··· 2680 2679 }, 2681 2680 }; 2682 2681 2683 2683 - module_platform_driver_probe(udc_driver, fsl_udc_probe); 2682 2682 + module_platform_driver(udc_driver); 2684 2683 2685 2684 MODULE_DESCRIPTION(DRIVER_DESC); 2686 2685 MODULE_AUTHOR(DRIVER_AUTHOR);

+4 -3

drivers/usb/gadget/udc/fusb300_udc.c

reviewed

··· 1506 1506 } 1507 1507 1508 1508 static struct platform_driver fusb300_driver = { 1509 1509 - .remove_new = fusb300_remove, 1510 1510 - .driver = { 1509 1509 + .probe = fusb300_probe, 1510 1510 + .remove_new = fusb300_remove, 1511 1511 + .driver = { 1511 1512 .name = udc_name, 1512 1513 }, 1513 1514 }; 1514 1515 1515 1515 - module_platform_driver_probe(fusb300_driver, fusb300_probe); 1516 1516 + module_platform_driver(fusb300_driver);

+2 -1

drivers/usb/gadget/udc/lpc32xx_udc.c

reviewed

··· 3254 3254 #endif 3255 3255 3256 3256 static struct platform_driver lpc32xx_udc_driver = { 3257 3257 + .probe = lpc32xx_udc_probe, 3257 3258 .remove = lpc32xx_udc_remove, 3258 3259 .shutdown = lpc32xx_udc_shutdown, 3259 3260 .suspend = lpc32xx_udc_suspend, ··· 3265 3264 }, 3266 3265 }; 3267 3266 3268 3268 - module_platform_driver_probe(lpc32xx_udc_driver, lpc32xx_udc_probe); 3267 3267 + module_platform_driver(lpc32xx_udc_driver); 3269 3268 3270 3269 MODULE_DESCRIPTION("LPC32XX udc driver"); 3271 3270 MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com>");

+2 -1

drivers/usb/gadget/udc/m66592-udc.c

reviewed

··· 1687 1687 1688 1688 /*-------------------------------------------------------------------------*/ 1689 1689 static struct platform_driver m66592_driver = { 1690 1690 + .probe = m66592_probe, 1690 1691 .remove_new = m66592_remove, 1691 1692 .driver = { 1692 1693 .name = udc_name, 1693 1694 }, 1694 1695 }; 1695 1696 1696 1696 - module_platform_driver_probe(m66592_driver, m66592_probe); 1697 1697 + module_platform_driver(m66592_driver);

+2 -1

drivers/usb/gadget/udc/r8a66597-udc.c

reviewed

··· 1964 1964 1965 1965 /*-------------------------------------------------------------------------*/ 1966 1966 static struct platform_driver r8a66597_driver = { 1967 1967 + .probe = r8a66597_probe, 1967 1968 .remove_new = r8a66597_remove, 1968 1969 .driver = { 1969 1970 .name = udc_name, 1970 1971 }, 1971 1972 }; 1972 1973 1973 1973 - module_platform_driver_probe(r8a66597_driver, r8a66597_probe); 1974 1974 + module_platform_driver(r8a66597_driver); 1974 1975 1975 1976 MODULE_DESCRIPTION("R8A66597 USB gadget driver"); 1976 1977 MODULE_LICENSE("GPL");

+78 -66

drivers/usb/host/pci-quirks.c

reviewed

··· 60 60 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */ 61 61 #define EHCI_USBLEGCTLSTS_SOOE (1 << 13) /* SMI on ownership change */ 62 62 63 63 + /* ASMEDIA quirk use */ 64 64 + #define ASMT_DATA_WRITE0_REG 0xF8 65 65 + #define ASMT_DATA_WRITE1_REG 0xFC 66 66 + #define ASMT_CONTROL_REG 0xE0 67 67 + #define ASMT_CONTROL_WRITE_BIT 0x02 68 68 + #define ASMT_WRITEREG_CMD 0x10423 69 69 + #define ASMT_FLOWCTL_ADDR 0xFA30 70 70 + #define ASMT_FLOWCTL_DATA 0xBA 71 71 + #define ASMT_PSEUDO_DATA 0 72 72 + 73 73 + /* Intel quirk use */ 74 74 + #define USB_INTEL_XUSB2PR 0xD0 75 75 + #define USB_INTEL_USB2PRM 0xD4 76 76 + #define USB_INTEL_USB3_PSSEN 0xD8 77 77 + #define USB_INTEL_USB3PRM 0xDC 78 78 + 79 79 + #ifdef CONFIG_USB_PCI_AMD 63 80 /* AMD quirk use */ 64 81 #define AB_REG_BAR_LOW 0xe0 65 82 #define AB_REG_BAR_HIGH 0xe1 ··· 109 92 #define BIF_NB 0x10002 110 93 #define NB_PIF0_PWRDOWN_0 0x01100012 111 94 #define NB_PIF0_PWRDOWN_1 0x01100013 112 112 - 113 113 - #define USB_INTEL_XUSB2PR 0xD0 114 114 - #define USB_INTEL_USB2PRM 0xD4 115 115 - #define USB_INTEL_USB3_PSSEN 0xD8 116 116 - #define USB_INTEL_USB3PRM 0xDC 117 117 - 118 118 - /* ASMEDIA quirk use */ 119 119 - #define ASMT_DATA_WRITE0_REG 0xF8 120 120 - #define ASMT_DATA_WRITE1_REG 0xFC 121 121 - #define ASMT_CONTROL_REG 0xE0 122 122 - #define ASMT_CONTROL_WRITE_BIT 0x02 123 123 - #define ASMT_WRITEREG_CMD 0x10423 124 124 - #define ASMT_FLOWCTL_ADDR 0xFA30 125 125 - #define ASMT_FLOWCTL_DATA 0xBA 126 126 - #define ASMT_PSEUDO_DATA 0 127 95 128 96 /* 129 97 * amd_chipset_gen values represent AMD different chipset generations ··· 460 458 } 461 459 EXPORT_SYMBOL_GPL(usb_amd_quirk_pll_disable); 462 460 463 463 - static int usb_asmedia_wait_write(struct pci_dev *pdev) 464 464 - { 465 465 - unsigned long retry_count; 466 466 - unsigned char value; 467 467 - 468 468 - for (retry_count = 1000; retry_count > 0; --retry_count) { 469 469 - 470 470 - pci_read_config_byte(pdev, ASMT_CONTROL_REG, &value); 471 471 - 472 472 - if (value == 0xff) { 473 473 - dev_err(&pdev->dev, "%s: check_ready ERROR", __func__); 474 474 - return -EIO; 475 475 - } 476 476 - 477 477 - if ((value & ASMT_CONTROL_WRITE_BIT) == 0) 478 478 - return 0; 479 479 - 480 480 - udelay(50); 481 481 - } 482 482 - 483 483 - dev_warn(&pdev->dev, "%s: check_write_ready timeout", __func__); 484 484 - return -ETIMEDOUT; 485 485 - } 486 486 - 487 487 - void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) 488 488 - { 489 489 - if (usb_asmedia_wait_write(pdev) != 0) 490 490 - return; 491 491 - 492 492 - /* send command and address to device */ 493 493 - pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_WRITEREG_CMD); 494 494 - pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_FLOWCTL_ADDR); 495 495 - pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT); 496 496 - 497 497 - if (usb_asmedia_wait_write(pdev) != 0) 498 498 - return; 499 499 - 500 500 - /* send data to device */ 501 501 - pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_FLOWCTL_DATA); 502 502 - pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_PSEUDO_DATA); 503 503 - pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT); 504 504 - } 505 505 - EXPORT_SYMBOL_GPL(usb_asmedia_modifyflowcontrol); 506 506 - 507 461 void usb_amd_quirk_pll_enable(void) 508 462 { 509 463 usb_amd_quirk_pll(0); ··· 588 630 return !(value & BIT(port_shift)); 589 631 } 590 632 EXPORT_SYMBOL_GPL(usb_amd_pt_check_port); 633 633 + #endif /* CONFIG_USB_PCI_AMD */ 591 634 635 635 + static int usb_asmedia_wait_write(struct pci_dev *pdev) 636 636 + { 637 637 + unsigned long retry_count; 638 638 + unsigned char value; 639 639 + 640 640 + for (retry_count = 1000; retry_count > 0; --retry_count) { 641 641 + 642 642 + pci_read_config_byte(pdev, ASMT_CONTROL_REG, &value); 643 643 + 644 644 + if (value == 0xff) { 645 645 + dev_err(&pdev->dev, "%s: check_ready ERROR", __func__); 646 646 + return -EIO; 647 647 + } 648 648 + 649 649 + if ((value & ASMT_CONTROL_WRITE_BIT) == 0) 650 650 + return 0; 651 651 + 652 652 + udelay(50); 653 653 + } 654 654 + 655 655 + dev_warn(&pdev->dev, "%s: check_write_ready timeout", __func__); 656 656 + return -ETIMEDOUT; 657 657 + } 658 658 + 659 659 + void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) 660 660 + { 661 661 + if (usb_asmedia_wait_write(pdev) != 0) 662 662 + return; 663 663 + 664 664 + /* send command and address to device */ 665 665 + pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_WRITEREG_CMD); 666 666 + pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_FLOWCTL_ADDR); 667 667 + pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT); 668 668 + 669 669 + if (usb_asmedia_wait_write(pdev) != 0) 670 670 + return; 671 671 + 672 672 + /* send data to device */ 673 673 + pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, ASMT_FLOWCTL_DATA); 674 674 + pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, ASMT_PSEUDO_DATA); 675 675 + pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT); 676 676 + } 677 677 + EXPORT_SYMBOL_GPL(usb_asmedia_modifyflowcontrol); 678 678 + 679 679 + static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask) 680 680 + { 681 681 + u16 cmd; 682 682 + 683 683 + return !pci_read_config_word(pdev, PCI_COMMAND, &cmd) && (cmd & mask); 684 684 + } 685 685 + 686 686 + #define mmio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_MEMORY) 687 687 + 688 688 + #if defined(CONFIG_HAS_IOPORT) && IS_ENABLED(CONFIG_USB_UHCI_HCD) 592 689 /* 593 690 * Make sure the controller is completely inactive, unable to 594 691 * generate interrupts or do DMA. ··· 725 712 } 726 713 EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc); 727 714 728 728 - static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask) 729 729 - { 730 730 - u16 cmd; 731 731 - return !pci_read_config_word(pdev, PCI_COMMAND, &cmd) && (cmd & mask); 732 732 - } 733 733 - 734 715 #define pio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_IO) 735 735 - #define mmio_enabled(dev) io_type_enabled(dev, PCI_COMMAND_MEMORY) 736 716 737 717 static void quirk_usb_handoff_uhci(struct pci_dev *pdev) 738 718 { ··· 744 738 if (base) 745 739 uhci_check_and_reset_hc(pdev, base); 746 740 } 741 741 + 742 742 + #else /* defined(CONFIG_HAS_IOPORT && IS_ENABLED(CONFIG_USB_UHCI_HCD) */ 743 743 + 744 744 + static void quirk_usb_handoff_uhci(struct pci_dev *pdev) {} 745 745 + 746 746 + #endif /* defined(CONFIG_HAS_IOPORT && IS_ENABLED(CONFIG_USB_UHCI_HCD) */ 747 747 748 748 static int mmio_resource_enabled(struct pci_dev *pdev, int idx) 749 749 {

+25 -9

drivers/usb/host/pci-quirks.h

reviewed

··· 2 2 #ifndef __LINUX_USB_PCI_QUIRKS_H 3 3 #define __LINUX_USB_PCI_QUIRKS_H 4 4 5 5 - #ifdef CONFIG_USB_PCI 6 6 - void uhci_reset_hc(struct pci_dev *pdev, unsigned long base); 7 7 - int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base); 5 5 + #ifdef CONFIG_USB_PCI_AMD 8 6 int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev); 9 7 bool usb_amd_hang_symptom_quirk(void); 10 8 bool usb_amd_prefetch_quirk(void); ··· 10 12 bool usb_amd_quirk_pll_check(void); 11 13 void usb_amd_quirk_pll_disable(void); 12 14 void usb_amd_quirk_pll_enable(void); 13 13 - void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev); 14 14 - void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev); 15 15 - void usb_disable_xhci_ports(struct pci_dev *xhci_pdev); 16 15 void sb800_prefetch(struct device *dev, int on); 17 16 bool usb_amd_pt_check_port(struct device *device, int port); 18 17 #else 19 19 - struct pci_dev; 18 18 + static inline bool usb_amd_hang_symptom_quirk(void) 19 19 + { 20 20 + return false; 21 21 + }; 22 22 + static inline bool usb_amd_prefetch_quirk(void) 23 23 + { 24 24 + return false; 25 25 + } 20 26 static inline void usb_amd_quirk_pll_disable(void) {} 21 27 static inline void usb_amd_quirk_pll_enable(void) {} 22 22 - static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {} 23 28 static inline void usb_amd_dev_put(void) {} 24 24 - static inline void usb_disable_xhci_ports(struct pci_dev *xhci_pdev) {} 29 29 + static inline bool usb_amd_quirk_pll_check(void) 30 30 + { 31 31 + return false; 32 32 + } 25 33 static inline void sb800_prefetch(struct device *dev, int on) {} 26 34 static inline bool usb_amd_pt_check_port(struct device *device, int port) 27 35 { 28 36 return false; 29 37 } 38 38 + #endif /* CONFIG_USB_PCI_AMD */ 39 39 + 40 40 + #ifdef CONFIG_USB_PCI 41 41 + void uhci_reset_hc(struct pci_dev *pdev, unsigned long base); 42 42 + int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base); 43 43 + void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev); 44 44 + void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev); 45 45 + void usb_disable_xhci_ports(struct pci_dev *xhci_pdev); 46 46 + #else 47 47 + struct pci_dev; 48 48 + static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {} 49 49 + static inline void usb_disable_xhci_ports(struct pci_dev *xhci_pdev) {} 30 50 #endif /* CONFIG_USB_PCI */ 31 51 32 52 #endif /* __LINUX_USB_PCI_QUIRKS_H */

+1 -1

drivers/usb/host/xhci-debugfs.c

reviewed

··· 204 204 for (i = 0; i < TRBS_PER_SEGMENT; i++) { 205 205 trb = &seg->trbs[i]; 206 206 dma = seg->dma + i * sizeof(*trb); 207 207 - seq_printf(s, "%pad: %s\n", &dma, 207 207 + seq_printf(s, "%2u %pad: %s\n", seg->num, &dma, 208 208 xhci_decode_trb(str, XHCI_MSG_MAX, le32_to_cpu(trb->generic.field[0]), 209 209 le32_to_cpu(trb->generic.field[1]), 210 210 le32_to_cpu(trb->generic.field[2]),

+27

drivers/usb/host/xhci-ext-caps.h

reviewed

··· 79 79 /* true: Controller Not Ready to accept doorbell or op reg writes after reset */ 80 80 #define XHCI_STS_CNR (1 << 11) 81 81 82 82 + /** 83 83 + * struct xhci_protocol_caps 84 84 + * @revision: major revision, minor revision, capability ID, 85 85 + * and next capability pointer. 86 86 + * @name_string: Four ASCII characters to say which spec this xHC 87 87 + * follows, typically "USB ". 88 88 + * @port_info: Port offset, count, and protocol-defined information. 89 89 + */ 90 90 + struct xhci_protocol_caps { 91 91 + u32 revision; 92 92 + u32 name_string; 93 93 + u32 port_info; 94 94 + }; 95 95 + 96 96 + #define XHCI_EXT_PORT_MAJOR(x) (((x) >> 24) & 0xff) 97 97 + #define XHCI_EXT_PORT_MINOR(x) (((x) >> 16) & 0xff) 98 98 + #define XHCI_EXT_PORT_PSIC(x) (((x) >> 28) & 0x0f) 99 99 + #define XHCI_EXT_PORT_OFF(x) ((x) & 0xff) 100 100 + #define XHCI_EXT_PORT_COUNT(x) (((x) >> 8) & 0xff) 101 101 + 102 102 + #define XHCI_EXT_PORT_PSIV(x) (((x) >> 0) & 0x0f) 103 103 + #define XHCI_EXT_PORT_PSIE(x) (((x) >> 4) & 0x03) 104 104 + #define XHCI_EXT_PORT_PLT(x) (((x) >> 6) & 0x03) 105 105 + #define XHCI_EXT_PORT_PFD(x) (((x) >> 8) & 0x01) 106 106 + #define XHCI_EXT_PORT_LP(x) (((x) >> 14) & 0x03) 107 107 + #define XHCI_EXT_PORT_PSIM(x) (((x) >> 16) & 0xffff) 108 108 + 82 109 #include <linux/io.h> 83 110 84 111 /**

+2 -2

drivers/usb/host/xhci-hub.c

reviewed

··· 1262 1262 retval = -ENODEV; 1263 1263 break; 1264 1264 } 1265 1265 - trace_xhci_get_port_status(wIndex, temp); 1265 1265 + trace_xhci_get_port_status(port, temp); 1266 1266 status = xhci_get_port_status(hcd, bus_state, wIndex, temp, 1267 1267 &flags); 1268 1268 if (status == 0xffffffff) ··· 1687 1687 retval = -ENODEV; 1688 1688 break; 1689 1689 } 1690 1690 - trace_xhci_hub_status_data(i, temp); 1690 1690 + trace_xhci_hub_status_data(ports[i], temp); 1691 1691 1692 1692 if ((temp & mask) != 0 || 1693 1693 (bus_state->port_c_suspend & 1 << i) ||

+56 -40

drivers/usb/host/xhci-mem.c

reviewed

··· 29 29 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, 30 30 unsigned int cycle_state, 31 31 unsigned int max_packet, 32 32 + unsigned int num, 32 33 gfp_t flags) 33 34 { 34 35 struct xhci_segment *seg; ··· 61 60 for (i = 0; i < TRBS_PER_SEGMENT; i++) 62 61 seg->trbs[i].link.control = cpu_to_le32(TRB_CYCLE); 63 62 } 63 63 + seg->num = num; 64 64 seg->dma = dma; 65 65 seg->next = NULL; 66 66 ··· 130 128 struct xhci_segment *first, struct xhci_segment *last, 131 129 unsigned int num_segs) 132 130 { 133 133 - struct xhci_segment *next; 131 131 + struct xhci_segment *next, *seg; 134 132 bool chain_links; 135 133 136 134 if (!ring || !first || !last) ··· 146 144 xhci_link_segments(last, next, ring->type, chain_links); 147 145 ring->num_segs += num_segs; 148 146 149 149 - if (ring->type != TYPE_EVENT && ring->enq_seg == ring->last_seg) { 150 150 - ring->last_seg->trbs[TRBS_PER_SEGMENT-1].link.control 151 151 - &= ~cpu_to_le32(LINK_TOGGLE); 152 152 - last->trbs[TRBS_PER_SEGMENT-1].link.control 153 153 - |= cpu_to_le32(LINK_TOGGLE); 147 147 + if (ring->enq_seg == ring->last_seg) { 148 148 + if (ring->type != TYPE_EVENT) { 149 149 + ring->last_seg->trbs[TRBS_PER_SEGMENT-1].link.control 150 150 + &= ~cpu_to_le32(LINK_TOGGLE); 151 151 + last->trbs[TRBS_PER_SEGMENT-1].link.control 152 152 + |= cpu_to_le32(LINK_TOGGLE); 153 153 + } 154 154 ring->last_seg = last; 155 155 } 156 156 + 157 157 + for (seg = last; seg != ring->last_seg; seg = seg->next) 158 158 + seg->next->num = seg->num + 1; 156 159 } 157 160 158 161 /* ··· 327 320 /* Allocate segments and link them for a ring */ 328 321 static int xhci_alloc_segments_for_ring(struct xhci_hcd *xhci, 329 322 struct xhci_segment **first, struct xhci_segment **last, 330 330 - unsigned int num_segs, unsigned int cycle_state, 331 331 - enum xhci_ring_type type, unsigned int max_packet, gfp_t flags) 323 323 + unsigned int num_segs, unsigned int num, 324 324 + unsigned int cycle_state, enum xhci_ring_type type, 325 325 + unsigned int max_packet, gfp_t flags) 332 326 { 333 327 struct xhci_segment *prev; 334 328 bool chain_links; ··· 339 331 (type == TYPE_ISOC && 340 332 (xhci->quirks & XHCI_AMD_0x96_HOST))); 341 333 342 342 - prev = xhci_segment_alloc(xhci, cycle_state, max_packet, flags); 334 334 + prev = xhci_segment_alloc(xhci, cycle_state, max_packet, num, flags); 343 335 if (!prev) 344 336 return -ENOMEM; 345 345 - num_segs--; 337 337 + num++; 346 338 347 339 *first = prev; 348 348 - while (num_segs > 0) { 340 340 + while (num < num_segs) { 349 341 struct xhci_segment *next; 350 342 351 351 - next = xhci_segment_alloc(xhci, cycle_state, max_packet, flags); 343 343 + next = xhci_segment_alloc(xhci, cycle_state, max_packet, num, 344 344 + flags); 352 345 if (!next) { 353 346 prev = *first; 354 347 while (prev) { ··· 362 353 xhci_link_segments(prev, next, type, chain_links); 363 354 364 355 prev = next; 365 365 - num_segs--; 356 356 + num++; 366 357 } 367 358 xhci_link_segments(prev, *first, type, chain_links); 368 359 *last = prev; ··· 397 388 return ring; 398 389 399 390 ret = xhci_alloc_segments_for_ring(xhci, &ring->first_seg, 400 400 - &ring->last_seg, num_segs, cycle_state, type, 391 391 + &ring->last_seg, num_segs, 0, cycle_state, type, 401 392 max_packet, flags); 402 393 if (ret) 403 394 goto fail; ··· 437 428 int ret; 438 429 439 430 ret = xhci_alloc_segments_for_ring(xhci, &first, &last, 440 440 - num_new_segs, ring->cycle_state, ring->type, 431 431 + num_new_segs, ring->enq_seg->num + 1, 432 432 + ring->cycle_state, ring->type, 441 433 ring->bounce_buf_len, flags); 442 434 if (ret) 443 435 return -ENOMEM; ··· 1776 1766 kfree(command); 1777 1767 } 1778 1768 1779 1779 - int xhci_alloc_erst(struct xhci_hcd *xhci, 1769 1769 + static int xhci_alloc_erst(struct xhci_hcd *xhci, 1780 1770 struct xhci_ring *evt_ring, 1781 1771 struct xhci_erst *erst, 1782 1772 gfp_t flags) ··· 1807 1797 } 1808 1798 1809 1799 static void 1810 1810 - xhci_free_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir) 1800 1800 + xhci_remove_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir) 1811 1801 { 1812 1812 - struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 1813 1813 - size_t erst_size; 1814 1814 - u64 tmp64; 1815 1802 u32 tmp; 1816 1803 1817 1804 if (!ir) 1818 1805 return; 1819 1819 - 1820 1820 - erst_size = sizeof(struct xhci_erst_entry) * ir->erst.num_entries; 1821 1821 - if (ir->erst.entries) 1822 1822 - dma_free_coherent(dev, erst_size, 1823 1823 - ir->erst.entries, 1824 1824 - ir->erst.erst_dma_addr); 1825 1825 - ir->erst.entries = NULL; 1826 1806 1827 1807 /* 1828 1808 * Clean out interrupter registers except ERSTBA. Clearing either the ··· 1824 1824 tmp &= ERST_SIZE_MASK; 1825 1825 writel(tmp, &ir->ir_set->erst_size); 1826 1826 1827 1827 - tmp64 = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); 1828 1828 - tmp64 &= (u64) ERST_PTR_MASK; 1829 1829 - xhci_write_64(xhci, tmp64, &ir->ir_set->erst_dequeue); 1827 1827 + xhci_write_64(xhci, ERST_EHB, &ir->ir_set->erst_dequeue); 1830 1828 } 1829 1829 + } 1831 1830 1832 1832 - /* free interrrupter event ring */ 1831 1831 + static void 1832 1832 + xhci_free_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir) 1833 1833 + { 1834 1834 + struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 1835 1835 + size_t erst_size; 1836 1836 + 1837 1837 + if (!ir) 1838 1838 + return; 1839 1839 + 1840 1840 + erst_size = sizeof(struct xhci_erst_entry) * ir->erst.num_entries; 1841 1841 + if (ir->erst.entries) 1842 1842 + dma_free_coherent(dev, erst_size, 1843 1843 + ir->erst.entries, 1844 1844 + ir->erst.erst_dma_addr); 1845 1845 + ir->erst.entries = NULL; 1846 1846 + 1847 1847 + /* free interrupter event ring */ 1833 1848 if (ir->event_ring) 1834 1849 xhci_ring_free(xhci, ir->event_ring); 1850 1850 + 1835 1851 ir->event_ring = NULL; 1836 1852 1837 1853 kfree(ir); ··· 1860 1844 1861 1845 cancel_delayed_work_sync(&xhci->cmd_timer); 1862 1846 1847 1847 + xhci_remove_interrupter(xhci, xhci->interrupter); 1863 1848 xhci_free_interrupter(xhci, xhci->interrupter); 1864 1849 xhci->interrupter = NULL; 1865 1850 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed primary event ring"); ··· 1950 1933 1951 1934 static void xhci_set_hc_event_deq(struct xhci_hcd *xhci, struct xhci_interrupter *ir) 1952 1935 { 1953 1953 - u64 temp; 1954 1936 dma_addr_t deq; 1955 1937 1956 1938 deq = xhci_trb_virt_to_dma(ir->event_ring->deq_seg, ··· 1957 1941 if (!deq) 1958 1942 xhci_warn(xhci, "WARN something wrong with SW event ring dequeue ptr.\n"); 1959 1943 /* Update HC event ring dequeue pointer */ 1960 1960 - temp = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); 1961 1961 - temp &= ERST_PTR_MASK; 1962 1944 /* Don't clear the EHB bit (which is RW1C) because 1963 1945 * there might be more events to service. 1964 1946 */ 1965 1965 - temp &= ~ERST_EHB; 1966 1947 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 1967 1948 "// Write event ring dequeue pointer, preserving EHB bit"); 1968 1968 - xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp, 1969 1969 - &ir->ir_set->erst_dequeue); 1949 1949 + xhci_write_64(xhci, deq & ERST_PTR_MASK, &ir->ir_set->erst_dequeue); 1970 1950 } 1971 1951 1972 1952 static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports, ··· 2250 2238 { 2251 2239 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; 2252 2240 struct xhci_interrupter *ir; 2241 2241 + unsigned int num_segs; 2253 2242 int ret; 2254 2243 2255 2244 ir = kzalloc_node(sizeof(*ir), flags, dev_to_node(dev)); 2256 2245 if (!ir) 2257 2246 return NULL; 2258 2247 2259 2259 - ir->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, 1, TYPE_EVENT, 2260 2260 - 0, flags); 2248 2248 + num_segs = min_t(unsigned int, 1 << HCS_ERST_MAX(xhci->hcs_params2), 2249 2249 + ERST_MAX_SEGS); 2250 2250 + 2251 2251 + ir->event_ring = xhci_ring_alloc(xhci, num_segs, 1, TYPE_EVENT, 0, 2252 2252 + flags); 2261 2253 if (!ir->event_ring) { 2262 2254 xhci_warn(xhci, "Failed to allocate interrupter event ring\n"); 2263 2255 kfree(ir); ··· 2297 2281 /* set ERST count with the number of entries in the segment table */ 2298 2282 erst_size = readl(&ir->ir_set->erst_size); 2299 2283 erst_size &= ERST_SIZE_MASK; 2300 2300 - erst_size |= ERST_NUM_SEGS; 2284 2284 + erst_size |= ir->event_ring->num_segs; 2301 2285 writel(erst_size, &ir->ir_set->erst_size); 2302 2286 2303 2287 erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base);

+350 -68

drivers/usb/host/xhci-mtk-sch.c

reviewed

··· 19 19 #define HS_BW_BOUNDARY 6144 20 20 /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */ 21 21 #define FS_PAYLOAD_MAX 188 22 22 + #define LS_PAYLOAD_MAX 18 23 23 + /* section 11.18.1, per fs frame */ 24 24 + #define FS_BW_BOUNDARY 1157 25 25 + #define LS_BW_BOUNDARY 144 26 26 + 27 27 + /* 28 28 + * max number of microframes for split transfer, assume extra-cs budget is 0 29 29 + * for fs isoc in : 1 ss + 1 idle + 6 cs (roundup(1023/188)) 30 30 + */ 31 31 + #define TT_MICROFRAMES_MAX 8 32 32 + /* offset from SS for fs/ls isoc/intr ep (ss + idle) */ 33 33 + #define CS_OFFSET 2 22 34 23 35 #define DBG_BUF_EN 64 24 36 ··· 249 237 250 238 static struct mu3h_sch_ep_info * 251 239 create_sch_ep(struct xhci_hcd_mtk *mtk, struct usb_device *udev, 252 252 - struct usb_host_endpoint *ep) 240 240 + struct usb_host_endpoint *ep, struct xhci_ep_ctx *ep_ctx) 253 241 { 254 242 struct mu3h_sch_ep_info *sch_ep; 255 243 struct mu3h_sch_bw_info *bw_info; 256 244 struct mu3h_sch_tt *tt = NULL; 245 245 + u32 len; 257 246 258 247 bw_info = get_bw_info(mtk, udev, ep); 259 248 if (!bw_info) 260 249 return ERR_PTR(-ENODEV); 261 250 262 262 - sch_ep = kzalloc(sizeof(*sch_ep), GFP_KERNEL); 251 251 + if (is_fs_or_ls(udev->speed)) 252 252 + len = TT_MICROFRAMES_MAX; 253 253 + else if ((udev->speed >= USB_SPEED_SUPER) && 254 254 + usb_endpoint_xfer_isoc(&ep->desc)) 255 255 + len = get_esit(ep_ctx); 256 256 + else 257 257 + len = 1; 258 258 + 259 259 + sch_ep = kzalloc(struct_size(sch_ep, bw_budget_table, len), GFP_KERNEL); 263 260 if (!sch_ep) 264 261 return ERR_PTR(-ENOMEM); 265 262 ··· 300 279 u32 mult; 301 280 u32 esit_pkts; 302 281 u32 max_esit_payload; 282 282 + u32 bw_per_microframe; 283 283 + u32 *bwb_table; 284 284 + int i; 303 285 286 286 + bwb_table = sch_ep->bw_budget_table; 304 287 ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2)); 305 288 maxpkt = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); 306 289 max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2)); ··· 338 313 * opportunities per microframe 339 314 */ 340 315 sch_ep->pkts = max_burst + 1; 341 341 - sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts; 316 316 + bwb_table[0] = maxpkt * sch_ep->pkts; 342 317 } else if (sch_ep->speed >= USB_SPEED_SUPER) { 343 318 /* usb3_r1 spec section4.4.7 & 4.4.8 */ 344 319 sch_ep->cs_count = 0; ··· 355 330 if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) { 356 331 sch_ep->pkts = esit_pkts; 357 332 sch_ep->num_budget_microframes = 1; 333 333 + bwb_table[0] = maxpkt * sch_ep->pkts; 358 334 } 359 335 360 336 if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) { ··· 372 346 DIV_ROUND_UP(esit_pkts, sch_ep->pkts); 373 347 374 348 sch_ep->repeat = !!(sch_ep->num_budget_microframes > 1); 349 349 + bw_per_microframe = maxpkt * sch_ep->pkts; 350 350 + 351 351 + for (i = 0; i < sch_ep->num_budget_microframes - 1; i++) 352 352 + bwb_table[i] = bw_per_microframe; 353 353 + 354 354 + /* last one <= bw_per_microframe */ 355 355 + bwb_table[i] = maxpkt * esit_pkts - i * bw_per_microframe; 375 356 } 376 376 - sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts; 377 357 } else if (is_fs_or_ls(sch_ep->speed)) { 378 358 sch_ep->pkts = 1; /* at most one packet for each microframe */ 379 359 380 360 /* 381 381 - * num_budget_microframes and cs_count will be updated when 361 361 + * @cs_count will be updated to add extra-cs when 382 362 * check TT for INT_OUT_EP, ISOC/INT_IN_EP type 363 363 + * @maxpkt <= 1023; 383 364 */ 384 365 sch_ep->cs_count = DIV_ROUND_UP(maxpkt, FS_PAYLOAD_MAX); 385 366 sch_ep->num_budget_microframes = sch_ep->cs_count; 386 386 - sch_ep->bw_cost_per_microframe = min_t(u32, maxpkt, FS_PAYLOAD_MAX); 367 367 + 368 368 + /* init budget table */ 369 369 + if (ep_type == ISOC_OUT_EP) { 370 370 + for (i = 0; i < sch_ep->cs_count - 1; i++) 371 371 + bwb_table[i] = FS_PAYLOAD_MAX; 372 372 + 373 373 + bwb_table[i] = maxpkt - i * FS_PAYLOAD_MAX; 374 374 + } else if (ep_type == INT_OUT_EP) { 375 375 + /* only first one used (maxpkt <= 64), others zero */ 376 376 + bwb_table[0] = maxpkt; 377 377 + } else { /* INT_IN_EP or ISOC_IN_EP */ 378 378 + bwb_table[0] = 0; /* start split */ 379 379 + bwb_table[1] = 0; /* idle */ 380 380 + /* 381 381 + * @cs_count will be updated according to cs position 382 382 + * (add 1 or 2 extra-cs), but assume only first 383 383 + * @num_budget_microframes elements will be used later, 384 384 + * although in fact it does not (extra-cs budget many receive 385 385 + * some data for IN ep); 386 386 + * @cs_count is 1 for INT_IN_EP (maxpkt <= 64); 387 387 + */ 388 388 + for (i = 0; i < sch_ep->cs_count - 1; i++) 389 389 + bwb_table[i + CS_OFFSET] = FS_PAYLOAD_MAX; 390 390 + 391 391 + bwb_table[i + CS_OFFSET] = maxpkt - i * FS_PAYLOAD_MAX; 392 392 + /* ss + idle */ 393 393 + sch_ep->num_budget_microframes += CS_OFFSET; 394 394 + } 387 395 } 388 396 } 389 397 ··· 434 374 435 375 for (j = 0; j < sch_ep->num_budget_microframes; j++) { 436 376 k = XHCI_MTK_BW_INDEX(base + j); 437 437 - bw = sch_bw->bus_bw[k] + sch_ep->bw_cost_per_microframe; 377 377 + bw = sch_bw->bus_bw[k] + sch_ep->bw_budget_table[j]; 438 378 if (bw > max_bw) 439 379 max_bw = bw; 440 380 } ··· 442 382 return max_bw; 443 383 } 444 384 385 385 + /* 386 386 + * for OUT: get first SS consumed bw; 387 387 + * for IN: get first CS consumed bw; 388 388 + */ 389 389 + static u16 get_fs_bw(struct mu3h_sch_ep_info *sch_ep, int offset) 390 390 + { 391 391 + struct mu3h_sch_tt *tt = sch_ep->sch_tt; 392 392 + u16 fs_bw; 393 393 + 394 394 + if (sch_ep->ep_type == ISOC_OUT_EP || sch_ep->ep_type == INT_OUT_EP) 395 395 + fs_bw = tt->fs_bus_bw_out[XHCI_MTK_BW_INDEX(offset)]; 396 396 + else /* skip ss + idle */ 397 397 + fs_bw = tt->fs_bus_bw_in[XHCI_MTK_BW_INDEX(offset + CS_OFFSET)]; 398 398 + 399 399 + return fs_bw; 400 400 + } 401 401 + 445 402 static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw, 446 403 struct mu3h_sch_ep_info *sch_ep, bool used) 447 404 { 448 448 - int bw_updated; 449 405 u32 base; 450 450 - int i, j; 451 451 - 452 452 - bw_updated = sch_ep->bw_cost_per_microframe * (used ? 1 : -1); 453 453 - 454 454 - for (i = 0; i < sch_ep->num_esit; i++) { 455 455 - base = sch_ep->offset + i * sch_ep->esit; 456 456 - for (j = 0; j < sch_ep->num_budget_microframes; j++) 457 457 - sch_bw->bus_bw[XHCI_MTK_BW_INDEX(base + j)] += bw_updated; 458 458 - } 459 459 - } 460 460 - 461 461 - static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) 462 462 - { 463 463 - struct mu3h_sch_tt *tt = sch_ep->sch_tt; 464 464 - u32 tmp; 465 465 - int base; 466 406 int i, j, k; 467 407 468 408 for (i = 0; i < sch_ep->num_esit; i++) { 469 469 - base = offset + i * sch_ep->esit; 470 470 - 471 471 - /* 472 472 - * Compared with hs bus, no matter what ep type, 473 473 - * the hub will always delay one uframe to send data 474 474 - */ 409 409 + base = sch_ep->offset + i * sch_ep->esit; 475 410 for (j = 0; j < sch_ep->num_budget_microframes; j++) { 476 411 k = XHCI_MTK_BW_INDEX(base + j); 477 477 - tmp = tt->fs_bus_bw[k] + sch_ep->bw_cost_per_microframe; 478 478 - if (tmp > FS_PAYLOAD_MAX) 479 479 - return -ESCH_BW_OVERFLOW; 412 412 + if (used) 413 413 + sch_bw->bus_bw[k] += sch_ep->bw_budget_table[j]; 414 414 + else 415 415 + sch_bw->bus_bw[k] -= sch_ep->bw_budget_table[j]; 480 416 } 417 417 + } 418 418 + } 419 419 + 420 420 + static int check_ls_budget_microframes(struct mu3h_sch_ep_info *sch_ep, int offset) 421 421 + { 422 422 + struct mu3h_sch_tt *tt = sch_ep->sch_tt; 423 423 + int i; 424 424 + 425 425 + if (sch_ep->speed != USB_SPEED_LOW) 426 426 + return 0; 427 427 + 428 428 + if (sch_ep->ep_type == INT_OUT_EP) 429 429 + i = XHCI_MTK_BW_INDEX(offset); 430 430 + else if (sch_ep->ep_type == INT_IN_EP) 431 431 + i = XHCI_MTK_BW_INDEX(offset + CS_OFFSET); /* skip ss + idle */ 432 432 + else 433 433 + return -EINVAL; 434 434 + 435 435 + if (tt->ls_bus_bw[i] + sch_ep->maxpkt > LS_PAYLOAD_MAX) 436 436 + return -ESCH_BW_OVERFLOW; 437 437 + 438 438 + return 0; 439 439 + } 440 440 + 441 441 + static int check_fs_budget_microframes(struct mu3h_sch_ep_info *sch_ep, int offset) 442 442 + { 443 443 + struct mu3h_sch_tt *tt = sch_ep->sch_tt; 444 444 + u32 tmp; 445 445 + int i, k; 446 446 + 447 447 + /* 448 448 + * for OUT eps, will transfer exactly assigned length of data, 449 449 + * so can't allocate more than 188 bytes; 450 450 + * but it's not for IN eps, usually it can't receive full 451 451 + * 188 bytes in a uframe, if it not assign full 188 bytes, 452 452 + * can add another one; 453 453 + */ 454 454 + for (i = 0; i < sch_ep->num_budget_microframes; i++) { 455 455 + k = XHCI_MTK_BW_INDEX(offset + i); 456 456 + if (sch_ep->ep_type == ISOC_OUT_EP || sch_ep->ep_type == INT_OUT_EP) 457 457 + tmp = tt->fs_bus_bw_out[k] + sch_ep->bw_budget_table[i]; 458 458 + else /* ep_type : ISOC IN / INTR IN */ 459 459 + tmp = tt->fs_bus_bw_in[k]; 460 460 + 461 461 + if (tmp > FS_PAYLOAD_MAX) 462 462 + return -ESCH_BW_OVERFLOW; 481 463 } 482 464 483 465 return 0; 484 466 } 485 467 486 486 - static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) 468 468 + static int check_fs_budget_frames(struct mu3h_sch_ep_info *sch_ep, int offset) 469 469 + { 470 470 + struct mu3h_sch_tt *tt = sch_ep->sch_tt; 471 471 + u32 head, tail; 472 472 + int i, j, k; 473 473 + 474 474 + /* bugdet scheduled may cross at most two fs frames */ 475 475 + j = XHCI_MTK_BW_INDEX(offset) / UFRAMES_PER_FRAME; 476 476 + k = XHCI_MTK_BW_INDEX(offset + sch_ep->num_budget_microframes - 1) / UFRAMES_PER_FRAME; 477 477 + 478 478 + if (j != k) { 479 479 + head = tt->fs_frame_bw[j]; 480 480 + tail = tt->fs_frame_bw[k]; 481 481 + } else { 482 482 + head = tt->fs_frame_bw[j]; 483 483 + tail = 0; 484 484 + } 485 485 + 486 486 + j = roundup(offset, UFRAMES_PER_FRAME); 487 487 + for (i = 0; i < sch_ep->num_budget_microframes; i++) { 488 488 + if ((offset + i) < j) 489 489 + head += sch_ep->bw_budget_table[i]; 490 490 + else 491 491 + tail += sch_ep->bw_budget_table[i]; 492 492 + } 493 493 + 494 494 + if (head > FS_BW_BOUNDARY || tail > FS_BW_BOUNDARY) 495 495 + return -ESCH_BW_OVERFLOW; 496 496 + 497 497 + return 0; 498 498 + } 499 499 + 500 500 + static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) 501 501 + { 502 502 + int i, base; 503 503 + int ret = 0; 504 504 + 505 505 + for (i = 0; i < sch_ep->num_esit; i++) { 506 506 + base = offset + i * sch_ep->esit; 507 507 + 508 508 + ret = check_ls_budget_microframes(sch_ep, base); 509 509 + if (ret) 510 510 + goto err; 511 511 + 512 512 + ret = check_fs_budget_microframes(sch_ep, base); 513 513 + if (ret) 514 514 + goto err; 515 515 + 516 516 + ret = check_fs_budget_frames(sch_ep, base); 517 517 + if (ret) 518 518 + goto err; 519 519 + } 520 520 + 521 521 + err: 522 522 + return ret; 523 523 + } 524 524 + 525 525 + static int check_ss_and_cs(struct mu3h_sch_ep_info *sch_ep, u32 offset) 487 526 { 488 527 u32 start_ss, last_ss; 489 528 u32 start_cs, last_cs; 490 529 491 491 - if (!sch_ep->sch_tt) 492 492 - return 0; 493 493 - 494 494 - start_ss = offset % 8; 530 530 + start_ss = offset % UFRAMES_PER_FRAME; 495 531 496 532 if (sch_ep->ep_type == ISOC_OUT_EP) { 497 533 last_ss = start_ss + sch_ep->cs_count - 1; ··· 600 444 return -ESCH_SS_Y6; 601 445 602 446 } else { 447 447 + /* maxpkt <= 1023, cs <= 6 */ 603 448 u32 cs_count = DIV_ROUND_UP(sch_ep->maxpkt, FS_PAYLOAD_MAX); 604 449 605 450 /* ··· 611 454 return -ESCH_SS_Y6; 612 455 613 456 /* one uframe for ss + one uframe for idle */ 614 614 - start_cs = (start_ss + 2) % 8; 457 457 + start_cs = (start_ss + CS_OFFSET) % UFRAMES_PER_FRAME; 615 458 last_cs = start_cs + cs_count - 1; 616 616 - 617 459 if (last_cs > 7) 618 460 return -ESCH_CS_OVERFLOW; 619 461 462 462 + /* add extra-cs */ 463 463 + cs_count += (last_cs == 7) ? 1 : 2; 620 464 if (cs_count > 7) 621 465 cs_count = 7; /* HW limit */ 622 466 623 467 sch_ep->cs_count = cs_count; 624 624 - /* ss, idle are ignored */ 625 625 - sch_ep->num_budget_microframes = cs_count; 626 468 627 627 - /* 628 628 - * if interval=1, maxp >752, num_budge_micoframe is larger 629 629 - * than sch_ep->esit, will overstep boundary 630 630 - */ 631 631 - if (sch_ep->num_budget_microframes > sch_ep->esit) 632 632 - sch_ep->num_budget_microframes = sch_ep->esit; 633 469 } 634 470 471 471 + return 0; 472 472 + } 473 473 + 474 474 + /* 475 475 + * when isoc-out transfers 188 bytes in a uframe, and send isoc/intr's 476 476 + * ss token in the uframe, may cause 'bit stuff error' in downstream 477 477 + * port; 478 478 + * when isoc-out transfer less than 188 bytes in a uframe, shall send 479 479 + * isoc-in's ss after isoc-out's ss (but hw can't ensure the sequence, 480 480 + * so just avoid overlap). 481 481 + */ 482 482 + static int check_isoc_ss_overlap(struct mu3h_sch_ep_info *sch_ep, u32 offset) 483 483 + { 484 484 + struct mu3h_sch_tt *tt = sch_ep->sch_tt; 485 485 + int base; 486 486 + int i, j, k; 487 487 + 488 488 + if (!tt) 489 489 + return 0; 490 490 + 491 491 + for (i = 0; i < sch_ep->num_esit; i++) { 492 492 + base = offset + i * sch_ep->esit; 493 493 + 494 494 + if (sch_ep->ep_type == ISOC_OUT_EP) { 495 495 + for (j = 0; j < sch_ep->num_budget_microframes; j++) { 496 496 + k = XHCI_MTK_BW_INDEX(base + j + CS_OFFSET); 497 497 + /* use cs to indicate existence of in-ss @(base+j) */ 498 498 + if (tt->fs_bus_bw_in[k]) 499 499 + return -ESCH_SS_OVERLAP; 500 500 + } 501 501 + } else if (sch_ep->ep_type == ISOC_IN_EP || sch_ep->ep_type == INT_IN_EP) { 502 502 + k = XHCI_MTK_BW_INDEX(base); 503 503 + /* only check IN's ss */ 504 504 + if (tt->fs_bus_bw_out[k]) 505 505 + return -ESCH_SS_OVERLAP; 506 506 + } 507 507 + } 508 508 + 509 509 + return 0; 510 510 + } 511 511 + 512 512 + static int check_sch_tt_budget(struct mu3h_sch_ep_info *sch_ep, u32 offset) 513 513 + { 514 514 + int ret; 515 515 + 516 516 + ret = check_ss_and_cs(sch_ep, offset); 517 517 + if (ret) 518 518 + return ret; 519 519 + 520 520 + ret = check_isoc_ss_overlap(sch_ep, offset); 521 521 + if (ret) 522 522 + return ret; 523 523 + 635 524 return check_fs_bus_bw(sch_ep, offset); 525 525 + } 526 526 + 527 527 + /* allocate microframes in the ls/fs frame */ 528 528 + static int alloc_sch_portion_of_frame(struct mu3h_sch_ep_info *sch_ep) 529 529 + { 530 530 + struct mu3h_sch_bw_info *sch_bw = sch_ep->bw_info; 531 531 + const u32 bw_boundary = get_bw_boundary(sch_ep->speed); 532 532 + u32 bw_max, fs_bw_min; 533 533 + u32 offset, offset_min; 534 534 + u16 fs_bw; 535 535 + int frames; 536 536 + int i, j; 537 537 + int ret; 538 538 + 539 539 + frames = sch_ep->esit / UFRAMES_PER_FRAME; 540 540 + 541 541 + for (i = 0; i < UFRAMES_PER_FRAME; i++) { 542 542 + fs_bw_min = FS_PAYLOAD_MAX; 543 543 + offset_min = XHCI_MTK_MAX_ESIT; 544 544 + 545 545 + for (j = 0; j < frames; j++) { 546 546 + offset = (i + j * UFRAMES_PER_FRAME) % sch_ep->esit; 547 547 + 548 548 + ret = check_sch_tt_budget(sch_ep, offset); 549 549 + if (ret) 550 550 + continue; 551 551 + 552 552 + /* check hs bw domain */ 553 553 + bw_max = get_max_bw(sch_bw, sch_ep, offset); 554 554 + if (bw_max > bw_boundary) { 555 555 + ret = -ESCH_BW_OVERFLOW; 556 556 + continue; 557 557 + } 558 558 + 559 559 + /* use best-fit between frames */ 560 560 + fs_bw = get_fs_bw(sch_ep, offset); 561 561 + if (fs_bw < fs_bw_min) { 562 562 + fs_bw_min = fs_bw; 563 563 + offset_min = offset; 564 564 + } 565 565 + 566 566 + if (!fs_bw_min) 567 567 + break; 568 568 + } 569 569 + 570 570 + /* use first-fit between microframes in a frame */ 571 571 + if (offset_min < XHCI_MTK_MAX_ESIT) 572 572 + break; 573 573 + } 574 574 + 575 575 + if (offset_min == XHCI_MTK_MAX_ESIT) 576 576 + return -ESCH_BW_OVERFLOW; 577 577 + 578 578 + sch_ep->offset = offset_min; 579 579 + 580 580 + return 0; 636 581 } 637 582 638 583 static void update_sch_tt(struct mu3h_sch_ep_info *sch_ep, bool used) 639 584 { 640 585 struct mu3h_sch_tt *tt = sch_ep->sch_tt; 641 641 - int bw_updated; 586 586 + u16 *fs_bus_bw; 642 587 u32 base; 643 643 - int i, j; 588 588 + int i, j, k, f; 644 589 645 645 - bw_updated = sch_ep->bw_cost_per_microframe * (used ? 1 : -1); 590 590 + if (sch_ep->ep_type == ISOC_OUT_EP || sch_ep->ep_type == INT_OUT_EP) 591 591 + fs_bus_bw = tt->fs_bus_bw_out; 592 592 + else 593 593 + fs_bus_bw = tt->fs_bus_bw_in; 646 594 647 595 for (i = 0; i < sch_ep->num_esit; i++) { 648 596 base = sch_ep->offset + i * sch_ep->esit; 649 597 650 650 - for (j = 0; j < sch_ep->num_budget_microframes; j++) 651 651 - tt->fs_bus_bw[XHCI_MTK_BW_INDEX(base + j)] += bw_updated; 598 598 + for (j = 0; j < sch_ep->num_budget_microframes; j++) { 599 599 + k = XHCI_MTK_BW_INDEX(base + j); 600 600 + f = k / UFRAMES_PER_FRAME; 601 601 + if (used) { 602 602 + if (sch_ep->speed == USB_SPEED_LOW) 603 603 + tt->ls_bus_bw[k] += (u8)sch_ep->bw_budget_table[j]; 604 604 + 605 605 + fs_bus_bw[k] += (u16)sch_ep->bw_budget_table[j]; 606 606 + tt->fs_frame_bw[f] += (u16)sch_ep->bw_budget_table[j]; 607 607 + } else { 608 608 + if (sch_ep->speed == USB_SPEED_LOW) 609 609 + tt->ls_bus_bw[k] -= (u8)sch_ep->bw_budget_table[j]; 610 610 + 611 611 + fs_bus_bw[k] -= (u16)sch_ep->bw_budget_table[j]; 612 612 + tt->fs_frame_bw[f] -= (u16)sch_ep->bw_budget_table[j]; 613 613 + } 614 614 + } 652 615 } 653 616 654 617 if (used) ··· 790 513 return 0; 791 514 } 792 515 793 793 - static int check_sch_bw(struct mu3h_sch_ep_info *sch_ep) 516 516 + /* allocate microframes for hs/ss/ssp */ 517 517 + static int alloc_sch_microframes(struct mu3h_sch_ep_info *sch_ep) 794 518 { 795 519 struct mu3h_sch_bw_info *sch_bw = sch_ep->bw_info; 796 520 const u32 bw_boundary = get_bw_boundary(sch_ep->speed); ··· 799 521 u32 worst_bw; 800 522 u32 min_bw = ~0; 801 523 int min_index = -1; 802 802 - int ret = 0; 803 524 804 525 /* 805 526 * Search through all possible schedule microframes. 806 527 * and find a microframe where its worst bandwidth is minimum. 807 528 */ 808 529 for (offset = 0; offset < sch_ep->esit; offset++) { 809 809 - ret = check_sch_tt(sch_ep, offset); 810 810 - if (ret) 811 811 - continue; 812 530 813 531 worst_bw = get_max_bw(sch_bw, sch_ep, offset); 814 532 if (worst_bw > bw_boundary) ··· 814 540 min_bw = worst_bw; 815 541 min_index = offset; 816 542 } 817 817 - 818 818 - /* use first-fit for LS/FS */ 819 819 - if (sch_ep->sch_tt && min_index >= 0) 820 820 - break; 821 821 - 822 822 - if (min_bw == 0) 823 823 - break; 824 543 } 825 544 826 545 if (min_index < 0) 827 827 - return ret ? ret : -ESCH_BW_OVERFLOW; 546 546 + return -ESCH_BW_OVERFLOW; 828 547 829 548 sch_ep->offset = min_index; 830 549 831 831 - return load_ep_bw(sch_bw, sch_ep, true); 550 550 + return 0; 551 551 + } 552 552 + 553 553 + static int check_sch_bw(struct mu3h_sch_ep_info *sch_ep) 554 554 + { 555 555 + int ret; 556 556 + 557 557 + if (sch_ep->sch_tt) 558 558 + ret = alloc_sch_portion_of_frame(sch_ep); 559 559 + else 560 560 + ret = alloc_sch_microframes(sch_ep); 561 561 + 562 562 + if (ret) 563 563 + return ret; 564 564 + 565 565 + return load_ep_bw(sch_ep->bw_info, sch_ep, true); 832 566 } 833 567 834 568 static void destroy_sch_ep(struct xhci_hcd_mtk *mtk, struct usb_device *udev, ··· 933 651 934 652 xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed)); 935 653 936 936 - sch_ep = create_sch_ep(mtk, udev, ep); 654 654 + sch_ep = create_sch_ep(mtk, udev, ep, ep_ctx); 937 655 if (IS_ERR_OR_NULL(sch_ep)) 938 656 return -ENOMEM; 939 657

+13 -4

drivers/usb/host/xhci-mtk.h

reviewed

··· 30 30 #define XHCI_MTK_MAX_ESIT (1 << 6) 31 31 #define XHCI_MTK_BW_INDEX(x) ((x) & (XHCI_MTK_MAX_ESIT - 1)) 32 32 33 33 + #define UFRAMES_PER_FRAME 8 34 34 + #define XHCI_MTK_FRAMES_CNT (XHCI_MTK_MAX_ESIT / UFRAMES_PER_FRAME) 35 35 + 33 36 /** 34 34 - * @fs_bus_bw: array to keep track of bandwidth already used for FS 37 37 + * @fs_bus_bw_out: save bandwidth used by FS/LS OUT eps in each uframes 38 38 + * @fs_bus_bw_in: save bandwidth used by FS/LS IN eps in each uframes 39 39 + * @ls_bus_bw: save bandwidth used by LS eps in each uframes 40 40 + * @fs_frame_bw: save bandwidth used by FS/LS eps in each FS frames 35 41 * @ep_list: Endpoints using this TT 36 42 */ 37 43 struct mu3h_sch_tt { 38 38 - u32 fs_bus_bw[XHCI_MTK_MAX_ESIT]; 44 44 + u16 fs_bus_bw_out[XHCI_MTK_MAX_ESIT]; 45 45 + u16 fs_bus_bw_in[XHCI_MTK_MAX_ESIT]; 46 46 + u8 ls_bus_bw[XHCI_MTK_MAX_ESIT]; 47 47 + u16 fs_frame_bw[XHCI_MTK_FRAMES_CNT]; 39 48 struct list_head ep_list; 40 49 }; 41 50 ··· 67 58 * @num_esit: number of @esit in a period 68 59 * @num_budget_microframes: number of continuous uframes 69 60 * (@repeat==1) scheduled within the interval 70 70 - * @bw_cost_per_microframe: bandwidth cost per microframe 71 61 * @hentry: hash table entry 72 62 * @endpoint: linked into bandwidth domain which it belongs to 73 63 * @tt_endpoint: linked into mu3h_sch_tt's list which it belongs to ··· 91 83 * times; 1: distribute the (bMaxBurst+1)*(Mult+1) packets 92 84 * according to @pkts and @repeat. normal mode is used by 93 85 * default 86 86 + * @bw_budget_table: table to record bandwidth budget per microframe 94 87 */ 95 88 struct mu3h_sch_ep_info { 96 89 u32 esit; 97 90 u32 num_esit; 98 91 u32 num_budget_microframes; 99 99 - u32 bw_cost_per_microframe; 100 92 struct list_head endpoint; 101 93 struct hlist_node hentry; 102 94 struct list_head tt_endpoint; ··· 116 108 u32 pkts; 117 109 u32 cs_count; 118 110 u32 burst_mode; 111 111 + u32 bw_budget_table[]; 119 112 }; 120 113 121 114 #define MU3C_U3_PORT_MAX 4

+5 -1

drivers/usb/host/xhci-pci.c

reviewed

··· 535 535 /* xHC spec requires PCI devices to support D3hot and D3cold */ 536 536 if (xhci->hci_version >= 0x120) 537 537 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; 538 538 + else if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version >= 0x110) 539 539 + xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; 538 540 539 541 if (xhci->quirks & XHCI_RESET_ON_RESUME) 540 542 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, ··· 695 693 /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */ 696 694 pm_runtime_put_noidle(&dev->dev); 697 695 698 698 - if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW) 696 696 + if (pci_choose_state(dev, PMSG_SUSPEND) == PCI_D0) 697 697 + pm_runtime_forbid(&dev->dev); 698 698 + else if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW) 699 699 pm_runtime_allow(&dev->dev); 700 700 701 701 dma_set_max_seg_size(&dev->dev, UINT_MAX);

+19 -4

drivers/usb/host/xhci-plat.c

reviewed

··· 458 458 int ret; 459 459 460 460 if (!device_may_wakeup(dev) && (xhci->quirks & XHCI_SUSPEND_RESUME_CLKS)) { 461 461 - clk_prepare_enable(xhci->clk); 462 462 - clk_prepare_enable(xhci->reg_clk); 461 461 + ret = clk_prepare_enable(xhci->clk); 462 462 + if (ret) 463 463 + return ret; 464 464 + 465 465 + ret = clk_prepare_enable(xhci->reg_clk); 466 466 + if (ret) { 467 467 + clk_disable_unprepare(xhci->clk); 468 468 + return ret; 469 469 + } 463 470 } 464 471 465 472 ret = xhci_priv_resume_quirk(hcd); 466 473 if (ret) 467 467 - return ret; 474 474 + goto disable_clks; 468 475 469 476 ret = xhci_resume(xhci, PMSG_RESUME); 470 477 if (ret) 471 471 - return ret; 478 478 + goto disable_clks; 472 479 473 480 pm_runtime_disable(dev); 474 481 pm_runtime_set_active(dev); 475 482 pm_runtime_enable(dev); 476 483 477 484 return 0; 485 485 + 486 486 + disable_clks: 487 487 + if (!device_may_wakeup(dev) && (xhci->quirks & XHCI_SUSPEND_RESUME_CLKS)) { 488 488 + clk_disable_unprepare(xhci->clk); 489 489 + clk_disable_unprepare(xhci->reg_clk); 490 490 + } 491 491 + 492 492 + return ret; 478 493 } 479 494 480 495 static int __maybe_unused xhci_plat_runtime_suspend(struct device *dev)

+11 -27

drivers/usb/host/xhci-ring.c

reviewed

··· 144 144 struct xhci_segment **seg, 145 145 union xhci_trb **trb) 146 146 { 147 147 - if (trb_is_link(*trb)) { 147 147 + if (trb_is_link(*trb) || last_trb_on_seg(*seg, *trb)) { 148 148 *seg = (*seg)->next; 149 149 *trb = ((*seg)->trbs); 150 150 } else { ··· 450 450 * In the future we should distinguish between -ENODEV and -ETIMEDOUT 451 451 * and try to recover a -ETIMEDOUT with a host controller reset. 452 452 */ 453 453 - ret = xhci_handshake(&xhci->op_regs->cmd_ring, 454 454 - CMD_RING_RUNNING, 0, 5 * 1000 * 1000); 453 453 + ret = xhci_handshake_check_state(xhci, &xhci->op_regs->cmd_ring, 454 454 + CMD_RING_RUNNING, 0, 5 * 1000 * 1000, 455 455 + XHCI_STATE_REMOVING); 455 456 if (ret < 0) { 456 457 xhci_err(xhci, "Abort failed to stop command ring: %d\n", ret); 457 458 xhci_halt(xhci); ··· 1880 1879 if ((port_id <= 0) || (port_id > max_ports)) { 1881 1880 xhci_warn(xhci, "Port change event with invalid port ID %d\n", 1882 1881 port_id); 1883 1883 - inc_deq(xhci, ir->event_ring); 1884 1882 return; 1885 1883 } 1886 1884 ··· 1906 1906 xhci_dbg(xhci, "Port change event, %d-%d, id %d, portsc: 0x%x\n", 1907 1907 hcd->self.busnum, hcd_portnum + 1, port_id, portsc); 1908 1908 1909 1909 - trace_xhci_handle_port_status(hcd_portnum, portsc); 1909 1909 + trace_xhci_handle_port_status(port, portsc); 1910 1910 1911 1911 if (hcd->state == HC_STATE_SUSPENDED) { 1912 1912 xhci_dbg(xhci, "resume root hub\n"); ··· 2007 2007 } 2008 2008 2009 2009 cleanup: 2010 2010 - /* Update event ring dequeue pointer before dropping the lock */ 2011 2011 - inc_deq(xhci, ir->event_ring); 2012 2010 2013 2011 /* Don't make the USB core poll the roothub if we got a bad port status 2014 2012 * change event. Besides, at that point we can't tell which roothub ··· 2882 2884 trb_comp_code != COMP_MISSED_SERVICE_ERROR && 2883 2885 trb_comp_code != COMP_NO_PING_RESPONSE_ERROR; 2884 2886 2885 2885 - /* 2886 2886 - * Do not update event ring dequeue pointer if we're in a loop 2887 2887 - * processing missed tds. 2888 2888 - */ 2889 2889 - if (!handling_skipped_tds) 2890 2890 - inc_deq(xhci, ir->event_ring); 2891 2891 - 2892 2887 /* 2893 2888 * If ep->skip is set, it means there are missed tds on the 2894 2889 * endpoint ring need to take care of. ··· 2913 2922 static int xhci_handle_event(struct xhci_hcd *xhci, struct xhci_interrupter *ir) 2914 2923 { 2915 2924 union xhci_trb *event; 2916 2916 - int update_ptrs = 1; 2917 2925 u32 trb_type; 2918 2918 - int ret; 2919 2926 2920 2927 /* Event ring hasn't been allocated yet. */ 2921 2928 if (!ir || !ir->event_ring || !ir->event_ring->dequeue) { ··· 2943 2954 break; 2944 2955 case TRB_PORT_STATUS: 2945 2956 handle_port_status(xhci, ir, event); 2946 2946 - update_ptrs = 0; 2947 2957 break; 2948 2958 case TRB_TRANSFER: 2949 2949 - ret = handle_tx_event(xhci, ir, &event->trans_event); 2950 2950 - if (ret >= 0) 2951 2951 - update_ptrs = 0; 2959 2959 + handle_tx_event(xhci, ir, &event->trans_event); 2952 2960 break; 2953 2961 case TRB_DEV_NOTE: 2954 2962 handle_device_notification(xhci, event); ··· 2965 2979 return 0; 2966 2980 } 2967 2981 2968 2968 - if (update_ptrs) 2969 2969 - /* Update SW event ring dequeue pointer */ 2970 2970 - inc_deq(xhci, ir->event_ring); 2982 2982 + /* Update SW event ring dequeue pointer */ 2983 2983 + inc_deq(xhci, ir->event_ring); 2971 2984 2972 2985 /* Are there more items on the event ring? Caller will call us again to 2973 2986 * check. ··· 2998 3013 * Per 4.9.4, Software writes to the ERDP register shall 2999 3014 * always advance the Event Ring Dequeue Pointer value. 3000 3015 */ 3001 3001 - if ((temp_64 & (u64) ~ERST_PTR_MASK) == 3002 3002 - ((u64) deq & (u64) ~ERST_PTR_MASK)) 3016 3016 + if ((temp_64 & ERST_PTR_MASK) == (deq & ERST_PTR_MASK)) 3003 3017 return; 3004 3018 3005 3019 /* Update HC event ring dequeue pointer */ 3006 3006 - temp_64 &= ERST_DESI_MASK; 3007 3007 - temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK); 3020 3020 + temp_64 = ir->event_ring->deq_seg->num & ERST_DESI_MASK; 3021 3021 + temp_64 |= deq & ERST_PTR_MASK; 3008 3022 } 3009 3023 3010 3024 /* Clear the event handler busy flag (RW1C) */

+13 -10

drivers/usb/host/xhci-trace.h

reviewed

··· 509 509 ); 510 510 511 511 DECLARE_EVENT_CLASS(xhci_log_portsc, 512 512 - TP_PROTO(u32 portnum, u32 portsc), 513 513 - TP_ARGS(portnum, portsc), 512 512 + TP_PROTO(struct xhci_port *port, u32 portsc), 513 513 + TP_ARGS(port, portsc), 514 514 TP_STRUCT__entry( 515 515 + __field(u32, busnum) 515 516 __field(u32, portnum) 516 517 __field(u32, portsc) 517 518 ), 518 519 TP_fast_assign( 519 519 - __entry->portnum = portnum; 520 520 + __entry->busnum = port->rhub->hcd->self.busnum; 521 521 + __entry->portnum = port->hcd_portnum; 520 522 __entry->portsc = portsc; 521 523 ), 522 522 - TP_printk("port-%d: %s", 524 524 + TP_printk("port %d-%d: %s", 525 525 + __entry->busnum, 523 526 __entry->portnum, 524 527 xhci_decode_portsc(__get_buf(XHCI_MSG_MAX), __entry->portsc) 525 528 ) 526 529 ); 527 530 528 531 DEFINE_EVENT(xhci_log_portsc, xhci_handle_port_status, 529 529 - TP_PROTO(u32 portnum, u32 portsc), 530 530 - TP_ARGS(portnum, portsc) 532 532 + TP_PROTO(struct xhci_port *port, u32 portsc), 533 533 + TP_ARGS(port, portsc) 531 534 ); 532 535 533 536 DEFINE_EVENT(xhci_log_portsc, xhci_get_port_status, 534 534 - TP_PROTO(u32 portnum, u32 portsc), 535 535 - TP_ARGS(portnum, portsc) 537 537 + TP_PROTO(struct xhci_port *port, u32 portsc), 538 538 + TP_ARGS(port, portsc) 536 539 ); 537 540 538 541 DEFINE_EVENT(xhci_log_portsc, xhci_hub_status_data, 539 539 - TP_PROTO(u32 portnum, u32 portsc), 540 540 - TP_ARGS(portnum, portsc) 542 542 + TP_PROTO(struct xhci_port *port, u32 portsc), 543 543 + TP_ARGS(port, portsc) 541 544 ); 542 545 543 546 DECLARE_EVENT_CLASS(xhci_log_doorbell,

+36 -4

drivers/usb/host/xhci.c

reviewed

··· 82 82 } 83 83 84 84 /* 85 85 + * xhci_handshake_check_state - same as xhci_handshake but takes an additional 86 86 + * exit_state parameter, and bails out with an error immediately when xhc_state 87 87 + * has exit_state flag set. 88 88 + */ 89 89 + int xhci_handshake_check_state(struct xhci_hcd *xhci, void __iomem *ptr, 90 90 + u32 mask, u32 done, int usec, unsigned int exit_state) 91 91 + { 92 92 + u32 result; 93 93 + int ret; 94 94 + 95 95 + ret = readl_poll_timeout_atomic(ptr, result, 96 96 + (result & mask) == done || 97 97 + result == U32_MAX || 98 98 + xhci->xhc_state & exit_state, 99 99 + 1, usec); 100 100 + 101 101 + if (result == U32_MAX || xhci->xhc_state & exit_state) 102 102 + return -ENODEV; 103 103 + 104 104 + return ret; 105 105 + } 106 106 + 107 107 + /* 85 108 * Disable interrupts and begin the xHCI halting process. 86 109 */ 87 110 void xhci_quiesce(struct xhci_hcd *xhci) ··· 224 201 if (xhci->quirks & XHCI_INTEL_HOST) 225 202 udelay(1000); 226 203 227 227 - ret = xhci_handshake(&xhci->op_regs->command, CMD_RESET, 0, timeout_us); 204 204 + ret = xhci_handshake_check_state(xhci, &xhci->op_regs->command, 205 205 + CMD_RESET, 0, timeout_us, XHCI_STATE_REMOVING); 228 206 if (ret) 229 207 return ret; 230 208 ··· 544 520 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run"); 545 521 546 522 temp_64 = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); 547 547 - temp_64 &= ~ERST_PTR_MASK; 523 523 + temp_64 &= ERST_PTR_MASK; 548 524 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 549 525 "ERST deq = 64'h%0lx", (long unsigned int) temp_64); 550 526 ··· 992 968 int retval = 0; 993 969 bool comp_timer_running = false; 994 970 bool pending_portevent = false; 971 971 + bool suspended_usb3_devs = false; 995 972 bool reinit_xhc = false; 996 973 997 974 if (!hcd->state) ··· 1140 1115 /* 1141 1116 * Resume roothubs only if there are pending events. 1142 1117 * USB 3 devices resend U3 LFPS wake after a 100ms delay if 1143 1143 - * the first wake signalling failed, give it that chance. 1118 1118 + * the first wake signalling failed, give it that chance if 1119 1119 + * there are suspended USB 3 devices. 1144 1120 */ 1121 1121 + if (xhci->usb3_rhub.bus_state.suspended_ports || 1122 1122 + xhci->usb3_rhub.bus_state.bus_suspended) 1123 1123 + suspended_usb3_devs = true; 1124 1124 + 1145 1125 pending_portevent = xhci_pending_portevent(xhci); 1146 1146 - if (!pending_portevent && msg.event == PM_EVENT_AUTO_RESUME) { 1126 1126 + 1127 1127 + if (suspended_usb3_devs && !pending_portevent && 1128 1128 + msg.event == PM_EVENT_AUTO_RESUME) { 1147 1129 msleep(120); 1148 1130 pending_portevent = xhci_pending_portevent(xhci); 1149 1131 }

+6 -39

drivers/usb/host/xhci.h

reviewed

··· 525 525 * a work queue (or delayed service routine)? 526 526 */ 527 527 #define ERST_EHB (1 << 3) 528 528 - #define ERST_PTR_MASK (0xf) 528 528 + #define ERST_PTR_MASK (GENMASK_ULL(63, 4)) 529 529 530 530 /** 531 531 * struct xhci_run_regs ··· 557 557 558 558 #define DB_VALUE(ep, stream) ((((ep) + 1) & 0xff) | ((stream) << 16)) 559 559 #define DB_VALUE_HOST 0x00000000 560 560 - 561 561 - /** 562 562 - * struct xhci_protocol_caps 563 563 - * @revision: major revision, minor revision, capability ID, 564 564 - * and next capability pointer. 565 565 - * @name_string: Four ASCII characters to say which spec this xHC 566 566 - * follows, typically "USB ". 567 567 - * @port_info: Port offset, count, and protocol-defined information. 568 568 - */ 569 569 - struct xhci_protocol_caps { 570 570 - u32 revision; 571 571 - u32 name_string; 572 572 - u32 port_info; 573 573 - }; 574 574 - 575 575 - #define XHCI_EXT_PORT_MAJOR(x) (((x) >> 24) & 0xff) 576 576 - #define XHCI_EXT_PORT_MINOR(x) (((x) >> 16) & 0xff) 577 577 - #define XHCI_EXT_PORT_PSIC(x) (((x) >> 28) & 0x0f) 578 578 - #define XHCI_EXT_PORT_OFF(x) ((x) & 0xff) 579 579 - #define XHCI_EXT_PORT_COUNT(x) (((x) >> 8) & 0xff) 580 580 - 581 581 - #define XHCI_EXT_PORT_PSIV(x) (((x) >> 0) & 0x0f) 582 582 - #define XHCI_EXT_PORT_PSIE(x) (((x) >> 4) & 0x03) 583 583 - #define XHCI_EXT_PORT_PLT(x) (((x) >> 6) & 0x03) 584 584 - #define XHCI_EXT_PORT_PFD(x) (((x) >> 8) & 0x01) 585 585 - #define XHCI_EXT_PORT_LP(x) (((x) >> 14) & 0x03) 586 586 - #define XHCI_EXT_PORT_PSIM(x) (((x) >> 16) & 0xffff) 587 560 588 561 #define PLT_MASK (0x03 << 6) 589 562 #define PLT_SYM (0x00 << 6) ··· 1518 1545 union xhci_trb *trbs; 1519 1546 /* private to HCD */ 1520 1547 struct xhci_segment *next; 1548 1548 + unsigned int num; 1521 1549 dma_addr_t dma; 1522 1550 /* Max packet sized bounce buffer for td-fragmant alignment */ 1523 1551 dma_addr_t bounce_dma; ··· 1643 1669 struct xhci_td td[] __counted_by(num_tds); 1644 1670 }; 1645 1671 1646 1646 - /* 1647 1647 - * Each segment table entry is 4*32bits long. 1K seems like an ok size: 1648 1648 - * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table, 1649 1649 - * meaning 64 ring segments. 1650 1650 - * Initial allocated size of the ERST, in number of entries */ 1651 1651 - #define ERST_NUM_SEGS 1 1672 1672 + /* Reasonable limit for number of Event Ring segments (spec allows 32k) */ 1673 1673 + #define ERST_MAX_SEGS 2 1652 1674 /* Poll every 60 seconds */ 1653 1675 #define POLL_TIMEOUT 60 1654 1676 /* Stop endpoint command timeout (secs) for URB cancellation watchdog timer */ ··· 2048 2078 void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring); 2049 2079 int xhci_ring_expansion(struct xhci_hcd *xhci, struct xhci_ring *ring, 2050 2080 unsigned int num_trbs, gfp_t flags); 2051 2051 - int xhci_alloc_erst(struct xhci_hcd *xhci, 2052 2052 - struct xhci_ring *evt_ring, 2053 2053 - struct xhci_erst *erst, 2054 2054 - gfp_t flags); 2055 2081 void xhci_initialize_ring_info(struct xhci_ring *ring, 2056 2082 unsigned int cycle_state); 2057 2057 - void xhci_free_erst(struct xhci_hcd *xhci, struct xhci_erst *erst); 2058 2083 void xhci_free_endpoint_ring(struct xhci_hcd *xhci, 2059 2084 struct xhci_virt_device *virt_dev, 2060 2085 unsigned int ep_index); ··· 2084 2119 /* xHCI host controller glue */ 2085 2120 typedef void (*xhci_get_quirks_t)(struct device *, struct xhci_hcd *); 2086 2121 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, u64 timeout_us); 2122 2122 + int xhci_handshake_check_state(struct xhci_hcd *xhci, void __iomem *ptr, 2123 2123 + u32 mask, u32 done, int usec, unsigned int exit_state); 2087 2124 void xhci_quiesce(struct xhci_hcd *xhci); 2088 2125 int xhci_halt(struct xhci_hcd *xhci); 2089 2126 int xhci_start(struct xhci_hcd *xhci);

+13

drivers/usb/misc/Kconfig

reviewed

··· 165 165 166 166 It is safe to say M here. 167 167 168 168 + config USB_LJCA 169 169 + tristate "Intel La Jolla Cove Adapter support" 170 170 + select AUXILIARY_BUS 171 171 + depends on USB && ACPI 172 172 + help 173 173 + This adds support for Intel La Jolla Cove USB-I2C/SPI/GPIO 174 174 + Master Adapter (LJCA). Additional drivers such as I2C_LJCA, 175 175 + GPIO_LJCA and SPI_LJCA must be enabled in order to use the 176 176 + functionality of the device. 177 177 + 178 178 + This driver can also be built as a module. If so, the module 179 179 + will be called usb-ljca. 180 180 + 168 181 source "drivers/usb/misc/sisusbvga/Kconfig" 169 182 170 183 config USB_LD

+1

drivers/usb/misc/Makefile

reviewed

··· 11 11 obj-$(CONFIG_USB_EMI62) += emi62.o 12 12 obj-$(CONFIG_USB_EZUSB_FX2) += ezusb.o 13 13 obj-$(CONFIG_APPLE_MFI_FASTCHARGE) += apple-mfi-fastcharge.o 14 14 + obj-$(CONFIG_USB_LJCA) += usb-ljca.o 14 15 obj-$(CONFIG_USB_IDMOUSE) += idmouse.o 15 16 obj-$(CONFIG_USB_IOWARRIOR) += iowarrior.o 16 17 obj-$(CONFIG_USB_ISIGHTFW) += isight_firmware.o

+1 -6

drivers/usb/misc/onboard_usb_hub.c

reviewed

··· 240 240 241 241 static int onboard_hub_probe(struct platform_device *pdev) 242 242 { 243 243 - const struct of_device_id *of_id; 244 243 struct device *dev = &pdev->dev; 245 244 struct onboard_hub *hub; 246 245 unsigned int i; ··· 249 250 if (!hub) 250 251 return -ENOMEM; 251 252 252 252 - of_id = of_match_device(onboard_hub_match, &pdev->dev); 253 253 - if (!of_id) 254 254 - return -ENODEV; 255 255 - 256 256 - hub->pdata = of_id->data; 253 253 + hub->pdata = device_get_match_data(&pdev->dev); 257 254 if (!hub->pdata) 258 255 return -EINVAL; 259 256

+1

drivers/usb/misc/onboard_usb_hub.h

reviewed

··· 57 57 { .compatible = "usb5e3,608", .data = &genesys_gl850g_data, }, 58 58 { .compatible = "usb5e3,610", .data = &genesys_gl852g_data, }, 59 59 { .compatible = "usb5e3,620", .data = &genesys_gl852g_data, }, 60 60 + { .compatible = "usb5e3,626", .data = &genesys_gl852g_data, }, 60 61 { .compatible = "usbbda,411", .data = &realtek_rts5411_data, }, 61 62 { .compatible = "usbbda,5411", .data = &realtek_rts5411_data, }, 62 63 { .compatible = "usbbda,414", .data = &realtek_rts5411_data, },

+902

drivers/usb/misc/usb-ljca.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-only 2 2 + /* 3 3 + * Intel La Jolla Cove Adapter USB driver 4 4 + * 5 5 + * Copyright (c) 2023, Intel Corporation. 6 6 + */ 7 7 + 8 8 + #include <linux/acpi.h> 9 9 + #include <linux/auxiliary_bus.h> 10 10 + #include <linux/dev_printk.h> 11 11 + #include <linux/kernel.h> 12 12 + #include <linux/mod_devicetable.h> 13 13 + #include <linux/module.h> 14 14 + #include <linux/mutex.h> 15 15 + #include <linux/slab.h> 16 16 + #include <linux/spinlock.h> 17 17 + #include <linux/types.h> 18 18 + #include <linux/usb.h> 19 19 + #include <linux/usb/ljca.h> 20 20 + 21 21 + #include <asm/unaligned.h> 22 22 + 23 23 + /* command flags */ 24 24 + #define LJCA_ACK_FLAG BIT(0) 25 25 + #define LJCA_RESP_FLAG BIT(1) 26 26 + #define LJCA_CMPL_FLAG BIT(2) 27 27 + 28 28 + #define LJCA_MAX_PACKET_SIZE 64u 29 29 + #define LJCA_MAX_PAYLOAD_SIZE \ 30 30 + (LJCA_MAX_PACKET_SIZE - sizeof(struct ljca_msg)) 31 31 + 32 32 + #define LJCA_WRITE_TIMEOUT_MS 200 33 33 + #define LJCA_WRITE_ACK_TIMEOUT_MS 500 34 34 + #define LJCA_ENUM_CLIENT_TIMEOUT_MS 20 35 35 + 36 36 + /* ljca client type */ 37 37 + enum ljca_client_type { 38 38 + LJCA_CLIENT_MNG = 1, 39 39 + LJCA_CLIENT_GPIO = 3, 40 40 + LJCA_CLIENT_I2C = 4, 41 41 + LJCA_CLIENT_SPI = 5, 42 42 + }; 43 43 + 44 44 + /* MNG client commands */ 45 45 + enum ljca_mng_cmd { 46 46 + LJCA_MNG_RESET = 2, 47 47 + LJCA_MNG_ENUM_GPIO = 4, 48 48 + LJCA_MNG_ENUM_I2C = 5, 49 49 + LJCA_MNG_ENUM_SPI = 8, 50 50 + }; 51 51 + 52 52 + /* ljca client acpi _ADR */ 53 53 + enum ljca_client_acpi_adr { 54 54 + LJCA_GPIO_ACPI_ADR, 55 55 + LJCA_I2C1_ACPI_ADR, 56 56 + LJCA_I2C2_ACPI_ADR, 57 57 + LJCA_SPI1_ACPI_ADR, 58 58 + LJCA_SPI2_ACPI_ADR, 59 59 + LJCA_CLIENT_ACPI_ADR_MAX, 60 60 + }; 61 61 + 62 62 + /* ljca cmd message structure */ 63 63 + struct ljca_msg { 64 64 + u8 type; 65 65 + u8 cmd; 66 66 + u8 flags; 67 67 + u8 len; 68 68 + u8 data[] __counted_by(len); 69 69 + } __packed; 70 70 + 71 71 + struct ljca_i2c_ctr_info { 72 72 + u8 id; 73 73 + u8 capacity; 74 74 + u8 intr_pin; 75 75 + } __packed; 76 76 + 77 77 + struct ljca_i2c_descriptor { 78 78 + u8 num; 79 79 + struct ljca_i2c_ctr_info info[] __counted_by(num); 80 80 + } __packed; 81 81 + 82 82 + struct ljca_spi_ctr_info { 83 83 + u8 id; 84 84 + u8 capacity; 85 85 + u8 intr_pin; 86 86 + } __packed; 87 87 + 88 88 + struct ljca_spi_descriptor { 89 89 + u8 num; 90 90 + struct ljca_spi_ctr_info info[] __counted_by(num); 91 91 + } __packed; 92 92 + 93 93 + struct ljca_bank_descriptor { 94 94 + u8 bank_id; 95 95 + u8 pin_num; 96 96 + 97 97 + /* 1 bit for each gpio, 1 means valid */ 98 98 + __le32 valid_pins; 99 99 + } __packed; 100 100 + 101 101 + struct ljca_gpio_descriptor { 102 102 + u8 pins_per_bank; 103 103 + u8 bank_num; 104 104 + struct ljca_bank_descriptor bank_desc[] __counted_by(bank_num); 105 105 + } __packed; 106 106 + 107 107 + /** 108 108 + * struct ljca_adapter - represent a ljca adapter 109 109 + * 110 110 + * @intf: the usb interface for this ljca adapter 111 111 + * @usb_dev: the usb device for this ljca adapter 112 112 + * @dev: the specific device info of the usb interface 113 113 + * @rx_pipe: bulk in pipe for receive data from firmware 114 114 + * @tx_pipe: bulk out pipe for send data to firmware 115 115 + * @rx_urb: urb used for the bulk in pipe 116 116 + * @rx_buf: buffer used to receive command response and event 117 117 + * @rx_len: length of rx buffer 118 118 + * @ex_buf: external buffer to save command response 119 119 + * @ex_buf_len: length of external buffer 120 120 + * @actual_length: actual length of data copied to external buffer 121 121 + * @tx_buf: buffer used to download command to firmware 122 122 + * @tx_buf_len: length of tx buffer 123 123 + * @lock: spinlock to protect tx_buf and ex_buf 124 124 + * @cmd_completion: completion object as the command receives ack 125 125 + * @mutex: mutex to avoid command download concurrently 126 126 + * @client_list: client device list 127 127 + * @disconnect: usb disconnect ongoing or not 128 128 + * @reset_id: used to reset firmware 129 129 + */ 130 130 + struct ljca_adapter { 131 131 + struct usb_interface *intf; 132 132 + struct usb_device *usb_dev; 133 133 + struct device *dev; 134 134 + 135 135 + unsigned int rx_pipe; 136 136 + unsigned int tx_pipe; 137 137 + 138 138 + struct urb *rx_urb; 139 139 + void *rx_buf; 140 140 + unsigned int rx_len; 141 141 + 142 142 + u8 *ex_buf; 143 143 + u8 ex_buf_len; 144 144 + u8 actual_length; 145 145 + 146 146 + void *tx_buf; 147 147 + u8 tx_buf_len; 148 148 + 149 149 + spinlock_t lock; 150 150 + 151 151 + struct completion cmd_completion; 152 152 + struct mutex mutex; 153 153 + 154 154 + struct list_head client_list; 155 155 + 156 156 + bool disconnect; 157 157 + 158 158 + u32 reset_id; 159 159 + }; 160 160 + 161 161 + struct ljca_match_ids_walk_data { 162 162 + const struct acpi_device_id *ids; 163 163 + const char *uid; 164 164 + struct acpi_device *adev; 165 165 + }; 166 166 + 167 167 + static const struct acpi_device_id ljca_gpio_hids[] = { 168 168 + { "INTC1074" }, 169 169 + { "INTC1096" }, 170 170 + { "INTC100B" }, 171 171 + { "INTC10D1" }, 172 172 + {}, 173 173 + }; 174 174 + 175 175 + static const struct acpi_device_id ljca_i2c_hids[] = { 176 176 + { "INTC1075" }, 177 177 + { "INTC1097" }, 178 178 + { "INTC100C" }, 179 179 + { "INTC10D2" }, 180 180 + {}, 181 181 + }; 182 182 + 183 183 + static const struct acpi_device_id ljca_spi_hids[] = { 184 184 + { "INTC1091" }, 185 185 + { "INTC1098" }, 186 186 + { "INTC100D" }, 187 187 + { "INTC10D3" }, 188 188 + {}, 189 189 + }; 190 190 + 191 191 + static void ljca_handle_event(struct ljca_adapter *adap, 192 192 + struct ljca_msg *header) 193 193 + { 194 194 + struct ljca_client *client; 195 195 + 196 196 + list_for_each_entry(client, &adap->client_list, link) { 197 197 + /* 198 198 + * Currently only GPIO register event callback, but 199 199 + * firmware message structure should include id when 200 200 + * multiple same type clients register event callback. 201 201 + */ 202 202 + if (client->type == header->type) { 203 203 + unsigned long flags; 204 204 + 205 205 + spin_lock_irqsave(&client->event_cb_lock, flags); 206 206 + client->event_cb(client->context, header->cmd, 207 207 + header->data, header->len); 208 208 + spin_unlock_irqrestore(&client->event_cb_lock, flags); 209 209 + 210 210 + break; 211 211 + } 212 212 + } 213 213 + } 214 214 + 215 215 + /* process command ack and received data if available */ 216 216 + static void ljca_handle_cmd_ack(struct ljca_adapter *adap, struct ljca_msg *header) 217 217 + { 218 218 + struct ljca_msg *tx_header = adap->tx_buf; 219 219 + u8 ibuf_len, actual_len = 0; 220 220 + unsigned long flags; 221 221 + u8 *ibuf; 222 222 + 223 223 + spin_lock_irqsave(&adap->lock, flags); 224 224 + 225 225 + if (tx_header->type != header->type || tx_header->cmd != header->cmd) { 226 226 + spin_unlock_irqrestore(&adap->lock, flags); 227 227 + dev_err(adap->dev, "cmd ack mismatch error\n"); 228 228 + return; 229 229 + } 230 230 + 231 231 + ibuf_len = adap->ex_buf_len; 232 232 + ibuf = adap->ex_buf; 233 233 + 234 234 + if (ibuf && ibuf_len) { 235 235 + actual_len = min(header->len, ibuf_len); 236 236 + 237 237 + /* copy received data to external buffer */ 238 238 + memcpy(ibuf, header->data, actual_len); 239 239 + } 240 240 + /* update copied data length */ 241 241 + adap->actual_length = actual_len; 242 242 + 243 243 + spin_unlock_irqrestore(&adap->lock, flags); 244 244 + 245 245 + complete(&adap->cmd_completion); 246 246 + } 247 247 + 248 248 + static void ljca_recv(struct urb *urb) 249 249 + { 250 250 + struct ljca_msg *header = urb->transfer_buffer; 251 251 + struct ljca_adapter *adap = urb->context; 252 252 + int ret; 253 253 + 254 254 + switch (urb->status) { 255 255 + case 0: 256 256 + /* success */ 257 257 + break; 258 258 + case -ENOENT: 259 259 + /* 260 260 + * directly complete the possible ongoing transfer 261 261 + * during disconnect 262 262 + */ 263 263 + if (adap->disconnect) 264 264 + complete(&adap->cmd_completion); 265 265 + return; 266 266 + case -ECONNRESET: 267 267 + case -ESHUTDOWN: 268 268 + case -EPIPE: 269 269 + /* rx urb is terminated */ 270 270 + dev_dbg(adap->dev, "rx urb terminated with status: %d\n", 271 271 + urb->status); 272 272 + return; 273 273 + default: 274 274 + dev_dbg(adap->dev, "rx urb error: %d\n", urb->status); 275 275 + goto resubmit; 276 276 + } 277 277 + 278 278 + if (header->len + sizeof(*header) != urb->actual_length) 279 279 + goto resubmit; 280 280 + 281 281 + if (header->flags & LJCA_ACK_FLAG) 282 282 + ljca_handle_cmd_ack(adap, header); 283 283 + else 284 284 + ljca_handle_event(adap, header); 285 285 + 286 286 + resubmit: 287 287 + ret = usb_submit_urb(urb, GFP_ATOMIC); 288 288 + if (ret && ret != -EPERM) 289 289 + dev_err(adap->dev, "resubmit rx urb error %d\n", ret); 290 290 + } 291 291 + 292 292 + static int ljca_send(struct ljca_adapter *adap, u8 type, u8 cmd, 293 293 + const u8 *obuf, u8 obuf_len, u8 *ibuf, u8 ibuf_len, 294 294 + bool ack, unsigned long timeout) 295 295 + { 296 296 + unsigned int msg_len = sizeof(struct ljca_msg) + obuf_len; 297 297 + struct ljca_msg *header = adap->tx_buf; 298 298 + unsigned int transferred; 299 299 + unsigned long flags; 300 300 + int ret; 301 301 + 302 302 + if (adap->disconnect) 303 303 + return -ENODEV; 304 304 + 305 305 + if (msg_len > adap->tx_buf_len) 306 306 + return -EINVAL; 307 307 + 308 308 + mutex_lock(&adap->mutex); 309 309 + 310 310 + spin_lock_irqsave(&adap->lock, flags); 311 311 + 312 312 + header->type = type; 313 313 + header->cmd = cmd; 314 314 + header->len = obuf_len; 315 315 + if (obuf) 316 316 + memcpy(header->data, obuf, obuf_len); 317 317 + 318 318 + header->flags = LJCA_CMPL_FLAG | (ack ? LJCA_ACK_FLAG : 0); 319 319 + 320 320 + adap->ex_buf = ibuf; 321 321 + adap->ex_buf_len = ibuf_len; 322 322 + adap->actual_length = 0; 323 323 + 324 324 + spin_unlock_irqrestore(&adap->lock, flags); 325 325 + 326 326 + reinit_completion(&adap->cmd_completion); 327 327 + 328 328 + ret = usb_autopm_get_interface(adap->intf); 329 329 + if (ret < 0) 330 330 + goto out; 331 331 + 332 332 + ret = usb_bulk_msg(adap->usb_dev, adap->tx_pipe, header, 333 333 + msg_len, &transferred, LJCA_WRITE_TIMEOUT_MS); 334 334 + 335 335 + usb_autopm_put_interface(adap->intf); 336 336 + 337 337 + if (ret < 0) 338 338 + goto out; 339 339 + if (transferred != msg_len) { 340 340 + ret = -EIO; 341 341 + goto out; 342 342 + } 343 343 + 344 344 + if (ack) { 345 345 + ret = wait_for_completion_timeout(&adap->cmd_completion, 346 346 + timeout); 347 347 + if (!ret) { 348 348 + ret = -ETIMEDOUT; 349 349 + goto out; 350 350 + } 351 351 + } 352 352 + ret = adap->actual_length; 353 353 + 354 354 + out: 355 355 + spin_lock_irqsave(&adap->lock, flags); 356 356 + adap->ex_buf = NULL; 357 357 + adap->ex_buf_len = 0; 358 358 + 359 359 + memset(header, 0, sizeof(*header)); 360 360 + spin_unlock_irqrestore(&adap->lock, flags); 361 361 + 362 362 + mutex_unlock(&adap->mutex); 363 363 + 364 364 + return ret; 365 365 + } 366 366 + 367 367 + int ljca_transfer(struct ljca_client *client, u8 cmd, const u8 *obuf, 368 368 + u8 obuf_len, u8 *ibuf, u8 ibuf_len) 369 369 + { 370 370 + return ljca_send(client->adapter, client->type, cmd, 371 371 + obuf, obuf_len, ibuf, ibuf_len, true, 372 372 + LJCA_WRITE_ACK_TIMEOUT_MS); 373 373 + } 374 374 + EXPORT_SYMBOL_NS_GPL(ljca_transfer, LJCA); 375 375 + 376 376 + int ljca_transfer_noack(struct ljca_client *client, u8 cmd, const u8 *obuf, 377 377 + u8 obuf_len) 378 378 + { 379 379 + return ljca_send(client->adapter, client->type, cmd, obuf, 380 380 + obuf_len, NULL, 0, false, LJCA_WRITE_ACK_TIMEOUT_MS); 381 381 + } 382 382 + EXPORT_SYMBOL_NS_GPL(ljca_transfer_noack, LJCA); 383 383 + 384 384 + int ljca_register_event_cb(struct ljca_client *client, ljca_event_cb_t event_cb, 385 385 + void *context) 386 386 + { 387 387 + unsigned long flags; 388 388 + 389 389 + if (!event_cb) 390 390 + return -EINVAL; 391 391 + 392 392 + spin_lock_irqsave(&client->event_cb_lock, flags); 393 393 + 394 394 + if (client->event_cb) { 395 395 + spin_unlock_irqrestore(&client->event_cb_lock, flags); 396 396 + return -EALREADY; 397 397 + } 398 398 + 399 399 + client->event_cb = event_cb; 400 400 + client->context = context; 401 401 + 402 402 + spin_unlock_irqrestore(&client->event_cb_lock, flags); 403 403 + 404 404 + return 0; 405 405 + } 406 406 + EXPORT_SYMBOL_NS_GPL(ljca_register_event_cb, LJCA); 407 407 + 408 408 + void ljca_unregister_event_cb(struct ljca_client *client) 409 409 + { 410 410 + unsigned long flags; 411 411 + 412 412 + spin_lock_irqsave(&client->event_cb_lock, flags); 413 413 + 414 414 + client->event_cb = NULL; 415 415 + client->context = NULL; 416 416 + 417 417 + spin_unlock_irqrestore(&client->event_cb_lock, flags); 418 418 + } 419 419 + EXPORT_SYMBOL_NS_GPL(ljca_unregister_event_cb, LJCA); 420 420 + 421 421 + static int ljca_match_device_ids(struct acpi_device *adev, void *data) 422 422 + { 423 423 + struct ljca_match_ids_walk_data *wd = data; 424 424 + const char *uid = acpi_device_uid(adev); 425 425 + 426 426 + if (acpi_match_device_ids(adev, wd->ids)) 427 427 + return 0; 428 428 + 429 429 + if (!wd->uid) 430 430 + goto match; 431 431 + 432 432 + if (!uid) 433 433 + /* 434 434 + * Some DSDTs have only one ACPI companion for the two I2C 435 435 + * controllers and they don't set a UID at all (e.g. Dell 436 436 + * Latitude 9420). On these platforms only the first I2C 437 437 + * controller is used, so if a HID match has no UID we use 438 438 + * "0" as the UID and assign ACPI companion to the first 439 439 + * I2C controller. 440 440 + */ 441 441 + uid = "0"; 442 442 + else 443 443 + uid = strchr(uid, wd->uid[0]); 444 444 + 445 445 + if (!uid || strcmp(uid, wd->uid)) 446 446 + return 0; 447 447 + 448 448 + match: 449 449 + wd->adev = adev; 450 450 + 451 451 + return 1; 452 452 + } 453 453 + 454 454 + /* bind auxiliary device to acpi device */ 455 455 + static void ljca_auxdev_acpi_bind(struct ljca_adapter *adap, 456 456 + struct auxiliary_device *auxdev, 457 457 + u64 adr, u8 id) 458 458 + { 459 459 + struct ljca_match_ids_walk_data wd = { 0 }; 460 460 + struct acpi_device *parent, *adev; 461 461 + struct device *dev = adap->dev; 462 462 + char uid[4]; 463 463 + 464 464 + parent = ACPI_COMPANION(dev); 465 465 + if (!parent) 466 466 + return; 467 467 + 468 468 + /* 469 469 + * get auxdev ACPI handle from the ACPI device directly 470 470 + * under the parent that matches _ADR. 471 471 + */ 472 472 + adev = acpi_find_child_device(parent, adr, false); 473 473 + if (adev) { 474 474 + ACPI_COMPANION_SET(&auxdev->dev, adev); 475 475 + return; 476 476 + } 477 477 + 478 478 + /* 479 479 + * _ADR is a grey area in the ACPI specification, some 480 480 + * platforms use _HID to distinguish children devices. 481 481 + */ 482 482 + switch (adr) { 483 483 + case LJCA_GPIO_ACPI_ADR: 484 484 + wd.ids = ljca_gpio_hids; 485 485 + break; 486 486 + case LJCA_I2C1_ACPI_ADR: 487 487 + case LJCA_I2C2_ACPI_ADR: 488 488 + snprintf(uid, sizeof(uid), "%d", id); 489 489 + wd.uid = uid; 490 490 + wd.ids = ljca_i2c_hids; 491 491 + break; 492 492 + case LJCA_SPI1_ACPI_ADR: 493 493 + case LJCA_SPI2_ACPI_ADR: 494 494 + wd.ids = ljca_spi_hids; 495 495 + break; 496 496 + default: 497 497 + dev_warn(dev, "unsupported _ADR\n"); 498 498 + return; 499 499 + } 500 500 + 501 501 + acpi_dev_for_each_child(parent, ljca_match_device_ids, &wd); 502 502 + if (wd.adev) { 503 503 + ACPI_COMPANION_SET(&auxdev->dev, wd.adev); 504 504 + return; 505 505 + } 506 506 + 507 507 + parent = ACPI_COMPANION(dev->parent->parent); 508 508 + if (!parent) 509 509 + return; 510 510 + 511 511 + acpi_dev_for_each_child(parent, ljca_match_device_ids, &wd); 512 512 + if (wd.adev) 513 513 + ACPI_COMPANION_SET(&auxdev->dev, wd.adev); 514 514 + } 515 515 + 516 516 + static void ljca_auxdev_release(struct device *dev) 517 517 + { 518 518 + struct auxiliary_device *auxdev = to_auxiliary_dev(dev); 519 519 + 520 520 + kfree(auxdev->dev.platform_data); 521 521 + } 522 522 + 523 523 + static int ljca_new_client_device(struct ljca_adapter *adap, u8 type, u8 id, 524 524 + char *name, void *data, u64 adr) 525 525 + { 526 526 + struct auxiliary_device *auxdev; 527 527 + struct ljca_client *client; 528 528 + int ret; 529 529 + 530 530 + client = kzalloc(sizeof *client, GFP_KERNEL); 531 531 + if (!client) 532 532 + return -ENOMEM; 533 533 + 534 534 + client->type = type; 535 535 + client->id = id; 536 536 + client->adapter = adap; 537 537 + spin_lock_init(&client->event_cb_lock); 538 538 + 539 539 + auxdev = &client->auxdev; 540 540 + auxdev->name = name; 541 541 + auxdev->id = id; 542 542 + 543 543 + auxdev->dev.parent = adap->dev; 544 544 + auxdev->dev.platform_data = data; 545 545 + auxdev->dev.release = ljca_auxdev_release; 546 546 + 547 547 + ret = auxiliary_device_init(auxdev); 548 548 + if (ret) 549 549 + goto err_free; 550 550 + 551 551 + ljca_auxdev_acpi_bind(adap, auxdev, adr, id); 552 552 + 553 553 + ret = auxiliary_device_add(auxdev); 554 554 + if (ret) 555 555 + goto err_uninit; 556 556 + 557 557 + list_add_tail(&client->link, &adap->client_list); 558 558 + 559 559 + return 0; 560 560 + 561 561 + err_uninit: 562 562 + auxiliary_device_uninit(auxdev); 563 563 + 564 564 + err_free: 565 565 + kfree(client); 566 566 + 567 567 + return ret; 568 568 + } 569 569 + 570 570 + static int ljca_enumerate_gpio(struct ljca_adapter *adap) 571 571 + { 572 572 + u32 valid_pin[LJCA_MAX_GPIO_NUM / BITS_PER_TYPE(u32)]; 573 573 + struct ljca_gpio_descriptor *desc; 574 574 + struct ljca_gpio_info *gpio_info; 575 575 + u8 buf[LJCA_MAX_PAYLOAD_SIZE]; 576 576 + int ret, gpio_num; 577 577 + unsigned int i; 578 578 + 579 579 + ret = ljca_send(adap, LJCA_CLIENT_MNG, LJCA_MNG_ENUM_GPIO, NULL, 0, buf, 580 580 + sizeof(buf), true, LJCA_ENUM_CLIENT_TIMEOUT_MS); 581 581 + if (ret < 0) 582 582 + return ret; 583 583 + 584 584 + /* check firmware response */ 585 585 + desc = (struct ljca_gpio_descriptor *)buf; 586 586 + if (ret != struct_size(desc, bank_desc, desc->bank_num)) 587 587 + return -EINVAL; 588 588 + 589 589 + gpio_num = desc->pins_per_bank * desc->bank_num; 590 590 + if (gpio_num > LJCA_MAX_GPIO_NUM) 591 591 + return -EINVAL; 592 592 + 593 593 + /* construct platform data */ 594 594 + gpio_info = kzalloc(sizeof *gpio_info, GFP_KERNEL); 595 595 + if (!gpio_info) 596 596 + return -ENOMEM; 597 597 + gpio_info->num = gpio_num; 598 598 + 599 599 + for (i = 0; i < desc->bank_num; i++) 600 600 + valid_pin[i] = get_unaligned_le32(&desc->bank_desc[i].valid_pins); 601 601 + bitmap_from_arr32(gpio_info->valid_pin_map, valid_pin, gpio_num); 602 602 + 603 603 + ret = ljca_new_client_device(adap, LJCA_CLIENT_GPIO, 0, "ljca-gpio", 604 604 + gpio_info, LJCA_GPIO_ACPI_ADR); 605 605 + if (ret) 606 606 + kfree(gpio_info); 607 607 + 608 608 + return ret; 609 609 + } 610 610 + 611 611 + static int ljca_enumerate_i2c(struct ljca_adapter *adap) 612 612 + { 613 613 + struct ljca_i2c_descriptor *desc; 614 614 + struct ljca_i2c_info *i2c_info; 615 615 + u8 buf[LJCA_MAX_PAYLOAD_SIZE]; 616 616 + unsigned int i; 617 617 + int ret; 618 618 + 619 619 + ret = ljca_send(adap, LJCA_CLIENT_MNG, LJCA_MNG_ENUM_I2C, NULL, 0, buf, 620 620 + sizeof(buf), true, LJCA_ENUM_CLIENT_TIMEOUT_MS); 621 621 + if (ret < 0) 622 622 + return ret; 623 623 + 624 624 + /* check firmware response */ 625 625 + desc = (struct ljca_i2c_descriptor *)buf; 626 626 + if (ret != struct_size(desc, info, desc->num)) 627 627 + return -EINVAL; 628 628 + 629 629 + for (i = 0; i < desc->num; i++) { 630 630 + /* construct platform data */ 631 631 + i2c_info = kzalloc(sizeof *i2c_info, GFP_KERNEL); 632 632 + if (!i2c_info) 633 633 + return -ENOMEM; 634 634 + 635 635 + i2c_info->id = desc->info[i].id; 636 636 + i2c_info->capacity = desc->info[i].capacity; 637 637 + i2c_info->intr_pin = desc->info[i].intr_pin; 638 638 + 639 639 + ret = ljca_new_client_device(adap, LJCA_CLIENT_I2C, i, 640 640 + "ljca-i2c", i2c_info, 641 641 + LJCA_I2C1_ACPI_ADR + i); 642 642 + if (ret) { 643 643 + kfree(i2c_info); 644 644 + return ret; 645 645 + } 646 646 + } 647 647 + 648 648 + return 0; 649 649 + } 650 650 + 651 651 + static int ljca_enumerate_spi(struct ljca_adapter *adap) 652 652 + { 653 653 + struct ljca_spi_descriptor *desc; 654 654 + struct ljca_spi_info *spi_info; 655 655 + u8 buf[LJCA_MAX_PAYLOAD_SIZE]; 656 656 + unsigned int i; 657 657 + int ret; 658 658 + 659 659 + ret = ljca_send(adap, LJCA_CLIENT_MNG, LJCA_MNG_ENUM_SPI, NULL, 0, buf, 660 660 + sizeof(buf), true, LJCA_ENUM_CLIENT_TIMEOUT_MS); 661 661 + if (ret < 0) 662 662 + return ret; 663 663 + 664 664 + /* check firmware response */ 665 665 + desc = (struct ljca_spi_descriptor *)buf; 666 666 + if (ret != struct_size(desc, info, desc->num)) 667 667 + return -EINVAL; 668 668 + 669 669 + for (i = 0; i < desc->num; i++) { 670 670 + /* construct platform data */ 671 671 + spi_info = kzalloc(sizeof *spi_info, GFP_KERNEL); 672 672 + if (!spi_info) 673 673 + return -ENOMEM; 674 674 + 675 675 + spi_info->id = desc->info[i].id; 676 676 + spi_info->capacity = desc->info[i].capacity; 677 677 + 678 678 + ret = ljca_new_client_device(adap, LJCA_CLIENT_SPI, i, 679 679 + "ljca-spi", spi_info, 680 680 + LJCA_SPI1_ACPI_ADR + i); 681 681 + if (ret) { 682 682 + kfree(spi_info); 683 683 + return ret; 684 684 + } 685 685 + } 686 686 + 687 687 + return 0; 688 688 + } 689 689 + 690 690 + static int ljca_reset_handshake(struct ljca_adapter *adap) 691 691 + { 692 692 + __le32 reset_id = cpu_to_le32(adap->reset_id); 693 693 + __le32 reset_id_ret = 0; 694 694 + int ret; 695 695 + 696 696 + adap->reset_id++; 697 697 + 698 698 + ret = ljca_send(adap, LJCA_CLIENT_MNG, LJCA_MNG_RESET, (u8 *)&reset_id, 699 699 + sizeof(__le32), (u8 *)&reset_id_ret, sizeof(__le32), 700 700 + true, LJCA_WRITE_ACK_TIMEOUT_MS); 701 701 + if (ret < 0) 702 702 + return ret; 703 703 + 704 704 + if (reset_id_ret != reset_id) 705 705 + return -EINVAL; 706 706 + 707 707 + return 0; 708 708 + } 709 709 + 710 710 + static int ljca_enumerate_clients(struct ljca_adapter *adap) 711 711 + { 712 712 + struct ljca_client *client, *next; 713 713 + int ret; 714 714 + 715 715 + ret = ljca_reset_handshake(adap); 716 716 + if (ret) 717 717 + goto err_kill; 718 718 + 719 719 + ret = ljca_enumerate_gpio(adap); 720 720 + if (ret) { 721 721 + dev_err(adap->dev, "enumerate GPIO error\n"); 722 722 + goto err_kill; 723 723 + } 724 724 + 725 725 + ret = ljca_enumerate_i2c(adap); 726 726 + if (ret) { 727 727 + dev_err(adap->dev, "enumerate I2C error\n"); 728 728 + goto err_kill; 729 729 + } 730 730 + 731 731 + ret = ljca_enumerate_spi(adap); 732 732 + if (ret) { 733 733 + dev_err(adap->dev, "enumerate SPI error\n"); 734 734 + goto err_kill; 735 735 + } 736 736 + 737 737 + return 0; 738 738 + 739 739 + err_kill: 740 740 + adap->disconnect = true; 741 741 + 742 742 + usb_kill_urb(adap->rx_urb); 743 743 + 744 744 + list_for_each_entry_safe_reverse(client, next, &adap->client_list, link) { 745 745 + auxiliary_device_delete(&client->auxdev); 746 746 + auxiliary_device_uninit(&client->auxdev); 747 747 + 748 748 + list_del_init(&client->link); 749 749 + kfree(client); 750 750 + } 751 751 + 752 752 + return ret; 753 753 + } 754 754 + 755 755 + static int ljca_probe(struct usb_interface *interface, 756 756 + const struct usb_device_id *id) 757 757 + { 758 758 + struct usb_device *usb_dev = interface_to_usbdev(interface); 759 759 + struct usb_host_interface *alt = interface->cur_altsetting; 760 760 + struct usb_endpoint_descriptor *ep_in, *ep_out; 761 761 + struct device *dev = &interface->dev; 762 762 + struct ljca_adapter *adap; 763 763 + int ret; 764 764 + 765 765 + adap = devm_kzalloc(dev, sizeof(*adap), GFP_KERNEL); 766 766 + if (!adap) 767 767 + return -ENOMEM; 768 768 + 769 769 + /* separate tx buffer allocation for alignment */ 770 770 + adap->tx_buf = devm_kzalloc(dev, LJCA_MAX_PACKET_SIZE, GFP_KERNEL); 771 771 + if (!adap->tx_buf) 772 772 + return -ENOMEM; 773 773 + adap->tx_buf_len = LJCA_MAX_PACKET_SIZE; 774 774 + 775 775 + mutex_init(&adap->mutex); 776 776 + spin_lock_init(&adap->lock); 777 777 + init_completion(&adap->cmd_completion); 778 778 + INIT_LIST_HEAD(&adap->client_list); 779 779 + 780 780 + adap->intf = usb_get_intf(interface); 781 781 + adap->usb_dev = usb_dev; 782 782 + adap->dev = dev; 783 783 + 784 784 + /* 785 785 + * find the first bulk in and out endpoints. 786 786 + * ignore any others. 787 787 + */ 788 788 + ret = usb_find_common_endpoints(alt, &ep_in, &ep_out, NULL, NULL); 789 789 + if (ret) { 790 790 + dev_err(dev, "bulk endpoints not found\n"); 791 791 + goto err_put; 792 792 + } 793 793 + adap->rx_pipe = usb_rcvbulkpipe(usb_dev, usb_endpoint_num(ep_in)); 794 794 + adap->tx_pipe = usb_sndbulkpipe(usb_dev, usb_endpoint_num(ep_out)); 795 795 + 796 796 + /* setup rx buffer */ 797 797 + adap->rx_len = usb_endpoint_maxp(ep_in); 798 798 + adap->rx_buf = devm_kzalloc(dev, adap->rx_len, GFP_KERNEL); 799 799 + if (!adap->rx_buf) { 800 800 + ret = -ENOMEM; 801 801 + goto err_put; 802 802 + } 803 803 + 804 804 + /* alloc rx urb */ 805 805 + adap->rx_urb = usb_alloc_urb(0, GFP_KERNEL); 806 806 + if (!adap->rx_urb) { 807 807 + ret = -ENOMEM; 808 808 + goto err_put; 809 809 + } 810 810 + usb_fill_bulk_urb(adap->rx_urb, usb_dev, adap->rx_pipe, 811 811 + adap->rx_buf, adap->rx_len, ljca_recv, adap); 812 812 + 813 813 + usb_set_intfdata(interface, adap); 814 814 + 815 815 + /* submit rx urb before enumerate clients */ 816 816 + ret = usb_submit_urb(adap->rx_urb, GFP_KERNEL); 817 817 + if (ret) { 818 818 + dev_err(dev, "submit rx urb failed: %d\n", ret); 819 819 + goto err_free; 820 820 + } 821 821 + 822 822 + ret = ljca_enumerate_clients(adap); 823 823 + if (ret) 824 824 + goto err_free; 825 825 + 826 826 + usb_enable_autosuspend(usb_dev); 827 827 + 828 828 + return 0; 829 829 + 830 830 + err_free: 831 831 + usb_free_urb(adap->rx_urb); 832 832 + 833 833 + err_put: 834 834 + usb_put_intf(adap->intf); 835 835 + 836 836 + mutex_destroy(&adap->mutex); 837 837 + 838 838 + return ret; 839 839 + } 840 840 + 841 841 + static void ljca_disconnect(struct usb_interface *interface) 842 842 + { 843 843 + struct ljca_adapter *adap = usb_get_intfdata(interface); 844 844 + struct ljca_client *client, *next; 845 845 + 846 846 + adap->disconnect = true; 847 847 + 848 848 + usb_kill_urb(adap->rx_urb); 849 849 + 850 850 + list_for_each_entry_safe_reverse(client, next, &adap->client_list, link) { 851 851 + auxiliary_device_delete(&client->auxdev); 852 852 + auxiliary_device_uninit(&client->auxdev); 853 853 + 854 854 + list_del_init(&client->link); 855 855 + kfree(client); 856 856 + } 857 857 + 858 858 + usb_free_urb(adap->rx_urb); 859 859 + 860 860 + usb_put_intf(adap->intf); 861 861 + 862 862 + mutex_destroy(&adap->mutex); 863 863 + } 864 864 + 865 865 + static int ljca_suspend(struct usb_interface *interface, pm_message_t message) 866 866 + { 867 867 + struct ljca_adapter *adap = usb_get_intfdata(interface); 868 868 + 869 869 + usb_kill_urb(adap->rx_urb); 870 870 + 871 871 + return 0; 872 872 + } 873 873 + 874 874 + static int ljca_resume(struct usb_interface *interface) 875 875 + { 876 876 + struct ljca_adapter *adap = usb_get_intfdata(interface); 877 877 + 878 878 + return usb_submit_urb(adap->rx_urb, GFP_KERNEL); 879 879 + } 880 880 + 881 881 + static const struct usb_device_id ljca_table[] = { 882 882 + { USB_DEVICE(0x8086, 0x0b63) }, 883 883 + { /* sentinel */ } 884 884 + }; 885 885 + MODULE_DEVICE_TABLE(usb, ljca_table); 886 886 + 887 887 + static struct usb_driver ljca_driver = { 888 888 + .name = "ljca", 889 889 + .id_table = ljca_table, 890 890 + .probe = ljca_probe, 891 891 + .disconnect = ljca_disconnect, 892 892 + .suspend = ljca_suspend, 893 893 + .resume = ljca_resume, 894 894 + .supports_autosuspend = 1, 895 895 + }; 896 896 + module_usb_driver(ljca_driver); 897 897 + 898 898 + MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>"); 899 899 + MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>"); 900 900 + MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>"); 901 901 + MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB driver"); 902 902 + MODULE_LICENSE("GPL");

+1 -1

drivers/usb/misc/usbtest.c

reviewed

··· 705 705 { 706 706 struct usb_config_descriptor *config; 707 707 708 708 - if (len < sizeof(*config)) 708 708 + if (len < (int)sizeof(*config)) 709 709 return 0; 710 710 config = (struct usb_config_descriptor *) tdev->buf; 711 711

+5 -18

drivers/usb/mon/mon_main.c

reviewed

··· 81 81 static void mon_bus_submit(struct mon_bus *mbus, struct urb *urb) 82 82 { 83 83 unsigned long flags; 84 84 - struct list_head *pos; 85 84 struct mon_reader *r; 86 85 87 86 spin_lock_irqsave(&mbus->lock, flags); 88 87 mbus->cnt_events++; 89 89 - list_for_each (pos, &mbus->r_list) { 90 90 - r = list_entry(pos, struct mon_reader, r_link); 88 88 + list_for_each_entry(r, &mbus->r_list, r_link) 91 89 r->rnf_submit(r->r_data, urb); 92 92 - } 93 90 spin_unlock_irqrestore(&mbus->lock, flags); 94 91 } 95 92 ··· 105 108 static void mon_bus_submit_error(struct mon_bus *mbus, struct urb *urb, int error) 106 109 { 107 110 unsigned long flags; 108 108 - struct list_head *pos; 109 111 struct mon_reader *r; 110 112 111 113 spin_lock_irqsave(&mbus->lock, flags); 112 114 mbus->cnt_events++; 113 113 - list_for_each (pos, &mbus->r_list) { 114 114 - r = list_entry(pos, struct mon_reader, r_link); 115 115 + list_for_each_entry(r, &mbus->r_list, r_link) 115 116 r->rnf_error(r->r_data, urb, error); 116 116 - } 117 117 spin_unlock_irqrestore(&mbus->lock, flags); 118 118 } 119 119 ··· 129 135 static void mon_bus_complete(struct mon_bus *mbus, struct urb *urb, int status) 130 136 { 131 137 unsigned long flags; 132 132 - struct list_head *pos; 133 138 struct mon_reader *r; 134 139 135 140 spin_lock_irqsave(&mbus->lock, flags); 136 141 mbus->cnt_events++; 137 137 - list_for_each (pos, &mbus->r_list) { 138 138 - r = list_entry(pos, struct mon_reader, r_link); 142 142 + list_for_each_entry(r, &mbus->r_list, r_link) 139 143 r->rnf_complete(r->r_data, urb, status); 140 140 - } 141 144 spin_unlock_irqrestore(&mbus->lock, flags); 142 145 } 143 146 ··· 156 165 static void mon_stop(struct mon_bus *mbus) 157 166 { 158 167 struct usb_bus *ubus; 159 159 - struct list_head *p; 160 168 161 169 if (mbus == &mon_bus0) { 162 162 - list_for_each (p, &mon_buses) { 163 163 - mbus = list_entry(p, struct mon_bus, bus_link); 170 170 + list_for_each_entry(mbus, &mon_buses, bus_link) { 164 171 /* 165 172 * We do not change nreaders here, so rely on mon_lock. 166 173 */ ··· 321 332 */ 322 333 struct mon_bus *mon_bus_lookup(unsigned int num) 323 334 { 324 324 - struct list_head *p; 325 335 struct mon_bus *mbus; 326 336 327 337 if (num == 0) { 328 338 return &mon_bus0; 329 339 } 330 330 - list_for_each (p, &mon_buses) { 331 331 - mbus = list_entry(p, struct mon_bus, bus_link); 340 340 + list_for_each_entry(mbus, &mon_buses, bus_link) { 332 341 if (mbus->u_bus->busnum == num) { 333 342 return mbus; 334 343 }

+12 -6

drivers/usb/mtu3/mtu3_plat.c

reviewed

··· 451 451 return ret; 452 452 } 453 453 454 454 - static int mtu3_remove(struct platform_device *pdev) 454 454 + static void mtu3_remove(struct platform_device *pdev) 455 455 { 456 456 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev); 457 457 ··· 469 469 ssusb_gadget_exit(ssusb); 470 470 ssusb_host_exit(ssusb); 471 471 break; 472 472 - default: 473 473 - return -EINVAL; 472 472 + case USB_DR_MODE_UNKNOWN: 473 473 + /* 474 474 + * This cannot happen because with dr_mode == 475 475 + * USB_DR_MODE_UNKNOWN, .probe() doesn't succeed and so 476 476 + * .remove() wouldn't be called at all. However (little 477 477 + * surprising) the compiler isn't smart enough to see that, so 478 478 + * we explicitly have this case item to not make the compiler 479 479 + * wail about an unhandled enumeration value. 480 480 + */ 481 481 + break; 474 482 } 475 483 476 484 ssusb_rscs_exit(ssusb); ··· 486 478 pm_runtime_disable(&pdev->dev); 487 479 pm_runtime_put_noidle(&pdev->dev); 488 480 pm_runtime_set_suspended(&pdev->dev); 489 489 - 490 490 - return 0; 491 481 } 492 482 493 483 static int resume_ip_and_ports(struct ssusb_mtk *ssusb, pm_message_t msg) ··· 621 615 622 616 static struct platform_driver mtu3_driver = { 623 617 .probe = mtu3_probe, 624 624 - .remove = mtu3_remove, 618 618 + .remove_new = mtu3_remove, 625 619 .driver = { 626 620 .name = MTU3_DRIVER_NAME, 627 621 .pm = DEV_PM_OPS,

+1

drivers/usb/musb/da8xx.c

reviewed

··· 17 17 #include <linux/clk.h> 18 18 #include <linux/err.h> 19 19 #include <linux/io.h> 20 20 + #include <linux/of.h> 20 21 #include <linux/of_platform.h> 21 22 #include <linux/phy/phy.h> 22 23 #include <linux/platform_device.h>

+1 -1

drivers/usb/musb/musb_dsps.c

reviewed

··· 849 849 850 850 error = devm_request_threaded_irq(glue->dev, glue->vbus_irq, 851 851 NULL, dsps_vbus_threaded_irq, 852 852 - IRQF_ONESHOT, 852 852 + IRQF_SHARED, 853 853 "vbus", glue); 854 854 if (error) { 855 855 glue->vbus_irq = 0;

+2 -2

drivers/usb/storage/uas-detect.h

reviewed

··· 54 54 55 55 static int uas_use_uas_driver(struct usb_interface *intf, 56 56 const struct usb_device_id *id, 57 57 - unsigned long *flags_ret) 57 57 + u64 *flags_ret) 58 58 { 59 59 struct usb_host_endpoint *eps[4] = { }; 60 60 struct usb_device *udev = interface_to_usbdev(intf); 61 61 struct usb_hcd *hcd = bus_to_hcd(udev->bus); 62 62 - unsigned long flags = id->driver_info; 62 62 + u64 flags = id->driver_info; 63 63 struct usb_host_interface *alt; 64 64 int r; 65 65

+2 -2

drivers/usb/storage/uas.c

reviewed

··· 37 37 struct usb_anchor cmd_urbs; 38 38 struct usb_anchor sense_urbs; 39 39 struct usb_anchor data_urbs; 40 40 - unsigned long flags; 40 40 + u64 flags; 41 41 int qdepth, resetting; 42 42 unsigned cmd_pipe, status_pipe, data_in_pipe, data_out_pipe; 43 43 unsigned use_streams:1; ··· 988 988 struct Scsi_Host *shost = NULL; 989 989 struct uas_dev_info *devinfo; 990 990 struct usb_device *udev = interface_to_usbdev(intf); 991 991 - unsigned long dev_flags; 991 991 + u64 dev_flags; 992 992 993 993 if (!uas_use_uas_driver(intf, id, &dev_flags)) 994 994 return -ENODEV;

+1 -1

drivers/usb/storage/unusual_cypress.h

reviewed

··· 19 19 "Cypress ISD-300LP", 20 20 USB_SC_CYP_ATACB, USB_PR_DEVICE, NULL, 0), 21 21 22 22 - UNUSUAL_DEV( 0x14cd, 0x6116, 0x0160, 0x0160, 22 22 + UNUSUAL_DEV( 0x14cd, 0x6116, 0x0150, 0x0160, 23 23 "Super Top", 24 24 "USB 2.0 SATA BRIDGE", 25 25 USB_SC_CYP_ATACB, USB_PR_DEVICE, NULL, 0),

+4 -16

drivers/usb/storage/usb.c

reviewed

··· 110 110 .useTransport = use_transport, \ 111 111 } 112 112 113 113 - #define UNUSUAL_VENDOR_INTF(idVendor, cl, sc, pr, \ 114 114 - vendor_name, product_name, use_protocol, use_transport, \ 115 115 - init_function, Flags) \ 116 116 - { \ 117 117 - .vendorName = vendor_name, \ 118 118 - .productName = product_name, \ 119 119 - .useProtocol = use_protocol, \ 120 120 - .useTransport = use_transport, \ 121 121 - .initFunction = init_function, \ 122 122 - } 123 123 - 124 113 static const struct us_unusual_dev us_unusual_dev_list[] = { 125 114 # include "unusual_devs.h" 126 115 { } /* Terminating entry */ ··· 121 132 #undef UNUSUAL_DEV 122 133 #undef COMPLIANT_DEV 123 134 #undef USUAL_DEV 124 124 - #undef UNUSUAL_VENDOR_INTF 125 135 126 136 #ifdef CONFIG_LOCKDEP 127 137 ··· 460 472 #define TOLOWER(x) ((x) | 0x20) 461 473 462 474 /* Adjust device flags based on the "quirks=" module parameter */ 463 463 - void usb_stor_adjust_quirks(struct usb_device *udev, unsigned long *fflags) 475 475 + void usb_stor_adjust_quirks(struct usb_device *udev, u64 *fflags) 464 476 { 465 477 char *p; 466 478 u16 vid = le16_to_cpu(udev->descriptor.idVendor); 467 479 u16 pid = le16_to_cpu(udev->descriptor.idProduct); 468 468 - unsigned f = 0; 469 469 - unsigned int mask = (US_FL_SANE_SENSE | US_FL_BAD_SENSE | 480 480 + u64 f = 0; 481 481 + u64 mask = (US_FL_SANE_SENSE | US_FL_BAD_SENSE | 470 482 US_FL_FIX_CAPACITY | US_FL_IGNORE_UAS | 471 483 US_FL_CAPACITY_HEURISTICS | US_FL_IGNORE_DEVICE | 472 484 US_FL_NOT_LOCKABLE | US_FL_MAX_SECTORS_64 | ··· 605 617 us->fflags &= ~US_FL_GO_SLOW; 606 618 607 619 if (us->fflags) 608 608 - dev_info(pdev, "Quirks match for vid %04x pid %04x: %lx\n", 620 620 + dev_info(pdev, "Quirks match for vid %04x pid %04x: %llx\n", 609 621 le16_to_cpu(dev->descriptor.idVendor), 610 622 le16_to_cpu(dev->descriptor.idProduct), 611 623 us->fflags);

+2 -2

drivers/usb/storage/usb.h

reviewed

··· 95 95 struct usb_interface *pusb_intf; /* this interface */ 96 96 const struct us_unusual_dev *unusual_dev; 97 97 /* device-filter entry */ 98 98 - unsigned long fflags; /* fixed flags from filter */ 98 98 + u64 fflags; /* fixed flags from filter */ 99 99 unsigned long dflags; /* dynamic atomic bitflags */ 100 100 unsigned int send_bulk_pipe; /* cached pipe values */ 101 101 unsigned int recv_bulk_pipe; ··· 192 192 extern void usb_stor_disconnect(struct usb_interface *intf); 193 193 194 194 extern void usb_stor_adjust_quirks(struct usb_device *dev, 195 195 - unsigned long *fflags); 195 195 + u64 *fflags); 196 196 197 197 #define module_usb_stor_driver(__driver, __sht, __name) \ 198 198 static int __init __driver##_init(void) \

+1 -16

drivers/usb/storage/usual-tables.c

reviewed

··· 19 19 vendorName, productName, useProtocol, useTransport, \ 20 20 initFunction, flags) \ 21 21 { USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 22 22 - .driver_info = (flags) } 22 22 + .driver_info = (kernel_ulong_t)(flags) } 23 23 24 24 #define COMPLIANT_DEV UNUSUAL_DEV 25 25 26 26 #define USUAL_DEV(useProto, useTrans) \ 27 27 { USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, useProto, useTrans) } 28 28 - 29 29 - /* Define the device is matched with Vendor ID and interface descriptors */ 30 30 - #define UNUSUAL_VENDOR_INTF(id_vendor, cl, sc, pr, \ 31 31 - vendorName, productName, useProtocol, useTransport, \ 32 32 - initFunction, flags) \ 33 33 - { \ 34 34 - .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ 35 35 - | USB_DEVICE_ID_MATCH_VENDOR, \ 36 36 - .idVendor = (id_vendor), \ 37 37 - .bInterfaceClass = (cl), \ 38 38 - .bInterfaceSubClass = (sc), \ 39 39 - .bInterfaceProtocol = (pr), \ 40 40 - .driver_info = (flags) \ 41 41 - } 42 28 43 29 const struct usb_device_id usb_storage_usb_ids[] = { 44 30 # include "unusual_devs.h" ··· 35 49 #undef UNUSUAL_DEV 36 50 #undef COMPLIANT_DEV 37 51 #undef USUAL_DEV 38 38 - #undef UNUSUAL_VENDOR_INTF 39 52 40 53 /* 41 54 * The table of devices to ignore

+4 -1

drivers/usb/typec/altmodes/displayport.c

reviewed

··· 86 86 87 87 static int dp_altmode_configure(struct dp_altmode *dp, u8 con) 88 88 { 89 89 - u32 conf = DP_CONF_SIGNALING_DP; /* Only DP signaling supported */ 90 89 u8 pin_assign = 0; 90 90 + u32 conf; 91 91 + 92 92 + /* DP Signalling */ 93 93 + conf = (dp->data.conf & DP_CONF_SIGNALLING_MASK) >> DP_CONF_SIGNALLING_SHIFT; 91 94 92 95 switch (con) { 93 96 case DP_STATUS_CON_DISABLED:

+1 -2

drivers/usb/typec/anx7411.c

reviewed

··· 1550 1550 if (plat->workqueue) 1551 1551 destroy_workqueue(plat->workqueue); 1552 1552 1553 1553 - if (plat->spi_client) 1554 1554 - i2c_unregister_device(plat->spi_client); 1553 1553 + i2c_unregister_device(plat->spi_client); 1555 1554 1556 1555 if (plat->typec.role_sw) 1557 1556 usb_role_switch_put(plat->typec.role_sw);

+100 -8

drivers/usb/typec/class.c

reviewed

··· 13 13 #include <linux/usb/pd_vdo.h> 14 14 #include <linux/usb/typec_mux.h> 15 15 #include <linux/usb/typec_retimer.h> 16 16 + #include <linux/usb.h> 16 17 17 18 #include "bus.h" 18 19 #include "class.h" ··· 682 681 .release = typec_partner_release, 683 682 }; 684 683 684 684 + static void typec_partner_link_device(struct typec_partner *partner, struct device *dev) 685 685 + { 686 686 + int ret; 687 687 + 688 688 + ret = sysfs_create_link(&dev->kobj, &partner->dev.kobj, "typec"); 689 689 + if (ret) 690 690 + return; 691 691 + 692 692 + ret = sysfs_create_link(&partner->dev.kobj, &dev->kobj, dev_name(dev)); 693 693 + if (ret) { 694 694 + sysfs_remove_link(&dev->kobj, "typec"); 695 695 + return; 696 696 + } 697 697 + 698 698 + if (partner->attach) 699 699 + partner->attach(partner, dev); 700 700 + } 701 701 + 702 702 + static void typec_partner_unlink_device(struct typec_partner *partner, struct device *dev) 703 703 + { 704 704 + sysfs_remove_link(&partner->dev.kobj, dev_name(dev)); 705 705 + sysfs_remove_link(&dev->kobj, "typec"); 706 706 + 707 707 + if (partner->deattach) 708 708 + partner->deattach(partner, dev); 709 709 + } 710 710 + 685 711 /** 686 712 * typec_partner_set_identity - Report result from Discover Identity command 687 713 * @partner: The partner updated identity values ··· 893 865 partner->num_altmodes = -1; 894 866 partner->pd_revision = desc->pd_revision; 895 867 partner->svdm_version = port->cap->svdm_version; 868 868 + partner->attach = desc->attach; 869 869 + partner->deattach = desc->deattach; 896 870 897 871 if (desc->identity) { 898 872 /* ··· 917 887 return ERR_PTR(ret); 918 888 } 919 889 890 890 + if (port->usb2_dev) 891 891 + typec_partner_link_device(partner, port->usb2_dev); 892 892 + if (port->usb3_dev) 893 893 + typec_partner_link_device(partner, port->usb3_dev); 894 894 + 920 895 return partner; 921 896 } 922 897 EXPORT_SYMBOL_GPL(typec_register_partner); ··· 934 899 */ 935 900 void typec_unregister_partner(struct typec_partner *partner) 936 901 { 937 937 - if (!IS_ERR_OR_NULL(partner)) 938 938 - device_unregister(&partner->dev); 902 902 + struct typec_port *port; 903 903 + 904 904 + if (IS_ERR_OR_NULL(partner)) 905 905 + return; 906 906 + 907 907 + port = to_typec_port(partner->dev.parent); 908 908 + 909 909 + if (port->usb2_dev) 910 910 + typec_partner_unlink_device(partner, port->usb2_dev); 911 911 + if (port->usb3_dev) 912 912 + typec_partner_unlink_device(partner, port->usb3_dev); 913 913 + 914 914 + device_unregister(&partner->dev); 939 915 } 940 916 EXPORT_SYMBOL_GPL(typec_unregister_partner); 941 917 ··· 1821 1775 return is_typec_partner(dev); 1822 1776 } 1823 1777 1778 1778 + static struct typec_partner *typec_get_partner(struct typec_port *port) 1779 1779 + { 1780 1780 + struct device *dev; 1781 1781 + 1782 1782 + dev = device_find_child(&port->dev, NULL, partner_match); 1783 1783 + if (!dev) 1784 1784 + return NULL; 1785 1785 + 1786 1786 + return to_typec_partner(dev); 1787 1787 + } 1788 1788 + 1789 1789 + static void typec_partner_attach(struct typec_connector *con, struct device *dev) 1790 1790 + { 1791 1791 + struct typec_port *port = container_of(con, struct typec_port, con); 1792 1792 + struct typec_partner *partner = typec_get_partner(port); 1793 1793 + struct usb_device *udev = to_usb_device(dev); 1794 1794 + 1795 1795 + if (udev->speed < USB_SPEED_SUPER) 1796 1796 + port->usb2_dev = dev; 1797 1797 + else 1798 1798 + port->usb3_dev = dev; 1799 1799 + 1800 1800 + if (partner) { 1801 1801 + typec_partner_link_device(partner, dev); 1802 1802 + put_device(&partner->dev); 1803 1803 + } 1804 1804 + } 1805 1805 + 1806 1806 + static void typec_partner_deattach(struct typec_connector *con, struct device *dev) 1807 1807 + { 1808 1808 + struct typec_port *port = container_of(con, struct typec_port, con); 1809 1809 + struct typec_partner *partner = typec_get_partner(port); 1810 1810 + 1811 1811 + if (partner) { 1812 1812 + typec_partner_unlink_device(partner, dev); 1813 1813 + put_device(&partner->dev); 1814 1814 + } 1815 1815 + 1816 1816 + if (port->usb2_dev == dev) 1817 1817 + port->usb2_dev = NULL; 1818 1818 + else if (port->usb3_dev == dev) 1819 1819 + port->usb3_dev = NULL; 1820 1820 + } 1821 1821 + 1824 1822 /** 1825 1823 * typec_set_data_role - Report data role change 1826 1824 * @port: The USB Type-C Port where the role was changed ··· 1874 1784 */ 1875 1785 void typec_set_data_role(struct typec_port *port, enum typec_data_role role) 1876 1786 { 1877 1877 - struct device *partner_dev; 1787 1787 + struct typec_partner *partner; 1878 1788 1879 1789 if (port->data_role == role) 1880 1790 return; ··· 1883 1793 sysfs_notify(&port->dev.kobj, NULL, "data_role"); 1884 1794 kobject_uevent(&port->dev.kobj, KOBJ_CHANGE); 1885 1795 1886 1886 - partner_dev = device_find_child(&port->dev, NULL, partner_match); 1887 1887 - if (!partner_dev) 1796 1796 + partner = typec_get_partner(port); 1797 1797 + if (!partner) 1888 1798 return; 1889 1799 1890 1890 - if (to_typec_partner(partner_dev)->identity) 1891 1891 - typec_product_type_notify(partner_dev); 1800 1800 + if (partner->identity) 1801 1801 + typec_product_type_notify(&partner->dev); 1892 1802 1893 1893 - put_device(partner_dev); 1803 1803 + put_device(&partner->dev); 1894 1804 } 1895 1805 EXPORT_SYMBOL_GPL(typec_set_data_role); 1896 1806 ··· 2341 2251 port->ops = cap->ops; 2342 2252 port->port_type = cap->type; 2343 2253 port->prefer_role = cap->prefer_role; 2254 2254 + port->con.attach = typec_partner_attach; 2255 2255 + port->con.deattach = typec_partner_deattach; 2344 2256 2345 2257 device_initialize(&port->dev); 2346 2258 port->dev.class = &typec_class;

+16

drivers/usb/typec/class.h

reviewed

··· 8 8 9 9 struct typec_mux; 10 10 struct typec_switch; 11 11 + struct usb_device; 11 12 12 13 struct typec_plug { 13 14 struct device dev; ··· 36 35 enum usb_pd_svdm_ver svdm_version; 37 36 38 37 struct usb_power_delivery *pd; 38 38 + 39 39 + void (*attach)(struct typec_partner *partner, struct device *dev); 40 40 + void (*deattach)(struct typec_partner *partner, struct device *dev); 39 41 }; 40 42 41 43 struct typec_port { ··· 63 59 64 60 const struct typec_capability *cap; 65 61 const struct typec_operations *ops; 62 62 + 63 63 + struct typec_connector con; 64 64 + 65 65 + /* 66 66 + * REVISIT: Only USB devices for now. If there are others, these need to 67 67 + * be converted into a list. 68 68 + * 69 69 + * NOTE: These may be registered first before the typec_partner, so they 70 70 + * will always have to be kept here instead of struct typec_partner. 71 71 + */ 72 72 + struct device *usb2_dev; 73 73 + struct device *usb3_dev; 66 74 }; 67 75 68 76 #define to_typec_port(_dev_) container_of(_dev_, struct typec_port, dev)

+10

drivers/usb/typec/mux/Kconfig

reviewed

··· 46 46 Say Y or M if your system has a On Semiconductor NB7VPQ904M Type-C 47 47 redriver chip found on some devices with a Type-C port. 48 48 49 49 + config TYPEC_MUX_PTN36502 50 50 + tristate "NXP PTN36502 Type-C redriver driver" 51 51 + depends on I2C 52 52 + depends on DRM || DRM=n 53 53 + select DRM_PANEL_BRIDGE if DRM 54 54 + select REGMAP_I2C 55 55 + help 56 56 + Say Y or M if your system has a NXP PTN36502 Type-C redriver chip 57 57 + found on some devices with a Type-C port. 58 58 + 49 59 endmenu

+1

drivers/usb/typec/mux/Makefile

reviewed

··· 5 5 obj-$(CONFIG_TYPEC_MUX_PI3USB30532) += pi3usb30532.o 6 6 obj-$(CONFIG_TYPEC_MUX_INTEL_PMC) += intel_pmc_mux.o 7 7 obj-$(CONFIG_TYPEC_MUX_NB7VPQ904M) += nb7vpq904m.o 8 8 + obj-$(CONFIG_TYPEC_MUX_PTN36502) += ptn36502.o

+71

drivers/usb/typec/mux/fsa4480.c

reviewed

··· 60 60 unsigned int svid; 61 61 62 62 u8 cur_enable; 63 63 + bool swap_sbu_lanes; 63 64 }; 64 65 65 66 static const struct regmap_config fsa4480_regmap_config = { ··· 76 75 bool reverse = (fsa->orientation == TYPEC_ORIENTATION_REVERSE); 77 76 u8 enable = FSA4480_ENABLE_DEVICE; 78 77 u8 sel = 0; 78 78 + 79 79 + if (fsa->swap_sbu_lanes) 80 80 + reverse = !reverse; 79 81 80 82 /* USB Mode */ 81 83 if (fsa->mode < TYPEC_STATE_MODAL || ··· 183 179 return ret; 184 180 } 185 181 182 182 + enum { 183 183 + NORMAL_LANE_MAPPING, 184 184 + INVERT_LANE_MAPPING, 185 185 + }; 186 186 + 187 187 + #define DATA_LANES_COUNT 2 188 188 + 189 189 + static const int supported_data_lane_mapping[][DATA_LANES_COUNT] = { 190 190 + [NORMAL_LANE_MAPPING] = { 0, 1 }, 191 191 + [INVERT_LANE_MAPPING] = { 1, 0 }, 192 192 + }; 193 193 + 194 194 + static int fsa4480_parse_data_lanes_mapping(struct fsa4480 *fsa) 195 195 + { 196 196 + struct fwnode_handle *ep; 197 197 + u32 data_lanes[DATA_LANES_COUNT]; 198 198 + int ret, i, j; 199 199 + 200 200 + ep = fwnode_graph_get_next_endpoint(dev_fwnode(&fsa->client->dev), NULL); 201 201 + if (!ep) 202 202 + return 0; 203 203 + 204 204 + ret = fwnode_property_read_u32_array(ep, "data-lanes", data_lanes, DATA_LANES_COUNT); 205 205 + if (ret == -EINVAL) 206 206 + /* Property isn't here, consider default mapping */ 207 207 + goto out_done; 208 208 + if (ret) { 209 209 + dev_err(&fsa->client->dev, "invalid data-lanes property: %d\n", ret); 210 210 + goto out_error; 211 211 + } 212 212 + 213 213 + for (i = 0; i < ARRAY_SIZE(supported_data_lane_mapping); i++) { 214 214 + for (j = 0; j < DATA_LANES_COUNT; j++) { 215 215 + if (data_lanes[j] != supported_data_lane_mapping[i][j]) 216 216 + break; 217 217 + } 218 218 + 219 219 + if (j == DATA_LANES_COUNT) 220 220 + break; 221 221 + } 222 222 + 223 223 + switch (i) { 224 224 + case NORMAL_LANE_MAPPING: 225 225 + break; 226 226 + case INVERT_LANE_MAPPING: 227 227 + fsa->swap_sbu_lanes = true; 228 228 + break; 229 229 + default: 230 230 + dev_err(&fsa->client->dev, "invalid data-lanes mapping\n"); 231 231 + ret = -EINVAL; 232 232 + goto out_error; 233 233 + } 234 234 + 235 235 + out_done: 236 236 + ret = 0; 237 237 + 238 238 + out_error: 239 239 + fwnode_handle_put(ep); 240 240 + 241 241 + return ret; 242 242 + } 243 243 + 186 244 static int fsa4480_probe(struct i2c_client *client) 187 245 { 188 246 struct device *dev = &client->dev; 189 247 struct typec_switch_desc sw_desc = { }; 190 248 struct typec_mux_desc mux_desc = { }; 191 249 struct fsa4480 *fsa; 250 250 + int ret; 192 251 193 252 fsa = devm_kzalloc(dev, sizeof(*fsa), GFP_KERNEL); 194 253 if (!fsa) ··· 259 192 260 193 fsa->client = client; 261 194 mutex_init(&fsa->lock); 195 195 + 196 196 + ret = fsa4480_parse_data_lanes_mapping(fsa); 197 197 + if (ret) 198 198 + return ret; 262 199 263 200 fsa->regmap = devm_regmap_init_i2c(client, &fsa4480_regmap_config); 264 201 if (IS_ERR(fsa->regmap))

+25

drivers/usb/typec/mux/intel_pmc_mux.c

reviewed

··· 191 191 return port->orientation - 1; 192 192 } 193 193 194 194 + static bool is_pmc_mux_tbt(struct acpi_device *adev) 195 195 + { 196 196 + return acpi_dev_hid_uid_match(adev, "INTC1072", NULL) || 197 197 + acpi_dev_hid_uid_match(adev, "INTC1079", NULL); 198 198 + } 199 199 + 194 200 static int pmc_usb_send_command(struct intel_scu_ipc_dev *ipc, u8 *msg, u32 len) 195 201 { 196 202 u8 response[4]; ··· 298 292 299 293 req.mode_data |= (state->mode - TYPEC_STATE_MODAL) << 300 294 PMC_USB_ALTMODE_DP_MODE_SHIFT; 295 295 + 296 296 + if (!is_pmc_mux_tbt(port->pmc->iom_adev)) { 297 297 + u8 cable_speed = (data->conf & DP_CONF_SIGNALLING_MASK) >> 298 298 + DP_CONF_SIGNALLING_SHIFT; 299 299 + 300 300 + u8 cable_type = (data->conf & DP_CONF_CABLE_TYPE_MASK) >> 301 301 + DP_CONF_CABLE_TYPE_SHIFT; 302 302 + 303 303 + req.mode_data |= PMC_USB_ALTMODE_CABLE_SPD(cable_speed); 304 304 + 305 305 + if (cable_type == DP_CONF_CABLE_TYPE_OPTICAL) 306 306 + req.mode_data |= PMC_USB_ALTMODE_CABLE_TYPE; 307 307 + else if (cable_type == DP_CONF_CABLE_TYPE_RE_TIMER) 308 308 + req.mode_data |= PMC_USB_ALTMODE_ACTIVE_CABLE | 309 309 + PMC_USB_ALTMODE_RETIMER_CABLE; 310 310 + else if (cable_type == DP_CONF_CABLE_TYPE_RE_DRIVER) 311 311 + req.mode_data |= PMC_USB_ALTMODE_ACTIVE_CABLE; 312 312 + } 301 313 302 314 ret = pmc_usb_command(port, (void *)&req, sizeof(req)); 303 315 if (ret) ··· 623 599 desc.driver_data = port; 624 600 desc.name = fwnode_get_name(fwnode); 625 601 desc.set = pmc_usb_set_role; 602 602 + desc.allow_userspace_control = true; 626 603 627 604 port->usb_sw = usb_role_switch_register(pmc->dev, &desc); 628 605 if (IS_ERR(port->usb_sw)) {

+444

drivers/usb/typec/mux/ptn36502.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0+ 2 2 + /* 3 3 + * NXP PTN36502 Type-C driver 4 4 + * 5 5 + * Copyright (C) 2023 Luca Weiss <luca.weiss@fairphone.com> 6 6 + * 7 7 + * Based on NB7VPQ904M driver: 8 8 + * Copyright (C) 2023 Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 9 9 + */ 10 10 + 11 11 + #include <drm/drm_bridge.h> 12 12 + #include <linux/bitfield.h> 13 13 + #include <linux/i2c.h> 14 14 + #include <linux/kernel.h> 15 15 + #include <linux/module.h> 16 16 + #include <linux/mutex.h> 17 17 + #include <linux/of_graph.h> 18 18 + #include <linux/regmap.h> 19 19 + #include <linux/regulator/consumer.h> 20 20 + #include <linux/usb/typec_dp.h> 21 21 + #include <linux/usb/typec_mux.h> 22 22 + #include <linux/usb/typec_retimer.h> 23 23 + 24 24 + #define PTN36502_CHIP_ID_REG 0x00 25 25 + #define PTN36502_CHIP_ID 0x02 26 26 + 27 27 + #define PTN36502_CHIP_REVISION_REG 0x01 28 28 + #define PTN36502_CHIP_REVISION_BASE_MASK GENMASK(7, 4) 29 29 + #define PTN36502_CHIP_REVISION_METAL_MASK GENMASK(3, 0) 30 30 + 31 31 + #define PTN36502_DP_LINK_CTRL_REG 0x06 32 32 + #define PTN36502_DP_LINK_CTRL_LANES_MASK GENMASK(3, 2) 33 33 + #define PTN36502_DP_LINK_CTRL_LANES_2 (2) 34 34 + #define PTN36502_DP_LINK_CTRL_LANES_4 (3) 35 35 + #define PTN36502_DP_LINK_CTRL_LINK_RATE_MASK GENMASK(1, 0) 36 36 + #define PTN36502_DP_LINK_CTRL_LINK_RATE_5_4GBPS (2) 37 37 + 38 38 + /* Registers for lane 0 (0x07) to lane 3 (0x0a) have the same layout */ 39 39 + #define PTN36502_DP_LANE_CTRL_REG(n) (0x07 + (n)) 40 40 + #define PTN36502_DP_LANE_CTRL_RX_GAIN_MASK GENMASK(6, 4) 41 41 + #define PTN36502_DP_LANE_CTRL_RX_GAIN_3DB (2) 42 42 + #define PTN36502_DP_LANE_CTRL_TX_SWING_MASK GENMASK(3, 2) 43 43 + #define PTN36502_DP_LANE_CTRL_TX_SWING_800MVPPD (2) 44 44 + #define PTN36502_DP_LANE_CTRL_PRE_EMPHASIS_MASK GENMASK(1, 0) 45 45 + #define PTN36502_DP_LANE_CTRL_PRE_EMPHASIS_3_5DB (1) 46 46 + 47 47 + #define PTN36502_MODE_CTRL1_REG 0x0b 48 48 + #define PTN36502_MODE_CTRL1_PLUG_ORIENT_MASK GENMASK(5, 5) 49 49 + #define PTN36502_MODE_CTRL1_PLUG_ORIENT_REVERSE (1) 50 50 + #define PTN36502_MODE_CTRL1_AUX_CROSSBAR_MASK GENMASK(3, 3) 51 51 + #define PTN36502_MODE_CTRL1_AUX_CROSSBAR_SW_ON (1) 52 52 + #define PTN36502_MODE_CTRL1_MODE_MASK GENMASK(2, 0) 53 53 + #define PTN36502_MODE_CTRL1_MODE_OFF (0) 54 54 + #define PTN36502_MODE_CTRL1_MODE_USB_ONLY (1) 55 55 + #define PTN36502_MODE_CTRL1_MODE_USB_DP (2) 56 56 + #define PTN36502_MODE_CTRL1_MODE_DP (3) 57 57 + 58 58 + #define PTN36502_DEVICE_CTRL_REG 0x0d 59 59 + #define PTN36502_DEVICE_CTRL_AUX_MONITORING_MASK GENMASK(7, 7) 60 60 + #define PTN36502_DEVICE_CTRL_AUX_MONITORING_EN (1) 61 61 + 62 62 + struct ptn36502 { 63 63 + struct i2c_client *client; 64 64 + struct regulator *vdd18_supply; 65 65 + struct regmap *regmap; 66 66 + struct typec_switch_dev *sw; 67 67 + struct typec_retimer *retimer; 68 68 + 69 69 + struct typec_switch *typec_switch; 70 70 + 71 71 + struct drm_bridge bridge; 72 72 + 73 73 + struct mutex lock; /* protect non-concurrent retimer & switch */ 74 74 + 75 75 + enum typec_orientation orientation; 76 76 + unsigned long mode; 77 77 + unsigned int svid; 78 78 + }; 79 79 + 80 80 + static int ptn36502_set(struct ptn36502 *ptn) 81 81 + { 82 82 + bool reverse = (ptn->orientation == TYPEC_ORIENTATION_REVERSE); 83 83 + unsigned int ctrl1_val = 0; 84 84 + unsigned int lane_ctrl_val = 0; 85 85 + unsigned int link_ctrl_val = 0; 86 86 + 87 87 + switch (ptn->mode) { 88 88 + case TYPEC_STATE_SAFE: 89 89 + /* Deep power saving state */ 90 90 + regmap_write(ptn->regmap, PTN36502_MODE_CTRL1_REG, 91 91 + FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK, 92 92 + PTN36502_MODE_CTRL1_MODE_OFF)); 93 93 + return 0; 94 94 + 95 95 + case TYPEC_STATE_USB: 96 96 + /* 97 97 + * Normal Orientation (CC1) 98 98 + * A -> USB RX 99 99 + * B -> USB TX 100 100 + * C -> X 101 101 + * D -> X 102 102 + * Flipped Orientation (CC2) 103 103 + * A -> X 104 104 + * B -> X 105 105 + * C -> USB TX 106 106 + * D -> USB RX 107 107 + */ 108 108 + 109 109 + /* USB 3.1 Gen 1 only */ 110 110 + ctrl1_val = FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK, 111 111 + PTN36502_MODE_CTRL1_MODE_USB_ONLY); 112 112 + if (reverse) 113 113 + ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_PLUG_ORIENT_MASK, 114 114 + PTN36502_MODE_CTRL1_PLUG_ORIENT_REVERSE); 115 115 + 116 116 + regmap_write(ptn->regmap, PTN36502_MODE_CTRL1_REG, ctrl1_val); 117 117 + return 0; 118 118 + 119 119 + default: 120 120 + if (ptn->svid != USB_TYPEC_DP_SID) 121 121 + return -EINVAL; 122 122 + 123 123 + break; 124 124 + } 125 125 + 126 126 + /* DP Altmode Setup */ 127 127 + 128 128 + switch (ptn->mode) { 129 129 + case TYPEC_DP_STATE_C: 130 130 + case TYPEC_DP_STATE_E: 131 131 + /* 132 132 + * Normal Orientation (CC1) 133 133 + * A -> DP3 134 134 + * B -> DP2 135 135 + * C -> DP1 136 136 + * D -> DP0 137 137 + * Flipped Orientation (CC2) 138 138 + * A -> DP0 139 139 + * B -> DP1 140 140 + * C -> DP2 141 141 + * D -> DP3 142 142 + */ 143 143 + 144 144 + /* 4-lane DP */ 145 145 + ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK, 146 146 + PTN36502_MODE_CTRL1_MODE_DP); 147 147 + link_ctrl_val |= FIELD_PREP(PTN36502_DP_LINK_CTRL_LANES_MASK, 148 148 + PTN36502_DP_LINK_CTRL_LANES_4); 149 149 + break; 150 150 + 151 151 + case TYPEC_DP_STATE_D: 152 152 + case TYPEC_DP_STATE_F: /* State F is deprecated */ 153 153 + /* 154 154 + * Normal Orientation (CC1) 155 155 + * A -> USB RX 156 156 + * B -> USB TX 157 157 + * C -> DP1 158 158 + * D -> DP0 159 159 + * Flipped Orientation (CC2) 160 160 + * A -> DP0 161 161 + * B -> DP1 162 162 + * C -> USB TX 163 163 + * D -> USB RX 164 164 + */ 165 165 + 166 166 + /* USB 3.1 Gen 1 and 2-lane DP */ 167 167 + ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK, 168 168 + PTN36502_MODE_CTRL1_MODE_USB_DP); 169 169 + link_ctrl_val |= FIELD_PREP(PTN36502_DP_LINK_CTRL_LANES_MASK, 170 170 + PTN36502_DP_LINK_CTRL_LANES_2); 171 171 + break; 172 172 + 173 173 + default: 174 174 + return -EOPNOTSUPP; 175 175 + } 176 176 + 177 177 + /* Enable AUX monitoring */ 178 178 + regmap_write(ptn->regmap, PTN36502_DEVICE_CTRL_REG, 179 179 + FIELD_PREP(PTN36502_DEVICE_CTRL_AUX_MONITORING_MASK, 180 180 + PTN36502_DEVICE_CTRL_AUX_MONITORING_EN)); 181 181 + 182 182 + /* Enable AUX switch path */ 183 183 + ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_AUX_CROSSBAR_MASK, 184 184 + PTN36502_MODE_CTRL1_AUX_CROSSBAR_SW_ON); 185 185 + if (reverse) 186 186 + ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_PLUG_ORIENT_MASK, 187 187 + PTN36502_MODE_CTRL1_PLUG_ORIENT_REVERSE); 188 188 + regmap_write(ptn->regmap, PTN36502_MODE_CTRL1_REG, ctrl1_val); 189 189 + 190 190 + /* DP Link rate: 5.4 Gbps (HBR2) */ 191 191 + link_ctrl_val |= FIELD_PREP(PTN36502_DP_LINK_CTRL_LINK_RATE_MASK, 192 192 + PTN36502_DP_LINK_CTRL_LINK_RATE_5_4GBPS); 193 193 + regmap_write(ptn->regmap, PTN36502_DP_LINK_CTRL_REG, link_ctrl_val); 194 194 + 195 195 + /* 196 196 + * For all lanes: 197 197 + * - Rx equivalization gain: 3 dB 198 198 + * - TX output swing control: 800 mVppd 199 199 + * - Pre-emphasis control: 3.5 dB 200 200 + */ 201 201 + lane_ctrl_val = FIELD_PREP(PTN36502_DP_LANE_CTRL_RX_GAIN_MASK, 202 202 + PTN36502_DP_LANE_CTRL_RX_GAIN_3DB) | 203 203 + FIELD_PREP(PTN36502_DP_LANE_CTRL_TX_SWING_MASK, 204 204 + PTN36502_DP_LANE_CTRL_TX_SWING_800MVPPD) | 205 205 + FIELD_PREP(PTN36502_DP_LANE_CTRL_PRE_EMPHASIS_MASK, 206 206 + PTN36502_DP_LANE_CTRL_PRE_EMPHASIS_3_5DB); 207 207 + regmap_write(ptn->regmap, PTN36502_DP_LANE_CTRL_REG(0), lane_ctrl_val); 208 208 + regmap_write(ptn->regmap, PTN36502_DP_LANE_CTRL_REG(1), lane_ctrl_val); 209 209 + regmap_write(ptn->regmap, PTN36502_DP_LANE_CTRL_REG(2), lane_ctrl_val); 210 210 + regmap_write(ptn->regmap, PTN36502_DP_LANE_CTRL_REG(3), lane_ctrl_val); 211 211 + 212 212 + return 0; 213 213 + } 214 214 + 215 215 + static int ptn36502_sw_set(struct typec_switch_dev *sw, enum typec_orientation orientation) 216 216 + { 217 217 + struct ptn36502 *ptn = typec_switch_get_drvdata(sw); 218 218 + int ret; 219 219 + 220 220 + ret = typec_switch_set(ptn->typec_switch, orientation); 221 221 + if (ret) 222 222 + return ret; 223 223 + 224 224 + mutex_lock(&ptn->lock); 225 225 + 226 226 + if (ptn->orientation != orientation) { 227 227 + ptn->orientation = orientation; 228 228 + 229 229 + ret = ptn36502_set(ptn); 230 230 + } 231 231 + 232 232 + mutex_unlock(&ptn->lock); 233 233 + 234 234 + return ret; 235 235 + } 236 236 + 237 237 + static int ptn36502_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) 238 238 + { 239 239 + struct ptn36502 *ptn = typec_retimer_get_drvdata(retimer); 240 240 + int ret = 0; 241 241 + 242 242 + mutex_lock(&ptn->lock); 243 243 + 244 244 + if (ptn->mode != state->mode) { 245 245 + ptn->mode = state->mode; 246 246 + 247 247 + if (state->alt) 248 248 + ptn->svid = state->alt->svid; 249 249 + else 250 250 + ptn->svid = 0; // No SVID 251 251 + 252 252 + ret = ptn36502_set(ptn); 253 253 + } 254 254 + 255 255 + mutex_unlock(&ptn->lock); 256 256 + 257 257 + return ret; 258 258 + } 259 259 + 260 260 + static int ptn36502_detect(struct ptn36502 *ptn) 261 261 + { 262 262 + struct device *dev = &ptn->client->dev; 263 263 + unsigned int reg_val; 264 264 + int ret; 265 265 + 266 266 + ret = regmap_read(ptn->regmap, PTN36502_CHIP_ID_REG, 267 267 + &reg_val); 268 268 + if (ret < 0) 269 269 + return dev_err_probe(dev, ret, "Failed to read chip ID\n"); 270 270 + 271 271 + if (reg_val != PTN36502_CHIP_ID) 272 272 + return dev_err_probe(dev, -ENODEV, "Unexpected chip ID: %x\n", reg_val); 273 273 + 274 274 + ret = regmap_read(ptn->regmap, PTN36502_CHIP_REVISION_REG, 275 275 + &reg_val); 276 276 + if (ret < 0) 277 277 + return dev_err_probe(dev, ret, "Failed to read chip revision\n"); 278 278 + 279 279 + dev_dbg(dev, "Chip revision: base layer version %lx, metal layer version %lx\n", 280 280 + FIELD_GET(PTN36502_CHIP_REVISION_BASE_MASK, reg_val), 281 281 + FIELD_GET(PTN36502_CHIP_REVISION_METAL_MASK, reg_val)); 282 282 + 283 283 + return 0; 284 284 + } 285 285 + 286 286 + #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DRM_PANEL_BRIDGE) 287 287 + static int ptn36502_bridge_attach(struct drm_bridge *bridge, 288 288 + enum drm_bridge_attach_flags flags) 289 289 + { 290 290 + struct ptn36502 *ptn = container_of(bridge, struct ptn36502, bridge); 291 291 + struct drm_bridge *next_bridge; 292 292 + 293 293 + if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) 294 294 + return -EINVAL; 295 295 + 296 296 + next_bridge = devm_drm_of_get_bridge(&ptn->client->dev, ptn->client->dev.of_node, 0, 0); 297 297 + if (IS_ERR(next_bridge)) { 298 298 + dev_err(&ptn->client->dev, "failed to acquire drm_bridge: %pe\n", next_bridge); 299 299 + return PTR_ERR(next_bridge); 300 300 + } 301 301 + 302 302 + return drm_bridge_attach(bridge->encoder, next_bridge, bridge, 303 303 + DRM_BRIDGE_ATTACH_NO_CONNECTOR); 304 304 + } 305 305 + 306 306 + static const struct drm_bridge_funcs ptn36502_bridge_funcs = { 307 307 + .attach = ptn36502_bridge_attach, 308 308 + }; 309 309 + 310 310 + static int ptn36502_register_bridge(struct ptn36502 *ptn) 311 311 + { 312 312 + ptn->bridge.funcs = &ptn36502_bridge_funcs; 313 313 + ptn->bridge.of_node = ptn->client->dev.of_node; 314 314 + 315 315 + return devm_drm_bridge_add(&ptn->client->dev, &ptn->bridge); 316 316 + } 317 317 + #else 318 318 + static int ptn36502_register_bridge(struct ptn36502 *ptn) 319 319 + { 320 320 + return 0; 321 321 + } 322 322 + #endif 323 323 + 324 324 + static const struct regmap_config ptn36502_regmap = { 325 325 + .max_register = 0x0d, 326 326 + .reg_bits = 8, 327 327 + .val_bits = 8, 328 328 + }; 329 329 + 330 330 + static int ptn36502_probe(struct i2c_client *client) 331 331 + { 332 332 + struct device *dev = &client->dev; 333 333 + struct typec_switch_desc sw_desc = { }; 334 334 + struct typec_retimer_desc retimer_desc = { }; 335 335 + struct ptn36502 *ptn; 336 336 + int ret; 337 337 + 338 338 + ptn = devm_kzalloc(dev, sizeof(*ptn), GFP_KERNEL); 339 339 + if (!ptn) 340 340 + return -ENOMEM; 341 341 + 342 342 + ptn->client = client; 343 343 + 344 344 + ptn->regmap = devm_regmap_init_i2c(client, &ptn36502_regmap); 345 345 + if (IS_ERR(ptn->regmap)) { 346 346 + dev_err(&client->dev, "Failed to allocate register map\n"); 347 347 + return PTR_ERR(ptn->regmap); 348 348 + } 349 349 + 350 350 + ptn->mode = TYPEC_STATE_SAFE; 351 351 + ptn->orientation = TYPEC_ORIENTATION_NONE; 352 352 + 353 353 + mutex_init(&ptn->lock); 354 354 + 355 355 + ptn->vdd18_supply = devm_regulator_get_optional(dev, "vdd18"); 356 356 + if (IS_ERR(ptn->vdd18_supply)) 357 357 + return PTR_ERR(ptn->vdd18_supply); 358 358 + 359 359 + ptn->typec_switch = fwnode_typec_switch_get(dev->fwnode); 360 360 + if (IS_ERR(ptn->typec_switch)) 361 361 + return dev_err_probe(dev, PTR_ERR(ptn->typec_switch), 362 362 + "Failed to acquire orientation-switch\n"); 363 363 + 364 364 + ret = regulator_enable(ptn->vdd18_supply); 365 365 + if (ret) 366 366 + return dev_err_probe(dev, ret, "Failed to enable vdd18\n"); 367 367 + 368 368 + ret = ptn36502_detect(ptn); 369 369 + if (ret) 370 370 + goto err_disable_regulator; 371 371 + 372 372 + ret = ptn36502_register_bridge(ptn); 373 373 + if (ret) 374 374 + goto err_disable_regulator; 375 375 + 376 376 + sw_desc.drvdata = ptn; 377 377 + sw_desc.fwnode = dev->fwnode; 378 378 + sw_desc.set = ptn36502_sw_set; 379 379 + 380 380 + ptn->sw = typec_switch_register(dev, &sw_desc); 381 381 + if (IS_ERR(ptn->sw)) { 382 382 + ret = dev_err_probe(dev, PTR_ERR(ptn->sw), 383 383 + "Failed to register typec switch\n"); 384 384 + goto err_disable_regulator; 385 385 + } 386 386 + 387 387 + retimer_desc.drvdata = ptn; 388 388 + retimer_desc.fwnode = dev->fwnode; 389 389 + retimer_desc.set = ptn36502_retimer_set; 390 390 + 391 391 + ptn->retimer = typec_retimer_register(dev, &retimer_desc); 392 392 + if (IS_ERR(ptn->retimer)) { 393 393 + ret = dev_err_probe(dev, PTR_ERR(ptn->retimer), 394 394 + "Failed to register typec retimer\n"); 395 395 + goto err_switch_unregister; 396 396 + } 397 397 + 398 398 + return 0; 399 399 + 400 400 + err_switch_unregister: 401 401 + typec_switch_unregister(ptn->sw); 402 402 + 403 403 + err_disable_regulator: 404 404 + regulator_disable(ptn->vdd18_supply); 405 405 + 406 406 + return ret; 407 407 + } 408 408 + 409 409 + static void ptn36502_remove(struct i2c_client *client) 410 410 + { 411 411 + struct ptn36502 *ptn = i2c_get_clientdata(client); 412 412 + 413 413 + typec_retimer_unregister(ptn->retimer); 414 414 + typec_switch_unregister(ptn->sw); 415 415 + 416 416 + regulator_disable(ptn->vdd18_supply); 417 417 + } 418 418 + 419 419 + static const struct i2c_device_id ptn36502_table[] = { 420 420 + { "ptn36502" }, 421 421 + { } 422 422 + }; 423 423 + MODULE_DEVICE_TABLE(i2c, ptn36502_table); 424 424 + 425 425 + static const struct of_device_id ptn36502_of_table[] = { 426 426 + { .compatible = "nxp,ptn36502" }, 427 427 + { } 428 428 + }; 429 429 + MODULE_DEVICE_TABLE(of, ptn36502_of_table); 430 430 + 431 431 + static struct i2c_driver ptn36502_driver = { 432 432 + .driver = { 433 433 + .name = "ptn36502", 434 434 + .of_match_table = ptn36502_of_table, 435 435 + }, 436 436 + .probe = ptn36502_probe, 437 437 + .remove = ptn36502_remove, 438 438 + .id_table = ptn36502_table, 439 439 + }; 440 440 + module_i2c_driver(ptn36502_driver); 441 441 + 442 442 + MODULE_AUTHOR("Luca Weiss <luca.weiss@fairphone.com>"); 443 443 + MODULE_DESCRIPTION("NXP PTN36502 Type-C driver"); 444 444 + MODULE_LICENSE("GPL");

+4 -6

drivers/usb/typec/pd.c

reviewed

··· 83 83 } 84 84 static DEVICE_ATTR_RO(unchunked_extended_messages_supported); 85 85 86 86 - /* 87 87 - * REVISIT: Peak Current requires access also to the RDO. 88 86 static ssize_t 89 87 peak_current_show(struct device *dev, struct device_attribute *attr, char *buf) 90 88 { 91 91 - ... 89 89 + return sysfs_emit(buf, "%u\n", (to_pdo(dev)->pdo >> PDO_FIXED_PEAK_CURR_SHIFT) & 3); 92 90 } 93 93 - */ 91 91 + static DEVICE_ATTR_RO(peak_current); 94 92 95 93 static ssize_t 96 94 fast_role_swap_current_show(struct device *dev, struct device_attribute *attr, char *buf) ··· 133 135 &dev_attr_usb_communication_capable.attr, 134 136 &dev_attr_dual_role_data.attr, 135 137 &dev_attr_unchunked_extended_messages_supported.attr, 136 136 - /*&dev_attr_peak_current.attr,*/ 138 138 + &dev_attr_peak_current.attr, 137 139 &dev_attr_voltage.attr, 138 140 &maximum_current_attr.attr, 139 141 NULL ··· 142 144 static umode_t fixed_attr_is_visible(struct kobject *kobj, struct attribute *attr, int n) 143 145 { 144 146 if (to_pdo(kobj_to_dev(kobj))->object_position && 145 145 - /*attr != &dev_attr_peak_current.attr &&*/ 147 147 + attr != &dev_attr_peak_current.attr && 146 148 attr != &dev_attr_voltage.attr && 147 149 attr != &maximum_current_attr.attr && 148 150 attr != &operational_current_attr.attr)

+7 -2

drivers/usb/typec/port-mapper.c

reviewed

··· 8 8 9 9 #include <linux/acpi.h> 10 10 #include <linux/component.h> 11 11 + #include <linux/usb.h> 11 12 12 13 #include "class.h" 13 14 14 15 static int typec_aggregate_bind(struct device *dev) 15 16 { 16 16 - return component_bind_all(dev, NULL); 17 17 + struct typec_port *port = to_typec_port(dev); 18 18 + 19 19 + return component_bind_all(dev, &port->con); 17 20 } 18 21 19 22 static void typec_aggregate_unbind(struct device *dev) 20 23 { 21 21 - component_unbind_all(dev, NULL); 24 24 + struct typec_port *port = to_typec_port(dev); 25 25 + 26 26 + component_unbind_all(dev, &port->con); 22 27 } 23 28 24 29 static const struct component_master_ops typec_aggregate_ops = {

+29 -17

drivers/usb/typec/tcpm/tcpci_rt1711h.c

reviewed

··· 7 7 8 8 #include <linux/bits.h> 9 9 #include <linux/kernel.h> 10 10 + #include <linux/mod_devicetable.h> 10 11 #include <linux/module.h> 11 12 #include <linux/i2c.h> 12 13 #include <linux/interrupt.h> ··· 52 51 /* 1b0 as fixed rx threshold of rd/rp 0.55V, 1b1 depends on RTCRTL4[0] */ 53 52 #define BMCIO_RXDZEN BIT(0) 54 53 54 54 + struct rt1711h_chip_info { 55 55 + u32 rxdz_sel; 56 56 + u16 did; 57 57 + bool enable_pd30_extended_message; 58 58 + }; 59 59 + 55 60 struct rt1711h_chip { 56 61 struct tcpci_data data; 57 62 struct tcpci *tcpci; 58 63 struct device *dev; 59 64 struct regulator *vbus; 65 65 + const struct rt1711h_chip_info *info; 60 66 bool src_en; 61 61 - u16 did; 62 67 }; 63 68 64 69 static int rt1711h_read16(struct rt1711h_chip *chip, unsigned int reg, u16 *val) ··· 112 105 return ret; 113 106 114 107 /* Enable PD30 extended message for RT1715 */ 115 115 - if (chip->did == RT1715_DID) { 108 108 + if (chip->info->enable_pd30_extended_message) { 116 109 ret = regmap_update_bits(regmap, RT1711H_RTCTRL8, 117 110 RT1711H_ENEXTMSG, RT1711H_ENEXTMSG); 118 111 if (ret < 0) ··· 207 200 if ((cc1 >= TYPEC_CC_RP_1_5 && cc2 < TYPEC_CC_RP_DEF) || 208 201 (cc2 >= TYPEC_CC_RP_1_5 && cc1 < TYPEC_CC_RP_DEF)) { 209 202 rxdz_en = BMCIO_RXDZEN; 210 210 - if (chip->did == RT1715_DID) 211 211 - rxdz_sel = RT1711H_BMCIO_RXDZSEL; 212 212 - else 213 213 - rxdz_sel = 0; 203 203 + rxdz_sel = chip->info->rxdz_sel; 214 204 } else { 215 205 rxdz_en = 0; 216 206 rxdz_sel = RT1711H_BMCIO_RXDZSEL; ··· 323 319 ret = i2c_smbus_read_word_data(i2c, TCPC_BCD_DEV); 324 320 if (ret < 0) 325 321 return ret; 326 326 - if (ret != chip->did) { 322 322 + if (ret != chip->info->did) { 327 323 dev_err(&i2c->dev, "did is not correct, 0x%04x\n", ret); 328 324 return -ENODEV; 329 325 } ··· 340 336 if (!chip) 341 337 return -ENOMEM; 342 338 343 343 - chip->did = (size_t)device_get_match_data(&client->dev); 339 339 + chip->info = i2c_get_match_data(client); 344 340 345 341 ret = rt1711h_check_revision(client, chip); 346 342 if (ret < 0) { ··· 395 391 tcpci_unregister_port(chip->tcpci); 396 392 } 397 393 394 394 + static const struct rt1711h_chip_info rt1711h = { 395 395 + .did = RT1711H_DID, 396 396 + }; 397 397 + 398 398 + static const struct rt1711h_chip_info rt1715 = { 399 399 + .rxdz_sel = RT1711H_BMCIO_RXDZSEL, 400 400 + .did = RT1715_DID, 401 401 + .enable_pd30_extended_message = true, 402 402 + }; 403 403 + 398 404 static const struct i2c_device_id rt1711h_id[] = { 399 399 - { "rt1711h", 0 }, 400 400 - { "rt1715", 0 }, 401 401 - { } 405 405 + { "rt1711h", (kernel_ulong_t)&rt1711h }, 406 406 + { "rt1715", (kernel_ulong_t)&rt1715 }, 407 407 + {} 402 408 }; 403 409 MODULE_DEVICE_TABLE(i2c, rt1711h_id); 404 410 405 405 - #ifdef CONFIG_OF 406 411 static const struct of_device_id rt1711h_of_match[] = { 407 407 - { .compatible = "richtek,rt1711h", .data = (void *)RT1711H_DID }, 408 408 - { .compatible = "richtek,rt1715", .data = (void *)RT1715_DID }, 409 409 - {}, 412 412 + { .compatible = "richtek,rt1711h", .data = &rt1711h }, 413 413 + { .compatible = "richtek,rt1715", .data = &rt1715 }, 414 414 + {} 410 415 }; 411 416 MODULE_DEVICE_TABLE(of, rt1711h_of_match); 412 412 - #endif 413 417 414 418 static struct i2c_driver rt1711h_i2c_driver = { 415 419 .driver = { 416 420 .name = "rt1711h", 417 417 - .of_match_table = of_match_ptr(rt1711h_of_match), 421 421 + .of_match_table = rt1711h_of_match, 418 422 }, 419 423 .probe = rt1711h_probe, 420 424 .remove = rt1711h_remove,

+7 -2

drivers/usb/typec/tcpm/tcpm.c

reviewed

··· 517 517 ((cc) == TYPEC_CC_RP_DEF || (cc) == TYPEC_CC_RP_1_5 || \ 518 518 (cc) == TYPEC_CC_RP_3_0) 519 519 520 520 + /* As long as cc is pulled up, we can consider it as sink. */ 520 521 #define tcpm_port_is_sink(port) \ 521 521 - ((tcpm_cc_is_sink((port)->cc1) && !tcpm_cc_is_sink((port)->cc2)) || \ 522 522 - (tcpm_cc_is_sink((port)->cc2) && !tcpm_cc_is_sink((port)->cc1))) 522 522 + (tcpm_cc_is_sink((port)->cc1) || tcpm_cc_is_sink((port)->cc2)) 523 523 524 524 #define tcpm_cc_is_source(cc) ((cc) == TYPEC_CC_RD) 525 525 #define tcpm_cc_is_audio(cc) ((cc) == TYPEC_CC_RA) ··· 1623 1623 switch (cmd) { 1624 1624 case CMD_DISCOVER_IDENT: 1625 1625 if (PD_VDO_VID(p[0]) != USB_SID_PD) 1626 1626 + break; 1627 1627 + 1628 1628 + if (IS_ERR_OR_NULL(port->partner)) 1626 1629 break; 1627 1630 1628 1631 if (PD_VDO_SVDM_VER(p[0]) < svdm_version) { ··· 3906 3903 port->potential_contaminant = ((port->enter_state == SRC_ATTACH_WAIT && 3907 3904 port->state == SRC_UNATTACHED) || 3908 3905 (port->enter_state == SNK_ATTACH_WAIT && 3906 3906 + port->state == SNK_UNATTACHED) || 3907 3907 + (port->enter_state == SNK_DEBOUNCED && 3909 3908 port->state == SNK_UNATTACHED)); 3910 3909 3911 3910 port->enter_state = port->state;

+590 -104

drivers/usb/typec/tipd/core.c

reviewed

··· 17 17 #include <linux/usb/typec_altmode.h> 18 18 #include <linux/usb/role.h> 19 19 #include <linux/workqueue.h> 20 20 + #include <linux/firmware.h> 20 21 21 22 #include "tps6598x.h" 22 23 #include "trace.h" ··· 37 36 #define TPS_REG_STATUS 0x1a 38 37 #define TPS_REG_SYSTEM_CONF 0x28 39 38 #define TPS_REG_CTRL_CONF 0x29 39 39 + #define TPS_REG_BOOT_STATUS 0x2D 40 40 #define TPS_REG_POWER_STATUS 0x3f 41 41 + #define TPS_REG_PD_STATUS 0x40 41 42 #define TPS_REG_RX_IDENTITY_SOP 0x48 42 43 #define TPS_REG_DATA_STATUS 0x5f 44 44 + #define TPS_REG_SLEEP_CONF 0x70 43 45 44 46 /* TPS_REG_SYSTEM_CONF bits */ 45 47 #define TPS_SYSCONF_PORTINFO(c) ((c) & 7) 48 48 + 49 49 + /* 50 50 + * BPMs task timeout, recommended 5 seconds 51 51 + * pg.48 TPS2575 Host Interface Technical Reference 52 52 + * Manual (Rev. A) 53 53 + * https://www.ti.com/lit/ug/slvuc05a/slvuc05a.pdf 54 54 + */ 55 55 + #define TPS_BUNDLE_TIMEOUT 0x32 56 56 + 57 57 + /* BPMs return code */ 58 58 + #define TPS_TASK_BPMS_INVALID_BUNDLE_SIZE 0x4 59 59 + #define TPS_TASK_BPMS_INVALID_SLAVE_ADDR 0x5 60 60 + #define TPS_TASK_BPMS_INVALID_TIMEOUT 0x6 61 61 + 62 62 + /* PBMc data out */ 63 63 + #define TPS_PBMC_RC 0 /* Return code */ 64 64 + #define TPS_PBMC_DPCS 2 /* device patch complete status */ 46 65 47 66 enum { 48 67 TPS_PORTINFO_SINK, ··· 89 68 TPS_MODE_BOOT, 90 69 TPS_MODE_BIST, 91 70 TPS_MODE_DISC, 71 71 + TPS_MODE_PTCH, 92 72 }; 93 73 94 74 static const char *const modes[] = { ··· 97 75 [TPS_MODE_BOOT] = "BOOT", 98 76 [TPS_MODE_BIST] = "BIST", 99 77 [TPS_MODE_DISC] = "DISC", 78 78 + [TPS_MODE_PTCH] = "PTCH", 100 79 }; 101 80 102 81 /* Unrecognized commands will be replaced with "!CMD" */ 103 82 #define INVALID_CMD(_cmd_) (_cmd_ == 0x444d4321) 83 83 + 84 84 + struct tps6598x; 85 85 + 86 86 + struct tipd_data { 87 87 + irq_handler_t irq_handler; 88 88 + int (*register_port)(struct tps6598x *tps, struct fwnode_handle *node); 89 89 + void (*trace_power_status)(u16 status); 90 90 + void (*trace_status)(u32 status); 91 91 + int (*apply_patch)(struct tps6598x *tps); 92 92 + }; 104 93 105 94 struct tps6598x { 106 95 struct device *dev; ··· 130 97 enum power_supply_usb_type usb_type; 131 98 132 99 int wakeup; 100 100 + u32 status; /* status reg */ 133 101 u16 pwr_status; 134 102 struct delayed_work wq_poll; 135 135 - irq_handler_t irq_handler; 103 103 + 104 104 + const struct tipd_data *data; 136 105 }; 137 106 138 107 static enum power_supply_property tps6598x_psy_props[] = { ··· 213 178 static inline int tps6598x_read64(struct tps6598x *tps, u8 reg, u64 *val) 214 179 { 215 180 return tps6598x_block_read(tps, reg, val, sizeof(u64)); 181 181 + } 182 182 + 183 183 + static inline int tps6598x_write8(struct tps6598x *tps, u8 reg, u8 val) 184 184 + { 185 185 + return tps6598x_block_write(tps, reg, &val, sizeof(u8)); 216 186 } 217 187 218 188 static inline int tps6598x_write64(struct tps6598x *tps, u8 reg, u64 val) ··· 322 282 power_supply_changed(tps->psy); 323 283 } 324 284 325 325 - static int tps6598x_exec_cmd(struct tps6598x *tps, const char *cmd, 285 285 + static int tps6598x_exec_cmd_tmo(struct tps6598x *tps, const char *cmd, 326 286 size_t in_len, u8 *in_data, 327 327 - size_t out_len, u8 *out_data) 287 287 + size_t out_len, u8 *out_data, 288 288 + u32 cmd_timeout_ms, u32 res_delay_ms) 328 289 { 329 290 unsigned long timeout; 330 291 u32 val; ··· 348 307 if (ret < 0) 349 308 return ret; 350 309 351 351 - /* XXX: Using 1s for now, but it may not be enough for every command. */ 352 352 - timeout = jiffies + msecs_to_jiffies(1000); 310 310 + timeout = jiffies + msecs_to_jiffies(cmd_timeout_ms); 353 311 354 312 do { 355 313 ret = tps6598x_read32(tps, TPS_REG_CMD1, &val); ··· 360 320 if (time_is_before_jiffies(timeout)) 361 321 return -ETIMEDOUT; 362 322 } while (val); 323 323 + 324 324 + /* some commands require delay for the result to be available */ 325 325 + mdelay(res_delay_ms); 363 326 364 327 if (out_len) { 365 328 ret = tps6598x_block_read(tps, TPS_REG_DATA1, ··· 386 343 } 387 344 388 345 return 0; 346 346 + } 347 347 + 348 348 + static int tps6598x_exec_cmd(struct tps6598x *tps, const char *cmd, 349 349 + size_t in_len, u8 *in_data, 350 350 + size_t out_len, u8 *out_data) 351 351 + { 352 352 + return tps6598x_exec_cmd_tmo(tps, cmd, in_len, in_data, 353 353 + out_len, out_data, 1000, 0); 389 354 } 390 355 391 356 static int tps6598x_dr_set(struct typec_port *port, enum typec_data_role role) ··· 470 419 dev_err(tps->dev, "%s: failed to read status\n", __func__); 471 420 return false; 472 421 } 473 473 - trace_tps6598x_status(*status); 422 422 + 423 423 + if (tps->data->trace_status) 424 424 + tps->data->trace_status(*status); 474 425 475 426 return true; 476 427 } ··· 503 450 return false; 504 451 } 505 452 tps->pwr_status = pwr_status; 506 506 - trace_tps6598x_power_status(pwr_status); 453 453 + 454 454 + if (tps->data->trace_power_status) 455 455 + tps->data->trace_power_status(pwr_status); 507 456 508 457 return true; 509 458 } ··· 568 513 return IRQ_NONE; 569 514 } 570 515 516 516 + static bool tps6598x_has_role_changed(struct tps6598x *tps, u32 status) 517 517 + { 518 518 + status ^= tps->status; 519 519 + 520 520 + return status & (TPS_STATUS_PORTROLE | TPS_STATUS_DATAROLE); 521 521 + } 522 522 + 523 523 + static irqreturn_t tps25750_interrupt(int irq, void *data) 524 524 + { 525 525 + struct tps6598x *tps = data; 526 526 + u64 event[2] = { }; 527 527 + u32 status; 528 528 + int ret; 529 529 + 530 530 + mutex_lock(&tps->lock); 531 531 + 532 532 + ret = tps6598x_block_read(tps, TPS_REG_INT_EVENT1, event, 11); 533 533 + if (ret) { 534 534 + dev_err(tps->dev, "%s: failed to read events\n", __func__); 535 535 + goto err_unlock; 536 536 + } 537 537 + trace_tps25750_irq(event[0]); 538 538 + 539 539 + if (!(event[0] | event[1])) 540 540 + goto err_unlock; 541 541 + 542 542 + if (!tps6598x_read_status(tps, &status)) 543 543 + goto err_clear_ints; 544 544 + 545 545 + if ((event[0] | event[1]) & TPS_REG_INT_POWER_STATUS_UPDATE) 546 546 + if (!tps6598x_read_power_status(tps)) 547 547 + goto err_clear_ints; 548 548 + 549 549 + if ((event[0] | event[1]) & TPS_REG_INT_DATA_STATUS_UPDATE) 550 550 + if (!tps6598x_read_data_status(tps)) 551 551 + goto err_clear_ints; 552 552 + 553 553 + /* 554 554 + * data/port roles could be updated independently after 555 555 + * a plug event. Therefore, we need to check 556 556 + * for pr/dr status change to set TypeC dr/pr accordingly. 557 557 + */ 558 558 + if ((event[0] | event[1]) & TPS_REG_INT_PLUG_EVENT || 559 559 + tps6598x_has_role_changed(tps, status)) 560 560 + tps6598x_handle_plug_event(tps, status); 561 561 + 562 562 + tps->status = status; 563 563 + 564 564 + err_clear_ints: 565 565 + tps6598x_block_write(tps, TPS_REG_INT_CLEAR1, event, 11); 566 566 + 567 567 + err_unlock: 568 568 + mutex_unlock(&tps->lock); 569 569 + 570 570 + if (event[0] | event[1]) 571 571 + return IRQ_HANDLED; 572 572 + return IRQ_NONE; 573 573 + } 574 574 + 571 575 static irqreturn_t tps6598x_interrupt(int irq, void *data) 572 576 { 573 577 struct tps6598x *tps = data; ··· 682 568 struct tps6598x *tps = container_of(to_delayed_work(work), 683 569 struct tps6598x, wq_poll); 684 570 685 685 - tps->irq_handler(0, tps); 571 571 + tps->data->irq_handler(0, tps); 686 572 queue_delayed_work(system_power_efficient_wq, 687 573 &tps->wq_poll, msecs_to_jiffies(POLL_INTERVAL)); 688 574 } ··· 696 582 if (ret) 697 583 return ret; 698 584 699 699 - switch (match_string(modes, ARRAY_SIZE(modes), mode)) { 585 585 + ret = match_string(modes, ARRAY_SIZE(modes), mode); 586 586 + 587 587 + switch (ret) { 700 588 case TPS_MODE_APP: 701 701 - return 0; 589 589 + case TPS_MODE_PTCH: 590 590 + return ret; 702 591 case TPS_MODE_BOOT: 703 592 dev_warn(tps->dev, "dead-battery condition\n"); 704 704 - return 0; 593 593 + return ret; 705 594 case TPS_MODE_BIST: 706 595 case TPS_MODE_DISC: 707 596 default: ··· 814 697 return PTR_ERR_OR_ZERO(tps->psy); 815 698 } 816 699 817 817 - static int tps6598x_probe(struct i2c_client *client) 700 700 + static int 701 701 + tps6598x_register_port(struct tps6598x *tps, struct fwnode_handle *fwnode) 818 702 { 819 819 - irq_handler_t irq_handler = tps6598x_interrupt; 820 820 - struct device_node *np = client->dev.of_node; 821 821 - struct typec_capability typec_cap = { }; 822 822 - struct tps6598x *tps; 823 823 - struct fwnode_handle *fwnode; 824 824 - u32 status; 825 825 - u32 conf; 826 826 - u32 vid; 827 703 int ret; 828 828 - u64 mask1; 829 829 - 830 830 - tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); 831 831 - if (!tps) 832 832 - return -ENOMEM; 833 833 - 834 834 - mutex_init(&tps->lock); 835 835 - tps->dev = &client->dev; 836 836 - 837 837 - tps->regmap = devm_regmap_init_i2c(client, &tps6598x_regmap_config); 838 838 - if (IS_ERR(tps->regmap)) 839 839 - return PTR_ERR(tps->regmap); 840 840 - 841 841 - ret = tps6598x_read32(tps, TPS_REG_VID, &vid); 842 842 - if (ret < 0 || !vid) 843 843 - return -ENODEV; 844 844 - 845 845 - /* 846 846 - * Checking can the adapter handle SMBus protocol. If it can not, the 847 847 - * driver needs to take care of block reads separately. 848 848 - */ 849 849 - if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 850 850 - tps->i2c_protocol = true; 851 851 - 852 852 - if (np && of_device_is_compatible(np, "apple,cd321x")) { 853 853 - /* Switch CD321X chips to the correct system power state */ 854 854 - ret = cd321x_switch_power_state(tps, TPS_SYSTEM_POWER_STATE_S0); 855 855 - if (ret) 856 856 - return ret; 857 857 - 858 858 - /* CD321X chips have all interrupts masked initially */ 859 859 - mask1 = APPLE_CD_REG_INT_POWER_STATUS_UPDATE | 860 860 - APPLE_CD_REG_INT_DATA_STATUS_UPDATE | 861 861 - APPLE_CD_REG_INT_PLUG_EVENT; 862 862 - 863 863 - irq_handler = cd321x_interrupt; 864 864 - } else { 865 865 - /* Enable power status, data status and plug event interrupts */ 866 866 - mask1 = TPS_REG_INT_POWER_STATUS_UPDATE | 867 867 - TPS_REG_INT_DATA_STATUS_UPDATE | 868 868 - TPS_REG_INT_PLUG_EVENT; 869 869 - } 870 870 - 871 871 - tps->irq_handler = irq_handler; 872 872 - /* Make sure the controller has application firmware running */ 873 873 - ret = tps6598x_check_mode(tps); 874 874 - if (ret) 875 875 - return ret; 876 876 - 877 877 - ret = tps6598x_write64(tps, TPS_REG_INT_MASK1, mask1); 878 878 - if (ret) 879 879 - return ret; 880 880 - 881 881 - ret = tps6598x_read32(tps, TPS_REG_STATUS, &status); 882 882 - if (ret < 0) 883 883 - goto err_clear_mask; 884 884 - trace_tps6598x_status(status); 704 704 + u32 conf; 705 705 + struct typec_capability typec_cap = { }; 885 706 886 707 ret = tps6598x_read32(tps, TPS_REG_SYSTEM_CONF, &conf); 887 887 - if (ret < 0) 888 888 - goto err_clear_mask; 889 889 - 890 890 - /* 891 891 - * This fwnode has a "compatible" property, but is never populated as a 892 892 - * struct device. Instead we simply parse it to read the properties. 893 893 - * This breaks fw_devlink=on. To maintain backward compatibility 894 894 - * with existing DT files, we work around this by deleting any 895 895 - * fwnode_links to/from this fwnode. 896 896 - */ 897 897 - fwnode = device_get_named_child_node(&client->dev, "connector"); 898 898 - if (fwnode) 899 899 - fw_devlink_purge_absent_suppliers(fwnode); 900 900 - 901 901 - tps->role_sw = fwnode_usb_role_switch_get(fwnode); 902 902 - if (IS_ERR(tps->role_sw)) { 903 903 - ret = PTR_ERR(tps->role_sw); 904 904 - goto err_fwnode_put; 905 905 - } 708 708 + if (ret) 709 709 + return ret; 906 710 907 711 typec_cap.revision = USB_TYPEC_REV_1_2; 908 712 typec_cap.pd_revision = 0x200; ··· 856 818 typec_cap.data = TYPEC_PORT_DFP; 857 819 break; 858 820 default: 821 821 + return -ENODEV; 822 822 + } 823 823 + 824 824 + tps->port = typec_register_port(tps->dev, &typec_cap); 825 825 + if (IS_ERR(tps->port)) 826 826 + return PTR_ERR(tps->port); 827 827 + 828 828 + return 0; 829 829 + } 830 830 + 831 831 + static int 832 832 + tps25750_write_firmware(struct tps6598x *tps, 833 833 + u8 bpms_addr, const u8 *data, size_t len) 834 834 + { 835 835 + struct i2c_client *client = to_i2c_client(tps->dev); 836 836 + int ret; 837 837 + u8 slave_addr; 838 838 + int timeout; 839 839 + 840 840 + slave_addr = client->addr; 841 841 + timeout = client->adapter->timeout; 842 842 + 843 843 + /* 844 844 + * binary configuration size is around ~16Kbytes 845 845 + * which might take some time to finish writing it 846 846 + */ 847 847 + client->adapter->timeout = msecs_to_jiffies(5000); 848 848 + client->addr = bpms_addr; 849 849 + 850 850 + ret = regmap_raw_write(tps->regmap, data[0], &data[1], len - 1); 851 851 + 852 852 + client->addr = slave_addr; 853 853 + client->adapter->timeout = timeout; 854 854 + 855 855 + return ret; 856 856 + } 857 857 + 858 858 + static int 859 859 + tps25750_exec_pbms(struct tps6598x *tps, u8 *in_data, size_t in_len) 860 860 + { 861 861 + int ret; 862 862 + u8 rc; 863 863 + 864 864 + ret = tps6598x_exec_cmd_tmo(tps, "PBMs", in_len, in_data, 865 865 + sizeof(rc), &rc, 4000, 0); 866 866 + if (ret) 867 867 + return ret; 868 868 + 869 869 + switch (rc) { 870 870 + case TPS_TASK_BPMS_INVALID_BUNDLE_SIZE: 871 871 + dev_err(tps->dev, "%s: invalid fw size\n", __func__); 872 872 + return -EINVAL; 873 873 + case TPS_TASK_BPMS_INVALID_SLAVE_ADDR: 874 874 + dev_err(tps->dev, "%s: invalid slave address\n", __func__); 875 875 + return -EINVAL; 876 876 + case TPS_TASK_BPMS_INVALID_TIMEOUT: 877 877 + dev_err(tps->dev, "%s: timed out\n", __func__); 878 878 + return -ETIMEDOUT; 879 879 + default: 880 880 + break; 881 881 + } 882 882 + 883 883 + return 0; 884 884 + } 885 885 + 886 886 + static int tps25750_abort_patch_process(struct tps6598x *tps) 887 887 + { 888 888 + int ret; 889 889 + 890 890 + ret = tps6598x_exec_cmd(tps, "PBMe", 0, NULL, 0, NULL); 891 891 + if (ret) 892 892 + return ret; 893 893 + 894 894 + ret = tps6598x_check_mode(tps); 895 895 + if (ret != TPS_MODE_PTCH) 896 896 + dev_err(tps->dev, "failed to switch to \"PTCH\" mode\n"); 897 897 + 898 898 + return ret; 899 899 + } 900 900 + 901 901 + static int tps25750_start_patch_burst_mode(struct tps6598x *tps) 902 902 + { 903 903 + int ret; 904 904 + const struct firmware *fw; 905 905 + const char *firmware_name; 906 906 + struct { 907 907 + u32 fw_size; 908 908 + u8 addr; 909 909 + u8 timeout; 910 910 + } __packed bpms_data; 911 911 + u32 addr; 912 912 + struct device_node *np = tps->dev->of_node; 913 913 + 914 914 + ret = device_property_read_string(tps->dev, "firmware-name", 915 915 + &firmware_name); 916 916 + if (ret) 917 917 + return ret; 918 918 + 919 919 + ret = request_firmware(&fw, firmware_name, tps->dev); 920 920 + if (ret) { 921 921 + dev_err(tps->dev, "failed to retrieve \"%s\"\n", firmware_name); 922 922 + return ret; 923 923 + } 924 924 + 925 925 + if (fw->size == 0) { 926 926 + ret = -EINVAL; 927 927 + goto release_fw; 928 928 + } 929 929 + 930 930 + ret = of_property_match_string(np, "reg-names", "patch-address"); 931 931 + if (ret < 0) { 932 932 + dev_err(tps->dev, "failed to get patch-address %d\n", ret); 933 933 + return ret; 934 934 + } 935 935 + 936 936 + ret = of_property_read_u32_index(np, "reg", ret, &addr); 937 937 + if (ret) 938 938 + return ret; 939 939 + 940 940 + if (addr == 0 || (addr >= 0x20 && addr <= 0x23)) { 941 941 + dev_err(tps->dev, "wrong patch address %u\n", addr); 942 942 + return -EINVAL; 943 943 + } 944 944 + 945 945 + bpms_data.addr = (u8)addr; 946 946 + bpms_data.fw_size = fw->size; 947 947 + bpms_data.timeout = TPS_BUNDLE_TIMEOUT; 948 948 + 949 949 + ret = tps25750_exec_pbms(tps, (u8 *)&bpms_data, sizeof(bpms_data)); 950 950 + if (ret) 951 951 + goto release_fw; 952 952 + 953 953 + ret = tps25750_write_firmware(tps, bpms_data.addr, fw->data, fw->size); 954 954 + if (ret) { 955 955 + dev_err(tps->dev, "Failed to write patch %s of %zu bytes\n", 956 956 + firmware_name, fw->size); 957 957 + goto release_fw; 958 958 + } 959 959 + 960 960 + /* 961 961 + * A delay of 500us is required after the firmware is written 962 962 + * based on pg.62 in tps6598x Host Interface Technical 963 963 + * Reference Manual 964 964 + * https://www.ti.com/lit/ug/slvuc05a/slvuc05a.pdf 965 965 + */ 966 966 + udelay(500); 967 967 + 968 968 + release_fw: 969 969 + release_firmware(fw); 970 970 + 971 971 + return ret; 972 972 + } 973 973 + 974 974 + static int tps25750_complete_patch_process(struct tps6598x *tps) 975 975 + { 976 976 + int ret; 977 977 + u8 out_data[40]; 978 978 + u8 dummy[2] = { }; 979 979 + 980 980 + /* 981 981 + * Without writing something to DATA_IN, this command would 982 982 + * return an error 983 983 + */ 984 984 + ret = tps6598x_exec_cmd_tmo(tps, "PBMc", sizeof(dummy), dummy, 985 985 + sizeof(out_data), out_data, 2000, 20); 986 986 + if (ret) 987 987 + return ret; 988 988 + 989 989 + if (out_data[TPS_PBMC_RC]) { 990 990 + dev_err(tps->dev, 991 991 + "%s: pbmc failed: %u\n", __func__, 992 992 + out_data[TPS_PBMC_RC]); 993 993 + return -EIO; 994 994 + } 995 995 + 996 996 + if (out_data[TPS_PBMC_DPCS]) { 997 997 + dev_err(tps->dev, 998 998 + "%s: failed device patch complete status: %u\n", 999 999 + __func__, out_data[TPS_PBMC_DPCS]); 1000 1000 + return -EIO; 1001 1001 + } 1002 1002 + 1003 1003 + return 0; 1004 1004 + } 1005 1005 + 1006 1006 + static int tps25750_apply_patch(struct tps6598x *tps) 1007 1007 + { 1008 1008 + int ret; 1009 1009 + unsigned long timeout; 1010 1010 + u64 status = 0; 1011 1011 + 1012 1012 + ret = tps6598x_block_read(tps, TPS_REG_BOOT_STATUS, &status, 5); 1013 1013 + if (ret) 1014 1014 + return ret; 1015 1015 + /* 1016 1016 + * Nothing to be done if the configuration 1017 1017 + * is being loaded from EERPOM 1018 1018 + */ 1019 1019 + if (status & TPS_BOOT_STATUS_I2C_EEPROM_PRESENT) 1020 1020 + goto wait_for_app; 1021 1021 + 1022 1022 + ret = tps25750_start_patch_burst_mode(tps); 1023 1023 + if (ret) { 1024 1024 + tps25750_abort_patch_process(tps); 1025 1025 + return ret; 1026 1026 + } 1027 1027 + 1028 1028 + ret = tps25750_complete_patch_process(tps); 1029 1029 + if (ret) 1030 1030 + return ret; 1031 1031 + 1032 1032 + wait_for_app: 1033 1033 + timeout = jiffies + msecs_to_jiffies(1000); 1034 1034 + 1035 1035 + do { 1036 1036 + ret = tps6598x_check_mode(tps); 1037 1037 + if (ret < 0) 1038 1038 + return ret; 1039 1039 + 1040 1040 + if (time_is_before_jiffies(timeout)) 1041 1041 + return -ETIMEDOUT; 1042 1042 + 1043 1043 + } while (ret != TPS_MODE_APP); 1044 1044 + 1045 1045 + /* 1046 1046 + * The dead battery flag may be triggered when the controller 1047 1047 + * port is connected to a device that can source power and 1048 1048 + * attempts to power up both the controller and the board it is on. 1049 1049 + * To restore controller functionality, it is necessary to clear 1050 1050 + * this flag 1051 1051 + */ 1052 1052 + if (status & TPS_BOOT_STATUS_DEAD_BATTERY_FLAG) { 1053 1053 + ret = tps6598x_exec_cmd(tps, "DBfg", 0, NULL, 0, NULL); 1054 1054 + if (ret) { 1055 1055 + dev_err(tps->dev, "failed to clear dead battery %d\n", ret); 1056 1056 + return ret; 1057 1057 + } 1058 1058 + } 1059 1059 + 1060 1060 + dev_info(tps->dev, "controller switched to \"APP\" mode\n"); 1061 1061 + 1062 1062 + return 0; 1063 1063 + }; 1064 1064 + 1065 1065 + static int tps25750_init(struct tps6598x *tps) 1066 1066 + { 1067 1067 + int ret; 1068 1068 + 1069 1069 + ret = tps->data->apply_patch(tps); 1070 1070 + if (ret) 1071 1071 + return ret; 1072 1072 + 1073 1073 + ret = tps6598x_write8(tps, TPS_REG_SLEEP_CONF, 1074 1074 + TPS_SLEEP_CONF_SLEEP_MODE_ALLOWED); 1075 1075 + if (ret) 1076 1076 + dev_warn(tps->dev, 1077 1077 + "%s: failed to enable sleep mode: %d\n", 1078 1078 + __func__, ret); 1079 1079 + 1080 1080 + return 0; 1081 1081 + } 1082 1082 + 1083 1083 + static int 1084 1084 + tps25750_register_port(struct tps6598x *tps, struct fwnode_handle *fwnode) 1085 1085 + { 1086 1086 + struct typec_capability typec_cap = { }; 1087 1087 + const char *data_role; 1088 1088 + u8 pd_status; 1089 1089 + int ret; 1090 1090 + 1091 1091 + ret = tps6598x_read8(tps, TPS_REG_PD_STATUS, &pd_status); 1092 1092 + if (ret) 1093 1093 + return ret; 1094 1094 + 1095 1095 + ret = fwnode_property_read_string(fwnode, "data-role", &data_role); 1096 1096 + if (ret) { 1097 1097 + dev_err(tps->dev, "data-role not found: %d\n", ret); 1098 1098 + return ret; 1099 1099 + } 1100 1100 + 1101 1101 + ret = typec_find_port_data_role(data_role); 1102 1102 + if (ret < 0) { 1103 1103 + dev_err(tps->dev, "unknown data-role: %s\n", data_role); 1104 1104 + return ret; 1105 1105 + } 1106 1106 + 1107 1107 + typec_cap.data = ret; 1108 1108 + typec_cap.revision = USB_TYPEC_REV_1_3; 1109 1109 + typec_cap.pd_revision = 0x300; 1110 1110 + typec_cap.driver_data = tps; 1111 1111 + typec_cap.ops = &tps6598x_ops; 1112 1112 + typec_cap.fwnode = fwnode; 1113 1113 + typec_cap.prefer_role = TYPEC_NO_PREFERRED_ROLE; 1114 1114 + 1115 1115 + switch (TPS_PD_STATUS_PORT_TYPE(pd_status)) { 1116 1116 + case TPS_PD_STATUS_PORT_TYPE_SINK_SOURCE: 1117 1117 + case TPS_PD_STATUS_PORT_TYPE_SOURCE_SINK: 1118 1118 + typec_cap.type = TYPEC_PORT_DRP; 1119 1119 + break; 1120 1120 + case TPS_PD_STATUS_PORT_TYPE_SINK: 1121 1121 + typec_cap.type = TYPEC_PORT_SNK; 1122 1122 + break; 1123 1123 + case TPS_PD_STATUS_PORT_TYPE_SOURCE: 1124 1124 + typec_cap.type = TYPEC_PORT_SRC; 1125 1125 + break; 1126 1126 + default: 1127 1127 + return -ENODEV; 1128 1128 + } 1129 1129 + 1130 1130 + tps->port = typec_register_port(tps->dev, &typec_cap); 1131 1131 + if (IS_ERR(tps->port)) 1132 1132 + return PTR_ERR(tps->port); 1133 1133 + 1134 1134 + return 0; 1135 1135 + } 1136 1136 + 1137 1137 + static int tps6598x_probe(struct i2c_client *client) 1138 1138 + { 1139 1139 + struct device_node *np = client->dev.of_node; 1140 1140 + struct tps6598x *tps; 1141 1141 + struct fwnode_handle *fwnode; 1142 1142 + u32 status; 1143 1143 + u32 vid; 1144 1144 + int ret; 1145 1145 + u64 mask1; 1146 1146 + bool is_tps25750; 1147 1147 + 1148 1148 + tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); 1149 1149 + if (!tps) 1150 1150 + return -ENOMEM; 1151 1151 + 1152 1152 + mutex_init(&tps->lock); 1153 1153 + tps->dev = &client->dev; 1154 1154 + 1155 1155 + tps->regmap = devm_regmap_init_i2c(client, &tps6598x_regmap_config); 1156 1156 + if (IS_ERR(tps->regmap)) 1157 1157 + return PTR_ERR(tps->regmap); 1158 1158 + 1159 1159 + is_tps25750 = device_is_compatible(tps->dev, "ti,tps25750"); 1160 1160 + if (!is_tps25750) { 1161 1161 + ret = tps6598x_read32(tps, TPS_REG_VID, &vid); 1162 1162 + if (ret < 0 || !vid) 1163 1163 + return -ENODEV; 1164 1164 + } 1165 1165 + 1166 1166 + /* 1167 1167 + * Checking can the adapter handle SMBus protocol. If it can not, the 1168 1168 + * driver needs to take care of block reads separately. 1169 1169 + */ 1170 1170 + if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 1171 1171 + tps->i2c_protocol = true; 1172 1172 + 1173 1173 + if (np && of_device_is_compatible(np, "apple,cd321x")) { 1174 1174 + /* Switch CD321X chips to the correct system power state */ 1175 1175 + ret = cd321x_switch_power_state(tps, TPS_SYSTEM_POWER_STATE_S0); 1176 1176 + if (ret) 1177 1177 + return ret; 1178 1178 + 1179 1179 + /* CD321X chips have all interrupts masked initially */ 1180 1180 + mask1 = APPLE_CD_REG_INT_POWER_STATUS_UPDATE | 1181 1181 + APPLE_CD_REG_INT_DATA_STATUS_UPDATE | 1182 1182 + APPLE_CD_REG_INT_PLUG_EVENT; 1183 1183 + 1184 1184 + } else { 1185 1185 + /* Enable power status, data status and plug event interrupts */ 1186 1186 + mask1 = TPS_REG_INT_POWER_STATUS_UPDATE | 1187 1187 + TPS_REG_INT_DATA_STATUS_UPDATE | 1188 1188 + TPS_REG_INT_PLUG_EVENT; 1189 1189 + } 1190 1190 + 1191 1191 + tps->data = device_get_match_data(tps->dev); 1192 1192 + if (!tps->data) 1193 1193 + return -EINVAL; 1194 1194 + 1195 1195 + /* Make sure the controller has application firmware running */ 1196 1196 + ret = tps6598x_check_mode(tps); 1197 1197 + if (ret < 0) 1198 1198 + return ret; 1199 1199 + 1200 1200 + if (is_tps25750 && ret == TPS_MODE_PTCH) { 1201 1201 + ret = tps25750_init(tps); 1202 1202 + if (ret) 1203 1203 + return ret; 1204 1204 + } 1205 1205 + 1206 1206 + ret = tps6598x_write64(tps, TPS_REG_INT_MASK1, mask1); 1207 1207 + if (ret) 1208 1208 + goto err_reset_controller; 1209 1209 + 1210 1210 + if (!tps6598x_read_status(tps, &status)) { 859 1211 ret = -ENODEV; 860 860 - goto err_role_put; 1212 1212 + goto err_clear_mask; 1213 1213 + } 1214 1214 + 1215 1215 + /* 1216 1216 + * This fwnode has a "compatible" property, but is never populated as a 1217 1217 + * struct device. Instead we simply parse it to read the properties. 1218 1218 + * This breaks fw_devlink=on. To maintain backward compatibility 1219 1219 + * with existing DT files, we work around this by deleting any 1220 1220 + * fwnode_links to/from this fwnode. 1221 1221 + */ 1222 1222 + fwnode = device_get_named_child_node(&client->dev, "connector"); 1223 1223 + if (fwnode) 1224 1224 + fw_devlink_purge_absent_suppliers(fwnode); 1225 1225 + 1226 1226 + tps->role_sw = fwnode_usb_role_switch_get(fwnode); 1227 1227 + if (IS_ERR(tps->role_sw)) { 1228 1228 + ret = PTR_ERR(tps->role_sw); 1229 1229 + goto err_fwnode_put; 861 1230 } 862 1231 863 1232 ret = devm_tps6598_psy_register(tps); 864 1233 if (ret) 865 1234 goto err_role_put; 866 1235 867 867 - tps->port = typec_register_port(&client->dev, &typec_cap); 868 868 - if (IS_ERR(tps->port)) { 869 869 - ret = PTR_ERR(tps->port); 1236 1236 + ret = tps->data->register_port(tps, fwnode); 1237 1237 + if (ret) 870 1238 goto err_role_put; 871 871 - } 872 1239 873 1240 if (status & TPS_STATUS_PLUG_PRESENT) { 874 1241 ret = tps6598x_read16(tps, TPS_REG_POWER_STATUS, &tps->pwr_status); ··· 1288 845 1289 846 if (client->irq) { 1290 847 ret = devm_request_threaded_irq(&client->dev, client->irq, NULL, 1291 1291 - irq_handler, 848 848 + tps->data->irq_handler, 1292 849 IRQF_SHARED | IRQF_ONESHOT, 1293 850 dev_name(&client->dev), tps); 1294 851 } else { ··· 1322 879 fwnode_handle_put(fwnode); 1323 880 err_clear_mask: 1324 881 tps6598x_write64(tps, TPS_REG_INT_MASK1, 0); 882 882 + err_reset_controller: 883 883 + /* Reset PD controller to remove any applied patch */ 884 884 + if (is_tps25750) 885 885 + tps6598x_exec_cmd_tmo(tps, "GAID", 0, NULL, 0, NULL, 2000, 0); 1325 886 return ret; 1326 887 } 1327 888 ··· 1336 889 if (!client->irq) 1337 890 cancel_delayed_work_sync(&tps->wq_poll); 1338 891 892 892 + devm_free_irq(tps->dev, client->irq, tps); 1339 893 tps6598x_disconnect(tps, 0); 1340 894 typec_unregister_port(tps->port); 1341 895 usb_role_switch_put(tps->role_sw); 896 896 + 897 897 + /* Reset PD controller to remove any applied patch */ 898 898 + if (device_is_compatible(tps->dev, "ti,tps25750")) 899 899 + tps6598x_exec_cmd_tmo(tps, "GAID", 0, NULL, 0, NULL, 2000, 0); 1342 900 } 1343 901 1344 902 static int __maybe_unused tps6598x_suspend(struct device *dev) ··· 1366 914 { 1367 915 struct i2c_client *client = to_i2c_client(dev); 1368 916 struct tps6598x *tps = i2c_get_clientdata(client); 917 917 + int ret; 918 918 + 919 919 + ret = tps6598x_check_mode(tps); 920 920 + if (ret < 0) 921 921 + return ret; 922 922 + 923 923 + if (device_is_compatible(tps->dev, "ti,tps25750") && ret == TPS_MODE_PTCH) { 924 924 + ret = tps25750_init(tps); 925 925 + if (ret) 926 926 + return ret; 927 927 + } 1369 928 1370 929 if (tps->wakeup) { 1371 930 disable_irq_wake(client->irq); ··· 1394 931 SET_SYSTEM_SLEEP_PM_OPS(tps6598x_suspend, tps6598x_resume) 1395 932 }; 1396 933 934 934 + static const struct tipd_data cd321x_data = { 935 935 + .irq_handler = cd321x_interrupt, 936 936 + .register_port = tps6598x_register_port, 937 937 + .trace_power_status = trace_tps6598x_power_status, 938 938 + .trace_status = trace_tps6598x_status, 939 939 + }; 940 940 + 941 941 + static const struct tipd_data tps6598x_data = { 942 942 + .irq_handler = tps6598x_interrupt, 943 943 + .register_port = tps6598x_register_port, 944 944 + .trace_power_status = trace_tps6598x_power_status, 945 945 + .trace_status = trace_tps6598x_status, 946 946 + }; 947 947 + 948 948 + static const struct tipd_data tps25750_data = { 949 949 + .irq_handler = tps25750_interrupt, 950 950 + .register_port = tps25750_register_port, 951 951 + .trace_power_status = trace_tps25750_power_status, 952 952 + .trace_status = trace_tps25750_status, 953 953 + .apply_patch = tps25750_apply_patch, 954 954 + }; 955 955 + 1397 956 static const struct of_device_id tps6598x_of_match[] = { 1398 1398 - { .compatible = "ti,tps6598x", }, 1399 1399 - { .compatible = "apple,cd321x", }, 957 957 + { .compatible = "ti,tps6598x", &tps6598x_data}, 958 958 + { .compatible = "apple,cd321x", &cd321x_data}, 959 959 + { .compatible = "ti,tps25750", &tps25750_data}, 1400 960 {} 1401 961 }; 1402 962 MODULE_DEVICE_TABLE(of, tps6598x_of_match);

+36

drivers/usb/typec/tipd/tps6598x.h

reviewed

··· 161 161 #define TPS_POWER_STATUS_BC12_STATUS_CDP 2 162 162 #define TPS_POWER_STATUS_BC12_STATUS_DCP 3 163 163 164 164 + /* TPS25750_REG_POWER_STATUS bits */ 165 165 + #define TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS_MASK GENMASK(7, 4) 166 166 + #define TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS(p) \ 167 167 + TPS_FIELD_GET(TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS_MASK, (p)) 168 168 + #define TPS25750_POWER_STATUS_CHARGER_ADVERTISE_STATUS_MASK GENMASK(9, 8) 169 169 + #define TPS25750_POWER_STATUS_CHARGER_ADVERTISE_STATUS(p) \ 170 170 + TPS_FIELD_GET(TPS25750_POWER_STATUS_CHARGER_ADVERTISE_STATUS_MASK, (p)) 171 171 + 172 172 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DISABLED 0 173 173 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_IN_PROGRESS 1 174 174 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_NONE 2 175 175 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_SPD 3 176 176 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_BC_1_2_CPD 4 177 177 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_BC_1_2_DPD 5 178 178 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_1_DCP 6 179 179 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_2_DCP 7 180 180 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_3_DCP 8 181 181 + #define TPS25750_POWER_STATUS_CHARGER_DET_STATUS_1_2V_DCP 9 182 182 + 164 183 /* TPS_REG_DATA_STATUS bits */ 165 184 #define TPS_DATA_STATUS_DATA_CONNECTION BIT(0) 166 185 #define TPS_DATA_STATUS_UPSIDE_DOWN BIT(1) ··· 217 198 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_D (BIT(1) | BIT(0)) 218 199 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_A BIT(2) 219 200 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_B (BIT(2) | BIT(1)) 201 201 + 202 202 + /* BOOT STATUS REG*/ 203 203 + #define TPS_BOOT_STATUS_DEAD_BATTERY_FLAG BIT(2) 204 204 + #define TPS_BOOT_STATUS_I2C_EEPROM_PRESENT BIT(3) 205 205 + 206 206 + /* PD STATUS REG */ 207 207 + #define TPS_REG_PD_STATUS_PORT_TYPE_MASK GENMASK(5, 4) 208 208 + #define TPS_PD_STATUS_PORT_TYPE(x) \ 209 209 + TPS_FIELD_GET(TPS_REG_PD_STATUS_PORT_TYPE_MASK, x) 210 210 + 211 211 + #define TPS_PD_STATUS_PORT_TYPE_SINK_SOURCE 0 212 212 + #define TPS_PD_STATUS_PORT_TYPE_SINK 1 213 213 + #define TPS_PD_STATUS_PORT_TYPE_SOURCE 2 214 214 + #define TPS_PD_STATUS_PORT_TYPE_SOURCE_SINK 3 215 215 + 216 216 + /* SLEEP CONF REG */ 217 217 + #define TPS_SLEEP_CONF_SLEEP_MODE_ALLOWED BIT(0) 220 218 221 219 #endif /* __TPS6598X_H__ */

+92

drivers/usb/typec/tipd/trace.h

reviewed

··· 74 74 { APPLE_CD_REG_INT_DATA_STATUS_UPDATE, "DATA_STATUS_UPDATE" }, \ 75 75 { APPLE_CD_REG_INT_STATUS_UPDATE, "STATUS_UPDATE" }) 76 76 77 77 + #define show_tps25750_irq_flags(flags) \ 78 78 + __print_flags_u64(flags, "|", \ 79 79 + { TPS_REG_INT_PLUG_EVENT, "PLUG_EVENT" }, \ 80 80 + { TPS_REG_INT_POWER_STATUS_UPDATE, "POWER_STATUS_UPDATE" }, \ 81 81 + { TPS_REG_INT_STATUS_UPDATE, "STATUS_UPDATE" }, \ 82 82 + { TPS_REG_INT_PD_STATUS_UPDATE, "PD_STATUS_UPDATE" }) 83 83 + 77 84 #define TPS6598X_STATUS_FLAGS_MASK (GENMASK(31, 0) ^ (TPS_STATUS_CONN_STATE_MASK | \ 78 85 TPS_STATUS_PP_5V0_SWITCH_MASK | \ 79 86 TPS_STATUS_PP_HV_SWITCH_MASK | \ ··· 90 83 TPS_STATUS_VBUS_STATUS_MASK | \ 91 84 TPS_STATUS_USB_HOST_PRESENT_MASK | \ 92 85 TPS_STATUS_LEGACY_MASK)) 86 86 + 87 87 + #define TPS25750_STATUS_FLAGS_MASK (GENMASK(31, 0) ^ (TPS_STATUS_CONN_STATE_MASK | \ 88 88 + GENMASK(19, 7) | \ 89 89 + TPS_STATUS_VBUS_STATUS_MASK | \ 90 90 + TPS_STATUS_USB_HOST_PRESENT_MASK | \ 91 91 + TPS_STATUS_LEGACY_MASK | \ 92 92 + BIT(26) | \ 93 93 + GENMASK(31, 28))) 93 94 94 95 #define show_status_conn_state(status) \ 95 96 __print_symbolic(TPS_STATUS_CONN_STATE((status)), \ ··· 156 141 { TPS_STATUS_HIGH_VOLAGE_WARNING, "HIGH_VOLAGE_WARNING" }, \ 157 142 { TPS_STATUS_HIGH_LOW_VOLTAGE_WARNING, "HIGH_LOW_VOLTAGE_WARNING" }) 158 143 144 144 + #define show_tps25750_status_flags(flags) \ 145 145 + __print_flags((flags & TPS25750_STATUS_FLAGS_MASK), "|", \ 146 146 + { TPS_STATUS_PLUG_PRESENT, "PLUG_PRESENT" }, \ 147 147 + { TPS_STATUS_PLUG_UPSIDE_DOWN, "UPSIDE_DOWN" }, \ 148 148 + { TPS_STATUS_PORTROLE, "PORTROLE" }, \ 149 149 + { TPS_STATUS_DATAROLE, "DATAROLE" }, \ 150 150 + { TPS_STATUS_BIST, "BIST" }) 151 151 + 159 152 #define show_power_status_source_sink(power_status) \ 160 153 __print_symbolic(TPS_POWER_STATUS_SOURCESINK(power_status), \ 161 154 { 1, "sink" }, \ ··· 181 158 { TPS_POWER_STATUS_BC12_STATUS_DCP, "dcp" }, \ 182 159 { TPS_POWER_STATUS_BC12_STATUS_CDP, "cdp" }, \ 183 160 { TPS_POWER_STATUS_BC12_STATUS_SDP, "sdp" }) 161 161 + 162 162 + #define show_tps25750_power_status_charger_detect_status(power_status) \ 163 163 + __print_symbolic(TPS25750_POWER_STATUS_CHARGER_DETECT_STATUS(power_status), \ 164 164 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DISABLED, "disabled"}, \ 165 165 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_IN_PROGRESS, "in progress"}, \ 166 166 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_NONE, "none"}, \ 167 167 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_SPD, "spd"}, \ 168 168 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_BC_1_2_CPD, "cpd"}, \ 169 169 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_BC_1_2_DPD, "dpd"}, \ 170 170 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_1_DCP, "divider 1 dcp"}, \ 171 171 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_2_DCP, "divider 2 dcp"}, \ 172 172 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_DIV_3_DCP, "divider 3 dpc"}, \ 173 173 + { TPS25750_POWER_STATUS_CHARGER_DET_STATUS_1_2V_DCP, "1.2V dpc"}) 184 174 185 175 #define TPS_DATA_STATUS_FLAGS_MASK (GENMASK(31, 0) ^ (TPS_DATA_STATUS_DP_PIN_ASSIGNMENT_MASK | \ 186 176 TPS_DATA_STATUS_TBT_CABLE_SPEED_MASK | \ ··· 266 230 show_cd321x_irq_flags(__entry->event)) 267 231 ); 268 232 233 233 + TRACE_EVENT(tps25750_irq, 234 234 + TP_PROTO(u64 event), 235 235 + TP_ARGS(event), 236 236 + 237 237 + TP_STRUCT__entry( 238 238 + __field(u64, event) 239 239 + ), 240 240 + 241 241 + TP_fast_assign( 242 242 + __entry->event = event; 243 243 + ), 244 244 + 245 245 + TP_printk("event=%s", show_tps25750_irq_flags(__entry->event)) 246 246 + ); 247 247 + 269 248 TRACE_EVENT(tps6598x_status, 270 249 TP_PROTO(u32 status), 271 250 TP_ARGS(status), ··· 308 257 ) 309 258 ); 310 259 260 260 + TRACE_EVENT(tps25750_status, 261 261 + TP_PROTO(u32 status), 262 262 + TP_ARGS(status), 263 263 + 264 264 + TP_STRUCT__entry( 265 265 + __field(u32, status) 266 266 + ), 267 267 + 268 268 + TP_fast_assign( 269 269 + __entry->status = status; 270 270 + ), 271 271 + 272 272 + TP_printk("conn: %s, vbus: %s, usb-host: %s, legacy: %s, flags: %s", 273 273 + show_status_conn_state(__entry->status), 274 274 + show_status_vbus_status(__entry->status), 275 275 + show_status_usb_host_present(__entry->status), 276 276 + show_status_legacy(__entry->status), 277 277 + show_tps25750_status_flags(__entry->status) 278 278 + ) 279 279 + ); 280 280 + 311 281 TRACE_EVENT(tps6598x_power_status, 312 282 TP_PROTO(u16 power_status), 313 283 TP_ARGS(power_status), ··· 346 274 show_power_status_source_sink(__entry->power_status), 347 275 show_power_status_typec_status(__entry->power_status), 348 276 show_power_status_bc12_status(__entry->power_status) 277 277 + ) 278 278 + ); 279 279 + 280 280 + TRACE_EVENT(tps25750_power_status, 281 281 + TP_PROTO(u16 power_status), 282 282 + TP_ARGS(power_status), 283 283 + 284 284 + TP_STRUCT__entry( 285 285 + __field(u16, power_status) 286 286 + ), 287 287 + 288 288 + TP_fast_assign( 289 289 + __entry->power_status = power_status; 290 290 + ), 291 291 + 292 292 + TP_printk("conn: %d, pwr-role: %s, typec: %s, charger detect: %s", 293 293 + !!TPS_POWER_STATUS_CONNECTION(__entry->power_status), 294 294 + show_power_status_source_sink(__entry->power_status), 295 295 + show_power_status_typec_status(__entry->power_status), 296 296 + show_tps25750_power_status_charger_detect_status(__entry->power_status) 349 297 ) 350 298 ); 351 299

+1 -1

drivers/usb/typec/ucsi/displayport.c

reviewed

··· 315 315 struct ucsi_dp *dp; 316 316 317 317 /* We can't rely on the firmware with the capabilities. */ 318 318 - desc->vdo |= DP_CAP_DP_SIGNALING | DP_CAP_RECEPTACLE; 318 318 + desc->vdo |= DP_CAP_DP_SIGNALLING(0) | DP_CAP_RECEPTACLE; 319 319 320 320 /* Claiming that we support all pin assignments */ 321 321 desc->vdo |= all_assignments << 8;

+2 -2

drivers/usb/typec/ucsi/ucsi_ccg.c

reviewed

··· 501 501 case NVIDIA_FTB_DP_OFFSET: 502 502 if (alt[0].mid == USB_TYPEC_NVIDIA_VLINK_DBG_VDO) 503 503 alt[0].mid = USB_TYPEC_NVIDIA_VLINK_DP_VDO | 504 504 - DP_CAP_DP_SIGNALING | DP_CAP_USB | 505 505 - DP_CONF_SET_PIN_ASSIGN(BIT(DP_PIN_ASSIGN_E)); 504 504 + DP_CAP_DP_SIGNALLING(0) | DP_CAP_USB | 505 505 + DP_CONF_SET_PIN_ASSIGN(BIT(DP_PIN_ASSIGN_E)); 506 506 break; 507 507 case NVIDIA_FTB_DBG_OFFSET: 508 508 if (alt[0].mid == USB_TYPEC_NVIDIA_VLINK_DP_VDO)

+53 -1

drivers/usb/typec/ucsi/ucsi_glink.c

reviewed

··· 8 8 #include <linux/mutex.h> 9 9 #include <linux/property.h> 10 10 #include <linux/soc/qcom/pdr.h> 11 11 + #include <linux/usb/typec_mux.h> 12 12 + #include <linux/gpio/consumer.h> 11 13 #include <linux/soc/qcom/pmic_glink.h> 12 14 #include "ucsi.h" 15 15 + 16 16 + #define PMIC_GLINK_MAX_PORTS 2 13 17 14 18 #define UCSI_BUF_SIZE 48 15 19 ··· 55 51 56 52 struct pmic_glink_ucsi { 57 53 struct device *dev; 54 54 + 55 55 + struct gpio_desc *port_orientation[PMIC_GLINK_MAX_PORTS]; 56 56 + struct typec_switch *port_switch[PMIC_GLINK_MAX_PORTS]; 58 57 59 58 struct pmic_glink_client *client; 60 59 ··· 227 220 } 228 221 229 222 con_num = UCSI_CCI_CONNECTOR(cci); 230 230 - if (con_num) 223 223 + if (con_num) { 224 224 + if (con_num < PMIC_GLINK_MAX_PORTS && 225 225 + ucsi->port_orientation[con_num - 1]) { 226 226 + int orientation = gpiod_get_value(ucsi->port_orientation[con_num - 1]); 227 227 + 228 228 + if (orientation >= 0) { 229 229 + typec_switch_set(ucsi->port_switch[con_num - 1], 230 230 + orientation ? TYPEC_ORIENTATION_REVERSE 231 231 + : TYPEC_ORIENTATION_NORMAL); 232 232 + } 233 233 + } 234 234 + 231 235 ucsi_connector_change(ucsi->ucsi, con_num); 236 236 + } 232 237 233 238 if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) { 234 239 ucsi->sync_val = -EBUSY; ··· 301 282 { 302 283 struct pmic_glink_ucsi *ucsi; 303 284 struct device *dev = &adev->dev; 285 285 + struct fwnode_handle *fwnode; 304 286 int ret; 305 287 306 288 ucsi = devm_kzalloc(dev, sizeof(*ucsi), GFP_KERNEL); ··· 328 308 return ret; 329 309 330 310 ucsi_set_drvdata(ucsi->ucsi, ucsi); 311 311 + 312 312 + device_for_each_child_node(dev, fwnode) { 313 313 + struct gpio_desc *desc; 314 314 + u32 port; 315 315 + 316 316 + ret = fwnode_property_read_u32(fwnode, "reg", &port); 317 317 + if (ret < 0) { 318 318 + dev_err(dev, "missing reg property of %pOFn\n", fwnode); 319 319 + return ret; 320 320 + } 321 321 + 322 322 + if (port >= PMIC_GLINK_MAX_PORTS) { 323 323 + dev_warn(dev, "invalid connector number, ignoring\n"); 324 324 + continue; 325 325 + } 326 326 + 327 327 + desc = devm_gpiod_get_index_optional(&adev->dev, "orientation", port, GPIOD_IN); 328 328 + 329 329 + /* If GPIO isn't found, continue */ 330 330 + if (!desc) 331 331 + continue; 332 332 + 333 333 + if (IS_ERR(desc)) 334 334 + return dev_err_probe(dev, PTR_ERR(desc), 335 335 + "unable to acquire orientation gpio\n"); 336 336 + ucsi->port_orientation[port] = desc; 337 337 + 338 338 + ucsi->port_switch[port] = fwnode_typec_switch_get(fwnode); 339 339 + if (IS_ERR(ucsi->port_switch[port])) 340 340 + return dev_err_probe(dev, PTR_ERR(ucsi->port_switch[port]), 341 341 + "failed to acquire orientation-switch\n"); 342 342 + } 331 343 332 344 ucsi->client = devm_pmic_glink_register_client(dev, 333 345 PMIC_GLINK_OWNER_USBC,

+7 -2

drivers/usb/usbip/stub_dev.c

reviewed

··· 464 464 /* release port */ 465 465 rc = usb_hub_release_port(udev->parent, udev->portnum, 466 466 (struct usb_dev_state *) udev); 467 467 - if (rc) { 468 468 - dev_dbg(&udev->dev, "unable to release port\n"); 467 467 + /* 468 468 + * NOTE: If a HUB disconnect triggered disconnect of the down stream 469 469 + * device usb_hub_release_port will return -ENODEV so we can safely ignore 470 470 + * that error here. 471 471 + */ 472 472 + if (rc && (rc != -ENODEV)) { 473 473 + dev_dbg(&udev->dev, "unable to release port (%i)\n", rc); 469 474 return; 470 475 } 471 476

+15 -29

drivers/usb/usbip/vhci_hcd.c

reviewed

··· 1140 1140 static int vhci_setup(struct usb_hcd *hcd) 1141 1141 { 1142 1142 struct vhci *vhci = *((void **)dev_get_platdata(hcd->self.controller)); 1143 1143 + 1143 1144 if (usb_hcd_is_primary_hcd(hcd)) { 1144 1145 vhci->vhci_hcd_hs = hcd_to_vhci_hcd(hcd); 1145 1146 vhci->vhci_hcd_hs->vhci = vhci; ··· 1494 1493 1495 1494 static void del_platform_devices(void) 1496 1495 { 1497 1497 - struct platform_device *pdev; 1498 1496 int i; 1499 1497 1500 1498 for (i = 0; i < vhci_num_controllers; i++) { 1501 1501 - pdev = vhcis[i].pdev; 1502 1502 - if (pdev != NULL) 1503 1503 - platform_device_unregister(pdev); 1499 1499 + platform_device_unregister(vhcis[i].pdev); 1504 1500 vhcis[i].pdev = NULL; 1505 1501 } 1506 1502 sysfs_remove_link(&platform_bus.kobj, driver_name); ··· 1517 1519 if (vhcis == NULL) 1518 1520 return -ENOMEM; 1519 1521 1520 1520 - for (i = 0; i < vhci_num_controllers; i++) { 1521 1521 - vhcis[i].pdev = platform_device_alloc(driver_name, i); 1522 1522 - if (!vhcis[i].pdev) { 1523 1523 - i--; 1524 1524 - while (i >= 0) 1525 1525 - platform_device_put(vhcis[i--].pdev); 1526 1526 - ret = -ENOMEM; 1527 1527 - goto err_device_alloc; 1528 1528 - } 1529 1529 - } 1530 1530 - for (i = 0; i < vhci_num_controllers; i++) { 1531 1531 - void *vhci = &vhcis[i]; 1532 1532 - ret = platform_device_add_data(vhcis[i].pdev, &vhci, sizeof(void *)); 1533 1533 - if (ret) 1534 1534 - goto err_driver_register; 1535 1535 - } 1536 1536 - 1537 1522 ret = platform_driver_register(&vhci_driver); 1538 1523 if (ret) 1539 1524 goto err_driver_register; 1540 1525 1541 1526 for (i = 0; i < vhci_num_controllers; i++) { 1542 1542 - ret = platform_device_add(vhcis[i].pdev); 1527 1527 + void *vhci = &vhcis[i]; 1528 1528 + struct platform_device_info pdevinfo = { 1529 1529 + .name = driver_name, 1530 1530 + .id = i, 1531 1531 + .data = &vhci, 1532 1532 + .size_data = sizeof(void *), 1533 1533 + }; 1534 1534 + 1535 1535 + vhcis[i].pdev = platform_device_register_full(&pdevinfo); 1536 1536 + ret = PTR_ERR_OR_ZERO(vhcis[i].pdev); 1543 1537 if (ret < 0) { 1544 1544 - i--; 1545 1545 - while (i >= 0) 1546 1546 - platform_device_del(vhcis[i--].pdev); 1538 1538 + while (i--) 1539 1539 + platform_device_unregister(vhcis[i].pdev); 1547 1540 goto err_add_hcd; 1548 1541 } 1549 1542 } 1550 1543 1551 1551 - return ret; 1544 1544 + return 0; 1552 1545 1553 1546 err_add_hcd: 1554 1547 platform_driver_unregister(&vhci_driver); 1555 1548 err_driver_register: 1556 1556 - for (i = 0; i < vhci_num_controllers; i++) 1557 1557 - platform_device_put(vhcis[i].pdev); 1558 1558 - err_device_alloc: 1559 1549 kfree(vhcis); 1560 1550 return ret; 1561 1551 }

+1 -1

include/linux/thunderbolt.h

reviewed

··· 175 175 * enum tb_link_width - Thunderbolt/USB4 link width 176 176 * @TB_LINK_WIDTH_SINGLE: Single lane link 177 177 * @TB_LINK_WIDTH_DUAL: Dual lane symmetric link 178 178 - * @TB_LINK_WIDTH_ASYM_TX: Dual lane asymmetric Gen 4 link with 3 trasmitters 178 178 + * @TB_LINK_WIDTH_ASYM_TX: Dual lane asymmetric Gen 4 link with 3 transmitters 179 179 * @TB_LINK_WIDTH_ASYM_RX: Dual lane asymmetric Gen 4 link with 3 receivers 180 180 */ 181 181 enum tb_link_width {

-16

include/linux/usb.h

reviewed

··· 1823 1823 void usb_free_coherent(struct usb_device *dev, size_t size, 1824 1824 void *addr, dma_addr_t dma); 1825 1825 1826 1826 - #if 0 1827 1827 - struct urb *usb_buffer_map(struct urb *urb); 1828 1828 - void usb_buffer_dmasync(struct urb *urb); 1829 1829 - void usb_buffer_unmap(struct urb *urb); 1830 1830 - #endif 1831 1831 - 1832 1832 - struct scatterlist; 1833 1833 - int usb_buffer_map_sg(const struct usb_device *dev, int is_in, 1834 1834 - struct scatterlist *sg, int nents); 1835 1835 - #if 0 1836 1836 - void usb_buffer_dmasync_sg(const struct usb_device *dev, int is_in, 1837 1837 - struct scatterlist *sg, int n_hw_ents); 1838 1838 - #endif 1839 1839 - void usb_buffer_unmap_sg(const struct usb_device *dev, int is_in, 1840 1840 - struct scatterlist *sg, int n_hw_ents); 1841 1841 - 1842 1826 /*-------------------------------------------------------------------* 1843 1827 * SYNCHRONOUS CALL SUPPORT * 1844 1828 *-------------------------------------------------------------------*/

+1

include/linux/usb/chipidea.h

reviewed

··· 64 64 #define CI_HDRC_PMQOS BIT(15) 65 65 #define CI_HDRC_PHY_VBUS_CONTROL BIT(16) 66 66 #define CI_HDRC_HAS_PORTSC_PEC_MISSED BIT(17) 67 67 + #define CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS BIT(18) 67 68 enum usb_dr_mode dr_mode; 68 69 #define CI_HDRC_CONTROLLER_RESET_EVENT 0 69 70 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1

+8

include/linux/usb/composite.h

reviewed

··· 35 35 * are ready. The control transfer will then be kept from completing till 36 36 * all the function drivers that requested for USB_GADGET_DELAYED_STAUS 37 37 * invoke usb_composite_setup_continue(). 38 38 + * 39 39 + * NOTE: USB_GADGET_DELAYED_STATUS must not be used in UDC drivers: they 40 40 + * must delay completing the status stage for 0-length control transfers 41 41 + * regardless of the whether USB_GADGET_DELAYED_STATUS is returned from 42 42 + * the gadget driver's setup() callback. 43 43 + * Currently, a number of UDC drivers rely on USB_GADGET_DELAYED_STATUS, 44 44 + * which is a bug. These drivers must be fixed and USB_GADGET_DELAYED_STATUS 45 45 + * must be contained within the composite framework. 38 46 */ 39 47 #define USB_GADGET_DELAYED_STATUS 0x7fff /* Impossibly large value */ 40 48

+9

include/linux/usb/gadget.h

reviewed

··· 711 711 * get_interface. Setting a configuration (or interface) is where 712 712 * endpoints should be activated or (config 0) shut down. 713 713 * 714 714 + * The gadget driver's setup() callback does not have to queue a response to 715 715 + * ep0 within the setup() call, the driver can do it after setup() returns. 716 716 + * The UDC driver must wait until such a response is queued before proceeding 717 717 + * with the data/status stages of the control transfer. 718 718 + * 719 719 + * NOTE: Currently, a number of UDC drivers rely on USB_GADGET_DELAYED_STATUS 720 720 + * being returned from the setup() callback, which is a bug. See the comment 721 721 + * next to USB_GADGET_DELAYED_STATUS for details. 722 722 + * 714 723 * (Note that only the default control endpoint is supported. Neither 715 724 * hosts nor devices generally support control traffic except to ep0.) 716 725 *

+17

include/linux/usb/hcd.h

reviewed

··· 484 484 extern void usb_hcd_pci_remove(struct pci_dev *dev); 485 485 extern void usb_hcd_pci_shutdown(struct pci_dev *dev); 486 486 487 487 + #ifdef CONFIG_USB_PCI_AMD 487 488 extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev); 488 489 490 490 + static inline bool usb_hcd_amd_resume_bug(struct pci_dev *dev, 491 491 + const struct hc_driver *driver) 492 492 + { 493 493 + if (!usb_hcd_amd_remote_wakeup_quirk(dev)) 494 494 + return false; 495 495 + if (driver->flags & (HCD_USB11 | HCD_USB3)) 496 496 + return true; 497 497 + return false; 498 498 + } 499 499 + #else /* CONFIG_USB_PCI_AMD */ 500 500 + static inline bool usb_hcd_amd_resume_bug(struct pci_dev *dev, 501 501 + const struct hc_driver *driver) 502 502 + { 503 503 + return false; 504 504 + } 505 505 + #endif 489 506 extern const struct dev_pm_ops usb_hcd_pci_pm_ops; 490 507 #endif /* CONFIG_USB_PCI */ 491 508

+145

include/linux/usb/ljca.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 2 + /* 3 3 + * Copyright (c) 2023, Intel Corporation. All rights reserved. 4 4 + */ 5 5 + #ifndef _LINUX_USB_LJCA_H_ 6 6 + #define _LINUX_USB_LJCA_H_ 7 7 + 8 8 + #include <linux/auxiliary_bus.h> 9 9 + #include <linux/list.h> 10 10 + #include <linux/spinlock.h> 11 11 + #include <linux/types.h> 12 12 + 13 13 + #define LJCA_MAX_GPIO_NUM 64 14 14 + 15 15 + #define auxiliary_dev_to_ljca_client(auxiliary_dev) \ 16 16 + container_of(auxiliary_dev, struct ljca_client, auxdev) 17 17 + 18 18 + struct ljca_adapter; 19 19 + 20 20 + /** 21 21 + * typedef ljca_event_cb_t - event callback function signature 22 22 + * 23 23 + * @context: the execution context of who registered this callback 24 24 + * @cmd: the command from device for this event 25 25 + * @evt_data: the event data payload 26 26 + * @len: the event data payload length 27 27 + * 28 28 + * The callback function is called in interrupt context and the data payload is 29 29 + * only valid during the call. If the user needs later access of the data, it 30 30 + * must copy it. 31 31 + */ 32 32 + typedef void (*ljca_event_cb_t)(void *context, u8 cmd, const void *evt_data, int len); 33 33 + 34 34 + /** 35 35 + * struct ljca_client - represent a ljca client device 36 36 + * 37 37 + * @type: ljca client type 38 38 + * @id: ljca client id within same client type 39 39 + * @link: ljca client on the same ljca adapter 40 40 + * @auxdev: auxiliary device object 41 41 + * @adapter: ljca adapter the ljca client sit on 42 42 + * @context: the execution context of the event callback 43 43 + * @event_cb: ljca client driver register this callback to get 44 44 + * firmware asynchronous rx buffer pending notifications 45 45 + * @event_cb_lock: spinlock to protect event callback 46 46 + */ 47 47 + struct ljca_client { 48 48 + u8 type; 49 49 + u8 id; 50 50 + struct list_head link; 51 51 + struct auxiliary_device auxdev; 52 52 + struct ljca_adapter *adapter; 53 53 + 54 54 + void *context; 55 55 + ljca_event_cb_t event_cb; 56 56 + /* lock to protect event_cb */ 57 57 + spinlock_t event_cb_lock; 58 58 + }; 59 59 + 60 60 + /** 61 61 + * struct ljca_gpio_info - ljca gpio client device info 62 62 + * 63 63 + * @num: ljca gpio client device pin number 64 64 + * @valid_pin_map: ljca gpio client device valid pin mapping 65 65 + */ 66 66 + struct ljca_gpio_info { 67 67 + unsigned int num; 68 68 + DECLARE_BITMAP(valid_pin_map, LJCA_MAX_GPIO_NUM); 69 69 + }; 70 70 + 71 71 + /** 72 72 + * struct ljca_i2c_info - ljca i2c client device info 73 73 + * 74 74 + * @id: ljca i2c client device identification number 75 75 + * @capacity: ljca i2c client device capacity 76 76 + * @intr_pin: ljca i2c client device interrupt pin number if exists 77 77 + */ 78 78 + struct ljca_i2c_info { 79 79 + u8 id; 80 80 + u8 capacity; 81 81 + u8 intr_pin; 82 82 + }; 83 83 + 84 84 + /** 85 85 + * struct ljca_spi_info - ljca spi client device info 86 86 + * 87 87 + * @id: ljca spi client device identification number 88 88 + * @capacity: ljca spi client device capacity 89 89 + */ 90 90 + struct ljca_spi_info { 91 91 + u8 id; 92 92 + u8 capacity; 93 93 + }; 94 94 + 95 95 + /** 96 96 + * ljca_register_event_cb - register a callback function to receive events 97 97 + * 98 98 + * @client: ljca client device 99 99 + * @event_cb: callback function 100 100 + * @context: execution context of event callback 101 101 + * 102 102 + * Return: 0 in case of success, negative value in case of error 103 103 + */ 104 104 + int ljca_register_event_cb(struct ljca_client *client, ljca_event_cb_t event_cb, void *context); 105 105 + 106 106 + /** 107 107 + * ljca_unregister_event_cb - unregister the callback function for an event 108 108 + * 109 109 + * @client: ljca client device 110 110 + */ 111 111 + void ljca_unregister_event_cb(struct ljca_client *client); 112 112 + 113 113 + /** 114 114 + * ljca_transfer - issue a LJCA command and wait for a response 115 115 + * 116 116 + * @client: ljca client device 117 117 + * @cmd: the command to be sent to the device 118 118 + * @obuf: the buffer to be sent to the device; it can be NULL if the user 119 119 + * doesn't need to transmit data with this command 120 120 + * @obuf_len: the size of the buffer to be sent to the device; it should 121 121 + * be 0 when obuf is NULL 122 122 + * @ibuf: any data associated with the response will be copied here; it can be 123 123 + * NULL if the user doesn't need the response data 124 124 + * @ibuf_len: must be initialized to the input buffer size 125 125 + * 126 126 + * Return: the actual length of response data for success, negative value for errors 127 127 + */ 128 128 + int ljca_transfer(struct ljca_client *client, u8 cmd, const u8 *obuf, 129 129 + u8 obuf_len, u8 *ibuf, u8 ibuf_len); 130 130 + 131 131 + /** 132 132 + * ljca_transfer_noack - issue a LJCA command without a response 133 133 + * 134 134 + * @client: ljca client device 135 135 + * @cmd: the command to be sent to the device 136 136 + * @obuf: the buffer to be sent to the device; it can be NULL if the user 137 137 + * doesn't need to transmit data with this command 138 138 + * @obuf_len: the size of the buffer to be sent to the device 139 139 + * 140 140 + * Return: 0 for success, negative value for errors 141 141 + */ 142 142 + int ljca_transfer_noack(struct ljca_client *client, u8 cmd, const u8 *obuf, 143 143 + u8 obuf_len); 144 144 + 145 145 + #endif

+1

include/linux/usb/pd.h

reviewed

··· 228 228 #define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */ 229 229 #define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */ 230 230 #define PDO_FIXED_FRS_CURR_SHIFT 23 231 231 + #define PDO_FIXED_PEAK_CURR_SHIFT 20 231 232 #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ 232 233 #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ 233 234

+1

include/linux/usb/pd_vdo.h

reviewed

··· 376 376 | ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5 \ 377 377 | (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7)) 378 378 379 379 + #define VDO_TYPEC_CABLE_SPEED(vdo) ((vdo) & 0x7) 379 380 #define VDO_TYPEC_CABLE_TYPE(vdo) (((vdo) >> 18) & 0x3) 380 381 381 382 /*

-10

include/linux/usb/renesas_usbhs.h

reviewed

··· 5 5 * Copyright (C) 2011 Renesas Solutions Corp. 6 6 * Copyright (C) 2019 Renesas Electronics Corporation 7 7 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 8 8 - * 9 9 - * This program is distributed in the hope that it will be useful, 10 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 12 - * GNU General Public License for more details. 13 13 - * 14 14 - * You should have received a copy of the GNU General Public License 15 15 - * along with this program; if not, write to the Free Software 16 16 - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 17 17 - * 18 8 */ 19 9 #ifndef RENESAS_USB_H 20 10 #define RENESAS_USB_H

+37

include/linux/usb/typec.h

reviewed

··· 202 202 * @accessory: Audio, Debug or none. 203 203 * @identity: Discover Identity command data 204 204 * @pd_revision: USB Power Delivery Specification Revision if supported 205 205 + * @attach: Notification about attached USB device 206 206 + * @deattach: Notification about removed USB device 205 207 * 206 208 * Details about a partner that is attached to USB Type-C port. If @identity 207 209 * member exists when partner is registered, a directory named "identity" is ··· 219 217 enum typec_accessory accessory; 220 218 struct usb_pd_identity *identity; 221 219 u16 pd_revision; /* 0300H = "3.0" */ 220 220 + 221 221 + void (*attach)(struct typec_partner *partner, struct device *dev); 222 222 + void (*deattach)(struct typec_partner *partner, struct device *dev); 222 223 }; 223 224 224 225 /** ··· 339 334 int typec_port_set_usb_power_delivery(struct typec_port *port, struct usb_power_delivery *pd); 340 335 int typec_partner_set_usb_power_delivery(struct typec_partner *partner, 341 336 struct usb_power_delivery *pd); 337 337 + 338 338 + /** 339 339 + * struct typec_connector - Representation of Type-C port for external drivers 340 340 + * @attach: notification about device removal 341 341 + * @deattach: notification about device removal 342 342 + * 343 343 + * Drivers that control the USB and other ports (DisplayPorts, etc.), that are 344 344 + * connected to the Type-C connectors, can use these callbacks to inform the 345 345 + * Type-C connector class about connections and disconnections. That information 346 346 + * can then be used by the typec-port drivers to power on or off parts that are 347 347 + * needed or not needed - as an example, in USB mode if USB2 device is 348 348 + * enumerated, USB3 components (retimers, phys, and what have you) do not need 349 349 + * to be powered on. 350 350 + * 351 351 + * The attached (enumerated) devices will be liked with the typec-partner device. 352 352 + */ 353 353 + struct typec_connector { 354 354 + void (*attach)(struct typec_connector *con, struct device *dev); 355 355 + void (*deattach)(struct typec_connector *con, struct device *dev); 356 356 + }; 357 357 + 358 358 + static inline void typec_attach(struct typec_connector *con, struct device *dev) 359 359 + { 360 360 + if (con && con->attach) 361 361 + con->attach(con, dev); 362 362 + } 363 363 + 364 364 + static inline void typec_deattach(struct typec_connector *con, struct device *dev) 365 365 + { 366 366 + if (con && con->deattach) 367 367 + con->deattach(con, dev); 368 368 + } 342 369 343 370 #endif /* __LINUX_USB_TYPEC_H */

+24 -4

include/linux/usb/typec_dp.h

reviewed

··· 67 67 #define DP_CAP_UFP_D 1 68 68 #define DP_CAP_DFP_D 2 69 69 #define DP_CAP_DFP_D_AND_UFP_D 3 70 70 - #define DP_CAP_DP_SIGNALING BIT(2) /* Always set */ 71 71 - #define DP_CAP_GEN2 BIT(3) /* Reserved after v1.0b */ 70 70 + #define DP_CAP_DP_SIGNALLING(_cap_) (((_cap_) & GENMASK(5, 2)) >> 2) 71 71 + #define DP_CAP_SIGNALLING_HBR3 1 72 72 + #define DP_CAP_SIGNALLING_UHBR10 2 73 73 + #define DP_CAP_SIGNALLING_UHBR20 3 72 74 #define DP_CAP_RECEPTACLE BIT(6) 73 75 #define DP_CAP_USB BIT(7) 74 76 #define DP_CAP_DFP_D_PIN_ASSIGN(_cap_) (((_cap_) & GENMASK(15, 8)) >> 8) ··· 80 78 DP_CAP_UFP_D_PIN_ASSIGN(_cap_) : DP_CAP_DFP_D_PIN_ASSIGN(_cap_)) 81 79 #define DP_CAP_PIN_ASSIGN_DFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ 82 80 DP_CAP_DFP_D_PIN_ASSIGN(_cap_) : DP_CAP_UFP_D_PIN_ASSIGN(_cap_)) 81 81 + #define DP_CAP_UHBR_13_5_SUPPORT BIT(26) 82 82 + #define DP_CAP_CABLE_TYPE(_cap_) (((_cap_) & GENMASK(29, 28)) >> 28) 83 83 + #define DP_CAP_CABLE_TYPE_PASSIVE 0 84 84 + #define DP_CAP_CABLE_TYPE_RE_TIMER 1 85 85 + #define DP_CAP_CABLE_TYPE_RE_DRIVER 2 86 86 + #define DP_CAP_CABLE_TYPE_OPTICAL 3 87 87 + #define DP_CAP_DPAM_VERSION BIT(30) 83 88 84 89 /* DisplayPort Status Update VDO bits */ 85 90 #define DP_STATUS_CONNECTION(_status_) ((_status_) & 3) ··· 106 97 #define DP_CONF_CURRENTLY(_conf_) ((_conf_) & 3) 107 98 #define DP_CONF_UFP_U_AS_DFP_D BIT(0) 108 99 #define DP_CONF_UFP_U_AS_UFP_D BIT(1) 109 109 - #define DP_CONF_SIGNALING_DP BIT(2) 110 110 - #define DP_CONF_SIGNALING_GEN_2 BIT(3) /* Reserved after v1.0b */ 100 100 + #define DP_CONF_SIGNALLING_MASK GENMASK(5, 2) 101 101 + #define DP_CONF_SIGNALLING_SHIFT 2 102 102 + #define DP_CONF_SIGNALLING_HBR3 1 103 103 + #define DP_CONF_SIGNALLING_UHBR10 2 104 104 + #define DP_CONF_SIGNALLING_UHBR20 3 111 105 #define DP_CONF_PIN_ASSIGNEMENT_SHIFT 8 112 106 #define DP_CONF_PIN_ASSIGNEMENT_MASK GENMASK(15, 8) 113 107 114 108 /* Helper for setting/getting the pin assignment value to the configuration */ 115 109 #define DP_CONF_SET_PIN_ASSIGN(_a_) ((_a_) << 8) 116 110 #define DP_CONF_GET_PIN_ASSIGN(_conf_) (((_conf_) & GENMASK(15, 8)) >> 8) 111 111 + #define DP_CONF_UHBR13_5_SUPPORT BIT(26) 112 112 + #define DP_CONF_CABLE_TYPE_MASK GENMASK(29, 28) 113 113 + #define DP_CONF_CABLE_TYPE_SHIFT 28 114 114 + #define DP_CONF_CABLE_TYPE_PASSIVE 0 115 115 + #define DP_CONF_CABLE_TYPE_RE_TIMER 1 116 116 + #define DP_CONF_CABLE_TYPE_RE_DRIVER 2 117 117 + #define DP_CONF_CABLE_TYPE_OPTICAL 3 118 118 + #define DP_CONF_DPAM_VERSION BIT(30) 117 119 118 120 #endif /* __USB_TYPEC_DP_H */

+1

include/linux/usb/typec_tbt.h

reviewed

··· 46 46 #define TBT_CABLE_OPTICAL BIT(21) 47 47 #define TBT_CABLE_RETIMER BIT(22) 48 48 #define TBT_CABLE_LINK_TRAINING BIT(23) 49 49 + #define TBT_CABLE_ACTIVE_PASSIVE BIT(25) 49 50 50 51 #define TBT_SET_CABLE_SPEED(_s_) (((_s_) & GENMASK(2, 0)) << 16) 51 52 #define TBT_SET_CABLE_ROUNDED(_g_) (((_g_) & GENMASK(1, 0)) << 19)

+12 -2

include/uapi/linux/usb/raw_gadget.h

reviewed

··· 44 44 /* This event is queued when a new control request arrived to ep0. */ 45 45 USB_RAW_EVENT_CONTROL = 2, 46 46 47 47 + /* 48 48 + * These events are queued when the gadget driver is suspended, 49 49 + * resumed, reset, or disconnected. Note that some UDCs (e.g. dwc2) 50 50 + * report a disconnect event instead of a reset. 51 51 + */ 52 52 + USB_RAW_EVENT_SUSPEND = 3, 53 53 + USB_RAW_EVENT_RESUME = 4, 54 54 + USB_RAW_EVENT_RESET = 5, 55 55 + USB_RAW_EVENT_DISCONNECT = 6, 56 56 + 47 57 /* The list might grow in the future. */ 48 58 }; 49 59 ··· 64 54 * actual length of the fetched event data. 65 55 * @data: A buffer to store the fetched event data. 66 56 * 67 67 - * Currently the fetched data buffer is empty for USB_RAW_EVENT_CONNECT, 68 68 - * and contains struct usb_ctrlrequest for USB_RAW_EVENT_CONTROL. 57 57 + * The fetched event data buffer contains struct usb_ctrlrequest for 58 58 + * USB_RAW_EVENT_CONTROL and is empty for other events. 69 59 */ 70 60 struct usb_raw_event { 71 61 __u32 type;