Merge tag 'powerpc-6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

+25

Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-dtl

··· 1 + What: /sys/bus/event_source/devices/vpa_dtl/format 2 + Date: February 2025 3 + Contact: Linux on PowerPC Developer List <linuxppc-dev at lists.ozlabs.org> 4 + Description: Read-only. Attribute group to describe the magic bits 5 + that go into perf_event_attr.config for a particular pmu. 6 + (See ABI/testing/sysfs-bus-event_source-devices-format). 7 + 8 + Each attribute under this group defines a bit range of the 9 + perf_event_attr.config. Supported attribute are listed 10 + below:: 11 + 12 + event = "config:0-7" - event ID 13 + 14 + For example:: 15 + 16 + dtl_cede = "event=0x1" 17 + 18 + What: /sys/bus/event_source/devices/vpa_dtl/events 19 + Date: February 2025 20 + Contact: Linux on PowerPC Developer List <linuxppc-dev at lists.ozlabs.org> 21 + Description: (RO) Attribute group to describe performance monitoring events 22 + for the Virtual Processor Dispatch Trace Log. Each attribute in 23 + this group describes a single performance monitoring event 24 + supported by vpa_dtl pmu. The name of the file is the name of 25 + the event (See ABI/testing/sysfs-bus-event_source-devices-events).

+1

Documentation/arch/powerpc/index.rst

··· 37 37 vas-api 38 38 vcpudispatch_stats 39 39 vmemmap_dedup 40 + vpa-dtl 40 41 41 42 features 42 43

+156

Documentation/arch/powerpc/vpa-dtl.rst

··· 1 + .. SPDX-License-Identifier: GPL-2.0 2 + .. _vpa-dtl: 3 + 4 + =================================== 5 + DTL (Dispatch Trace Log) 6 + =================================== 7 + 8 + Athira Rajeev, 19 April 2025 9 + 10 + .. contents:: 11 + :depth: 3 12 + 13 + 14 + Basic overview 15 + ============== 16 + 17 + The pseries Shared Processor Logical Partition(SPLPAR) machines can 18 + retrieve a log of dispatch and preempt events from the hypervisor 19 + using data from Disptach Trace Log(DTL) buffer. With this information, 20 + user can retrieve when and why each dispatch & preempt has occurred. 21 + The vpa-dtl PMU exposes the Virtual Processor Area(VPA) DTL counters 22 + via perf. 23 + 24 + Infrastructure used 25 + =================== 26 + 27 + The VPA DTL PMU counters do not interrupt on overflow or generate any 28 + PMI interrupts. Therefore, hrtimer is used to poll the DTL data. The timer 29 + nterval can be provided by user via sample_period field in nano seconds. 30 + vpa dtl pmu has one hrtimer added per vpa-dtl pmu thread. DTL (Dispatch 31 + Trace Log) contains information about dispatch/preempt, enqueue time etc. 32 + We directly copy the DTL buffer data as part of auxiliary buffer and it 33 + will be processed later. This will avoid time taken to create samples 34 + in the kernel space. The PMU driver collecting Dispatch Trace Log (DTL) 35 + entries makes use of AUX support in perf infrastructure. On the tools side, 36 + this data is made available as PERF_RECORD_AUXTRACE records. 37 + 38 + To correlate each DTL entry with other events across CPU's, an auxtrace_queue 39 + is created for each CPU. Each auxtrace queue has a array/list of auxtrace buffers. 40 + All auxtrace queues is maintained in auxtrace heap. The queues are sorted 41 + based on timestamp. When the different PERF_RECORD_XX records are processed, 42 + compare the timestamp of perf record with timestamp of top element in the 43 + auxtrace heap so that DTL events can be co-related with other events 44 + Process the auxtrace queue if the timestamp of element from heap is 45 + lower than timestamp from entry in perf record. Sometimes it could happen that 46 + one buffer is only partially processed. if the timestamp of occurrence of 47 + another event is more than currently processed element in the queue, it will 48 + move on to next perf record. So keep track of position of buffer to continue 49 + processing next time. Update the timestamp of the auxtrace heap with the timestamp 50 + of last processed entry from the auxtrace buffer. 51 + 52 + This infrastructure ensures dispatch trace log entries can be correlated 53 + and presented along with other events like sched. 54 + 55 + vpa-dtl PMU example usage 56 + ========================= 57 + 58 + .. code-block:: sh 59 + 60 + # ls /sys/devices/vpa_dtl/ 61 + events format perf_event_mux_interval_ms power subsystem type uevent 62 + 63 + 64 + To capture the DTL data using perf record: 65 + .. code-block:: sh 66 + 67 + # ./perf record -a -e sched:\*,vpa_dtl/dtl_all/ -c 1000000000 sleep 1 68 + 69 + The result can be interpreted using perf record. Snippet of perf report -D 70 + 71 + .. code-block:: sh 72 + 73 + # ./perf report -D 74 + 75 + There are different PERF_RECORD_XX records. In that records corresponding to 76 + auxtrace buffers includes: 77 + 78 + 1. PERF_RECORD_AUX 79 + Conveys that new data is available in AUX area 80 + 81 + 2. PERF_RECORD_AUXTRACE_INFO 82 + Describes offset and size of auxtrace data in the buffers 83 + 84 + 3. PERF_RECORD_AUXTRACE 85 + This is the record that defines the auxtrace data which here in case of 86 + vpa-dtl pmu is dispatch trace log data. 87 + 88 + Snippet from perf report -D showing the PERF_RECORD_AUXTRACE dump 89 + 90 + .. code-block:: sh 91 + 92 + 0 0 0x39b10 [0x30]: PERF_RECORD_AUXTRACE size: 0x690 offset: 0 ref: 0 idx: 0 tid: -1 cpu: 0 93 + . 94 + . ... VPA DTL PMU data: size 1680 bytes, entries is 35 95 + . 00000000: boot_tb: 21349649546353231, tb_freq: 512000000 96 + . 00000030: dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:7064, ready_to_enqueue_time:187, waiting_to_ready_time:6611773 97 + . 00000060: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:146, ready_to_enqueue_time:0, waiting_to_ready_time:15359437 98 + . 00000090: dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:4868, ready_to_enqueue_time:232, waiting_to_ready_time:5100709 99 + . 000000c0: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:179, ready_to_enqueue_time:0, waiting_to_ready_time:30714243 100 + . 000000f0: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:197, ready_to_enqueue_time:0, waiting_to_ready_time:15350648 101 + . 00000120: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:213, ready_to_enqueue_time:0, waiting_to_ready_time:15353446 102 + . 00000150: dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:212, ready_to_enqueue_time:0, waiting_to_ready_time:15355126 103 + . 00000180: dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:6368, ready_to_enqueue_time:164, waiting_to_ready_time:5104665 104 + 105 + Above is representation of dtl entry of below format: 106 + 107 + struct dtl_entry { 108 + u8 dispatch_reason; 109 + u8 preempt_reason; 110 + u16 processor_id; 111 + u32 enqueue_to_dispatch_time; 112 + u32 ready_to_enqueue_time; 113 + u32 waiting_to_ready_time; 114 + u64 timebase; 115 + u64 fault_addr; 116 + u64 srr0; 117 + u64 srr1; 118 + 119 + }; 120 + 121 + First two fields represent the dispatch reason and preempt reason. The post 122 + processing of PERF_RECORD_AUXTRACE records will translate to meaningful data 123 + for user to consume. 124 + 125 + Visualize the dispatch trace log entries with perf report 126 + ========================================================= 127 + 128 + .. code-block:: sh 129 + 130 + # ./perf record -a -e sched:*,vpa_dtl/dtl_all/ -c 1000000000 sleep 1 131 + [ perf record: Woken up 1 times to write data ] 132 + [ perf record: Captured and wrote 0.300 MB perf.data ] 133 + 134 + # ./perf report 135 + # Samples: 321 of event 'vpa-dtl' 136 + # Event count (approx.): 321 137 + # 138 + # Children Self Command Shared Object Symbol 139 + # ........ ........ ....... ................. .............................. 140 + # 141 + 100.00% 100.00% swapper [kernel.kallsyms] [k] plpar_hcall_norets_notrace 142 + 143 + Visualize the dispatch trace log entries with perf script 144 + ========================================================= 145 + 146 + .. code-block:: sh 147 + 148 + # ./perf script 149 + migration/9 67 [009] 105373.359903: sched:sched_waking: comm=perf pid=13418 prio=120 target_cpu=009 150 + migration/9 67 [009] 105373.359904: sched:sched_migrate_task: comm=perf pid=13418 prio=120 orig_cpu=9 dest_cpu=10 151 + migration/9 67 [009] 105373.359907: sched:sched_stat_runtime: comm=migration/9 pid=67 runtime=4050 [ns] 152 + migration/9 67 [009] 105373.359908: sched:sched_switch: prev_comm=migration/9 prev_pid=67 prev_prio=0 prev_state=S ==> next_comm=swapper/9 next_pid=0 next_prio=120 153 + :256 256 [016] 105373.359913: vpa-dtl: timebase: 21403600706628832 dispatch_reason:decrementer interrupt, preempt_reason:H_CEDE, enqueue_to_dispatch_time:4854, ready_to_enqueue_time:139, waiting_to_ready_time:511842115 c0000000000fcd28 plpar_hcall_norets_notrace+0x18 ([kernel.kallsyms]) 154 + :256 256 [017] 105373.360012: vpa-dtl: timebase: 21403600706679454 dispatch_reason:priv doorbell, preempt_reason:H_CEDE, enqueue_to_dispatch_time:236, ready_to_enqueue_time:0, waiting_to_ready_time:133864583 c0000000000fcd28 plpar_hcall_norets_notrace+0x18 ([kernel.kallsyms]) 155 + perf 13418 [010] 105373.360048: sched:sched_stat_runtime: comm=perf pid=13418 runtime=139748 [ns] 156 + perf 13418 [010] 105373.360052: sched:sched_waking: comm=migration/10 pid=72 prio=0 target_cpu=010

+2

Documentation/userspace-api/ioctl/ioctl-number.rst

··· 374 374 <mailto:linuxppc-dev@lists.ozlabs.org> 375 375 0xB2 08 arch/powerpc/include/uapi/asm/papr-physical-attestation.h powerpc/pseries Physical Attestation API 376 376 <mailto:linuxppc-dev@lists.ozlabs.org> 377 + 0xB2 09 arch/powerpc/include/uapi/asm/papr-hvpipe.h powerpc/pseries HVPIPE API 378 + <mailto:linuxppc-dev@lists.ozlabs.org> 377 379 0xB3 00 linux/mmc/ioctl.h 378 380 0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org> 379 381 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org>

+3 -1

arch/powerpc/Kconfig

··· 243 243 select HAVE_EFFICIENT_UNALIGNED_ACCESS 244 244 select HAVE_GUP_FAST 245 245 select HAVE_FTRACE_GRAPH_FUNC 246 + select HAVE_FTRACE_REGS_HAVING_PT_REGS 246 247 select HAVE_FUNCTION_ARG_ACCESS_API 247 248 select HAVE_FUNCTION_DESCRIPTORS if PPC64_ELF_ABI_V1 248 249 select HAVE_FUNCTION_ERROR_INJECTION 250 + select HAVE_FUNCTION_GRAPH_FREGS 249 251 select HAVE_FUNCTION_GRAPH_TRACER 250 252 select HAVE_FUNCTION_TRACER if !COMPILE_TEST && (PPC64 || (PPC32 && CC_IS_GCC)) 251 - select HAVE_GCC_PLUGINS if GCC_VERSION >= 50200 # plugin support on gcc <= 5.1 is buggy on PPC 253 + select HAVE_GCC_PLUGINS 252 254 select HAVE_GENERIC_VDSO 253 255 select HAVE_HARDLOCKUP_DETECTOR_ARCH if PPC_BOOK3S_64 && SMP 254 256 select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI

+1 -1

arch/powerpc/Makefile

··· 58 58 # There is a corresponding test in arch/powerpc/lib/Makefile 59 59 KBUILD_LDFLAGS_MODULE += --save-restore-funcs 60 60 else 61 - KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o 61 + KBUILD_LDFLAGS_MODULE += $(objtree)/arch/powerpc/lib/crtsavres.o 62 62 endif 63 63 64 64 ifdef CONFIG_CPU_LITTLE_ENDIAN

+1 -1

arch/powerpc/boot/page.h

+1 -5

arch/powerpc/boot/wrapper

··· 226 226 227 227 # Do not include PT_INTERP segment when linking pie. Non-pie linking 228 228 # just ignores this option. 229 - LD_VERSION=$(${CROSS}ld --version | ld_version) 230 - LD_NO_DL_MIN_VERSION=$(echo 2.26 | ld_version) 231 - if [ "$LD_VERSION" -ge "$LD_NO_DL_MIN_VERSION" ] ; then 232 - nodl="--no-dynamic-linker" 233 - fi 229 + nodl="--no-dynamic-linker" 234 230 235 231 # suppress some warnings in recent ld versions 236 232 nowarn="-z noexecstack"

+1 -1

arch/powerpc/include/asm/asm-const.h

··· 1 1 #ifndef _ASM_POWERPC_ASM_CONST_H 2 2 #define _ASM_POWERPC_ASM_CONST_H 3 3 4 - #ifdef __ASSEMBLY__ 4 + #ifdef __ASSEMBLER__ 5 5 # define stringify_in_c(...) __VA_ARGS__ 6 6 # define ASM_CONST(x) x 7 7 #else

+1 -1

arch/powerpc/include/asm/barrier.h

··· 7 7 8 8 #include <asm/asm-const.h> 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 #include <asm/ppc-opcode.h> 12 12 #endif 13 13

+2 -2

arch/powerpc/include/asm/book3s/32/kup.h

··· 7 7 #include <asm/mmu.h> 8 8 #include <asm/synch.h> 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 #ifdef CONFIG_PPC_KUAP 13 13 ··· 170 170 171 171 #endif /* CONFIG_PPC_KUAP */ 172 172 173 - #endif /* __ASSEMBLY__ */ 173 + #endif /* __ASSEMBLER__ */ 174 174 175 175 #endif /* _ASM_POWERPC_BOOK3S_32_KUP_H */

+4 -4

arch/powerpc/include/asm/book3s/32/mmu-hash.h

··· 29 29 #define BPP_RX 0x01 /* Read only */ 30 30 #define BPP_RW 0x02 /* Read/write */ 31 31 32 - #ifndef __ASSEMBLY__ 32 + #ifndef __ASSEMBLER__ 33 33 /* Contort a phys_addr_t into the right format/bits for a BAT */ 34 34 #ifdef CONFIG_PHYS_64BIT 35 35 #define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \ ··· 47 47 u32 batu; 48 48 u32 batl; 49 49 }; 50 - #endif /* !__ASSEMBLY__ */ 50 + #endif /* !__ASSEMBLER__ */ 51 51 52 52 /* 53 53 * Hash table ··· 64 64 #define SR_KP 0x20000000 /* User key */ 65 65 #define SR_KS 0x40000000 /* Supervisor key */ 66 66 67 - #ifdef __ASSEMBLY__ 67 + #ifdef __ASSEMBLER__ 68 68 69 69 #include <asm/asm-offsets.h> 70 70 ··· 225 225 226 226 int __init find_free_bat(void); 227 227 unsigned int bat_block_size(unsigned long base, unsigned long top); 228 - #endif /* !__ASSEMBLY__ */ 228 + #endif /* !__ASSEMBLER__ */ 229 229 230 230 /* We happily ignore the smaller BATs on 601, we don't actually use 231 231 * those definitions on hash32 at the moment anyway

+8 -2

arch/powerpc/include/asm/book3s/32/pgalloc.h

··· 7 7 8 8 static inline pgd_t *pgd_alloc(struct mm_struct *mm) 9 9 { 10 - return kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE), 11 - pgtable_gfp_flags(mm, GFP_KERNEL)); 10 + pgd_t *pgd = kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE), 11 + pgtable_gfp_flags(mm, GFP_KERNEL)); 12 + 13 + #ifdef CONFIG_PPC_BOOK3S_603 14 + memcpy(pgd + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, 15 + (MAX_PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); 16 + #endif 17 + return pgd; 12 18 } 13 19 14 20 static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)

+6 -6

arch/powerpc/include/asm/book3s/32/pgtable.h

··· 102 102 #define PMD_CACHE_INDEX PMD_INDEX_SIZE 103 103 #define PUD_CACHE_INDEX PUD_INDEX_SIZE 104 104 105 - #ifndef __ASSEMBLY__ 105 + #ifndef __ASSEMBLER__ 106 106 #define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE) 107 107 #define PMD_TABLE_SIZE 0 108 108 #define PUD_TABLE_SIZE 0 ··· 110 110 111 111 /* Bits to mask out from a PMD to get to the PTE page */ 112 112 #define PMD_MASKED_BITS (PTE_TABLE_SIZE - 1) 113 - #endif /* __ASSEMBLY__ */ 113 + #endif /* __ASSEMBLER__ */ 114 114 115 115 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) 116 116 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) ··· 132 132 133 133 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 134 134 135 - #ifndef __ASSEMBLY__ 135 + #ifndef __ASSEMBLER__ 136 136 137 137 int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot); 138 138 void unmap_kernel_page(unsigned long va); 139 139 140 - #endif /* !__ASSEMBLY__ */ 140 + #endif /* !__ASSEMBLER__ */ 141 141 142 142 /* 143 143 * This is the bottom of the PKMAP area with HIGHMEM or an arbitrary ··· 199 199 #define MODULES_SIZE (CONFIG_MODULES_SIZE * SZ_1M) 200 200 #define MODULES_VADDR (MODULES_END - MODULES_SIZE) 201 201 202 - #ifndef __ASSEMBLY__ 202 + #ifndef __ASSEMBLER__ 203 203 #include <linux/sched.h> 204 204 #include <linux/threads.h> 205 205 ··· 602 602 return pgprot_noncached_wc(prot); 603 603 } 604 604 605 - #endif /* !__ASSEMBLY__ */ 605 + #endif /* !__ASSEMBLER__ */ 606 606 607 607 #endif /* _ASM_POWERPC_BOOK3S_32_PGTABLE_H */

+2 -2

arch/powerpc/include/asm/book3s/64/hash-4k.h

··· 32 32 */ 33 33 #define H_KERN_VIRT_START ASM_CONST(0xc0003d0000000000) 34 34 35 - #ifndef __ASSEMBLY__ 35 + #ifndef __ASSEMBLER__ 36 36 #define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE) 37 37 #define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE) 38 38 #define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE) ··· 168 168 extern int hash__has_transparent_hugepage(void); 169 169 #endif 170 170 171 - #endif /* !__ASSEMBLY__ */ 171 + #endif /* !__ASSEMBLER__ */ 172 172 173 173 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */

+2 -2

arch/powerpc/include/asm/book3s/64/hash-64k.h

··· 79 79 #endif 80 80 #define H_PMD_FRAG_NR (PAGE_SIZE >> H_PMD_FRAG_SIZE_SHIFT) 81 81 82 - #ifndef __ASSEMBLY__ 82 + #ifndef __ASSEMBLER__ 83 83 #include <asm/errno.h> 84 84 85 85 /* ··· 281 281 extern int hash__has_transparent_hugepage(void); 282 282 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 283 283 284 - #endif /* __ASSEMBLY__ */ 284 + #endif /* __ASSEMBLER__ */ 285 285 286 286 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_64K_H */

+2 -2

arch/powerpc/include/asm/book3s/64/hash.h

··· 112 112 #define H_PMD_BAD_BITS (PTE_TABLE_SIZE-1) 113 113 #define H_PUD_BAD_BITS (PMD_TABLE_SIZE-1) 114 114 115 - #ifndef __ASSEMBLY__ 115 + #ifndef __ASSEMBLER__ 116 116 static inline int get_region_id(unsigned long ea) 117 117 { 118 118 int region_id; ··· 295 295 int nid, pgprot_t prot); 296 296 int hash__remove_section_mapping(unsigned long start, unsigned long end); 297 297 298 - #endif /* !__ASSEMBLY__ */ 298 + #endif /* !__ASSEMBLER__ */ 299 299 #endif /* __KERNEL__ */ 300 300 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */

+3 -3

arch/powerpc/include/asm/book3s/64/kup.h

··· 10 10 #define AMR_KUEP_BLOCKED UL(0x5455555555555555) 11 11 #define AMR_KUAP_BLOCKED (AMR_KUAP_BLOCK_READ | AMR_KUAP_BLOCK_WRITE) 12 12 13 - #ifdef __ASSEMBLY__ 13 + #ifdef __ASSEMBLER__ 14 14 15 15 .macro kuap_user_restore gpr1, gpr2 16 16 #if defined(CONFIG_PPC_PKEY) ··· 191 191 #endif 192 192 .endm 193 193 194 - #else /* !__ASSEMBLY__ */ 194 + #else /* !__ASSEMBLER__ */ 195 195 196 196 #include <linux/jump_label.h> 197 197 #include <linux/sched.h> ··· 413 413 if (static_branch_unlikely(&uaccess_flush_key) && flags == AMR_KUAP_BLOCKED) 414 414 do_uaccess_flush(); 415 415 } 416 - #endif /* __ASSEMBLY__ */ 416 + #endif /* __ASSEMBLER__ */ 417 417 418 418 #endif /* _ASM_POWERPC_BOOK3S_64_KUP_H */

+6 -6

arch/powerpc/include/asm/book3s/64/mmu-hash.h

··· 130 130 #define POWER9_TLB_SETS_HASH 256 /* # sets in POWER9 TLB Hash mode */ 131 131 #define POWER9_TLB_SETS_RADIX 128 /* # sets in POWER9 TLB Radix mode */ 132 132 133 - #ifndef __ASSEMBLY__ 133 + #ifndef __ASSEMBLER__ 134 134 135 135 struct mmu_hash_ops { 136 136 void (*hpte_invalidate)(unsigned long slot, ··· 220 220 return sllp; 221 221 } 222 222 223 - #endif /* __ASSEMBLY__ */ 223 + #endif /* __ASSEMBLER__ */ 224 224 225 225 /* 226 226 * Segment sizes. ··· 248 248 #define LP_BITS 8 249 249 #define LP_MASK(i) ((0xFF >> (i)) << LP_SHIFT) 250 250 251 - #ifndef __ASSEMBLY__ 251 + #ifndef __ASSEMBLER__ 252 252 253 253 static inline int slb_vsid_shift(int ssize) 254 254 { ··· 532 532 static inline void slb_set_size(u16 size) { } 533 533 #endif 534 534 535 - #endif /* __ASSEMBLY__ */ 535 + #endif /* __ASSEMBLER__ */ 536 536 537 537 /* 538 538 * VSID allocation (256MB segment) ··· 668 668 #define SLICE_ARRAY_SIZE (H_PGTABLE_RANGE >> 41) 669 669 #define LOW_SLICE_ARRAY_SZ (BITS_PER_LONG / BITS_PER_BYTE) 670 670 #define TASK_SLICE_ARRAY_SZ(x) ((x)->hash_context->slb_addr_limit >> 41) 671 - #ifndef __ASSEMBLY__ 671 + #ifndef __ASSEMBLER__ 672 672 673 673 #ifdef CONFIG_PPC_SUBPAGE_PROT 674 674 /* ··· 881 881 return __mk_vsid_data(get_kernel_vsid(ea, ssize), ssize, flags); 882 882 } 883 883 884 - #endif /* __ASSEMBLY__ */ 884 + #endif /* __ASSEMBLER__ */ 885 885 #endif /* _ASM_POWERPC_BOOK3S_64_MMU_HASH_H_ */

+4 -4

arch/powerpc/include/asm/book3s/64/mmu.h

··· 4 4 5 5 #include <asm/page.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 /* 9 9 * Page size definition 10 10 * ··· 26 26 }; 27 27 }; 28 28 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; 29 - #endif /* __ASSEMBLY__ */ 29 + #endif /* __ASSEMBLER__ */ 30 30 31 31 /* 64-bit classic hash table MMU */ 32 32 #include <asm/book3s/64/mmu-hash.h> 33 33 34 - #ifndef __ASSEMBLY__ 34 + #ifndef __ASSEMBLER__ 35 35 /* 36 36 * ISA 3.0 partition and process table entry format 37 37 */ ··· 288 288 } 289 289 #endif 290 290 291 - #endif /* __ASSEMBLY__ */ 291 + #endif /* __ASSEMBLER__ */ 292 292 #endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */

+2 -2

arch/powerpc/include/asm/book3s/64/pgtable-64k.h

··· 2 2 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_64K_H 3 3 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_64K_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 #ifdef CONFIG_HUGETLB_PAGE 7 7 8 8 #endif /* CONFIG_HUGETLB_PAGE */ ··· 14 14 BUG(); 15 15 return hash__remap_4k_pfn(vma, addr, pfn, prot); 16 16 } 17 - #endif /* __ASSEMBLY__ */ 17 + #endif /* __ASSEMBLER__ */ 18 18 #endif /*_ASM_POWERPC_BOOK3S_64_PGTABLE_64K_H */

+5 -5

arch/powerpc/include/asm/book3s/64/pgtable.h

··· 4 4 5 5 #include <asm-generic/pgtable-nop4d.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 #include <linux/mmdebug.h> 9 9 #include <linux/bug.h> 10 10 #include <linux/sizes.h> ··· 143 143 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO) 144 144 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX) 145 145 146 - #ifndef __ASSEMBLY__ 146 + #ifndef __ASSEMBLER__ 147 147 /* 148 148 * page table defines 149 149 */ ··· 291 291 else 292 292 return PUD_SIZE; 293 293 } 294 - #endif /* __ASSEMBLY__ */ 294 + #endif /* __ASSEMBLER__ */ 295 295 296 296 #include <asm/book3s/64/hash.h> 297 297 #include <asm/book3s/64/radix.h> ··· 327 327 #define FIXADDR_SIZE SZ_32M 328 328 #define FIXADDR_TOP (IOREMAP_END + FIXADDR_SIZE) 329 329 330 - #ifndef __ASSEMBLY__ 330 + #ifndef __ASSEMBLER__ 331 331 332 332 static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr, 333 333 pte_t *ptep, unsigned long clr, ··· 1381 1381 return false; 1382 1382 } 1383 1383 1384 - #endif /* __ASSEMBLY__ */ 1384 + #endif /* __ASSEMBLER__ */ 1385 1385 #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */

+4 -4

arch/powerpc/include/asm/book3s/64/radix.h

··· 4 4 5 5 #include <asm/asm-const.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 #include <asm/cmpxchg.h> 9 9 #endif 10 10 ··· 14 14 #include <asm/book3s/64/radix-4k.h> 15 15 #endif 16 16 17 - #ifndef __ASSEMBLY__ 17 + #ifndef __ASSEMBLER__ 18 18 #include <asm/book3s/64/tlbflush-radix.h> 19 19 #include <asm/cpu_has_feature.h> 20 20 #endif ··· 132 132 #define RADIX_VMEMMAP_SIZE RADIX_KERN_MAP_SIZE 133 133 #define RADIX_VMEMMAP_END (RADIX_VMEMMAP_START + RADIX_VMEMMAP_SIZE) 134 134 135 - #ifndef __ASSEMBLY__ 135 + #ifndef __ASSEMBLER__ 136 136 #define RADIX_PTE_TABLE_SIZE (sizeof(pte_t) << RADIX_PTE_INDEX_SIZE) 137 137 #define RADIX_PMD_TABLE_SIZE (sizeof(pmd_t) << RADIX_PMD_INDEX_SIZE) 138 138 #define RADIX_PUD_TABLE_SIZE (sizeof(pud_t) << RADIX_PUD_INDEX_SIZE) ··· 362 362 unsigned long start, 363 363 unsigned long end, int node, 364 364 struct dev_pagemap *pgmap); 365 - #endif /* __ASSEMBLY__ */ 365 + #endif /* __ASSEMBLER__ */ 366 366 #endif

+2 -2

arch/powerpc/include/asm/book3s/64/slice.h

··· 2 2 #ifndef _ASM_POWERPC_BOOK3S_64_SLICE_H 3 3 #define _ASM_POWERPC_BOOK3S_64_SLICE_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #ifdef CONFIG_PPC_64S_HASH_MMU 8 8 #ifdef CONFIG_HUGETLB_PAGE ··· 37 37 void slice_init_new_context_exec(struct mm_struct *mm); 38 38 void slice_setup_new_exec(void); 39 39 40 - #endif /* __ASSEMBLY__ */ 40 + #endif /* __ASSEMBLER__ */ 41 41 42 42 #endif /* _ASM_POWERPC_BOOK3S_64_SLICE_H */

+7 -7

arch/powerpc/include/asm/bug.h

··· 7 7 8 8 #ifdef CONFIG_BUG 9 9 10 - #ifdef __ASSEMBLY__ 10 + #ifdef __ASSEMBLER__ 11 11 #include <asm/asm-offsets.h> 12 12 #ifdef CONFIG_DEBUG_BUGVERBOSE 13 13 .macro EMIT_BUG_ENTRY addr,file,line,flags ··· 31 31 .endm 32 32 #endif /* verbose */ 33 33 34 - #else /* !__ASSEMBLY__ */ 34 + #else /* !__ASSEMBLER__ */ 35 35 /* _EMIT_BUG_ENTRY expects args %0,%1,%2,%3 to be FILE, LINE, flags and 36 36 sizeof(struct bug_entry), respectively */ 37 37 #ifdef CONFIG_DEBUG_BUGVERBOSE ··· 101 101 #define HAVE_ARCH_WARN_ON 102 102 #endif 103 103 104 - #endif /* __ASSEMBLY __ */ 104 + #endif /* __ASSEMBLER__ */ 105 105 #else 106 - #ifdef __ASSEMBLY__ 106 + #ifdef __ASSEMBLER__ 107 107 .macro EMIT_BUG_ENTRY addr,file,line,flags 108 108 .endm 109 - #else /* !__ASSEMBLY__ */ 109 + #else /* !__ASSEMBLER__ */ 110 110 #define _EMIT_BUG_ENTRY 111 111 #endif 112 112 #endif /* CONFIG_BUG */ ··· 115 115 116 116 #include <asm-generic/bug.h> 117 117 118 - #ifndef __ASSEMBLY__ 118 + #ifndef __ASSEMBLER__ 119 119 120 120 struct pt_regs; 121 121 void hash__do_page_fault(struct pt_regs *); ··· 128 128 extern bool die_will_crash(void); 129 129 extern void panic_flush_kmsg_start(void); 130 130 extern void panic_flush_kmsg_end(void); 131 - #endif /* !__ASSEMBLY__ */ 131 + #endif /* !__ASSEMBLER__ */ 132 132 133 133 #endif /* __KERNEL__ */ 134 134 #endif /* _ASM_POWERPC_BUG_H */

+2 -2

arch/powerpc/include/asm/cache.h

··· 37 37 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 38 38 #endif 39 39 40 - #if !defined(__ASSEMBLY__) 40 + #if !defined(__ASSEMBLER__) 41 41 #ifdef CONFIG_PPC64 42 42 43 43 struct ppc_cache_info { ··· 145 145 asm volatile ("iccci 0, %0" : : "r"(addr) : "memory"); 146 146 } 147 147 148 - #endif /* !__ASSEMBLY__ */ 148 + #endif /* !__ASSEMBLER__ */ 149 149 #endif /* __KERNEL__ */ 150 150 #endif /* _ASM_POWERPC_CACHE_H */

+2 -2

arch/powerpc/include/asm/cpu_has_feature.h

··· 2 2 #ifndef __ASM_POWERPC_CPU_HAS_FEATURE_H 3 3 #define __ASM_POWERPC_CPU_HAS_FEATURE_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <linux/bug.h> 8 8 #include <asm/cputable.h> ··· 51 51 } 52 52 #endif 53 53 54 - #endif /* __ASSEMBLY__ */ 54 + #endif /* __ASSEMBLER__ */ 55 55 #endif /* __ASM_POWERPC_CPU_HAS_FEATURE_H */

+1 -1

arch/powerpc/include/asm/cpuidle.h

··· 68 68 #define ERR_EC_ESL_MISMATCH -1 69 69 #define ERR_DEEP_STATE_ESL_MISMATCH -2 70 70 71 - #ifndef __ASSEMBLY__ 71 + #ifndef __ASSEMBLER__ 72 72 73 73 #define PNV_IDLE_NAME_LEN 16 74 74 struct pnv_idle_states_t {

+4 -4

arch/powerpc/include/asm/cputable.h

··· 7 7 #include <uapi/asm/cputable.h> 8 8 #include <asm/asm-const.h> 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 /* This structure can grow, it's real size is used by head.S code 13 13 * via the mkdefs mechanism. ··· 103 103 static inline void cpu_feature_keys_init(void) { } 104 104 #endif 105 105 106 - #endif /* __ASSEMBLY__ */ 106 + #endif /* __ASSEMBLER__ */ 107 107 108 108 /* CPU kernel features */ 109 109 ··· 195 195 #define CPU_FTR_DEXCR_NPHIE LONG_ASM_CONST(0x0010000000000000) 196 196 #define CPU_FTR_P11_PVR LONG_ASM_CONST(0x0020000000000000) 197 197 198 - #ifndef __ASSEMBLY__ 198 + #ifndef __ASSEMBLER__ 199 199 200 200 #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_NOEXECUTE) 201 201 ··· 602 602 */ 603 603 #define HBP_NUM_MAX 2 604 604 605 - #endif /* !__ASSEMBLY__ */ 605 + #endif /* !__ASSEMBLER__ */ 606 606 607 607 #endif /* __ASM_POWERPC_CPUTABLE_H */

+2 -2

arch/powerpc/include/asm/cputhreads.h

··· 2 2 #ifndef _ASM_POWERPC_CPUTHREADS_H 3 3 #define _ASM_POWERPC_CPUTHREADS_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 #include <linux/cpumask.h> 7 7 #include <asm/cpu_has_feature.h> 8 8 ··· 107 107 void book3e_start_thread(int thread, unsigned long addr); 108 108 void book3e_stop_thread(int thread); 109 109 110 - #endif /* __ASSEMBLY__ */ 110 + #endif /* __ASSEMBLER__ */ 111 111 112 112 #define INVALID_THREAD_HWID 0x0fff 113 113

+6 -12

arch/powerpc/include/asm/dbell.h

··· 40 40 : : "i" (CPU_FTR_HVMODE), "r" (msg)); 41 41 } 42 42 43 - /* sync before sending message */ 44 - static inline void ppc_msgsnd_sync(void) 45 - { 46 - __asm__ __volatile__ ("sync" : : : "memory"); 47 - } 48 - 49 43 /* sync after taking message interrupt */ 50 44 static inline void ppc_msgsync(void) 51 45 { ··· 70 76 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 71 77 } 72 78 73 - /* sync before sending message */ 74 - static inline void ppc_msgsnd_sync(void) 75 - { 76 - __asm__ __volatile__ ("sync" : : : "memory"); 77 - } 78 - 79 79 /* sync after taking message interrupt */ 80 80 static inline void ppc_msgsync(void) 81 81 { ··· 78 90 #endif /* CONFIG_PPC_BOOK3S */ 79 91 80 92 extern void doorbell_exception(struct pt_regs *regs); 93 + 94 + /* sync before sending message */ 95 + static inline void ppc_msgsnd_sync(void) 96 + { 97 + __asm__ __volatile__ ("sync" : : : "memory"); 98 + } 81 99 82 100 static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag) 83 101 {

+2 -2

arch/powerpc/include/asm/dcr-native.h

··· 7 7 #ifndef _ASM_POWERPC_DCR_NATIVE_H 8 8 #define _ASM_POWERPC_DCR_NATIVE_H 9 9 #ifdef __KERNEL__ 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 #include <linux/spinlock.h> 13 13 #include <asm/cputable.h> ··· 139 139 DCRN_ ## base ## _CONFIG_DATA, \ 140 140 reg, clr, set) 141 141 142 - #endif /* __ASSEMBLY__ */ 142 + #endif /* __ASSEMBLER__ */ 143 143 #endif /* __KERNEL__ */ 144 144 #endif /* _ASM_POWERPC_DCR_NATIVE_H */

+2 -2

arch/powerpc/include/asm/dcr.h

··· 7 7 #ifndef _ASM_POWERPC_DCR_H 8 8 #define _ASM_POWERPC_DCR_H 9 9 #ifdef __KERNEL__ 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 #ifdef CONFIG_PPC_DCR 12 12 13 13 #include <asm/dcr-native.h> ··· 28 28 extern unsigned int dcr_resource_len(const struct device_node *np, 29 29 unsigned int index); 30 30 #endif /* CONFIG_PPC_DCR */ 31 - #endif /* __ASSEMBLY__ */ 31 + #endif /* __ASSEMBLER__ */ 32 32 #endif /* __KERNEL__ */ 33 33 #endif /* _ASM_POWERPC_DCR_H */

+2 -2

arch/powerpc/include/asm/epapr_hcalls.h

··· 52 52 53 53 #include <uapi/asm/epapr_hcalls.h> 54 54 55 - #ifndef __ASSEMBLY__ 55 + #ifndef __ASSEMBLER__ 56 56 #include <linux/types.h> 57 57 #include <linux/errno.h> 58 58 #include <asm/byteorder.h> ··· 571 571 in[3] = p4; 572 572 return epapr_hypercall(in, out, nr); 573 573 } 574 - #endif /* !__ASSEMBLY__ */ 574 + #endif /* !__ASSEMBLER__ */ 575 575 #endif /* _EPAPR_HCALLS_H */

+1 -1

arch/powerpc/include/asm/exception-64e.h

··· 149 149 addi r11,r13,PACA_EXTLB; \ 150 150 TLB_MISS_RESTORE(r11) 151 151 152 - #ifndef __ASSEMBLY__ 152 + #ifndef __ASSEMBLER__ 153 153 extern unsigned int interrupt_base_book3e; 154 154 #endif 155 155

+3 -3

arch/powerpc/include/asm/exception-64s.h

··· 53 53 */ 54 54 #define MAX_MCE_DEPTH 4 55 55 56 - #ifdef __ASSEMBLY__ 56 + #ifdef __ASSEMBLER__ 57 57 58 58 #define STF_ENTRY_BARRIER_SLOT \ 59 59 STF_ENTRY_BARRIER_FIXUP_SECTION; \ ··· 170 170 RFSCV; \ 171 171 b rfscv_flush_fallback 172 172 173 - #else /* __ASSEMBLY__ */ 173 + #else /* __ASSEMBLER__ */ 174 174 /* Prototype for function defined in exceptions-64s.S */ 175 175 void do_uaccess_flush(void); 176 - #endif /* __ASSEMBLY__ */ 176 + #endif /* __ASSEMBLER__ */ 177 177 178 178 #endif /* _ASM_POWERPC_EXCEPTION_H */

+1 -1

arch/powerpc/include/asm/extable.h

··· 17 17 18 18 #define ARCH_HAS_RELATIVE_EXTABLE 19 19 20 - #ifndef __ASSEMBLY__ 20 + #ifndef __ASSEMBLER__ 21 21 22 22 struct exception_table_entry { 23 23 int insn;

+3 -3

arch/powerpc/include/asm/feature-fixups.h

··· 168 168 #define ALT_FW_FTR_SECTION_END_IFCLR(msk) \ 169 169 ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97) 170 170 171 - #ifndef __ASSEMBLY__ 171 + #ifndef __ASSEMBLER__ 172 172 173 173 #define ASM_FTR_IF(section_if, section_else, msk, val) \ 174 174 stringify_in_c(BEGIN_FTR_SECTION) \ ··· 196 196 #define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \ 197 197 ASM_MMU_FTR_IF(section_if, section_else, (msk), 0) 198 198 199 - #endif /* __ASSEMBLY__ */ 199 + #endif /* __ASSEMBLER__ */ 200 200 201 201 /* LWSYNC feature sections */ 202 202 #define START_LWSYNC_SECTION(label) label##1: ··· 276 276 FTR_ENTRY_OFFSET 956b-957b; \ 277 277 .popsection; 278 278 279 - #ifndef __ASSEMBLY__ 279 + #ifndef __ASSEMBLER__ 280 280 #include <linux/types.h> 281 281 282 282 extern long stf_barrier_fallback;

+2 -2

arch/powerpc/include/asm/firmware.h

··· 58 58 #define FW_FEATURE_WATCHDOG ASM_CONST(0x0000080000000000) 59 59 #define FW_FEATURE_PLPKS ASM_CONST(0x0000100000000000) 60 60 61 - #ifndef __ASSEMBLY__ 61 + #ifndef __ASSEMBLER__ 62 62 63 63 enum { 64 64 #ifdef CONFIG_PPC64 ··· 146 146 static inline void pseries_probe_fw_features(void) { } 147 147 #endif 148 148 149 - #endif /* __ASSEMBLY__ */ 149 + #endif /* __ASSEMBLER__ */ 150 150 #endif /* __KERNEL__ */ 151 151 #endif /* __ASM_POWERPC_FIRMWARE_H */

+2 -2

arch/powerpc/include/asm/fixmap.h

··· 14 14 #ifndef _ASM_FIXMAP_H 15 15 #define _ASM_FIXMAP_H 16 16 17 - #ifndef __ASSEMBLY__ 17 + #ifndef __ASSEMBLER__ 18 18 #include <linux/sizes.h> 19 19 #include <linux/pgtable.h> 20 20 #include <asm/page.h> ··· 111 111 #define VIRT_IMMR_BASE (__fix_to_virt(FIX_IMMR_BASE)) 112 112 #endif 113 113 114 - #endif /* !__ASSEMBLY__ */ 114 + #endif /* !__ASSEMBLER__ */ 115 115 #endif

+12

arch/powerpc/include/asm/fprobe.h

··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + #ifndef _ASM_PPC_FPROBE_H 3 + #define _ASM_PPC_FPROBE_H 4 + 5 + #include <asm-generic/fprobe.h> 6 + 7 + #ifdef CONFIG_64BIT 8 + #undef FPROBE_HEADER_MSB_PATTERN 9 + #define FPROBE_HEADER_MSB_PATTERN (PAGE_OFFSET & ~FPROBE_HEADER_MSB_MASK) 10 + #endif 11 + 12 + #endif /* _ASM_PPC_FPROBE_H */

+19 -4

arch/powerpc/include/asm/ftrace.h

··· 15 15 #define FTRACE_MCOUNT_MAX_OFFSET 8 16 16 #endif 17 17 18 - #ifndef __ASSEMBLY__ 18 + #ifndef __ASSEMBLER__ 19 19 extern void _mcount(void); 20 20 21 21 unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip, ··· 50 50 asm volatile("mfmsr %0" : "=r" ((_regs)->msr)); \ 51 51 } while (0) 52 52 53 + #undef ftrace_regs_get_return_value 54 + static __always_inline unsigned long 55 + ftrace_regs_get_return_value(const struct ftrace_regs *fregs) 56 + { 57 + return arch_ftrace_regs(fregs)->regs.gpr[3]; 58 + } 59 + #define ftrace_regs_get_return_value ftrace_regs_get_return_value 60 + 61 + #undef ftrace_regs_get_frame_pointer 62 + static __always_inline unsigned long 63 + ftrace_regs_get_frame_pointer(const struct ftrace_regs *fregs) 64 + { 65 + return arch_ftrace_regs(fregs)->regs.gpr[1]; 66 + } 67 + 53 68 static __always_inline void 54 69 ftrace_regs_set_instruction_pointer(struct ftrace_regs *fregs, 55 70 unsigned long ip) ··· 84 69 void ftrace_graph_func(unsigned long ip, unsigned long parent_ip, 85 70 struct ftrace_ops *op, struct ftrace_regs *fregs); 86 71 #endif 87 - #endif /* __ASSEMBLY__ */ 72 + #endif /* __ASSEMBLER__ */ 88 73 89 74 #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS 90 75 #define ARCH_SUPPORTS_FTRACE_OPS 1 91 76 #endif 92 77 #endif /* CONFIG_FUNCTION_TRACER */ 93 78 94 - #ifndef __ASSEMBLY__ 79 + #ifndef __ASSEMBLER__ 95 80 #ifdef CONFIG_FTRACE_SYSCALLS 96 81 /* 97 82 * Some syscall entry functions on powerpc start with "ppc_" (fork and clone, ··· 175 160 static inline void ftrace_free_init_tramp(void) { } 176 161 static inline unsigned long ftrace_call_adjust(unsigned long addr) { return addr; } 177 162 #endif 178 - #endif /* !__ASSEMBLY__ */ 163 + #endif /* !__ASSEMBLER__ */ 179 164 180 165 #endif /* _ASM_POWERPC_FTRACE */

+2 -2

arch/powerpc/include/asm/head-64.h

··· 4 4 5 5 #include <asm/cache.h> 6 6 7 - #ifdef __ASSEMBLY__ 7 + #ifdef __ASSEMBLER__ 8 8 /* 9 9 * We can't do CPP stringification and concatination directly into the section 10 10 * name for some reason, so these macros can do it for us. ··· 167 167 // find label from _within_ sname 168 168 #define ABS_ADDR(label, sname) (label - start_ ## sname + sname ## _start) 169 169 170 - #endif /* __ASSEMBLY__ */ 170 + #endif /* __ASSEMBLER__ */ 171 171 172 172 #endif /* _ASM_POWERPC_HEAD_64_H */

+2 -2

arch/powerpc/include/asm/hvcall.h

··· 534 534 #define H_HTM_TARGET_NODAL_CHIP_INDEX(x) ((unsigned long)(x)<<(63-31)) 535 535 #define H_HTM_TARGET_CORE_INDEX_ON_CHIP(x) ((unsigned long)(x)<<(63-47)) 536 536 537 - #ifndef __ASSEMBLY__ 537 + #ifndef __ASSEMBLER__ 538 538 #include <linux/types.h> 539 539 540 540 /** ··· 735 735 uint8_t bytes[HGPCI_MAX_DATA_BYTES]; 736 736 } __packed; 737 737 738 - #endif /* __ASSEMBLY__ */ 738 + #endif /* __ASSEMBLER__ */ 739 739 #endif /* __KERNEL__ */ 740 740 #endif /* _ASM_POWERPC_HVCALL_H */

+2 -2

arch/powerpc/include/asm/hw_irq.h

··· 59 59 #define IRQS_PMI_DISABLED 2 60 60 #define IRQS_ALL_DISABLED (IRQS_DISABLED | IRQS_PMI_DISABLED) 61 61 62 - #ifndef __ASSEMBLY__ 62 + #ifndef __ASSEMBLER__ 63 63 64 64 static inline void __hard_irq_enable(void) 65 65 { ··· 516 516 517 517 #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST 518 518 519 - #endif /* __ASSEMBLY__ */ 519 + #endif /* __ASSEMBLER__ */ 520 520 #endif /* __KERNEL__ */ 521 521 #endif /* _ASM_POWERPC_HW_IRQ_H */

+2 -2

arch/powerpc/include/asm/interrupt.h

··· 64 64 #define INTERRUPT_DATA_LOAD_TLB_MISS_603 0x1100 65 65 #define INTERRUPT_DATA_STORE_TLB_MISS_603 0x1200 66 66 67 - #ifndef __ASSEMBLY__ 67 + #ifndef __ASSEMBLER__ 68 68 69 69 #include <linux/context_tracking.h> 70 70 #include <linux/hardirq.h> ··· 675 675 unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs); 676 676 #endif 677 677 678 - #endif /* __ASSEMBLY__ */ 678 + #endif /* __ASSEMBLER__ */ 679 679 680 680 #endif /* _ASM_POWERPC_INTERRUPT_H */

+1 -1

arch/powerpc/include/asm/irqflags.h

··· 5 5 #ifndef _ASM_IRQFLAGS_H 6 6 #define _ASM_IRQFLAGS_H 7 7 8 - #ifndef __ASSEMBLY__ 8 + #ifndef __ASSEMBLER__ 9 9 /* 10 10 * Get definitions for arch_local_save_flags(x), etc. 11 11 */

+1 -1

arch/powerpc/include/asm/jump_label.h

+2 -2

arch/powerpc/include/asm/kasan.h

··· 12 12 #define EXPORT_SYMBOL_KASAN(fn) 13 13 #endif 14 14 15 - #ifndef __ASSEMBLY__ 15 + #ifndef __ASSEMBLER__ 16 16 17 17 #include <asm/page.h> 18 18 #include <linux/sizes.h> ··· 80 80 int kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_end); 81 81 int kasan_init_region(void *start, size_t size); 82 82 83 - #endif /* __ASSEMBLY */ 83 + #endif /* __ASSEMBLER__ */ 84 84 #endif

+2 -2

arch/powerpc/include/asm/kdump.h

··· 31 31 32 32 #endif /* CONFIG_CRASH_DUMP */ 33 33 34 - #ifndef __ASSEMBLY__ 34 + #ifndef __ASSEMBLER__ 35 35 36 36 #if defined(CONFIG_CRASH_DUMP) && !defined(CONFIG_NONSTATIC_KERNEL) 37 37 extern void reserve_kdump_trampoline(void); ··· 42 42 static inline void setup_kdump_trampoline(void) { ; } 43 43 #endif 44 44 45 - #endif /* __ASSEMBLY__ */ 45 + #endif /* __ASSEMBLER__ */ 46 46 47 47 #endif /* __PPC64_KDUMP_H */

+2 -2

arch/powerpc/include/asm/kexec.h

··· 49 49 #define KEXEC_STATE_IRQS_OFF 1 50 50 #define KEXEC_STATE_REAL_MODE 2 51 51 52 - #ifndef __ASSEMBLY__ 52 + #ifndef __ASSEMBLER__ 53 53 #include <asm/reg.h> 54 54 55 55 typedef void (*crash_shutdown_t)(void); ··· 210 210 } 211 211 #endif 212 212 213 - #endif /* ! __ASSEMBLY__ */ 213 + #endif /* ! __ASSEMBLER__ */ 214 214 #endif /* __KERNEL__ */ 215 215 #endif /* _ASM_POWERPC_KEXEC_H */

+2 -2

arch/powerpc/include/asm/kgdb.h

··· 21 21 #ifndef __POWERPC_KGDB_H__ 22 22 #define __POWERPC_KGDB_H__ 23 23 24 - #ifndef __ASSEMBLY__ 24 + #ifndef __ASSEMBLER__ 25 25 26 26 #define BREAK_INSTR_SIZE 4 27 27 #define BUFMAX ((NUMREGBYTES * 2) + 512) ··· 62 62 /* CR/LR, R1, R2, R13-R31 inclusive. */ 63 63 #define NUMCRITREGBYTES (23 * sizeof(int)) 64 64 #endif /* 32/64 */ 65 - #endif /* !(__ASSEMBLY__) */ 65 + #endif /* !(__ASSEMBLER__) */ 66 66 #endif /* !__POWERPC_KGDB_H__ */ 67 67 #endif /* __KERNEL__ */

+4 -4

arch/powerpc/include/asm/kup.h

··· 6 6 #define KUAP_WRITE 2 7 7 #define KUAP_READ_WRITE (KUAP_READ | KUAP_WRITE) 8 8 9 - #ifndef __ASSEMBLY__ 9 + #ifndef __ASSEMBLER__ 10 10 #include <linux/types.h> 11 11 12 12 static __always_inline bool kuap_is_disabled(void); ··· 28 28 #include <asm/book3s/32/kup.h> 29 29 #endif 30 30 31 - #ifdef __ASSEMBLY__ 31 + #ifdef __ASSEMBLER__ 32 32 #ifndef CONFIG_PPC_KUAP 33 33 .macro kuap_check_amr gpr1, gpr2 34 34 .endm 35 35 36 36 #endif 37 37 38 - #else /* !__ASSEMBLY__ */ 38 + #else /* !__ASSEMBLER__ */ 39 39 40 40 extern bool disable_kuep; 41 41 extern bool disable_kuap; ··· 181 181 prevent_user_access(KUAP_WRITE); 182 182 } 183 183 184 - #endif /* !__ASSEMBLY__ */ 184 + #endif /* !__ASSEMBLER__ */ 185 185 186 186 #endif /* _ASM_POWERPC_KUAP_H_ */

+1 -1

arch/powerpc/include/asm/kvm_asm.h

··· 9 9 #ifndef __POWERPC_KVM_ASM_H__ 10 10 #define __POWERPC_KVM_ASM_H__ 11 11 12 - #ifdef __ASSEMBLY__ 12 + #ifdef __ASSEMBLER__ 13 13 #ifdef CONFIG_64BIT 14 14 #define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg) 15 15 #define PPC_LD(treg, offset, areg) ld treg, (offset)(areg)

+3 -3

arch/powerpc/include/asm/kvm_book3s_asm.h

··· 20 20 /* Maximum number of subcores per physical core */ 21 21 #define MAX_SUBCORES 4 22 22 23 - #ifdef __ASSEMBLY__ 23 + #ifdef __ASSEMBLER__ 24 24 25 25 #ifdef CONFIG_KVM_BOOK3S_HANDLER 26 26 ··· 58 58 59 59 #endif /* CONFIG_KVM_BOOK3S_HANDLER */ 60 60 61 - #else /*__ASSEMBLY__ */ 61 + #else /*__ASSEMBLER__ */ 62 62 63 63 struct kvmppc_vcore; 64 64 ··· 150 150 #endif 151 151 }; 152 152 153 - #endif /*__ASSEMBLY__ */ 153 + #endif /*__ASSEMBLER__ */ 154 154 155 155 /* Values for kvm_state */ 156 156 #define KVM_HWTHREAD_IN_KERNEL 0

+2 -2

arch/powerpc/include/asm/kvm_booke_hv_asm.h

··· 8 8 9 9 #include <asm/feature-fixups.h> 10 10 11 - #ifdef __ASSEMBLY__ 11 + #ifdef __ASSEMBLER__ 12 12 13 13 /* 14 14 * All exceptions from guest state must go through KVM ··· 64 64 #endif 65 65 .endm 66 66 67 - #endif /*__ASSEMBLY__ */ 67 + #endif /*__ASSEMBLER__ */ 68 68 #endif /* ASM_KVM_BOOKE_HV_ASM_H */

+2 -2

arch/powerpc/include/asm/lv1call.h

··· 10 10 #if !defined(_ASM_POWERPC_LV1CALL_H) 11 11 #define _ASM_POWERPC_LV1CALL_H 12 12 13 - #if !defined(__ASSEMBLY__) 13 + #if !defined(__ASSEMBLER__) 14 14 15 15 #include <linux/types.h> 16 16 #include <linux/export.h> ··· 211 211 {return _lv1_##name(LV1_##in##_IN_##out##_OUT_ARGS);} 212 212 #endif 213 213 214 - #endif /* !defined(__ASSEMBLY__) */ 214 + #endif /* !defined(__ASSEMBLER__) */ 215 215 216 216 /* lv1 call table */ 217 217

+4 -4

arch/powerpc/include/asm/mmu.h

··· 137 137 MMU_FTR_CI_LARGE_PAGE 138 138 #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ 139 139 MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B 140 - #ifndef __ASSEMBLY__ 140 + #ifndef __ASSEMBLER__ 141 141 #include <linux/bug.h> 142 142 #include <asm/cputable.h> 143 143 #include <asm/page.h> ··· 332 332 { 333 333 return IS_ENABLED(CONFIG_STRICT_MODULE_RWX) && strict_kernel_rwx_enabled(); 334 334 } 335 - #endif /* !__ASSEMBLY__ */ 335 + #endif /* !__ASSEMBLER__ */ 336 336 337 337 /* The kernel use the constants below to index in the page sizes array. 338 338 * The use of fixed constants for this purpose is better for performances ··· 377 377 #include <asm/book3s/64/mmu.h> 378 378 #else /* CONFIG_PPC_BOOK3S_64 */ 379 379 380 - #ifndef __ASSEMBLY__ 380 + #ifndef __ASSEMBLER__ 381 381 /* MMU initialization */ 382 382 extern void early_init_mmu(void); 383 383 extern void early_init_mmu_secondary(void); ··· 388 388 static inline void pkey_early_init_devtree(void) {} 389 389 390 390 extern void *abatron_pteptrs[2]; 391 - #endif /* __ASSEMBLY__ */ 391 + #endif /* __ASSEMBLER__ */ 392 392 #endif 393 393 394 394 #if defined(CONFIG_PPC_BOOK3S_32)

+1

arch/powerpc/include/asm/module.h

··· 27 27 struct mod_arch_specific { 28 28 #ifdef __powerpc64__ 29 29 unsigned int stubs_section; /* Index of stubs section in module */ 30 + unsigned int stub_count; /* Number of stubs used */ 30 31 #ifdef CONFIG_PPC_KERNEL_PCREL 31 32 unsigned int got_section; /* What section is the GOT? */ 32 33 unsigned int pcpu_section; /* .data..percpu section */

+6 -6

arch/powerpc/include/asm/mpc52xx.h

··· 13 13 #ifndef __ASM_POWERPC_MPC52xx_H__ 14 14 #define __ASM_POWERPC_MPC52xx_H__ 15 15 16 - #ifndef __ASSEMBLY__ 16 + #ifndef __ASSEMBLER__ 17 17 #include <asm/types.h> 18 18 #include <asm/mpc5xxx.h> 19 - #endif /* __ASSEMBLY__ */ 19 + #endif /* __ASSEMBLER__ */ 20 20 21 21 #include <linux/suspend.h> 22 22 ··· 30 30 /* Structures mapping of some unit register set */ 31 31 /* ======================================================================== */ 32 32 33 - #ifndef __ASSEMBLY__ 33 + #ifndef __ASSEMBLER__ 34 34 35 35 /* Memory Mapping Control */ 36 36 struct mpc52xx_mmap_ctl { ··· 258 258 u32 per_error; /* INTR + 0x38 */ 259 259 }; 260 260 261 - #endif /* __ASSEMBLY__ */ 261 + #endif /* __ASSEMBLER__ */ 262 262 263 263 264 264 /* ========================================================================= */ 265 265 /* Prototypes for MPC52xx sysdev */ 266 266 /* ========================================================================= */ 267 267 268 - #ifndef __ASSEMBLY__ 268 + #ifndef __ASSEMBLER__ 269 269 270 270 struct device_node; 271 271 ··· 297 297 static inline void mpc52xx_setup_pci(void) { } 298 298 #endif 299 299 300 - #endif /* __ASSEMBLY__ */ 300 + #endif /* __ASSEMBLER__ */ 301 301 302 302 #ifdef CONFIG_PM 303 303 struct mpc52xx_suspend {

+2 -2

arch/powerpc/include/asm/nohash/32/kup-8xx.h

··· 7 7 8 8 #ifdef CONFIG_PPC_KUAP 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 #include <asm/reg.h> 13 13 ··· 82 82 return !((regs->kuap ^ MD_APG_KUAP) & 0xff000000); 83 83 } 84 84 85 - #endif /* !__ASSEMBLY__ */ 85 + #endif /* !__ASSEMBLER__ */ 86 86 87 87 #endif /* CONFIG_PPC_KUAP */ 88 88

+2 -2

arch/powerpc/include/asm/nohash/32/mmu-44x.h

··· 100 100 #define PPC47x_TLB2_S_RW (PPC47x_TLB2_SW | PPC47x_TLB2_SR) 101 101 #define PPC47x_TLB2_IMG (PPC47x_TLB2_I | PPC47x_TLB2_M | PPC47x_TLB2_G) 102 102 103 - #ifndef __ASSEMBLY__ 103 + #ifndef __ASSEMBLER__ 104 104 105 105 extern unsigned int tlb_44x_hwater; 106 106 extern unsigned int tlb_44x_index; ··· 114 114 /* patch sites */ 115 115 extern s32 patch__tlb_44x_hwater_D, patch__tlb_44x_hwater_I; 116 116 117 - #endif /* !__ASSEMBLY__ */ 117 + #endif /* !__ASSEMBLER__ */ 118 118 119 119 #ifndef CONFIG_PPC_EARLY_DEBUG_44x 120 120 #define PPC44x_EARLY_TLBS 1

+2 -2

arch/powerpc/include/asm/nohash/32/mmu-8xx.h

··· 174 174 #define MODULES_SIZE (CONFIG_MODULES_SIZE * SZ_1M) 175 175 #define MODULES_VADDR (MODULES_END - MODULES_SIZE) 176 176 177 - #ifndef __ASSEMBLY__ 177 + #ifndef __ASSEMBLER__ 178 178 179 179 #include <linux/mmdebug.h> 180 180 #include <linux/sizes.h> ··· 265 265 extern s32 patch__itlbmiss_exit_1, patch__dtlbmiss_exit_1; 266 266 extern s32 patch__itlbmiss_perf, patch__dtlbmiss_perf; 267 267 268 - #endif /* !__ASSEMBLY__ */ 268 + #endif /* !__ASSEMBLER__ */ 269 269 270 270 #endif /* _ASM_POWERPC_MMU_8XX_H_ */

+6 -6

arch/powerpc/include/asm/nohash/32/pgtable.h

··· 4 4 5 5 #include <asm-generic/pgtable-nopmd.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 #include <linux/sched.h> 9 9 #include <linux/threads.h> 10 10 #include <asm/mmu.h> /* For sub-arch specific PPC_PIN_SIZE */ 11 11 12 - #endif /* __ASSEMBLY__ */ 12 + #endif /* __ASSEMBLER__ */ 13 13 14 14 #define PTE_INDEX_SIZE PTE_SHIFT 15 15 #define PMD_INDEX_SIZE 0 ··· 19 19 #define PMD_CACHE_INDEX PMD_INDEX_SIZE 20 20 #define PUD_CACHE_INDEX PUD_INDEX_SIZE 21 21 22 - #ifndef __ASSEMBLY__ 22 + #ifndef __ASSEMBLER__ 23 23 #define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE) 24 24 #define PMD_TABLE_SIZE 0 25 25 #define PUD_TABLE_SIZE 0 26 26 #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) 27 27 28 28 #define PMD_MASKED_BITS (PTE_TABLE_SIZE - 1) 29 - #endif /* __ASSEMBLY__ */ 29 + #endif /* __ASSEMBLER__ */ 30 30 31 31 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) 32 32 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) ··· 149 149 #define MAX_POSSIBLE_PHYSMEM_BITS 32 150 150 #endif 151 151 152 - #ifndef __ASSEMBLY__ 152 + #ifndef __ASSEMBLER__ 153 153 154 154 #define pmd_none(pmd) (!pmd_val(pmd)) 155 155 #define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD) ··· 199 199 /* We borrow LSB 2 to store the exclusive marker in swap PTEs. */ 200 200 #define _PAGE_SWP_EXCLUSIVE 0x000004 201 201 202 - #endif /* !__ASSEMBLY__ */ 202 + #endif /* !__ASSEMBLER__ */ 203 203 204 204 #endif /* __ASM_POWERPC_NOHASH_32_PGTABLE_H */

+1 -1

arch/powerpc/include/asm/nohash/32/pte-8xx.h

··· 83 83 84 84 #include <asm/pgtable-masks.h> 85 85 86 - #ifndef __ASSEMBLY__ 86 + #ifndef __ASSEMBLER__ 87 87 static inline pte_t pte_wrprotect(pte_t pte) 88 88 { 89 89 return __pte(pte_val(pte) | _PAGE_RO);

+4 -4

arch/powerpc/include/asm/nohash/64/pgtable-4k.h

··· 14 14 #define PUD_INDEX_SIZE 9 15 15 #define PGD_INDEX_SIZE 9 16 16 17 - #ifndef __ASSEMBLY__ 17 + #ifndef __ASSEMBLER__ 18 18 #define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE) 19 19 #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) 20 20 #define PUD_TABLE_SIZE (sizeof(pud_t) << PUD_INDEX_SIZE) 21 21 #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) 22 - #endif /* __ASSEMBLY__ */ 22 + #endif /* __ASSEMBLER__ */ 23 23 24 24 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) 25 25 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) ··· 57 57 #define p4d_bad(p4d) (p4d_val(p4d) == 0) 58 58 #define p4d_present(p4d) (p4d_val(p4d) != 0) 59 59 60 - #ifndef __ASSEMBLY__ 60 + #ifndef __ASSEMBLER__ 61 61 62 62 static inline pud_t *p4d_pgtable(p4d_t p4d) 63 63 { ··· 80 80 } 81 81 extern struct page *p4d_page(p4d_t p4d); 82 82 83 - #endif /* !__ASSEMBLY__ */ 83 + #endif /* !__ASSEMBLER__ */ 84 84 85 85 #define pud_ERROR(e) \ 86 86 pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))

+2 -2

arch/powerpc/include/asm/nohash/64/pgtable.h

··· 77 77 78 78 #define H_PAGE_4K_PFN 0 79 79 80 - #ifndef __ASSEMBLY__ 80 + #ifndef __ASSEMBLER__ 81 81 /* pte_clear moved to later in this file */ 82 82 83 83 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) ··· 209 209 __patch_exception((exc), (unsigned long)&name); \ 210 210 } while (0) 211 211 212 - #endif /* __ASSEMBLY__ */ 212 + #endif /* __ASSEMBLER__ */ 213 213 214 214 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */

+2 -2

arch/powerpc/include/asm/nohash/kup-booke.h

··· 7 7 8 8 #ifdef CONFIG_PPC_KUAP 9 9 10 - #ifdef __ASSEMBLY__ 10 + #ifdef __ASSEMBLER__ 11 11 12 12 .macro kuap_check_amr gpr1, gpr2 13 13 .endm ··· 105 105 return !regs->kuap; 106 106 } 107 107 108 - #endif /* !__ASSEMBLY__ */ 108 + #endif /* !__ASSEMBLER__ */ 109 109 110 110 #endif /* CONFIG_PPC_KUAP */ 111 111

+2 -2

arch/powerpc/include/asm/nohash/mmu-e500.h

··· 230 230 #define MAS2_M_IF_NEEDED 0 231 231 #endif 232 232 233 - #ifndef __ASSEMBLY__ 233 + #ifndef __ASSEMBLER__ 234 234 #include <asm/bug.h> 235 235 236 236 extern unsigned int tlbcam_index; ··· 318 318 #include <asm/percpu.h> 319 319 DECLARE_PER_CPU(int, next_tlbcam_idx); 320 320 321 - #endif /* !__ASSEMBLY__ */ 321 + #endif /* !__ASSEMBLER__ */ 322 322 323 323 #endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */

+1 -1

arch/powerpc/include/asm/nohash/pgalloc.h

··· 22 22 pgd_t *pgd = kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE), 23 23 pgtable_gfp_flags(mm, GFP_KERNEL)); 24 24 25 - #if defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_BOOK3S_603) 25 + #ifdef CONFIG_PPC_8xx 26 26 memcpy(pgd + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, 27 27 (MAX_PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); 28 28 #endif

+3 -3

arch/powerpc/include/asm/nohash/pgtable.h

··· 2 2 #ifndef _ASM_POWERPC_NOHASH_PGTABLE_H 3 3 #define _ASM_POWERPC_NOHASH_PGTABLE_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, pte_t *p, 7 7 unsigned long clr, unsigned long set, int huge); 8 8 #endif ··· 27 27 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO) 28 28 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX) 29 29 30 - #ifndef __ASSEMBLY__ 30 + #ifndef __ASSEMBLER__ 31 31 32 32 extern int icache_44x_need_flush; 33 33 ··· 373 373 int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot); 374 374 void unmap_kernel_page(unsigned long va); 375 375 376 - #endif /* __ASSEMBLY__ */ 376 + #endif /* __ASSEMBLER__ */ 377 377 #endif

+2 -2

arch/powerpc/include/asm/nohash/pte-e500.h

··· 86 86 87 87 #include <asm/pgtable-masks.h> 88 88 89 - #ifndef __ASSEMBLY__ 89 + #ifndef __ASSEMBLER__ 90 90 static inline pte_t pte_mkexec(pte_t pte) 91 91 { 92 92 return __pte((pte_val(pte) & ~_PAGE_BAP_SX) | _PAGE_BAP_UX); ··· 134 134 135 135 #endif 136 136 137 - #endif /* __ASSEMBLY__ */ 137 + #endif /* __ASSEMBLER__ */ 138 138 139 139 #endif /* __KERNEL__ */ 140 140 #endif /* _ASM_POWERPC_NOHASH_PTE_E500_H */

+2 -2

arch/powerpc/include/asm/opal-api.h

··· 246 246 #define OPAL_CONFIG_IDLE_UNDO 0 247 247 #define OPAL_CONFIG_IDLE_APPLY 1 248 248 249 - #ifndef __ASSEMBLY__ 249 + #ifndef __ASSEMBLER__ 250 250 251 251 /* Other enums */ 252 252 enum OpalFreezeState { ··· 1183 1183 struct opal_mpipl_region region[]; 1184 1184 } __packed; 1185 1185 1186 - #endif /* __ASSEMBLY__ */ 1186 + #endif /* __ASSEMBLER__ */ 1187 1187 1188 1188 #endif /* __OPAL_API_H */

+2 -2

arch/powerpc/include/asm/opal.h

··· 10 10 11 11 #include <asm/opal-api.h> 12 12 13 - #ifndef __ASSEMBLY__ 13 + #ifndef __ASSEMBLER__ 14 14 15 15 #include <linux/notifier.h> 16 16 ··· 390 390 void opal_psr_init(void); 391 391 void opal_sensor_groups_init(void); 392 392 393 - #endif /* __ASSEMBLY__ */ 393 + #endif /* __ASSEMBLER__ */ 394 394 395 395 #endif /* _ASM_POWERPC_OPAL_H */

+7 -7

arch/powerpc/include/asm/page.h

··· 6 6 * Copyright (C) 2001,2005 IBM Corporation. 7 7 */ 8 8 9 - #ifndef __ASSEMBLY__ 9 + #ifndef __ASSEMBLER__ 10 10 #include <linux/types.h> 11 11 #include <linux/kernel.h> 12 12 #include <linux/bug.h> ··· 23 23 */ 24 24 #include <vdso/page.h> 25 25 26 - #ifndef __ASSEMBLY__ 26 + #ifndef __ASSEMBLER__ 27 27 #ifndef CONFIG_HUGETLB_PAGE 28 28 #define HPAGE_SHIFT PAGE_SHIFT 29 29 #elif defined(CONFIG_PPC_BOOK3S_64) ··· 75 75 #define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START)) 76 76 77 77 #if defined(CONFIG_NONSTATIC_KERNEL) 78 - #ifndef __ASSEMBLY__ 78 + #ifndef __ASSEMBLER__ 79 79 80 80 extern phys_addr_t memstart_addr; 81 81 extern phys_addr_t kernstart_addr; ··· 84 84 extern long long virt_phys_offset; 85 85 #endif 86 86 87 - #endif /* __ASSEMBLY__ */ 87 + #endif /* __ASSEMBLER__ */ 88 88 #define PHYSICAL_START kernstart_addr 89 89 90 90 #else /* !CONFIG_NONSTATIC_KERNEL */ ··· 216 216 #endif 217 217 #endif 218 218 219 - #ifndef __ASSEMBLY__ 219 + #ifndef __ASSEMBLER__ 220 220 static inline unsigned long virt_to_pfn(const void *kaddr) 221 221 { 222 222 return __pa(kaddr) >> PAGE_SHIFT; ··· 261 261 #define is_kernel_addr(x) ((x) >= TASK_SIZE) 262 262 #endif 263 263 264 - #ifndef __ASSEMBLY__ 264 + #ifndef __ASSEMBLER__ 265 265 266 266 #ifdef CONFIG_PPC_BOOK3S_64 267 267 #include <asm/pgtable-be-types.h> ··· 290 290 } 291 291 292 292 #include <asm-generic/memory_model.h> 293 - #endif /* __ASSEMBLY__ */ 293 + #endif /* __ASSEMBLER__ */ 294 294 295 295 #endif /* _ASM_POWERPC_PAGE_H */

+2 -2

arch/powerpc/include/asm/page_32.h

··· 19 19 #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ 20 20 #endif 21 21 22 - #ifndef __ASSEMBLY__ 22 + #ifndef __ASSEMBLER__ 23 23 /* 24 24 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit 25 25 * physical addressing. ··· 53 53 #define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1) 54 54 #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) 55 55 56 - #endif /* __ASSEMBLY__ */ 56 + #endif /* __ASSEMBLER__ */ 57 57 58 58 #endif /* _ASM_POWERPC_PAGE_32_H */

+2 -2

arch/powerpc/include/asm/page_64.h

··· 35 35 #define ESID_MASK_1T 0xffffff0000000000UL 36 36 #define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T) 37 37 38 - #ifndef __ASSEMBLY__ 38 + #ifndef __ASSEMBLER__ 39 39 #include <asm/cache.h> 40 40 41 41 typedef unsigned long pte_basic_t; ··· 82 82 /* Log 2 of page table size */ 83 83 extern u64 ppc64_pft_size; 84 84 85 - #endif /* __ASSEMBLY__ */ 85 + #endif /* __ASSEMBLER__ */ 86 86 87 87 #define VM_DATA_DEFAULT_FLAGS \ 88 88 (is_32bit_task() ? \

+1

arch/powerpc/include/asm/papr-sysparm.h

··· 21 21 #define PAPR_SYSPARM_COOP_MEM_OVERCOMMIT_ATTRS mk_papr_sysparm(44) 22 22 #define PAPR_SYSPARM_TLB_BLOCK_INVALIDATE_ATTRS mk_papr_sysparm(50) 23 23 #define PAPR_SYSPARM_LPAR_NAME mk_papr_sysparm(55) 24 + #define PAPR_SYSPARM_HVPIPE_ENABLE mk_papr_sysparm(64) 24 25 25 26 /** 26 27 * struct papr_sysparm_buf - RTAS work area layout for system parameter functions.

-2

arch/powerpc/include/asm/pci-bridge.h

··· 133 133 134 134 /* IRQ domain hierarchy */ 135 135 struct irq_domain *dev_domain; 136 - struct irq_domain *msi_domain; 137 - struct fwnode_handle *fwnode; 138 136 139 137 /* iommu_ops support */ 140 138 struct iommu_device iommu;

+4 -16

arch/powerpc/include/asm/pgtable.h

··· 2 2 #ifndef _ASM_POWERPC_PGTABLE_H 3 3 #define _ASM_POWERPC_PGTABLE_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 #include <linux/mmdebug.h> 7 7 #include <linux/mmzone.h> 8 8 #include <asm/processor.h> /* For TASK_SIZE */ ··· 12 12 13 13 struct mm_struct; 14 14 15 - #endif /* !__ASSEMBLY__ */ 15 + #endif /* !__ASSEMBLER__ */ 16 16 17 17 #ifdef CONFIG_PPC_BOOK3S 18 18 #include <asm/book3s/pgtable.h> 19 19 #else 20 20 #include <asm/nohash/pgtable.h> 21 21 #endif /* !CONFIG_PPC_BOOK3S */ 22 - 23 - /* 24 - * Protection used for kernel text. We want the debuggers to be able to 25 - * set breakpoints anywhere, so don't write protect the kernel text 26 - * on platforms where such control is possible. 27 - */ 28 - #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \ 29 - defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE) 30 - #define PAGE_KERNEL_TEXT PAGE_KERNEL_X 31 - #else 32 - #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX 33 - #endif 34 22 35 23 /* Make modules code happy. We don't set RO yet */ 36 24 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X ··· 27 39 #define PAGE_AGP (PAGE_KERNEL_NC) 28 40 #define HAVE_PAGE_AGP 29 41 30 - #ifndef __ASSEMBLY__ 42 + #ifndef __ASSEMBLER__ 31 43 32 44 #define PFN_PTE_SHIFT PTE_RPN_SHIFT 33 45 ··· 202 214 203 215 #endif /* CONFIG_PPC64 */ 204 216 205 - #endif /* __ASSEMBLY__ */ 217 + #endif /* __ASSEMBLER__ */ 206 218 207 219 #endif /* _ASM_POWERPC_PGTABLE_H */

+1

arch/powerpc/include/asm/ppc-opcode.h

··· 571 571 (0x54000001 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me)) 572 572 #define PPC_RAW_RLWIMI(d, a, i, mb, me) (0x50000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me)) 573 573 #define PPC_RAW_RLDICL(d, a, i, mb) (0x78000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb)) 574 + #define PPC_RAW_RLDICL_DOT(d, a, i, mb) (0x78000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb) | 0x1) 574 575 #define PPC_RAW_RLDICR(d, a, i, me) (0x78000004 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_ME64(me)) 575 576 576 577 /* slwi = rlwinm Rx, Ry, n, 0, 31-n */

+2 -2

arch/powerpc/include/asm/ppc_asm.h

··· 12 12 #include <asm/feature-fixups.h> 13 13 #include <asm/extable.h> 14 14 15 - #ifdef __ASSEMBLY__ 15 + #ifdef __ASSEMBLER__ 16 16 17 17 #define SZL (BITS_PER_LONG/8) 18 18 ··· 868 868 869 869 #endif /* !CONFIG_PPC_BOOK3E_64 */ 870 870 871 - #endif /* __ASSEMBLY__ */ 871 + #endif /* __ASSEMBLER__ */ 872 872 873 873 #define SOFT_MASK_TABLE(_start, _end) \ 874 874 stringify_in_c(.section __soft_mask_table,"a";)\

+4 -4

arch/powerpc/include/asm/processor.h

··· 29 29 #ifdef CONFIG_PPC64 30 30 /* Default SMT priority is set to 3. Use 11- 13bits to save priority. */ 31 31 #define PPR_PRIORITY 3 32 - #ifdef __ASSEMBLY__ 32 + #ifdef __ASSEMBLER__ 33 33 #define DEFAULT_PPR (PPR_PRIORITY << 50) 34 34 #else 35 35 #define DEFAULT_PPR ((u64)PPR_PRIORITY << 50) 36 - #endif /* __ASSEMBLY__ */ 36 + #endif /* __ASSEMBLER__ */ 37 37 #endif /* CONFIG_PPC64 */ 38 38 39 - #ifndef __ASSEMBLY__ 39 + #ifndef __ASSEMBLER__ 40 40 #include <linux/types.h> 41 41 #include <linux/thread_info.h> 42 42 #include <asm/ptrace.h> ··· 460 460 void *exit_vmx_ops(void *dest); 461 461 462 462 #endif /* __KERNEL__ */ 463 - #endif /* __ASSEMBLY__ */ 463 + #endif /* __ASSEMBLER__ */ 464 464 #endif /* _ASM_POWERPC_PROCESSOR_H */

+3 -3

arch/powerpc/include/asm/ptrace.h

··· 24 24 #include <asm/asm-const.h> 25 25 #include <asm/reg.h> 26 26 27 - #ifndef __ASSEMBLY__ 27 + #ifndef __ASSEMBLER__ 28 28 struct pt_regs 29 29 { 30 30 union { ··· 165 165 #define STACK_INT_FRAME_SIZE (KERNEL_REDZONE_SIZE + STACK_USER_INT_FRAME_SIZE) 166 166 #define STACK_INT_FRAME_MARKER_LONGS (STACK_INT_FRAME_MARKER/sizeof(long)) 167 167 168 - #ifndef __ASSEMBLY__ 168 + #ifndef __ASSEMBLER__ 169 169 #include <asm/paca.h> 170 170 171 171 #ifdef CONFIG_SMP ··· 414 414 return 0; 415 415 } 416 416 417 - #endif /* __ASSEMBLY__ */ 417 + #endif /* __ASSEMBLER__ */ 418 418 419 419 #ifndef __powerpc64__ 420 420 /* We need PT_SOFTE defined at all time to avoid #ifdefs */

+3 -3

arch/powerpc/include/asm/reg.h

··· 60 60 #define MSR_RI_LG 1 /* Recoverable Exception */ 61 61 #define MSR_LE_LG 0 /* Little Endian */ 62 62 63 - #ifdef __ASSEMBLY__ 63 + #ifdef __ASSEMBLER__ 64 64 #define __MASK(X) (1<<(X)) 65 65 #else 66 66 #define __MASK(X) (1UL<<(X)) ··· 1358 1358 #define PVR_ARCH_31_P11 0x0f000007 1359 1359 1360 1360 /* Macros for setting and retrieving special purpose registers */ 1361 - #ifndef __ASSEMBLY__ 1361 + #ifndef __ASSEMBLER__ 1362 1362 1363 1363 #if defined(CONFIG_PPC64) || defined(__CHECKER__) 1364 1364 typedef struct { ··· 1450 1450 struct pt_regs; 1451 1451 1452 1452 extern void ppc_save_regs(struct pt_regs *regs); 1453 - #endif /* __ASSEMBLY__ */ 1453 + #endif /* __ASSEMBLER__ */ 1454 1454 #endif /* __KERNEL__ */ 1455 1455 #endif /* _ASM_POWERPC_REG_H */

+2 -2

arch/powerpc/include/asm/reg_booke.h

··· 576 576 577 577 #define TEN_THREAD(x) (1 << (x)) 578 578 579 - #ifndef __ASSEMBLY__ 579 + #ifndef __ASSEMBLER__ 580 580 #define mftmr(rn) ({unsigned long rval; \ 581 581 asm volatile(MFTMR(rn, %0) : "=r" (rval)); rval;}) 582 582 #define mttmr(rn, v) asm volatile(MTTMR(rn, %0) : \ ··· 585 585 586 586 extern unsigned long global_dbcr0[]; 587 587 588 - #endif /* !__ASSEMBLY__ */ 588 + #endif /* !__ASSEMBLER__ */ 589 589 590 590 #endif /* __ASM_POWERPC_REG_BOOKE_H__ */ 591 591 #endif /* __KERNEL__ */

+2 -2

arch/powerpc/include/asm/reg_fsl_emb.h

··· 9 9 10 10 #include <linux/stringify.h> 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 /* Performance Monitor Registers */ 14 14 static __always_inline unsigned int mfpmr(unsigned int rn) 15 15 { ··· 32 32 ".machine pop;" 33 33 : [val] "=r" (val) : [rn] "i" (rn)); 34 34 } 35 - #endif /* __ASSEMBLY__ */ 35 + #endif /* __ASSEMBLER__ */ 36 36 37 37 /* Freescale Book E Performance Monitor APU Registers */ 38 38 #define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */

+9

arch/powerpc/include/asm/rtas.h

··· 68 68 RTAS_FNIDX__IBM_READ_PCI_CONFIG, 69 69 RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE, 70 70 RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE2, 71 + RTAS_FNIDX__IBM_RECEIVE_HVPIPE_MSG, 71 72 RTAS_FNIDX__IBM_REMOVE_PE_DMA_WINDOW, 72 73 RTAS_FNIDX__IBM_RESET_PE_DMA_WINDOW, 73 74 RTAS_FNIDX__IBM_SCAN_LOG_DUMP, 75 + RTAS_FNIDX__IBM_SEND_HVPIPE_MSG, 74 76 RTAS_FNIDX__IBM_SET_DYNAMIC_INDICATOR, 75 77 RTAS_FNIDX__IBM_SET_EEH_OPTION, 76 78 RTAS_FNIDX__IBM_SET_SLOT_RESET, ··· 165 163 #define RTAS_FN_IBM_READ_PCI_CONFIG rtas_fn_handle(RTAS_FNIDX__IBM_READ_PCI_CONFIG) 166 164 #define RTAS_FN_IBM_READ_SLOT_RESET_STATE rtas_fn_handle(RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE) 167 165 #define RTAS_FN_IBM_READ_SLOT_RESET_STATE2 rtas_fn_handle(RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE2) 166 + #define RTAS_FN_IBM_RECEIVE_HVPIPE_MSG rtas_fn_handle(RTAS_FNIDX__IBM_RECEIVE_HVPIPE_MSG) 168 167 #define RTAS_FN_IBM_REMOVE_PE_DMA_WINDOW rtas_fn_handle(RTAS_FNIDX__IBM_REMOVE_PE_DMA_WINDOW) 169 168 #define RTAS_FN_IBM_RESET_PE_DMA_WINDOW rtas_fn_handle(RTAS_FNIDX__IBM_RESET_PE_DMA_WINDOW) 170 169 #define RTAS_FN_IBM_SCAN_LOG_DUMP rtas_fn_handle(RTAS_FNIDX__IBM_SCAN_LOG_DUMP) 170 + #define RTAS_FN_IBM_SEND_HVPIPE_MSG rtas_fn_handle(RTAS_FNIDX__IBM_SEND_HVPIPE_MSG) 171 171 #define RTAS_FN_IBM_SET_DYNAMIC_INDICATOR rtas_fn_handle(RTAS_FNIDX__IBM_SET_DYNAMIC_INDICATOR) 172 172 #define RTAS_FN_IBM_SET_EEH_OPTION rtas_fn_handle(RTAS_FNIDX__IBM_SET_EEH_OPTION) 173 173 #define RTAS_FN_IBM_SET_SLOT_RESET rtas_fn_handle(RTAS_FNIDX__IBM_SET_SLOT_RESET) ··· 221 217 #define RTAS_HARDWARE_ERROR -1 /* Hardware or other unspecified error. */ 222 218 #define RTAS_BUSY -2 /* Retry immediately. */ 223 219 #define RTAS_INVALID_PARAMETER -3 /* Invalid indicator/domain/sensor etc. */ 220 + #define RTAS_FUNC_NOT_SUPPORTED -5 /* Function not supported */ 224 221 #define RTAS_UNEXPECTED_STATE_CHANGE -7 /* Seems limited to EEH and slot reset. */ 225 222 #define RTAS_EXTENDED_DELAY_MIN 9900 /* Retry after delaying for ~1ms. */ 226 223 #define RTAS_EXTENDED_DELAY_MAX 9905 /* Retry after delaying for ~100s. */ ··· 238 233 #define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */ 239 234 #define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */ 240 235 #define RTAS_IO_EVENTS 0x08000000 /* set bit 4 */ 236 + #define RTAS_HVPIPE_MSG_EVENTS 0x04000000 /* set bit 5 */ 241 237 #define RTAS_EVENT_SCAN_ALL_EVENTS 0xffffffff 242 238 243 239 /* RTAS event severity */ ··· 288 282 #define RTAS_TYPE_DEALLOC 0xE3 289 283 #define RTAS_TYPE_DUMP 0xE4 290 284 #define RTAS_TYPE_HOTPLUG 0xE5 285 + #define RTAS_TYPE_HVPIPE 0xE6 291 286 /* I don't add PowerMGM events right now, this is a different topic */ 292 287 #define RTAS_TYPE_PMGM_POWER_SW_ON 0x60 293 288 #define RTAS_TYPE_PMGM_POWER_SW_OFF 0x61 ··· 381 374 #define PSERIES_ELOG_SECT_ID_HMC_ID (('H' << 8) | 'M') 382 375 #define PSERIES_ELOG_SECT_ID_EPOW (('E' << 8) | 'P') 383 376 #define PSERIES_ELOG_SECT_ID_IO_EVENT (('I' << 8) | 'E') 377 + #define PSERIES_ELOG_SECT_ID_HVPIPE_EVENT (('P' << 8) | 'E') 384 378 #define PSERIES_ELOG_SECT_ID_MANUFACT_INFO (('M' << 8) | 'I') 385 379 #define PSERIES_ELOG_SECT_ID_CALL_HOME (('C' << 8) | 'H') 386 380 #define PSERIES_ELOG_SECT_ID_USER_DEF (('U' << 8) | 'D') ··· 527 519 extern struct mutex rtas_ibm_set_dynamic_indicator_lock; 528 520 extern struct mutex rtas_ibm_get_dynamic_sensor_state_lock; 529 521 extern struct mutex rtas_ibm_physical_attestation_lock; 522 + extern struct mutex rtas_ibm_send_hvpipe_msg_lock; 530 523 531 524 #define GLOBAL_INTERRUPT_QUEUE 9005 532 525

+2 -2

arch/powerpc/include/asm/setup.h

··· 4 4 5 5 #include <uapi/asm/setup.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 extern void ppc_printk_progress(char *s, unsigned short hex); 9 9 10 10 extern unsigned long long memory_limit; ··· 89 89 90 90 extern struct seq_buf ppc_hw_desc; 91 91 92 - #endif /* !__ASSEMBLY__ */ 92 + #endif /* !__ASSEMBLER__ */ 93 93 94 94 #endif /* _ASM_POWERPC_SETUP_H */ 95 95

+2 -2

arch/powerpc/include/asm/smp.h

··· 18 18 #include <linux/kernel.h> 19 19 #include <linux/irqreturn.h> 20 20 21 - #ifndef __ASSEMBLY__ 21 + #ifndef __ASSEMBLER__ 22 22 23 23 #ifdef CONFIG_PPC64 24 24 #include <asm/paca.h> ··· 266 266 extern unsigned int booting_thread_hwid; 267 267 268 268 extern void __early_start(void); 269 - #endif /* __ASSEMBLY__ */ 269 + #endif /* __ASSEMBLER__ */ 270 270 271 271 #endif /* __KERNEL__ */ 272 272 #endif /* _ASM_POWERPC_SMP_H) */

+2 -2

arch/powerpc/include/asm/spu_csa.h

··· 43 43 #define SPU_DECR_STATUS_RUNNING 0x1 44 44 #define SPU_DECR_STATUS_WRAPPED 0x2 45 45 46 - #ifndef __ASSEMBLY__ 46 + #ifndef __ASSEMBLER__ 47 47 /** 48 48 * spu_reg128 - generic 128-bit register definition. 49 49 */ ··· 243 243 244 244 #endif /* !__SPU__ */ 245 245 #endif /* __KERNEL__ */ 246 - #endif /* !__ASSEMBLY__ */ 246 + #endif /* !__ASSEMBLER__ */ 247 247 #endif /* _SPU_CSA_H_ */

+2 -2

arch/powerpc/include/asm/synch.h

··· 7 7 #include <asm/feature-fixups.h> 8 8 #include <asm/ppc-opcode.h> 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; 12 12 extern void do_lwsync_fixups(unsigned long value, void *fixup_start, 13 13 void *fixup_end); ··· 40 40 */ 41 41 asm volatile(ASM_FTR_IFSET(PPC_CP_ABORT, "", %0) : : "i" (CPU_FTR_ARCH_31) : "memory"); 42 42 } 43 - #endif /* __ASSEMBLY__ */ 43 + #endif /* __ASSEMBLER__ */ 44 44 45 45 #if defined(__powerpc64__) 46 46 # define LWSYNC lwsync

+4 -4

arch/powerpc/include/asm/thread_info.h

··· 41 41 42 42 #define THREAD_ALIGN (1 << THREAD_ALIGN_SHIFT) 43 43 44 - #ifndef __ASSEMBLY__ 44 + #ifndef __ASSEMBLER__ 45 45 #include <linux/cache.h> 46 46 #include <asm/processor.h> 47 47 #include <asm/accounting.h> ··· 89 89 void arch_setup_new_exec(void); 90 90 #define arch_setup_new_exec arch_setup_new_exec 91 91 92 - #endif /* __ASSEMBLY__ */ 92 + #endif /* __ASSEMBLER__ */ 93 93 94 94 /* 95 95 * thread information flag bit numbers ··· 162 162 #define _TLF_LAZY_MMU (1 << TLF_LAZY_MMU) 163 163 #define _TLF_RUNLATCH (1 << TLF_RUNLATCH) 164 164 165 - #ifndef __ASSEMBLY__ 165 + #ifndef __ASSEMBLER__ 166 166 167 167 static inline void clear_thread_local_flags(unsigned int flags) 168 168 { ··· 233 233 extern void *emergency_ctx[]; 234 234 #endif 235 235 236 - #endif /* !__ASSEMBLY__ */ 236 + #endif /* !__ASSEMBLER__ */ 237 237 238 238 #endif /* __KERNEL__ */ 239 239

+4

arch/powerpc/include/asm/time.h

··· 29 29 30 30 extern void generic_calibrate_decr(void); 31 31 32 + #ifdef CONFIG_PPC_SPLPAR 33 + extern u64 get_boot_tb(void); 34 + #endif 35 + 32 36 /* Some sane defaults: 125 MHz timebase, 1GHz processor */ 33 37 extern unsigned long ppc_proc_freq; 34 38 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)

+2 -2

arch/powerpc/include/asm/tm.h

··· 8 8 9 9 #include <uapi/asm/tm.h> 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 extern void tm_reclaim(struct thread_struct *thread, 14 14 uint8_t cause); ··· 19 19 20 20 extern bool tm_suspend_disabled; 21 21 22 - #endif /* __ASSEMBLY__ */ 22 + #endif /* __ASSEMBLER__ */

+2 -2

arch/powerpc/include/asm/types.h

··· 11 11 12 12 #include <uapi/asm/types.h> 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 16 16 typedef __vector128 vector128; 17 17 18 - #endif /* __ASSEMBLY__ */ 18 + #endif /* __ASSEMBLER__ */ 19 19 20 20 #endif /* _ASM_POWERPC_TYPES_H */

+2 -2

arch/powerpc/include/asm/unistd.h

··· 9 9 10 10 #define NR_syscalls __NR_syscalls 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 14 14 #include <linux/types.h> 15 15 #include <linux/compiler.h> ··· 52 52 #define __ARCH_WANT_SYS_VFORK 53 53 #define __ARCH_WANT_SYS_CLONE 54 54 55 - #endif /* __ASSEMBLY__ */ 55 + #endif /* __ASSEMBLER__ */ 56 56 #endif /* _ASM_POWERPC_UNISTD_H_ */

+3 -3

arch/powerpc/include/asm/vdso.h

··· 5 5 #define VDSO_VERSION_STRING LINUX_2.6.15 6 6 #define __VDSO_PAGES 4 7 7 8 - #ifndef __ASSEMBLY__ 8 + #ifndef __ASSEMBLER__ 9 9 10 10 #ifdef CONFIG_PPC64 11 11 #include <generated/vdso64-offsets.h> ··· 21 21 22 22 int vdso_getcpu_init(void); 23 23 24 - #else /* __ASSEMBLY__ */ 24 + #else /* __ASSEMBLER__ */ 25 25 26 26 #ifdef __VDSO64__ 27 27 #define V_FUNCTION_BEGIN(name) \ ··· 49 49 50 50 #endif /* __VDSO32__ */ 51 51 52 - #endif /* __ASSEMBLY__ */ 52 + #endif /* __ASSEMBLER__ */ 53 53 54 54 #endif /* _ASM_POWERPC_VDSO_H */

+2 -2

arch/powerpc/include/asm/vdso/getrandom.h

··· 5 5 #ifndef _ASM_POWERPC_VDSO_GETRANDOM_H 6 6 #define _ASM_POWERPC_VDSO_GETRANDOM_H 7 7 8 - #ifndef __ASSEMBLY__ 8 + #ifndef __ASSEMBLER__ 9 9 10 10 #include <asm/vdso_datapage.h> 11 11 ··· 62 62 ssize_t __c_kernel_getrandom(void *buffer, size_t len, unsigned int flags, void *opaque_state, 63 63 size_t opaque_len); 64 64 65 - #endif /* !__ASSEMBLY__ */ 65 + #endif /* !__ASSEMBLER__ */ 66 66 67 67 #endif /* _ASM_POWERPC_VDSO_GETRANDOM_H */

+2 -2

arch/powerpc/include/asm/vdso/gettimeofday.h

··· 2 2 #ifndef _ASM_POWERPC_VDSO_GETTIMEOFDAY_H 3 3 #define _ASM_POWERPC_VDSO_GETTIMEOFDAY_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <asm/vdso/timebase.h> 8 8 #include <asm/barrier.h> ··· 141 141 __kernel_old_time_t __c_kernel_time(__kernel_old_time_t *time, 142 142 const struct vdso_time_data *vd); 143 143 144 - #endif /* __ASSEMBLY__ */ 144 + #endif /* __ASSEMBLER__ */ 145 145 146 146 #endif /* _ASM_POWERPC_VDSO_GETTIMEOFDAY_H */

+2 -2

arch/powerpc/include/asm/vdso/processor.h

··· 2 2 #ifndef _ASM_POWERPC_VDSO_PROCESSOR_H 3 3 #define _ASM_POWERPC_VDSO_PROCESSOR_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 /* Macros for adjusting thread priority (hardware multi-threading) */ 8 8 #ifdef CONFIG_PPC64 ··· 33 33 #define cpu_relax() barrier() 34 34 #endif 35 35 36 - #endif /* __ASSEMBLY__ */ 36 + #endif /* __ASSEMBLER__ */ 37 37 38 38 #endif /* _ASM_POWERPC_VDSO_PROCESSOR_H */

+2 -2

arch/powerpc/include/asm/vdso/vsyscall.h

··· 2 2 #ifndef _ASM_POWERPC_VDSO_VSYSCALL_H 3 3 #define _ASM_POWERPC_VDSO_VSYSCALL_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <asm/vdso_datapage.h> 8 8 9 9 /* The asm-generic header needs to be included after the definitions above */ 10 10 #include <asm-generic/vdso/vsyscall.h> 11 11 12 - #endif /* !__ASSEMBLY__ */ 12 + #endif /* !__ASSEMBLER__ */ 13 13 14 14 #endif /* _ASM_POWERPC_VDSO_VSYSCALL_H */

+3 -3

arch/powerpc/include/asm/vdso_datapage.h

··· 9 9 * IBM Corp. 10 10 */ 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 14 14 #include <vdso/datapage.h> 15 15 16 - #else /* __ASSEMBLY__ */ 16 + #else /* __ASSEMBLER__ */ 17 17 18 18 .macro get_datapage ptr symbol 19 19 bcl 20, 31, .+4 ··· 23 23 addi \ptr, \ptr, (\symbol - 999b)@l 24 24 .endm 25 25 26 - #endif /* __ASSEMBLY__ */ 26 + #endif /* __ASSEMBLER__ */ 27 27 28 28 #endif /* __KERNEL__ */ 29 29 #endif /* _SYSTEMCFG_H */

-1

arch/powerpc/include/asm/xive.h

··· 111 111 int xive_native_populate_irq_data(u32 hw_irq, 112 112 struct xive_irq_data *data); 113 113 void xive_cleanup_irq_data(struct xive_irq_data *xd); 114 - void xive_irq_free_data(unsigned int virq); 115 114 void xive_native_free_irq(u32 irq); 116 115 int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq); 117 116

+2 -2

arch/powerpc/include/uapi/asm/opal-prd.h

··· 40 40 #define OPAL_PRD_SCOM_READ _IOR('o', 0x02, struct opal_prd_scom) 41 41 #define OPAL_PRD_SCOM_WRITE _IOW('o', 0x03, struct opal_prd_scom) 42 42 43 - #ifndef __ASSEMBLY__ 43 + #ifndef __ASSEMBLER__ 44 44 45 45 struct opal_prd_info { 46 46 __u64 version; ··· 54 54 __s64 rc; 55 55 }; 56 56 57 - #endif /* __ASSEMBLY__ */ 57 + #endif /* __ASSEMBLER__ */ 58 58 59 59 #endif /* _UAPI_ASM_POWERPC_OPAL_PRD_H */

+33

arch/powerpc/include/uapi/asm/papr-hvpipe.h

··· 1 + /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 + #ifndef _UAPI_PAPR_HVPIPE_H_ 3 + #define _UAPI_PAPR_HVPIPE_H_ 4 + 5 + #include <linux/types.h> 6 + #include <asm/ioctl.h> 7 + #include <asm/papr-miscdev.h> 8 + 9 + /* 10 + * This header is included in payload between OS and the user 11 + * space. 12 + * flags: OS notifies the user space whether the hvpipe is 13 + * closed or the buffer has the payload. 14 + */ 15 + struct papr_hvpipe_hdr { 16 + __u8 version; 17 + __u8 reserved[3]; 18 + __u32 flags; 19 + __u8 reserved2[40]; 20 + }; 21 + 22 + /* 23 + * ioctl for /dev/papr-hvpipe 24 + */ 25 + #define PAPR_HVPIPE_IOC_CREATE_HANDLE _IOW(PAPR_MISCDEV_IOC_ID, 9, __u32) 26 + 27 + /* 28 + * hvpipe_hdr flags used for read() 29 + */ 30 + #define HVPIPE_MSG_AVAILABLE 0x01 /* Payload is available */ 31 + #define HVPIPE_LOST_CONNECTION 0x02 /* Pipe connection is closed/unavailable */ 32 + 33 + #endif /* _UAPI_PAPR_HVPIPE_H_ */

+6 -6

arch/powerpc/include/uapi/asm/ptrace.h

··· 27 27 28 28 #include <linux/types.h> 29 29 30 - #ifndef __ASSEMBLY__ 30 + #ifndef __ASSEMBLER__ 31 31 32 32 #ifdef __KERNEL__ 33 33 struct user_pt_regs ··· 57 57 unsigned long result; /* Result of a system call */ 58 58 }; 59 59 60 - #endif /* __ASSEMBLY__ */ 60 + #endif /* __ASSEMBLER__ */ 61 61 62 62 63 63 /* ··· 200 200 #define PPC_PTRACE_SETHWDEBUG 0x88 201 201 #define PPC_PTRACE_DELHWDEBUG 0x87 202 202 203 - #ifndef __ASSEMBLY__ 203 + #ifndef __ASSEMBLER__ 204 204 205 205 struct ppc_debug_info { 206 206 __u32 version; /* Only version 1 exists to date */ ··· 212 212 __u64 features; 213 213 }; 214 214 215 - #endif /* __ASSEMBLY__ */ 215 + #endif /* __ASSEMBLER__ */ 216 216 217 217 /* 218 218 * features will have bits indication whether there is support for: ··· 224 224 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x0000000000000010 225 225 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 0x0000000000000020 226 226 227 - #ifndef __ASSEMBLY__ 227 + #ifndef __ASSEMBLER__ 228 228 229 229 struct ppc_hw_breakpoint { 230 230 __u32 version; /* currently, version must be 1 */ ··· 236 236 __u64 condition_value; /* contents of the DVC register */ 237 237 }; 238 238 239 - #endif /* __ASSEMBLY__ */ 239 + #endif /* __ASSEMBLER__ */ 240 240 241 241 /* 242 242 * Trigger Type

+2 -2

arch/powerpc/include/uapi/asm/types.h

··· 28 28 # include <asm-generic/int-ll64.h> 29 29 #endif 30 30 31 - #ifndef __ASSEMBLY__ 31 + #ifndef __ASSEMBLER__ 32 32 33 33 34 34 typedef struct { 35 35 __u32 u[4]; 36 36 } __attribute__((aligned(16))) __vector128; 37 37 38 - #endif /* __ASSEMBLY__ */ 38 + #endif /* __ASSEMBLER__ */ 39 39 40 40 41 41 #endif /* _UAPI_ASM_POWERPC_TYPES_H */

+10 -15

arch/powerpc/kernel/head_8xx.S

··· 162 162 * For the MPC8xx, this is a software tablewalk to load the instruction 163 163 * TLB. The task switch loads the M_TWB register with the pointer to the first 164 164 * level table. 165 - * If we discover there is no second level table (value is zero) or if there 165 + * If there is no second level table (value is zero) or if there 166 166 * is an invalid pte, we load that into the TLB, which causes another fault 167 167 * into the TLB Error interrupt where we can handle such problems. 168 168 * We have to use the MD_xxx registers for the tablewalk because the ··· 183 183 mtspr SPRN_SPRG_SCRATCH2, r10 184 184 mtspr SPRN_M_TW, r11 185 185 186 - /* If we are faulting a kernel address, we have to use the 187 - * kernel page tables. 188 - */ 189 186 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ 190 187 INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11) 191 188 mtspr SPRN_MD_EPN, r10 192 189 mfspr r10, SPRN_M_TWB /* Get level 1 table */ 193 - lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */ 190 + lwz r11, 0(r10) /* Get level 1 entry */ 194 191 mtspr SPRN_MD_TWC, r11 195 192 mfspr r10, SPRN_MD_TWC 196 193 lwz r10, 0(r10) /* Get the pte */ ··· 225 228 mtspr SPRN_SPRG_SCRATCH2, r10 226 229 mtspr SPRN_M_TW, r11 227 230 228 - /* If we are faulting a kernel address, we have to use the 229 - * kernel page tables. 230 - */ 231 - mfspr r10, SPRN_MD_EPN 232 231 mfspr r10, SPRN_M_TWB /* Get level 1 table */ 233 - lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10) /* Get level 1 entry */ 232 + lwz r11, 0(r10) /* Get level 1 entry */ 234 233 235 234 mtspr SPRN_MD_TWC, r11 236 235 mfspr r10, SPRN_MD_TWC ··· 368 375 mfspr r10, SPRN_DAR 369 376 mtspr SPRN_MD_EPN, r10 370 377 mfspr r11, SPRN_M_TWB /* Get level 1 table */ 371 - lwz r10, (swapper_pg_dir - PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ 378 + lwz r10, 0(r11) /* Get the level 1 entry */ 372 379 cmpwi cr1, r10, 0 373 380 bne cr1, 1f 374 381 ··· 377 384 lwz r10, (swapper_pg_dir - PAGE_OFFSET)@l(r10) /* Get the level 1 entry */ 378 385 cmpwi cr1, r10, 0 379 386 beq cr1, 1f 380 - stw r10, (swapper_pg_dir - PAGE_OFFSET)@l(r11) /* Set the level 1 entry */ 387 + stw r10, 0(r11) /* Set the level 1 entry */ 381 388 mfspr r10, SPRN_M_TW 382 389 mtcr r10 383 390 mfspr r10, SPRN_SPRG_SCRATCH0 ··· 405 412 tophys(r11, r10) 406 413 mfspr r11, SPRN_M_TWB /* Get level 1 table */ 407 414 rlwinm r11, r11, 0, 20, 31 408 - oris r11, r11, (swapper_pg_dir - PAGE_OFFSET)@ha 415 + oris r11, r11, (swapper_pg_dir - PAGE_OFFSET)@h 416 + ori r11, r11, (swapper_pg_dir - PAGE_OFFSET)@l 409 417 3: 410 - lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */ 418 + lwz r11, 0(r11) /* Get the level 1 entry */ 411 419 rlwinm r11, r11, 0, ~_PMD_PAGE_8M 412 420 mtspr SPRN_MD_TWC, r11 413 421 mfspr r11, SPRN_MD_TWC ··· 529 535 li r0,0 530 536 stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1) 531 537 532 - lis r6, swapper_pg_dir@ha 538 + lis r6, swapper_pg_dir@h 539 + ori r6, r6, swapper_pg_dir@l 533 540 tophys(r6,r6) 534 541 mtspr SPRN_M_TWB, r6 535 542

+2 -2

arch/powerpc/kernel/head_booke.h

··· 7 7 #include <asm/kvm_booke_hv_asm.h> 8 8 #include <asm/thread_info.h> /* for THREAD_SHIFT */ 9 9 10 - #ifdef __ASSEMBLY__ 10 + #ifdef __ASSEMBLER__ 11 11 12 12 /* 13 13 * Macros used for common Book-e exception handling ··· 522 522 bl kernel_fp_unavailable_exception; \ 523 523 b interrupt_return 524 524 525 - #endif /* __ASSEMBLY__ */ 525 + #endif /* __ASSEMBLER__ */ 526 526 #endif /* __HEAD_BOOKE_H__ */

+8 -18

arch/powerpc/kernel/module_64.c

··· 209 209 char *secstrings, 210 210 struct module *me) 211 211 { 212 - /* One extra reloc so it's always 0-addr terminated */ 213 - unsigned long relocs = 1; 212 + unsigned long relocs = 0; 214 213 unsigned i; 215 214 216 215 /* Every relocated section... */ ··· 704 705 705 706 /* Find this stub, or if that fails, the next avail. entry */ 706 707 stubs = (void *)sechdrs[me->arch.stubs_section].sh_addr; 707 - for (i = 0; stub_func_addr(stubs[i].funcdata); i++) { 708 + for (i = 0; i < me->arch.stub_count; i++) { 708 709 if (WARN_ON(i >= num_stubs)) 709 710 return 0; 710 711 ··· 715 716 if (!create_stub(sechdrs, &stubs[i], addr, me, name)) 716 717 return 0; 717 718 719 + me->arch.stub_count++; 718 720 return (unsigned long)&stubs[i]; 719 721 } 720 722 ··· 1118 1118 static int setup_ftrace_ool_stubs(const Elf64_Shdr *sechdrs, unsigned long addr, struct module *me) 1119 1119 { 1120 1120 #ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE 1121 - unsigned int i, total_stubs, num_stubs; 1121 + unsigned int total_stubs, num_stubs; 1122 1122 struct ppc64_stub_entry *stub; 1123 1123 1124 1124 total_stubs = sechdrs[me->arch.stubs_section].sh_size / sizeof(*stub); 1125 1125 num_stubs = roundup(me->arch.ool_stub_count * sizeof(struct ftrace_ool_stub), 1126 1126 sizeof(struct ppc64_stub_entry)) / sizeof(struct ppc64_stub_entry); 1127 1127 1128 - /* Find the next available entry */ 1129 - stub = (void *)sechdrs[me->arch.stubs_section].sh_addr; 1130 - for (i = 0; stub_func_addr(stub[i].funcdata); i++) 1131 - if (WARN_ON(i >= total_stubs)) 1132 - return -1; 1133 - 1134 - if (WARN_ON(i + num_stubs > total_stubs)) 1128 + if (WARN_ON(me->arch.stub_count + num_stubs > total_stubs)) 1135 1129 return -1; 1136 1130 1137 - stub += i; 1138 - me->arch.ool_stubs = (struct ftrace_ool_stub *)stub; 1139 - 1140 - /* reserve stubs */ 1141 - for (i = 0; i < num_stubs; i++) 1142 - if (patch_u32((void *)&stub->funcdata, PPC_RAW_NOP())) 1143 - return -1; 1131 + stub = (void *)sechdrs[me->arch.stubs_section].sh_addr; 1132 + me->arch.ool_stubs = (struct ftrace_ool_stub *)(stub + me->arch.stub_count); 1133 + me->arch.stub_count += num_stubs; 1144 1134 #endif 1145 1135 1146 1136 return 0;

+24

arch/powerpc/kernel/rtas.c

··· 98 98 DEFINE_MUTEX(rtas_ibm_get_indices_lock); 99 99 DEFINE_MUTEX(rtas_ibm_set_dynamic_indicator_lock); 100 100 DEFINE_MUTEX(rtas_ibm_get_dynamic_sensor_state_lock); 101 + DEFINE_MUTEX(rtas_ibm_receive_hvpipe_msg_lock); 102 + DEFINE_MUTEX(rtas_ibm_send_hvpipe_msg_lock); 101 103 102 104 static struct rtas_function rtas_function_table[] __ro_after_init = { 103 105 [RTAS_FNIDX__CHECK_EXCEPTION] = { ··· 375 373 [RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE2] = { 376 374 .name = "ibm,read-slot-reset-state2", 377 375 }, 376 + [RTAS_FNIDX__IBM_RECEIVE_HVPIPE_MSG] { 377 + .name = "ibm,receive-hvpipe-msg", 378 + .filter = &(const struct rtas_filter) { 379 + .buf_idx1 = 0, .size_idx1 = 1, 380 + .buf_idx2 = -1, .size_idx2 = -1, 381 + }, 382 + /* 383 + * PAPR+ v2.13 R1–7.3.32.1 384 + */ 385 + .lock = &rtas_ibm_receive_hvpipe_msg_lock, 386 + }, 378 387 [RTAS_FNIDX__IBM_REMOVE_PE_DMA_WINDOW] = { 379 388 .name = "ibm,remove-pe-dma-window", 380 389 }, ··· 403 390 .buf_idx1 = 0, .size_idx1 = 1, 404 391 .buf_idx2 = -1, .size_idx2 = -1, 405 392 }, 393 + }, 394 + [RTAS_FNIDX__IBM_SEND_HVPIPE_MSG] { 395 + .name = "ibm,send-hvpipe-msg", 396 + .filter = &(const struct rtas_filter) { 397 + .buf_idx1 = 1, .size_idx1 = -1, 398 + .buf_idx2 = -1, .size_idx2 = -1, 399 + }, 400 + /* 401 + * PAPR+ v2.13 R1–7.3.32.2 402 + */ 403 + .lock = &rtas_ibm_send_hvpipe_msg_lock, 406 404 }, 407 405 [RTAS_FNIDX__IBM_SET_DYNAMIC_INDICATOR] = { 408 406 .name = "ibm,set-dynamic-indicator",

+2

arch/powerpc/kernel/rtasd.c

··· 89 89 return "Platform Resource Reassignment Event"; 90 90 case RTAS_TYPE_HOTPLUG: 91 91 return "Hotplug Event"; 92 + case RTAS_TYPE_HVPIPE: 93 + return "Hypervisor Pipe Notification event"; 92 94 } 93 95 94 96 return rtas_type[0];

+7 -1

arch/powerpc/kernel/time.c

··· 137 137 138 138 static u64 tb_to_ns_scale __read_mostly; 139 139 static unsigned tb_to_ns_shift __read_mostly; 140 - static u64 boot_tb __read_mostly; 140 + static u64 boot_tb __ro_after_init; 141 141 142 142 extern struct timezone sys_tz; 143 143 static long timezone_offset; ··· 639 639 return mulhdu(get_tb() - boot_tb, tb_to_ns_scale) << tb_to_ns_shift; 640 640 } 641 641 642 + #ifdef CONFIG_PPC_SPLPAR 643 + u64 get_boot_tb(void) 644 + { 645 + return boot_tb; 646 + } 647 + #endif 642 648 643 649 #ifdef CONFIG_PPC_PSERIES 644 650

+8 -2

arch/powerpc/kernel/trace/ftrace.c

··· 488 488 return ret; 489 489 490 490 /* Set up out-of-line stub */ 491 - if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) 492 - return ftrace_init_ool_stub(mod, rec); 491 + if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) { 492 + ret = ftrace_init_ool_stub(mod, rec); 493 + goto out; 494 + } 493 495 494 496 /* Nop-out the ftrace location */ 495 497 new = ppc_inst(PPC_RAW_NOP()); ··· 521 519 } else { 522 520 return -EINVAL; 523 521 } 522 + 523 + out: 524 + if (!ret) 525 + ret = ftrace_rec_set_nop_ops(rec); 524 526 525 527 return ret; 526 528 }

+25 -17

arch/powerpc/kernel/trace/ftrace_entry.S

··· 409 409 _GLOBAL(return_to_handler) 410 410 /* need to save return values */ 411 411 #ifdef CONFIG_PPC64 412 - std r4, -32(r1) 413 - std r3, -24(r1) 412 + stdu r1, -SWITCH_FRAME_SIZE(r1) 413 + std r4, GPR4(r1) 414 + std r3, GPR3(r1) 415 + /* Save previous stack pointer (r1) */ 416 + addi r3, r1, SWITCH_FRAME_SIZE 417 + std r3, GPR1(r1) 414 418 /* save TOC */ 415 - std r2, -16(r1) 416 - std r31, -8(r1) 419 + std r2, 24(r1) 420 + std r31, 32(r1) 417 421 mr r31, r1 418 - stdu r1, -112(r1) 419 - 422 + /* pass ftrace_regs/pt_regs to ftrace_return_to_handler */ 423 + addi r3, r1, STACK_INT_FRAME_REGS 420 424 /* 421 425 * We might be called from a module. 422 426 * Switch to our TOC to run inside the core kernel. 423 427 */ 424 428 LOAD_PACA_TOC() 425 429 #else 426 - stwu r1, -16(r1) 427 - stw r3, 8(r1) 428 - stw r4, 12(r1) 430 + stwu r1, -SWITCH_FRAME_SIZE(r1) 431 + stw r4, GPR4(r1) 432 + stw r3, GPR3(r1) 433 + addi r3, r1, SWITCH_FRAME_SIZE 434 + stw r3, GPR1(r1) 435 + /* pass ftrace_regs/pt_regs to ftrace_return_to_handler */ 436 + addi r3, r1, STACK_INT_FRAME_REGS 429 437 #endif 430 438 431 439 bl ftrace_return_to_handler ··· 443 435 mtlr r3 444 436 445 437 #ifdef CONFIG_PPC64 446 - ld r1, 0(r1) 447 - ld r4, -32(r1) 448 - ld r3, -24(r1) 449 - ld r2, -16(r1) 450 - ld r31, -8(r1) 438 + ld r4, GPR4(r1) 439 + ld r3, GPR3(r1) 440 + ld r2, 24(r1) 441 + ld r31, 32(r1) 442 + ld r1, 0(r1) 451 443 #else 452 - lwz r3, 8(r1) 453 - lwz r4, 12(r1) 454 - addi r1, r1, 16 444 + lwz r3, GPR3(r1) 445 + lwz r4, GPR4(r1) 446 + addi r1, r1, SWITCH_FRAME_SIZE 455 447 #endif 456 448 457 449 /* Jump back to real return address */

+1 -2

arch/powerpc/kernel/vdso.c

··· 21 21 #include <vdso/datapage.h> 22 22 23 23 #include <asm/syscall.h> 24 + #include <asm/syscalls.h> 24 25 #include <asm/processor.h> 25 26 #include <asm/mmu.h> 26 27 #include <asm/mmu_context.h> ··· 40 39 41 40 extern char vdso32_start, vdso32_end; 42 41 extern char vdso64_start, vdso64_end; 43 - 44 - long sys_ni_syscall(void); 45 42 46 43 static int vdso_mremap(const struct vm_special_mapping *sm, struct vm_area_struct *new_vma, 47 44 unsigned long text_size)

+10 -9

arch/powerpc/lib/qspinlock.c

··· 9 9 #include <linux/sched/clock.h> 10 10 #include <asm/qspinlock.h> 11 11 #include <asm/paravirt.h> 12 + #include <trace/events/lock.h> 12 13 13 14 #define MAX_NODES 4 14 15 ··· 709 708 qnodesp->count--; 710 709 } 711 710 712 - void queued_spin_lock_slowpath(struct qspinlock *lock) 711 + void __lockfunc queued_spin_lock_slowpath(struct qspinlock *lock) 713 712 { 713 + trace_contention_begin(lock, LCB_F_SPIN); 714 714 /* 715 715 * This looks funny, but it induces the compiler to inline both 716 716 * sides of the branch rather than share code as when the condition 717 717 * is passed as the paravirt argument to the functions. 718 718 */ 719 719 if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) && is_shared_processor()) { 720 - if (try_to_steal_lock(lock, true)) { 720 + if (try_to_steal_lock(lock, true)) 721 721 spec_barrier(); 722 - return; 723 - } 724 - queued_spin_lock_mcs_queue(lock, true); 722 + else 723 + queued_spin_lock_mcs_queue(lock, true); 725 724 } else { 726 - if (try_to_steal_lock(lock, false)) { 725 + if (try_to_steal_lock(lock, false)) 727 726 spec_barrier(); 728 - return; 729 - } 730 - queued_spin_lock_mcs_queue(lock, false); 727 + else 728 + queued_spin_lock_mcs_queue(lock, false); 731 729 } 730 + trace_contention_end(lock, 0); 732 731 } 733 732 EXPORT_SYMBOL(queued_spin_lock_slowpath); 734 733

+2 -2

arch/powerpc/mm/book3s32/mmu.c

··· 204 204 205 205 for (i = 0; i < nb - 1 && base < top;) { 206 206 size = bat_block_size(base, top); 207 - setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT); 207 + setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_X); 208 208 base += size; 209 209 } 210 210 if (base < top) { ··· 215 215 pr_warn("Some RW data is getting mapped X. " 216 216 "Adjust CONFIG_DATA_SHIFT to avoid that.\n"); 217 217 } 218 - setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT); 218 + setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_X); 219 219 base += size; 220 220 } 221 221 for (; i < nb; i++)

+1 -9

arch/powerpc/mm/nohash/mmu_context.c

··· 203 203 static void set_context(unsigned long id, pgd_t *pgd) 204 204 { 205 205 if (IS_ENABLED(CONFIG_PPC_8xx)) { 206 - s16 offset = (s16)(__pa(swapper_pg_dir)); 207 - 208 - /* 209 - * Register M_TWB will contain base address of level 1 table minus the 210 - * lower part of the kernel PGDIR base address, so that all accesses to 211 - * level 1 table are done relative to lower part of kernel PGDIR base 212 - * address. 213 - */ 214 - mtspr(SPRN_M_TWB, __pa(pgd) - offset); 206 + mtspr(SPRN_M_TWB, __pa(pgd)); 215 207 216 208 /* Update context */ 217 209 mtspr(SPRN_M_CASID, id - 1);

+1 -1

arch/powerpc/mm/pgtable_32.c

··· 104 104 p = memstart_addr + s; 105 105 for (; s < top; s += PAGE_SIZE) { 106 106 ktext = core_kernel_text(v); 107 - map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL); 107 + map_kernel_page(v, p, ktext ? PAGE_KERNEL_X : PAGE_KERNEL); 108 108 v += PAGE_SIZE; 109 109 p += PAGE_SIZE; 110 110 }

+5 -3

arch/powerpc/net/bpf_jit.h

··· 8 8 #ifndef _BPF_JIT_H 9 9 #define _BPF_JIT_H 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 #include <asm/types.h> 14 14 #include <asm/ppc-opcode.h> ··· 161 161 unsigned int seen; 162 162 unsigned int idx; 163 163 unsigned int stack_size; 164 - int b2p[MAX_BPF_JIT_REG + 2]; 164 + int b2p[MAX_BPF_JIT_REG + 3]; 165 165 unsigned int exentry_idx; 166 166 unsigned int alt_exit_addr; 167 + u64 arena_vm_start; 168 + u64 user_vm_start; 167 169 }; 168 170 169 171 #define bpf_to_ppc(r) (ctx->b2p[r]) ··· 203 201 204 202 int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass, 205 203 struct codegen_context *ctx, int insn_idx, 206 - int jmp_off, int dst_reg); 204 + int jmp_off, int dst_reg, u32 code); 207 205 208 206 #endif 209 207

+29 -3

arch/powerpc/net/bpf_jit_comp.c

··· 204 204 205 205 /* Make sure that the stack is quadword aligned. */ 206 206 cgctx.stack_size = round_up(fp->aux->stack_depth, 16); 207 + cgctx.arena_vm_start = bpf_arena_get_kern_vm_start(fp->aux->arena); 208 + cgctx.user_vm_start = bpf_arena_get_user_vm_start(fp->aux->arena); 207 209 208 210 /* Scouting faux-generate pass 0 */ 209 211 if (bpf_jit_build_body(fp, NULL, NULL, &cgctx, addrs, 0, false)) { ··· 328 326 */ 329 327 int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass, 330 328 struct codegen_context *ctx, int insn_idx, int jmp_off, 331 - int dst_reg) 329 + int dst_reg, u32 code) 332 330 { 333 331 off_t offset; 334 332 unsigned long pc; ··· 357 355 (ctx->exentry_idx * BPF_FIXUP_LEN * 4); 358 356 359 357 fixup[0] = PPC_RAW_LI(dst_reg, 0); 358 + if (BPF_CLASS(code) == BPF_ST || BPF_CLASS(code) == BPF_STX) 359 + fixup[0] = PPC_RAW_NOP(); 360 + 360 361 if (IS_ENABLED(CONFIG_PPC32)) 361 362 fixup[1] = PPC_RAW_LI(dst_reg - 1, 0); /* clear higher 32-bit register too */ 362 363 ··· 440 435 return true; 441 436 } 442 437 438 + bool bpf_jit_supports_arena(void) 439 + { 440 + return IS_ENABLED(CONFIG_PPC64); 441 + } 442 + 443 443 bool bpf_jit_supports_far_kfunc_call(void) 444 444 { 445 445 return IS_ENABLED(CONFIG_PPC64); 446 + } 447 + 448 + bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena) 449 + { 450 + if (!in_arena) 451 + return true; 452 + switch (insn->code) { 453 + case BPF_STX | BPF_ATOMIC | BPF_H: 454 + case BPF_STX | BPF_ATOMIC | BPF_B: 455 + case BPF_STX | BPF_ATOMIC | BPF_W: 456 + case BPF_STX | BPF_ATOMIC | BPF_DW: 457 + if (bpf_atomic_is_load_store(insn)) 458 + return false; 459 + return IS_ENABLED(CONFIG_PPC64); 460 + } 461 + return true; 446 462 } 447 463 448 464 void *arch_alloc_bpf_trampoline(unsigned int size) ··· 605 579 { 606 580 if (IS_ENABLED(CONFIG_PPC64)) { 607 581 /* See bpf_jit_stack_tailcallcnt() */ 608 - int tailcallcnt_offset = 6 * 8; 582 + int tailcallcnt_offset = 7 * 8; 609 583 610 584 EMIT(PPC_RAW_LL(_R3, _R1, func_frame_offset - tailcallcnt_offset)); 611 585 EMIT(PPC_RAW_STL(_R3, _R1, -tailcallcnt_offset)); ··· 620 594 { 621 595 if (IS_ENABLED(CONFIG_PPC64)) { 622 596 /* See bpf_jit_stack_tailcallcnt() */ 623 - int tailcallcnt_offset = 6 * 8; 597 + int tailcallcnt_offset = 7 * 8; 624 598 625 599 EMIT(PPC_RAW_LL(_R3, _R1, -tailcallcnt_offset)); 626 600 EMIT(PPC_RAW_STL(_R3, _R1, func_frame_offset - tailcallcnt_offset));

+1 -1

arch/powerpc/net/bpf_jit_comp32.c

··· 1087 1087 } 1088 1088 1089 1089 ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, insn_idx, 1090 - jmp_off, dst_reg); 1090 + jmp_off, dst_reg, code); 1091 1091 if (ret) 1092 1092 return ret; 1093 1093 }

+295 -106

arch/powerpc/net/bpf_jit_comp64.c

··· 25 25 * with our redzone usage. 26 26 * 27 27 * [ prev sp ] <------------- 28 - * [ nv gpr save area ] 5*8 | 28 + * [ nv gpr save area ] 6*8 | 29 29 * [ tail_call_cnt ] 8 | 30 - * [ local_tmp_var ] 16 | 30 + * [ local_tmp_var ] 24 | 31 31 * fp (r31) --> [ ebpf stack space ] upto 512 | 32 32 * [ frame header ] 32/112 | 33 33 * sp (r1) ---> [ stack pointer ] -------------- 34 34 */ 35 35 36 36 /* for gpr non volatile registers BPG_REG_6 to 10 */ 37 - #define BPF_PPC_STACK_SAVE (5*8) 37 + #define BPF_PPC_STACK_SAVE (6*8) 38 38 /* for bpf JIT code internal usage */ 39 - #define BPF_PPC_STACK_LOCALS 24 39 + #define BPF_PPC_STACK_LOCALS 32 40 40 /* stack frame excluding BPF stack, ensure this is quadword aligned */ 41 41 #define BPF_PPC_STACKFRAME (STACK_FRAME_MIN_SIZE + \ 42 42 BPF_PPC_STACK_LOCALS + BPF_PPC_STACK_SAVE) ··· 44 44 /* BPF register usage */ 45 45 #define TMP_REG_1 (MAX_BPF_JIT_REG + 0) 46 46 #define TMP_REG_2 (MAX_BPF_JIT_REG + 1) 47 + #define ARENA_VM_START (MAX_BPF_JIT_REG + 2) 47 48 48 49 /* BPF to ppc register mappings */ 49 50 void bpf_jit_init_reg_mapping(struct codegen_context *ctx) ··· 68 67 ctx->b2p[BPF_REG_AX] = _R12; 69 68 ctx->b2p[TMP_REG_1] = _R9; 70 69 ctx->b2p[TMP_REG_2] = _R10; 70 + /* non volatile register for kern_vm_start address */ 71 + ctx->b2p[ARENA_VM_START] = _R26; 71 72 } 72 73 73 - /* PPC NVR range -- update this if we ever use NVRs below r27 */ 74 - #define BPF_PPC_NVR_MIN _R27 74 + /* PPC NVR range -- update this if we ever use NVRs below r26 */ 75 + #define BPF_PPC_NVR_MIN _R26 75 76 76 77 static inline bool bpf_has_stack_frame(struct codegen_context *ctx) 77 78 { ··· 92 89 * [ prev sp ] <------------- 93 90 * [ ... ] | 94 91 * sp (r1) ---> [ stack pointer ] -------------- 95 - * [ nv gpr save area ] 5*8 92 + * [ nv gpr save area ] 6*8 96 93 * [ tail_call_cnt ] 8 97 - * [ local_tmp_var ] 16 94 + * [ local_tmp_var ] 24 98 95 * [ unused red zone ] 224 99 96 */ 100 97 static int bpf_jit_stack_local(struct codegen_context *ctx) ··· 102 99 if (bpf_has_stack_frame(ctx)) 103 100 return STACK_FRAME_MIN_SIZE + ctx->stack_size; 104 101 else 105 - return -(BPF_PPC_STACK_SAVE + 24); 102 + return -(BPF_PPC_STACK_SAVE + 32); 106 103 } 107 104 108 105 static int bpf_jit_stack_tailcallcnt(struct codegen_context *ctx) 109 106 { 110 - return bpf_jit_stack_local(ctx) + 16; 107 + return bpf_jit_stack_local(ctx) + 24; 111 108 } 112 109 113 110 static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg) ··· 173 170 if (bpf_is_seen_register(ctx, bpf_to_ppc(i))) 174 171 EMIT(PPC_RAW_STD(bpf_to_ppc(i), _R1, bpf_jit_stack_offsetof(ctx, bpf_to_ppc(i)))); 175 172 173 + if (ctx->arena_vm_start) 174 + EMIT(PPC_RAW_STD(bpf_to_ppc(ARENA_VM_START), _R1, 175 + bpf_jit_stack_offsetof(ctx, bpf_to_ppc(ARENA_VM_START)))); 176 + 176 177 /* Setup frame pointer to point to the bpf stack area */ 177 178 if (bpf_is_seen_register(ctx, bpf_to_ppc(BPF_REG_FP))) 178 179 EMIT(PPC_RAW_ADDI(bpf_to_ppc(BPF_REG_FP), _R1, 179 180 STACK_FRAME_MIN_SIZE + ctx->stack_size)); 181 + 182 + if (ctx->arena_vm_start) 183 + PPC_LI64(bpf_to_ppc(ARENA_VM_START), ctx->arena_vm_start); 180 184 } 181 185 182 186 static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx) ··· 194 184 for (i = BPF_REG_6; i <= BPF_REG_10; i++) 195 185 if (bpf_is_seen_register(ctx, bpf_to_ppc(i))) 196 186 EMIT(PPC_RAW_LD(bpf_to_ppc(i), _R1, bpf_jit_stack_offsetof(ctx, bpf_to_ppc(i)))); 187 + 188 + if (ctx->arena_vm_start) 189 + EMIT(PPC_RAW_LD(bpf_to_ppc(ARENA_VM_START), _R1, 190 + bpf_jit_stack_offsetof(ctx, bpf_to_ppc(ARENA_VM_START)))); 197 191 198 192 /* Tear down our stack frame */ 199 193 if (bpf_has_stack_frame(ctx)) { ··· 410 396 asm ( 411 397 " .global bpf_stf_barrier ;" 412 398 " bpf_stf_barrier: ;" 413 - " std 21,-64(1) ;" 414 - " std 22,-56(1) ;" 399 + " std 21,-80(1) ;" 400 + " std 22,-72(1) ;" 415 401 " sync ;" 416 - " ld 21,-64(1) ;" 417 - " ld 22,-56(1) ;" 402 + " ld 21,-80(1) ;" 403 + " ld 22,-72(1) ;" 418 404 " ori 31,31,0 ;" 419 405 " .rept 14 ;" 420 406 " b 1f ;" ··· 422 408 " .endr ;" 423 409 " blr ;" 424 410 ); 411 + 412 + static int bpf_jit_emit_atomic_ops(u32 *image, struct codegen_context *ctx, 413 + const struct bpf_insn *insn, u32 *jmp_off, 414 + u32 *tmp_idx, u32 *addrp) 415 + { 416 + u32 tmp1_reg = bpf_to_ppc(TMP_REG_1); 417 + u32 tmp2_reg = bpf_to_ppc(TMP_REG_2); 418 + u32 size = BPF_SIZE(insn->code); 419 + u32 src_reg = bpf_to_ppc(insn->src_reg); 420 + u32 dst_reg = bpf_to_ppc(insn->dst_reg); 421 + s32 imm = insn->imm; 422 + 423 + u32 save_reg = tmp2_reg; 424 + u32 ret_reg = src_reg; 425 + u32 fixup_idx; 426 + 427 + /* Get offset into TMP_REG_1 */ 428 + EMIT(PPC_RAW_LI(tmp1_reg, insn->off)); 429 + /* 430 + * Enforce full ordering for operations with BPF_FETCH by emitting a 'sync' 431 + * before and after the operation. 432 + * 433 + * This is a requirement in the Linux Kernel Memory Model. 434 + * See __cmpxchg_u64() in asm/cmpxchg.h as an example. 435 + */ 436 + if ((imm & BPF_FETCH) && IS_ENABLED(CONFIG_SMP)) 437 + EMIT(PPC_RAW_SYNC()); 438 + 439 + *tmp_idx = ctx->idx; 440 + 441 + /* load value from memory into TMP_REG_2 */ 442 + if (size == BPF_DW) 443 + EMIT(PPC_RAW_LDARX(tmp2_reg, tmp1_reg, dst_reg, 0)); 444 + else 445 + EMIT(PPC_RAW_LWARX(tmp2_reg, tmp1_reg, dst_reg, 0)); 446 + /* Save old value in _R0 */ 447 + if (imm & BPF_FETCH) 448 + EMIT(PPC_RAW_MR(_R0, tmp2_reg)); 449 + 450 + switch (imm) { 451 + case BPF_ADD: 452 + case BPF_ADD | BPF_FETCH: 453 + EMIT(PPC_RAW_ADD(tmp2_reg, tmp2_reg, src_reg)); 454 + break; 455 + case BPF_AND: 456 + case BPF_AND | BPF_FETCH: 457 + EMIT(PPC_RAW_AND(tmp2_reg, tmp2_reg, src_reg)); 458 + break; 459 + case BPF_OR: 460 + case BPF_OR | BPF_FETCH: 461 + EMIT(PPC_RAW_OR(tmp2_reg, tmp2_reg, src_reg)); 462 + break; 463 + case BPF_XOR: 464 + case BPF_XOR | BPF_FETCH: 465 + EMIT(PPC_RAW_XOR(tmp2_reg, tmp2_reg, src_reg)); 466 + break; 467 + case BPF_CMPXCHG: 468 + /* 469 + * Return old value in BPF_REG_0 for BPF_CMPXCHG & 470 + * in src_reg for other cases. 471 + */ 472 + ret_reg = bpf_to_ppc(BPF_REG_0); 473 + 474 + /* Compare with old value in BPF_R0 */ 475 + if (size == BPF_DW) 476 + EMIT(PPC_RAW_CMPD(bpf_to_ppc(BPF_REG_0), tmp2_reg)); 477 + else 478 + EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), tmp2_reg)); 479 + /* Don't set if different from old value */ 480 + PPC_BCC_SHORT(COND_NE, (ctx->idx + 3) * 4); 481 + fallthrough; 482 + case BPF_XCHG: 483 + save_reg = src_reg; 484 + break; 485 + default: 486 + return -EOPNOTSUPP; 487 + } 488 + 489 + /* store new value */ 490 + if (size == BPF_DW) 491 + EMIT(PPC_RAW_STDCX(save_reg, tmp1_reg, dst_reg)); 492 + else 493 + EMIT(PPC_RAW_STWCX(save_reg, tmp1_reg, dst_reg)); 494 + /* we're done if this succeeded */ 495 + PPC_BCC_SHORT(COND_NE, *tmp_idx * 4); 496 + fixup_idx = ctx->idx; 497 + 498 + if (imm & BPF_FETCH) { 499 + /* Emit 'sync' to enforce full ordering */ 500 + if (IS_ENABLED(CONFIG_SMP)) 501 + EMIT(PPC_RAW_SYNC()); 502 + EMIT(PPC_RAW_MR(ret_reg, _R0)); 503 + /* 504 + * Skip unnecessary zero-extension for 32-bit cmpxchg. 505 + * For context, see commit 39491867ace5. 506 + */ 507 + if (size != BPF_DW && imm == BPF_CMPXCHG && 508 + insn_is_zext(insn + 1)) 509 + *addrp = ctx->idx * 4; 510 + } 511 + 512 + *jmp_off = (fixup_idx - *tmp_idx) * 4; 513 + 514 + return 0; 515 + } 516 + 517 + static int bpf_jit_emit_probe_mem_store(struct codegen_context *ctx, u32 src_reg, s16 off, 518 + u32 code, u32 *image) 519 + { 520 + u32 tmp1_reg = bpf_to_ppc(TMP_REG_1); 521 + u32 tmp2_reg = bpf_to_ppc(TMP_REG_2); 522 + 523 + switch (BPF_SIZE(code)) { 524 + case BPF_B: 525 + EMIT(PPC_RAW_STB(src_reg, tmp1_reg, off)); 526 + break; 527 + case BPF_H: 528 + EMIT(PPC_RAW_STH(src_reg, tmp1_reg, off)); 529 + break; 530 + case BPF_W: 531 + EMIT(PPC_RAW_STW(src_reg, tmp1_reg, off)); 532 + break; 533 + case BPF_DW: 534 + if (off % 4) { 535 + EMIT(PPC_RAW_LI(tmp2_reg, off)); 536 + EMIT(PPC_RAW_STDX(src_reg, tmp1_reg, tmp2_reg)); 537 + } else { 538 + EMIT(PPC_RAW_STD(src_reg, tmp1_reg, off)); 539 + } 540 + break; 541 + default: 542 + return -EINVAL; 543 + } 544 + return 0; 545 + } 425 546 426 547 static int emit_atomic_ld_st(const struct bpf_insn insn, struct codegen_context *ctx, u32 *image) 427 548 { ··· 643 494 u32 size = BPF_SIZE(code); 644 495 u32 tmp1_reg = bpf_to_ppc(TMP_REG_1); 645 496 u32 tmp2_reg = bpf_to_ppc(TMP_REG_2); 646 - u32 save_reg, ret_reg; 647 497 s16 off = insn[i].off; 648 498 s32 imm = insn[i].imm; 649 499 bool func_addr_fixed; ··· 650 502 u64 imm64; 651 503 u32 true_cond; 652 504 u32 tmp_idx; 505 + u32 jmp_off; 653 506 654 507 /* 655 508 * addrs[] maps a BPF bytecode address into a real offset from ··· 917 768 */ 918 769 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */ 919 770 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ 771 + 772 + if (insn_is_cast_user(&insn[i])) { 773 + EMIT(PPC_RAW_RLDICL_DOT(tmp1_reg, src_reg, 0, 32)); 774 + PPC_LI64(dst_reg, (ctx->user_vm_start & 0xffffffff00000000UL)); 775 + PPC_BCC_SHORT(COND_EQ, (ctx->idx + 2) * 4); 776 + EMIT(PPC_RAW_OR(tmp1_reg, dst_reg, tmp1_reg)); 777 + EMIT(PPC_RAW_MR(dst_reg, tmp1_reg)); 778 + break; 779 + } 780 + 920 781 if (imm == 1) { 921 782 /* special mov32 for zext */ 922 783 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 0, 31)); ··· 1119 960 } 1120 961 break; 1121 962 963 + case BPF_STX | BPF_PROBE_MEM32 | BPF_B: 964 + case BPF_STX | BPF_PROBE_MEM32 | BPF_H: 965 + case BPF_STX | BPF_PROBE_MEM32 | BPF_W: 966 + case BPF_STX | BPF_PROBE_MEM32 | BPF_DW: 967 + 968 + EMIT(PPC_RAW_ADD(tmp1_reg, dst_reg, bpf_to_ppc(ARENA_VM_START))); 969 + 970 + ret = bpf_jit_emit_probe_mem_store(ctx, src_reg, off, code, image); 971 + if (ret) 972 + return ret; 973 + 974 + ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, 975 + ctx->idx - 1, 4, -1, code); 976 + if (ret) 977 + return ret; 978 + 979 + break; 980 + 981 + case BPF_ST | BPF_PROBE_MEM32 | BPF_B: 982 + case BPF_ST | BPF_PROBE_MEM32 | BPF_H: 983 + case BPF_ST | BPF_PROBE_MEM32 | BPF_W: 984 + case BPF_ST | BPF_PROBE_MEM32 | BPF_DW: 985 + 986 + EMIT(PPC_RAW_ADD(tmp1_reg, dst_reg, bpf_to_ppc(ARENA_VM_START))); 987 + 988 + if (BPF_SIZE(code) == BPF_W || BPF_SIZE(code) == BPF_DW) { 989 + PPC_LI32(tmp2_reg, imm); 990 + src_reg = tmp2_reg; 991 + } else { 992 + EMIT(PPC_RAW_LI(tmp2_reg, imm)); 993 + src_reg = tmp2_reg; 994 + } 995 + 996 + ret = bpf_jit_emit_probe_mem_store(ctx, src_reg, off, code, image); 997 + if (ret) 998 + return ret; 999 + 1000 + ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, 1001 + ctx->idx - 1, 4, -1, code); 1002 + if (ret) 1003 + return ret; 1004 + 1005 + break; 1006 + 1007 + /* 1008 + * BPF_STX PROBE_ATOMIC (arena atomic ops) 1009 + */ 1010 + case BPF_STX | BPF_PROBE_ATOMIC | BPF_W: 1011 + case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW: 1012 + EMIT(PPC_RAW_ADD(dst_reg, dst_reg, bpf_to_ppc(ARENA_VM_START))); 1013 + ret = bpf_jit_emit_atomic_ops(image, ctx, &insn[i], 1014 + &jmp_off, &tmp_idx, &addrs[i + 1]); 1015 + if (ret) { 1016 + if (ret == -EOPNOTSUPP) { 1017 + pr_err_ratelimited( 1018 + "eBPF filter atomic op code %02x (@%d) unsupported\n", 1019 + code, i); 1020 + } 1021 + return ret; 1022 + } 1023 + /* LDARX/LWARX should land here on exception. */ 1024 + ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, 1025 + tmp_idx, jmp_off, dst_reg, code); 1026 + if (ret) 1027 + return ret; 1028 + 1029 + /* Retrieve the dst_reg */ 1030 + EMIT(PPC_RAW_SUB(dst_reg, dst_reg, bpf_to_ppc(ARENA_VM_START))); 1031 + break; 1032 + 1122 1033 /* 1123 1034 * BPF_STX ATOMIC (atomic ops) 1124 1035 */ ··· 1211 982 return -EOPNOTSUPP; 1212 983 } 1213 984 1214 - save_reg = tmp2_reg; 1215 - ret_reg = src_reg; 1216 - 1217 - /* Get offset into TMP_REG_1 */ 1218 - EMIT(PPC_RAW_LI(tmp1_reg, off)); 1219 - /* 1220 - * Enforce full ordering for operations with BPF_FETCH by emitting a 'sync' 1221 - * before and after the operation. 1222 - * 1223 - * This is a requirement in the Linux Kernel Memory Model. 1224 - * See __cmpxchg_u64() in asm/cmpxchg.h as an example. 1225 - */ 1226 - if ((imm & BPF_FETCH) && IS_ENABLED(CONFIG_SMP)) 1227 - EMIT(PPC_RAW_SYNC()); 1228 - tmp_idx = ctx->idx * 4; 1229 - /* load value from memory into TMP_REG_2 */ 1230 - if (size == BPF_DW) 1231 - EMIT(PPC_RAW_LDARX(tmp2_reg, tmp1_reg, dst_reg, 0)); 1232 - else 1233 - EMIT(PPC_RAW_LWARX(tmp2_reg, tmp1_reg, dst_reg, 0)); 1234 - 1235 - /* Save old value in _R0 */ 1236 - if (imm & BPF_FETCH) 1237 - EMIT(PPC_RAW_MR(_R0, tmp2_reg)); 1238 - 1239 - switch (imm) { 1240 - case BPF_ADD: 1241 - case BPF_ADD | BPF_FETCH: 1242 - EMIT(PPC_RAW_ADD(tmp2_reg, tmp2_reg, src_reg)); 1243 - break; 1244 - case BPF_AND: 1245 - case BPF_AND | BPF_FETCH: 1246 - EMIT(PPC_RAW_AND(tmp2_reg, tmp2_reg, src_reg)); 1247 - break; 1248 - case BPF_OR: 1249 - case BPF_OR | BPF_FETCH: 1250 - EMIT(PPC_RAW_OR(tmp2_reg, tmp2_reg, src_reg)); 1251 - break; 1252 - case BPF_XOR: 1253 - case BPF_XOR | BPF_FETCH: 1254 - EMIT(PPC_RAW_XOR(tmp2_reg, tmp2_reg, src_reg)); 1255 - break; 1256 - case BPF_CMPXCHG: 1257 - /* 1258 - * Return old value in BPF_REG_0 for BPF_CMPXCHG & 1259 - * in src_reg for other cases. 1260 - */ 1261 - ret_reg = bpf_to_ppc(BPF_REG_0); 1262 - 1263 - /* Compare with old value in BPF_R0 */ 1264 - if (size == BPF_DW) 1265 - EMIT(PPC_RAW_CMPD(bpf_to_ppc(BPF_REG_0), tmp2_reg)); 1266 - else 1267 - EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), tmp2_reg)); 1268 - /* Don't set if different from old value */ 1269 - PPC_BCC_SHORT(COND_NE, (ctx->idx + 3) * 4); 1270 - fallthrough; 1271 - case BPF_XCHG: 1272 - save_reg = src_reg; 1273 - break; 1274 - default: 1275 - pr_err_ratelimited( 1276 - "eBPF filter atomic op code %02x (@%d) unsupported\n", 1277 - code, i); 1278 - return -EOPNOTSUPP; 1279 - } 1280 - 1281 - /* store new value */ 1282 - if (size == BPF_DW) 1283 - EMIT(PPC_RAW_STDCX(save_reg, tmp1_reg, dst_reg)); 1284 - else 1285 - EMIT(PPC_RAW_STWCX(save_reg, tmp1_reg, dst_reg)); 1286 - /* we're done if this succeeded */ 1287 - PPC_BCC_SHORT(COND_NE, tmp_idx); 1288 - 1289 - if (imm & BPF_FETCH) { 1290 - /* Emit 'sync' to enforce full ordering */ 1291 - if (IS_ENABLED(CONFIG_SMP)) 1292 - EMIT(PPC_RAW_SYNC()); 1293 - EMIT(PPC_RAW_MR(ret_reg, _R0)); 1294 - /* 1295 - * Skip unnecessary zero-extension for 32-bit cmpxchg. 1296 - * For context, see commit 39491867ace5. 1297 - */ 1298 - if (size != BPF_DW && imm == BPF_CMPXCHG && 1299 - insn_is_zext(&insn[i + 1])) 1300 - addrs[++i] = ctx->idx * 4; 985 + ret = bpf_jit_emit_atomic_ops(image, ctx, &insn[i], 986 + &jmp_off, &tmp_idx, &addrs[i + 1]); 987 + if (ret) { 988 + if (ret == -EOPNOTSUPP) { 989 + pr_err_ratelimited( 990 + "eBPF filter atomic op code %02x (@%d) unsupported\n", 991 + code, i); 992 + } 993 + return ret; 1301 994 } 1302 995 break; 1303 996 ··· 1263 1112 * Check if 'off' is word aligned for BPF_DW, because 1264 1113 * we might generate two instructions. 1265 1114 */ 1266 - if ((BPF_SIZE(code) == BPF_DW || 1267 - (BPF_SIZE(code) == BPF_B && BPF_MODE(code) == BPF_PROBE_MEMSX)) && 1268 - (off & 3)) 1115 + if ((BPF_SIZE(code) == BPF_DW && (off & 3)) || 1116 + (BPF_SIZE(code) == BPF_B && 1117 + BPF_MODE(code) == BPF_PROBE_MEMSX) || 1118 + (BPF_SIZE(code) == BPF_B && BPF_MODE(code) == BPF_MEMSX)) 1269 1119 PPC_JMP((ctx->idx + 3) * 4); 1270 1120 else 1271 1121 PPC_JMP((ctx->idx + 2) * 4); ··· 1312 1160 1313 1161 if (BPF_MODE(code) == BPF_PROBE_MEM) { 1314 1162 ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, 1315 - ctx->idx - 1, 4, dst_reg); 1163 + ctx->idx - 1, 4, dst_reg, code); 1316 1164 if (ret) 1317 1165 return ret; 1318 1166 } 1167 + break; 1168 + 1169 + /* dst = *(u64 *)(ul) (src + ARENA_VM_START + off) */ 1170 + case BPF_LDX | BPF_PROBE_MEM32 | BPF_B: 1171 + case BPF_LDX | BPF_PROBE_MEM32 | BPF_H: 1172 + case BPF_LDX | BPF_PROBE_MEM32 | BPF_W: 1173 + case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW: 1174 + 1175 + EMIT(PPC_RAW_ADD(tmp1_reg, src_reg, bpf_to_ppc(ARENA_VM_START))); 1176 + 1177 + switch (size) { 1178 + case BPF_B: 1179 + EMIT(PPC_RAW_LBZ(dst_reg, tmp1_reg, off)); 1180 + break; 1181 + case BPF_H: 1182 + EMIT(PPC_RAW_LHZ(dst_reg, tmp1_reg, off)); 1183 + break; 1184 + case BPF_W: 1185 + EMIT(PPC_RAW_LWZ(dst_reg, tmp1_reg, off)); 1186 + break; 1187 + case BPF_DW: 1188 + if (off % 4) { 1189 + EMIT(PPC_RAW_LI(tmp2_reg, off)); 1190 + EMIT(PPC_RAW_LDX(dst_reg, tmp1_reg, tmp2_reg)); 1191 + } else { 1192 + EMIT(PPC_RAW_LD(dst_reg, tmp1_reg, off)); 1193 + } 1194 + break; 1195 + } 1196 + 1197 + if (size != BPF_DW && insn_is_zext(&insn[i + 1])) 1198 + addrs[++i] = ctx->idx * 4; 1199 + 1200 + ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, 1201 + ctx->idx - 1, 4, dst_reg, code); 1202 + if (ret) 1203 + return ret; 1319 1204 break; 1320 1205 1321 1206 /*

+1 -1

arch/powerpc/perf/Makefile

··· 14 14 obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o 15 15 obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o 16 16 17 - obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o 17 + obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o vpa-dtl.o 18 18 19 19 obj-$(CONFIG_VPA_PMU) += vpa-pmu.o 20 20

+596

arch/powerpc/perf/vpa-dtl.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Perf interface to expose Dispatch Trace Log counters. 4 + * 5 + * Copyright (C) 2024 Kajol Jain, IBM Corporation 6 + */ 7 + 8 + #ifdef CONFIG_PPC_SPLPAR 9 + #define pr_fmt(fmt) "vpa_dtl: " fmt 10 + 11 + #include <asm/dtl.h> 12 + #include <linux/perf_event.h> 13 + #include <asm/plpar_wrappers.h> 14 + #include <linux/vmalloc.h> 15 + 16 + #define EVENT(_name, _code) enum{_name = _code} 17 + 18 + /* 19 + * Based on Power Architecture Platform Reference(PAPR) documentation, 20 + * Table 14.14. Per Virtual Processor Area, below Dispatch Trace Log(DTL) 21 + * Enable Mask used to get corresponding virtual processor dispatch 22 + * to preempt traces: 23 + * DTL_CEDE(0x1): Trace voluntary (OS initiated) virtual 24 + * processor waits 25 + * DTL_PREEMPT(0x2): Trace time slice preempts 26 + * DTL_FAULT(0x4): Trace virtual partition memory page 27 + faults. 28 + * DTL_ALL(0x7): Trace all (DTL_CEDE | DTL_PREEMPT | DTL_FAULT) 29 + * 30 + * Event codes based on Dispatch Trace Log Enable Mask. 31 + */ 32 + EVENT(DTL_CEDE, 0x1); 33 + EVENT(DTL_PREEMPT, 0x2); 34 + EVENT(DTL_FAULT, 0x4); 35 + EVENT(DTL_ALL, 0x7); 36 + 37 + GENERIC_EVENT_ATTR(dtl_cede, DTL_CEDE); 38 + GENERIC_EVENT_ATTR(dtl_preempt, DTL_PREEMPT); 39 + GENERIC_EVENT_ATTR(dtl_fault, DTL_FAULT); 40 + GENERIC_EVENT_ATTR(dtl_all, DTL_ALL); 41 + 42 + PMU_FORMAT_ATTR(event, "config:0-7"); 43 + 44 + static struct attribute *events_attr[] = { 45 + GENERIC_EVENT_PTR(DTL_CEDE), 46 + GENERIC_EVENT_PTR(DTL_PREEMPT), 47 + GENERIC_EVENT_PTR(DTL_FAULT), 48 + GENERIC_EVENT_PTR(DTL_ALL), 49 + NULL 50 + }; 51 + 52 + static struct attribute_group event_group = { 53 + .name = "events", 54 + .attrs = events_attr, 55 + }; 56 + 57 + static struct attribute *format_attrs[] = { 58 + &format_attr_event.attr, 59 + NULL, 60 + }; 61 + 62 + static const struct attribute_group format_group = { 63 + .name = "format", 64 + .attrs = format_attrs, 65 + }; 66 + 67 + static const struct attribute_group *attr_groups[] = { 68 + &format_group, 69 + &event_group, 70 + NULL, 71 + }; 72 + 73 + struct vpa_dtl { 74 + struct dtl_entry *buf; 75 + u64 last_idx; 76 + }; 77 + 78 + struct vpa_pmu_ctx { 79 + struct perf_output_handle handle; 80 + }; 81 + 82 + struct vpa_pmu_buf { 83 + int nr_pages; 84 + bool snapshot; 85 + u64 *base; 86 + u64 size; 87 + u64 head; 88 + u64 head_size; 89 + /* boot timebase and frequency needs to be saved only at once */ 90 + int boottb_freq_saved; 91 + u64 threshold; 92 + bool full; 93 + }; 94 + 95 + /* 96 + * To corelate each DTL entry with other events across CPU's, 97 + * we need to map timebase from "struct dtl_entry" which phyp 98 + * provides with boot timebase. This also needs timebase frequency. 99 + * Formula is: ((timbase from DTL entry - boot time) / frequency) 100 + * 101 + * To match with size of "struct dtl_entry" to ease post processing, 102 + * padded 24 bytes to the structure. 103 + */ 104 + struct boottb_freq { 105 + u64 boot_tb; 106 + u64 tb_freq; 107 + u64 timebase; 108 + u64 padded[3]; 109 + }; 110 + 111 + static DEFINE_PER_CPU(struct vpa_pmu_ctx, vpa_pmu_ctx); 112 + static DEFINE_PER_CPU(struct vpa_dtl, vpa_dtl_cpu); 113 + 114 + /* variable to capture reference count for the active dtl threads */ 115 + static int dtl_global_refc; 116 + static spinlock_t dtl_global_lock = __SPIN_LOCK_UNLOCKED(dtl_global_lock); 117 + 118 + /* 119 + * Capture DTL data in AUX buffer 120 + */ 121 + static void vpa_dtl_capture_aux(long *n_entries, struct vpa_pmu_buf *buf, 122 + struct vpa_dtl *dtl, int index) 123 + { 124 + struct dtl_entry *aux_copy_buf = (struct dtl_entry *)buf->base; 125 + 126 + /* 127 + * check if there is enough space to contain the 128 + * DTL data. If not, save the data for available 129 + * memory and set full to true. 130 + */ 131 + if (buf->head + *n_entries >= buf->threshold) { 132 + *n_entries = buf->threshold - buf->head; 133 + buf->full = 1; 134 + } 135 + 136 + /* 137 + * Copy to AUX buffer from per-thread address 138 + */ 139 + memcpy(aux_copy_buf + buf->head, &dtl->buf[index], *n_entries * sizeof(struct dtl_entry)); 140 + 141 + if (buf->full) { 142 + /* 143 + * Set head of private aux to zero when buffer is full 144 + * so that next data will be copied to beginning of the 145 + * buffer 146 + */ 147 + buf->head = 0; 148 + return; 149 + } 150 + 151 + buf->head += *n_entries; 152 + 153 + return; 154 + } 155 + 156 + /* 157 + * Function to dump the dispatch trace log buffer data to the 158 + * perf data. 159 + * 160 + * perf_aux_output_begin: This function is called before writing 161 + * to AUX area. This returns the pointer to aux area private structure, 162 + * ie "struct vpa_pmu_buf" here which is set in setup_aux() function. 163 + * The function obtains the output handle (used in perf_aux_output_end). 164 + * when capture completes in vpa_dtl_capture_aux(), call perf_aux_output_end() 165 + * to commit the recorded data. 166 + * 167 + * perf_aux_output_end: This function commits data by adjusting the 168 + * aux_head of "struct perf_buffer". aux_tail will be moved in perf tools 169 + * side when writing the data from aux buffer to perf.data file in disk. 170 + * 171 + * Here in the private aux structure, we maintain head to know where 172 + * to copy data next time in the PMU driver. vpa_pmu_buf->head is moved to 173 + * maintain the aux head for PMU driver. It is responsiblity of PMU 174 + * driver to make sure data is copied between perf_aux_output_begin and 175 + * perf_aux_output_end. 176 + * 177 + * After data is copied in vpa_dtl_capture_aux() function, perf_aux_output_end() 178 + * is called to move the aux->head of "struct perf_buffer" to indicate size of 179 + * data in aux buffer. This will post a PERF_RECORD_AUX into the perf buffer. 180 + * Data will be written to disk only when the allocated buffer is full. 181 + * 182 + * By this approach, all the DTL data will be present as-is in the 183 + * perf.data. The data will be pre-processed in perf tools side when doing 184 + * perf report/perf script and this will avoid time taken to create samples 185 + * in the kernel space. 186 + */ 187 + static void vpa_dtl_dump_sample_data(struct perf_event *event) 188 + { 189 + u64 cur_idx, last_idx, i; 190 + u64 boot_tb; 191 + struct boottb_freq boottb_freq; 192 + 193 + /* actual number of entries read */ 194 + long n_read = 0, read_size = 0; 195 + 196 + /* number of entries added to dtl buffer */ 197 + long n_req; 198 + 199 + struct vpa_pmu_ctx *vpa_ctx = this_cpu_ptr(&vpa_pmu_ctx); 200 + 201 + struct vpa_pmu_buf *aux_buf; 202 + 203 + struct vpa_dtl *dtl = &per_cpu(vpa_dtl_cpu, event->cpu); 204 + u64 size; 205 + 206 + cur_idx = be64_to_cpu(lppaca_of(event->cpu).dtl_idx); 207 + last_idx = dtl->last_idx; 208 + 209 + if (last_idx + N_DISPATCH_LOG <= cur_idx) 210 + last_idx = cur_idx - N_DISPATCH_LOG + 1; 211 + 212 + n_req = cur_idx - last_idx; 213 + 214 + /* no new entry added to the buffer, return */ 215 + if (n_req <= 0) 216 + return; 217 + 218 + dtl->last_idx = last_idx + n_req; 219 + boot_tb = get_boot_tb(); 220 + 221 + i = last_idx % N_DISPATCH_LOG; 222 + 223 + aux_buf = perf_aux_output_begin(&vpa_ctx->handle, event); 224 + if (!aux_buf) { 225 + pr_debug("returning. no aux\n"); 226 + return; 227 + } 228 + 229 + if (!aux_buf->boottb_freq_saved) { 230 + pr_debug("Copying boot tb to aux buffer: %lld\n", boot_tb); 231 + /* Save boot_tb to convert raw timebase to it's relative system boot time */ 232 + boottb_freq.boot_tb = boot_tb; 233 + /* Save tb_ticks_per_sec to convert timebase to sec */ 234 + boottb_freq.tb_freq = tb_ticks_per_sec; 235 + boottb_freq.timebase = 0; 236 + memcpy(aux_buf->base, &boottb_freq, sizeof(boottb_freq)); 237 + aux_buf->head += 1; 238 + aux_buf->boottb_freq_saved = 1; 239 + n_read += 1; 240 + } 241 + 242 + /* read the tail of the buffer if we've wrapped */ 243 + if (i + n_req > N_DISPATCH_LOG) { 244 + read_size = N_DISPATCH_LOG - i; 245 + vpa_dtl_capture_aux(&read_size, aux_buf, dtl, i); 246 + n_req -= read_size; 247 + n_read += read_size; 248 + i = 0; 249 + if (aux_buf->full) { 250 + size = (n_read * sizeof(struct dtl_entry)); 251 + if ((size + aux_buf->head_size) > aux_buf->size) { 252 + size = aux_buf->size - aux_buf->head_size; 253 + perf_aux_output_end(&vpa_ctx->handle, size); 254 + aux_buf->head = 0; 255 + aux_buf->head_size = 0; 256 + } else { 257 + aux_buf->head_size += (n_read * sizeof(struct dtl_entry)); 258 + perf_aux_output_end(&vpa_ctx->handle, n_read * sizeof(struct dtl_entry)); 259 + } 260 + goto out; 261 + } 262 + } 263 + 264 + /* .. and now the head */ 265 + vpa_dtl_capture_aux(&n_req, aux_buf, dtl, i); 266 + 267 + size = ((n_req + n_read) * sizeof(struct dtl_entry)); 268 + if ((size + aux_buf->head_size) > aux_buf->size) { 269 + size = aux_buf->size - aux_buf->head_size; 270 + perf_aux_output_end(&vpa_ctx->handle, size); 271 + aux_buf->head = 0; 272 + aux_buf->head_size = 0; 273 + } else { 274 + aux_buf->head_size += ((n_req + n_read) * sizeof(struct dtl_entry)); 275 + /* Move the aux->head to indicate size of data in aux buffer */ 276 + perf_aux_output_end(&vpa_ctx->handle, (n_req + n_read) * sizeof(struct dtl_entry)); 277 + } 278 + out: 279 + aux_buf->full = 0; 280 + } 281 + 282 + /* 283 + * The VPA Dispatch Trace log counters do not interrupt on overflow. 284 + * Therefore, the kernel needs to poll the counters to avoid missing 285 + * an overflow using hrtimer. The timer interval is based on sample_period 286 + * count provided by user, and minimum interval is 1 millisecond. 287 + */ 288 + static enum hrtimer_restart vpa_dtl_hrtimer_handle(struct hrtimer *hrtimer) 289 + { 290 + struct perf_event *event; 291 + u64 period; 292 + 293 + event = container_of(hrtimer, struct perf_event, hw.hrtimer); 294 + 295 + if (event->state != PERF_EVENT_STATE_ACTIVE) 296 + return HRTIMER_NORESTART; 297 + 298 + vpa_dtl_dump_sample_data(event); 299 + period = max_t(u64, NSEC_PER_MSEC, event->hw.sample_period); 300 + hrtimer_forward_now(hrtimer, ns_to_ktime(period)); 301 + 302 + return HRTIMER_RESTART; 303 + } 304 + 305 + static void vpa_dtl_start_hrtimer(struct perf_event *event) 306 + { 307 + u64 period; 308 + struct hw_perf_event *hwc = &event->hw; 309 + 310 + period = max_t(u64, NSEC_PER_MSEC, hwc->sample_period); 311 + hrtimer_start(&hwc->hrtimer, ns_to_ktime(period), HRTIMER_MODE_REL_PINNED); 312 + } 313 + 314 + static void vpa_dtl_stop_hrtimer(struct perf_event *event) 315 + { 316 + struct hw_perf_event *hwc = &event->hw; 317 + 318 + hrtimer_cancel(&hwc->hrtimer); 319 + } 320 + 321 + static void vpa_dtl_reset_global_refc(struct perf_event *event) 322 + { 323 + spin_lock(&dtl_global_lock); 324 + dtl_global_refc--; 325 + if (dtl_global_refc <= 0) { 326 + dtl_global_refc = 0; 327 + up_write(&dtl_access_lock); 328 + } 329 + spin_unlock(&dtl_global_lock); 330 + } 331 + 332 + static int vpa_dtl_mem_alloc(int cpu) 333 + { 334 + struct vpa_dtl *dtl = &per_cpu(vpa_dtl_cpu, cpu); 335 + struct dtl_entry *buf = NULL; 336 + 337 + /* Check for dispatch trace log buffer cache */ 338 + if (!dtl_cache) 339 + return -ENOMEM; 340 + 341 + buf = kmem_cache_alloc_node(dtl_cache, GFP_KERNEL | GFP_ATOMIC, cpu_to_node(cpu)); 342 + if (!buf) { 343 + pr_warn("buffer allocation failed for cpu %d\n", cpu); 344 + return -ENOMEM; 345 + } 346 + dtl->buf = buf; 347 + return 0; 348 + } 349 + 350 + static int vpa_dtl_event_init(struct perf_event *event) 351 + { 352 + struct hw_perf_event *hwc = &event->hw; 353 + 354 + /* test the event attr type for PMU enumeration */ 355 + if (event->attr.type != event->pmu->type) 356 + return -ENOENT; 357 + 358 + if (!perfmon_capable()) 359 + return -EACCES; 360 + 361 + /* Return if this is a counting event */ 362 + if (!is_sampling_event(event)) 363 + return -EOPNOTSUPP; 364 + 365 + /* no branch sampling */ 366 + if (has_branch_stack(event)) 367 + return -EOPNOTSUPP; 368 + 369 + /* Invalid eventcode */ 370 + switch (event->attr.config) { 371 + case DTL_LOG_CEDE: 372 + case DTL_LOG_PREEMPT: 373 + case DTL_LOG_FAULT: 374 + case DTL_LOG_ALL: 375 + break; 376 + default: 377 + return -EINVAL; 378 + } 379 + 380 + spin_lock(&dtl_global_lock); 381 + 382 + /* 383 + * To ensure there are no other conflicting dtl users 384 + * (example: /proc/powerpc/vcpudispatch_stats or debugfs dtl), 385 + * below code try to take the dtl_access_lock. 386 + * The dtl_access_lock is a rwlock defined in dtl.h, which is used 387 + * to unsure there is no conflicting dtl users. 388 + * Based on below code, vpa_dtl pmu tries to take write access lock 389 + * and also checks for dtl_global_refc, to make sure that the 390 + * dtl_access_lock is taken by vpa_dtl pmu interface. 391 + */ 392 + if (dtl_global_refc == 0 && !down_write_trylock(&dtl_access_lock)) { 393 + spin_unlock(&dtl_global_lock); 394 + return -EBUSY; 395 + } 396 + 397 + /* Allocate dtl buffer memory */ 398 + if (vpa_dtl_mem_alloc(event->cpu)) { 399 + spin_unlock(&dtl_global_lock); 400 + return -ENOMEM; 401 + } 402 + 403 + /* 404 + * Increment the number of active vpa_dtl pmu threads. The 405 + * dtl_global_refc is used to keep count of cpu threads that 406 + * currently capturing dtl data using vpa_dtl pmu interface. 407 + */ 408 + dtl_global_refc++; 409 + 410 + spin_unlock(&dtl_global_lock); 411 + 412 + hrtimer_setup(&hwc->hrtimer, vpa_dtl_hrtimer_handle, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 413 + 414 + /* 415 + * Since hrtimers have a fixed rate, we can do a static freq->period 416 + * mapping and avoid the whole period adjust feedback stuff. 417 + */ 418 + if (event->attr.freq) { 419 + long freq = event->attr.sample_freq; 420 + 421 + event->attr.sample_period = NSEC_PER_SEC / freq; 422 + hwc->sample_period = event->attr.sample_period; 423 + local64_set(&hwc->period_left, hwc->sample_period); 424 + hwc->last_period = hwc->sample_period; 425 + event->attr.freq = 0; 426 + } 427 + 428 + event->destroy = vpa_dtl_reset_global_refc; 429 + return 0; 430 + } 431 + 432 + static int vpa_dtl_event_add(struct perf_event *event, int flags) 433 + { 434 + int ret, hwcpu; 435 + unsigned long addr; 436 + struct vpa_dtl *dtl = &per_cpu(vpa_dtl_cpu, event->cpu); 437 + 438 + /* 439 + * Register our dtl buffer with the hypervisor. The 440 + * HV expects the buffer size to be passed in the second 441 + * word of the buffer. Refer section '14.11.3.2. H_REGISTER_VPA' 442 + * from PAPR for more information. 443 + */ 444 + ((u32 *)dtl->buf)[1] = cpu_to_be32(DISPATCH_LOG_BYTES); 445 + dtl->last_idx = 0; 446 + 447 + hwcpu = get_hard_smp_processor_id(event->cpu); 448 + addr = __pa(dtl->buf); 449 + 450 + ret = register_dtl(hwcpu, addr); 451 + if (ret) { 452 + pr_warn("DTL registration for cpu %d (hw %d) failed with %d\n", 453 + event->cpu, hwcpu, ret); 454 + return ret; 455 + } 456 + 457 + /* set our initial buffer indices */ 458 + lppaca_of(event->cpu).dtl_idx = 0; 459 + 460 + /* 461 + * Ensure that our updates to the lppaca fields have 462 + * occurred before we actually enable the logging 463 + */ 464 + smp_wmb(); 465 + 466 + /* enable event logging */ 467 + lppaca_of(event->cpu).dtl_enable_mask = event->attr.config; 468 + 469 + vpa_dtl_start_hrtimer(event); 470 + 471 + return 0; 472 + } 473 + 474 + static void vpa_dtl_event_del(struct perf_event *event, int flags) 475 + { 476 + int hwcpu = get_hard_smp_processor_id(event->cpu); 477 + struct vpa_dtl *dtl = &per_cpu(vpa_dtl_cpu, event->cpu); 478 + 479 + vpa_dtl_stop_hrtimer(event); 480 + unregister_dtl(hwcpu); 481 + kmem_cache_free(dtl_cache, dtl->buf); 482 + dtl->buf = NULL; 483 + lppaca_of(event->cpu).dtl_enable_mask = 0x0; 484 + } 485 + 486 + /* 487 + * This function definition is empty as vpa_dtl_dump_sample_data 488 + * is used to parse and dump the dispatch trace log data, 489 + * to perf data. 490 + */ 491 + static void vpa_dtl_event_read(struct perf_event *event) 492 + { 493 + } 494 + 495 + /* 496 + * Set up pmu-private data structures for an AUX area 497 + * **pages contains the aux buffer allocated for this event 498 + * for the corresponding cpu. rb_alloc_aux uses "alloc_pages_node" 499 + * and returns pointer to each page address. Map these pages to 500 + * contiguous space using vmap and use that as base address. 501 + * 502 + * The aux private data structure ie, "struct vpa_pmu_buf" mainly 503 + * saves 504 + * - buf->base: aux buffer base address 505 + * - buf->head: offset from base address where data will be written to. 506 + * - buf->size: Size of allocated memory 507 + */ 508 + static void *vpa_dtl_setup_aux(struct perf_event *event, void **pages, 509 + int nr_pages, bool snapshot) 510 + { 511 + int i, cpu = event->cpu; 512 + struct vpa_pmu_buf *buf __free(kfree) = NULL; 513 + struct page **pglist __free(kfree) = NULL; 514 + 515 + /* We need at least one page for this to work. */ 516 + if (!nr_pages) 517 + return NULL; 518 + 519 + if (cpu == -1) 520 + cpu = raw_smp_processor_id(); 521 + 522 + buf = kzalloc_node(sizeof(*buf), GFP_KERNEL, cpu_to_node(cpu)); 523 + if (!buf) 524 + return NULL; 525 + 526 + pglist = kcalloc(nr_pages, sizeof(*pglist), GFP_KERNEL); 527 + if (!pglist) 528 + return NULL; 529 + 530 + for (i = 0; i < nr_pages; ++i) 531 + pglist[i] = virt_to_page(pages[i]); 532 + 533 + buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL); 534 + if (!buf->base) 535 + return NULL; 536 + 537 + buf->nr_pages = nr_pages; 538 + buf->snapshot = false; 539 + 540 + buf->size = nr_pages << PAGE_SHIFT; 541 + buf->head = 0; 542 + buf->head_size = 0; 543 + buf->boottb_freq_saved = 0; 544 + buf->threshold = ((buf->size - 32) / sizeof(struct dtl_entry)); 545 + return no_free_ptr(buf); 546 + } 547 + 548 + /* 549 + * free pmu-private AUX data structures 550 + */ 551 + static void vpa_dtl_free_aux(void *aux) 552 + { 553 + struct vpa_pmu_buf *buf = aux; 554 + 555 + vunmap(buf->base); 556 + kfree(buf); 557 + } 558 + 559 + static struct pmu vpa_dtl_pmu = { 560 + .task_ctx_nr = perf_invalid_context, 561 + 562 + .name = "vpa_dtl", 563 + .attr_groups = attr_groups, 564 + .event_init = vpa_dtl_event_init, 565 + .add = vpa_dtl_event_add, 566 + .del = vpa_dtl_event_del, 567 + .read = vpa_dtl_event_read, 568 + .setup_aux = vpa_dtl_setup_aux, 569 + .free_aux = vpa_dtl_free_aux, 570 + .capabilities = PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_EXCLUSIVE, 571 + }; 572 + 573 + static int vpa_dtl_init(void) 574 + { 575 + int r; 576 + 577 + if (!firmware_has_feature(FW_FEATURE_SPLPAR)) { 578 + pr_debug("not a shared virtualized system, not enabling\n"); 579 + return -ENODEV; 580 + } 581 + 582 + /* This driver is intended only for L1 host. */ 583 + if (is_kvm_guest()) { 584 + pr_debug("Only supported for L1 host system\n"); 585 + return -ENODEV; 586 + } 587 + 588 + r = perf_pmu_register(&vpa_dtl_pmu, vpa_dtl_pmu.name, -1); 589 + if (r) 590 + return r; 591 + 592 + return 0; 593 + } 594 + 595 + device_initcall(vpa_dtl_init); 596 + #endif //CONFIG_PPC_SPLPAR

-1

arch/powerpc/platforms/44x/Kconfig

··· 231 231 bool "PPC4xx GPIO support" 232 232 depends on 44x 233 233 select GPIOLIB 234 - select OF_GPIO_MM_GPIOCHIP 235 234 help 236 235 Enable gpiolib support for ppc440 based boards 237 236

+55 -41

arch/powerpc/platforms/44x/gpio.c

··· 14 14 #include <linux/spinlock.h> 15 15 #include <linux/io.h> 16 16 #include <linux/of.h> 17 - #include <linux/gpio/legacy-of-mm-gpiochip.h> 18 17 #include <linux/gpio/driver.h> 19 18 #include <linux/types.h> 20 19 #include <linux/slab.h> 20 + #include <linux/platform_device.h> 21 21 22 22 #define GPIO_MASK(gpio) (0x80000000 >> (gpio)) 23 23 #define GPIO_MASK2(gpio) (0xc0000000 >> ((gpio) * 2)) ··· 45 45 }; 46 46 47 47 struct ppc4xx_gpio_chip { 48 - struct of_mm_gpio_chip mm_gc; 48 + struct gpio_chip gc; 49 + void __iomem *regs; 49 50 spinlock_t lock; 50 51 }; 51 52 ··· 58 57 59 58 static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio) 60 59 { 61 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 62 - struct ppc4xx_gpio __iomem *regs = mm_gc->regs; 60 + struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); 61 + struct ppc4xx_gpio __iomem *regs = chip->regs; 63 62 64 63 return !!(in_be32(&regs->ir) & GPIO_MASK(gpio)); 65 64 } ··· 67 66 static inline void 68 67 __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 69 68 { 70 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 71 - struct ppc4xx_gpio __iomem *regs = mm_gc->regs; 69 + struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); 70 + struct ppc4xx_gpio __iomem *regs = chip->regs; 72 71 73 72 if (val) 74 73 setbits32(&regs->or, GPIO_MASK(gpio)); ··· 94 93 95 94 static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 96 95 { 97 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 98 96 struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); 99 - struct ppc4xx_gpio __iomem *regs = mm_gc->regs; 97 + struct ppc4xx_gpio __iomem *regs = chip->regs; 100 98 unsigned long flags; 101 99 102 100 spin_lock_irqsave(&chip->lock, flags); ··· 123 123 static int 124 124 ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 125 125 { 126 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 127 126 struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); 128 - struct ppc4xx_gpio __iomem *regs = mm_gc->regs; 127 + struct ppc4xx_gpio __iomem *regs = chip->regs; 129 128 unsigned long flags; 130 129 131 130 spin_lock_irqsave(&chip->lock, flags); ··· 154 155 return 0; 155 156 } 156 157 157 - static int __init ppc4xx_add_gpiochips(void) 158 + static int ppc4xx_gpio_probe(struct platform_device *ofdev) 158 159 { 159 - struct device_node *np; 160 + struct device *dev = &ofdev->dev; 161 + struct device_node *np = dev->of_node; 162 + struct ppc4xx_gpio_chip *chip; 163 + struct gpio_chip *gc; 160 164 161 - for_each_compatible_node(np, NULL, "ibm,ppc4xx-gpio") { 162 - int ret; 163 - struct ppc4xx_gpio_chip *ppc4xx_gc; 164 - struct of_mm_gpio_chip *mm_gc; 165 - struct gpio_chip *gc; 165 + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 166 + if (!chip) 167 + return -ENOMEM; 166 168 167 - ppc4xx_gc = kzalloc(sizeof(*ppc4xx_gc), GFP_KERNEL); 168 - if (!ppc4xx_gc) { 169 - ret = -ENOMEM; 170 - goto err; 171 - } 169 + spin_lock_init(&chip->lock); 172 170 173 - spin_lock_init(&ppc4xx_gc->lock); 171 + gc = &chip->gc; 174 172 175 - mm_gc = &ppc4xx_gc->mm_gc; 176 - gc = &mm_gc->gc; 173 + gc->base = -1; 174 + gc->ngpio = 32; 175 + gc->direction_input = ppc4xx_gpio_dir_in; 176 + gc->direction_output = ppc4xx_gpio_dir_out; 177 + gc->get = ppc4xx_gpio_get; 178 + gc->set = ppc4xx_gpio_set; 177 179 178 - gc->ngpio = 32; 179 - gc->direction_input = ppc4xx_gpio_dir_in; 180 - gc->direction_output = ppc4xx_gpio_dir_out; 181 - gc->get = ppc4xx_gpio_get; 182 - gc->set = ppc4xx_gpio_set; 180 + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); 181 + if (!gc->label) 182 + return -ENOMEM; 183 183 184 - ret = of_mm_gpiochip_add_data(np, mm_gc, ppc4xx_gc); 185 - if (ret) 186 - goto err; 187 - continue; 188 - err: 189 - pr_err("%pOF: registration failed with status %d\n", np, ret); 190 - kfree(ppc4xx_gc); 191 - /* try others anyway */ 192 - } 193 - return 0; 184 + chip->regs = devm_of_iomap(dev, np, 0, NULL); 185 + if (IS_ERR(chip->regs)) 186 + return PTR_ERR(chip->regs); 187 + 188 + return devm_gpiochip_add_data(dev, gc, chip); 194 189 } 195 - arch_initcall(ppc4xx_add_gpiochips); 190 + 191 + static const struct of_device_id ppc4xx_gpio_match[] = { 192 + { 193 + .compatible = "ibm,ppc4xx-gpio", 194 + }, 195 + {}, 196 + }; 197 + MODULE_DEVICE_TABLE(of, ppc4xx_gpio_match); 198 + 199 + static struct platform_driver ppc4xx_gpio_driver = { 200 + .probe = ppc4xx_gpio_probe, 201 + .driver = { 202 + .name = "ppc4xx-gpio", 203 + .of_match_table = ppc4xx_gpio_match, 204 + }, 205 + }; 206 + 207 + static int __init ppc4xx_gpio_init(void) 208 + { 209 + return platform_driver_register(&ppc4xx_gpio_driver); 210 + } 211 + arch_initcall(ppc4xx_gpio_init);

-1

arch/powerpc/platforms/8xx/Kconfig

··· 101 101 config 8xx_GPIO 102 102 bool "GPIO API Support" 103 103 select GPIOLIB 104 - select OF_GPIO_MM_GPIOCHIP 105 104 help 106 105 Saying Y here will cause the ports on an MPC8xx processor to be used 107 106 with the GPIO API. If you say N here, the kernel needs less memory.

-1

arch/powerpc/platforms/Kconfig

··· 243 243 select CPM 244 244 select HAVE_PCI 245 245 select GPIOLIB 246 - select OF_GPIO_MM_GPIOCHIP 247 246 help 248 247 The CPM2 (Communications Processor Module) is a coprocessor on 249 248 embedded CPUs made by Freescale. Selecting this option means that

+1

arch/powerpc/platforms/powernv/Kconfig

··· 9 9 select PPC_P7_NAP 10 10 select FORCE_PCI 11 11 select PCI_MSI 12 + select IRQ_MSI_LIB 12 13 select EPAPR_BOOT 13 14 select PPC_INDIRECT_PIO 14 15 select PPC_UDBG_16550

+35 -61

arch/powerpc/platforms/powernv/pci-ioda.c

··· 15 15 #include <linux/init.h> 16 16 #include <linux/memblock.h> 17 17 #include <linux/irq.h> 18 + #include <linux/irqchip/irq-msi-lib.h> 18 19 #include <linux/io.h> 19 20 #include <linux/msi.h> 20 21 #include <linux/iommu.h> ··· 38 37 #include <asm/firmware.h> 39 38 #include <asm/pnv-pci.h> 40 39 #include <asm/mmzone.h> 41 - #include <asm/xive.h> 42 40 43 41 #include "powernv.h" 44 42 #include "pci.h" ··· 1707 1707 return 0; 1708 1708 } 1709 1709 1710 - /* 1711 - * The msi_free() op is called before irq_domain_free_irqs_top() when 1712 - * the handler data is still available. Use that to clear the XIVE 1713 - * controller. 1714 - */ 1715 - static void pnv_msi_ops_msi_free(struct irq_domain *domain, 1716 - struct msi_domain_info *info, 1717 - unsigned int irq) 1718 - { 1719 - if (xive_enabled()) 1720 - xive_irq_free_data(irq); 1721 - } 1722 - 1723 - static struct msi_domain_ops pnv_pci_msi_domain_ops = { 1724 - .msi_free = pnv_msi_ops_msi_free, 1725 - }; 1726 - 1727 1710 static void pnv_msi_shutdown(struct irq_data *d) 1728 1711 { 1729 1712 d = d->parent_data; ··· 1714 1731 d->chip->irq_shutdown(d); 1715 1732 } 1716 1733 1717 - static void pnv_msi_mask(struct irq_data *d) 1734 + static bool pnv_init_dev_msi_info(struct device *dev, struct irq_domain *domain, 1735 + struct irq_domain *real_parent, struct msi_domain_info *info) 1718 1736 { 1719 - pci_msi_mask_irq(d); 1720 - irq_chip_mask_parent(d); 1737 + struct irq_chip *chip = info->chip; 1738 + 1739 + if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info)) 1740 + return false; 1741 + 1742 + chip->irq_shutdown = pnv_msi_shutdown; 1743 + return true; 1721 1744 } 1722 1745 1723 - static void pnv_msi_unmask(struct irq_data *d) 1724 - { 1725 - pci_msi_unmask_irq(d); 1726 - irq_chip_unmask_parent(d); 1727 - } 1746 + #define PNV_PCI_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ 1747 + MSI_FLAG_USE_DEF_CHIP_OPS | \ 1748 + MSI_FLAG_PCI_MSI_MASK_PARENT) 1749 + #define PNV_PCI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ 1750 + MSI_FLAG_PCI_MSIX | \ 1751 + MSI_FLAG_MULTI_PCI_MSI) 1728 1752 1729 - static struct irq_chip pnv_pci_msi_irq_chip = { 1730 - .name = "PNV-PCI-MSI", 1731 - .irq_shutdown = pnv_msi_shutdown, 1732 - .irq_mask = pnv_msi_mask, 1733 - .irq_unmask = pnv_msi_unmask, 1734 - .irq_eoi = irq_chip_eoi_parent, 1735 - }; 1736 - 1737 - static struct msi_domain_info pnv_msi_domain_info = { 1738 - .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | 1739 - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), 1740 - .ops = &pnv_pci_msi_domain_ops, 1741 - .chip = &pnv_pci_msi_irq_chip, 1753 + static const struct msi_parent_ops pnv_msi_parent_ops = { 1754 + .required_flags = PNV_PCI_MSI_FLAGS_REQUIRED, 1755 + .supported_flags = PNV_PCI_MSI_FLAGS_SUPPORTED, 1756 + .chip_flags = MSI_CHIP_FLAG_SET_EOI, 1757 + .bus_select_token = DOMAIN_BUS_NEXUS, 1758 + .bus_select_mask = MATCH_PCI_MSI, 1759 + .prefix = "PNV-", 1760 + .init_dev_msi_info = pnv_init_dev_msi_info, 1742 1761 }; 1743 1762 1744 1763 static void pnv_msi_compose_msg(struct irq_data *d, struct msi_msg *msg) ··· 1839 1854 return 0; 1840 1855 1841 1856 out: 1842 - irq_domain_free_irqs_parent(domain, virq, i - 1); 1857 + irq_domain_free_irqs_parent(domain, virq, i); 1843 1858 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, nr_irqs); 1844 1859 return ret; 1845 1860 } ··· 1855 1870 virq, d->hwirq, nr_irqs); 1856 1871 1857 1872 msi_bitmap_free_hwirqs(&phb->msi_bmp, d->hwirq, nr_irqs); 1858 - /* XIVE domain is cleared through ->msi_free() */ 1873 + irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1859 1874 } 1860 1875 1861 1876 static const struct irq_domain_ops pnv_irq_domain_ops = { 1877 + .select = msi_lib_irq_domain_select, 1862 1878 .alloc = pnv_irq_domain_alloc, 1863 1879 .free = pnv_irq_domain_free, 1864 1880 }; 1865 1881 1866 1882 static int __init pnv_msi_allocate_domains(struct pci_controller *hose, unsigned int count) 1867 1883 { 1868 - struct pnv_phb *phb = hose->private_data; 1869 1884 struct irq_domain *parent = irq_get_default_domain(); 1885 + struct irq_domain_info info = { 1886 + .fwnode = of_fwnode_handle(hose->dn), 1887 + .ops = &pnv_irq_domain_ops, 1888 + .host_data = hose, 1889 + .size = count, 1890 + .parent = parent, 1891 + }; 1870 1892 1871 - hose->fwnode = irq_domain_alloc_named_id_fwnode("PNV-MSI", phb->opal_id); 1872 - if (!hose->fwnode) 1873 - return -ENOMEM; 1874 - 1875 - hose->dev_domain = irq_domain_create_hierarchy(parent, 0, count, 1876 - hose->fwnode, 1877 - &pnv_irq_domain_ops, hose); 1893 + hose->dev_domain = msi_create_parent_irq_domain(&info, &pnv_msi_parent_ops); 1878 1894 if (!hose->dev_domain) { 1879 - pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n", 1880 - hose->dn, hose->global_number); 1881 - irq_domain_free_fwnode(hose->fwnode); 1882 - return -ENOMEM; 1883 - } 1884 - 1885 - hose->msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(hose->dn), 1886 - &pnv_msi_domain_info, 1887 - hose->dev_domain); 1888 - if (!hose->msi_domain) { 1889 1895 pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n", 1890 1896 hose->dn, hose->global_number); 1891 - irq_domain_free_fwnode(hose->fwnode); 1892 - irq_domain_remove(hose->dev_domain); 1893 1897 return -ENOMEM; 1894 1898 } 1895 1899

+2 -2

arch/powerpc/platforms/powernv/subcore.h

··· 9 9 #define SYNC_STEP_REAL_MODE 2 /* Set by secondary when in real mode */ 10 10 #define SYNC_STEP_FINISHED 3 /* Set by secondary when split/unsplit is done */ 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 14 14 #ifdef CONFIG_SMP 15 15 void split_core_secondary_loop(u8 *state); ··· 18 18 static inline void update_subcore_sibling_mask(void) { } 19 19 #endif /* CONFIG_SMP */ 20 20 21 - #endif /* __ASSEMBLY__ */ 21 + #endif /* __ASSEMBLER__ */

+1

arch/powerpc/platforms/pseries/Kconfig

··· 7 7 select OF_DYNAMIC 8 8 select FORCE_PCI 9 9 select PCI_MSI 10 + select IRQ_MSI_LIB 10 11 select GENERIC_ALLOCATOR 11 12 select PPC_XICS 12 13 select PPC_XIVE_SPAPR

+1

arch/powerpc/platforms/pseries/Makefile

··· 5 5 of_helpers.o rtas-work-area.o papr-sysparm.o \ 6 6 papr-rtas-common.o papr-vpd.o papr-indices.o \ 7 7 papr-platform-dump.o papr-phy-attest.o \ 8 + papr-hvpipe.o \ 8 9 setup.o iommu.o event_sources.o ras.o \ 9 10 firmware.o power.o dlpar.o mobility.o rng.o \ 10 11 pci.o pci_dlpar.o eeh_pseries.o msi.o \

+3

arch/powerpc/platforms/pseries/mobility.c

··· 28 28 #include <asm/rtas.h> 29 29 #include "pseries.h" 30 30 #include "vas.h" /* vas_migration_handler() */ 31 + #include "papr-hvpipe.h" /* hvpipe_migration_handler() */ 31 32 #include "../../kernel/cacheinfo.h" 32 33 33 34 static struct kobject *mobility_kobj; ··· 745 744 * by closing VAS windows at the beginning of this function. 746 745 */ 747 746 vas_migration_handler(VAS_SUSPEND); 747 + hvpipe_migration_handler(HVPIPE_SUSPEND); 748 748 749 749 ret = wait_for_vasi_session_suspending(handle); 750 750 if (ret) ··· 772 770 773 771 out: 774 772 vas_migration_handler(VAS_RESUME); 773 + hvpipe_migration_handler(HVPIPE_RESUME); 775 774 776 775 return ret; 777 776 }

+49 -83

arch/powerpc/platforms/pseries/msi.c

··· 7 7 #include <linux/crash_dump.h> 8 8 #include <linux/device.h> 9 9 #include <linux/irq.h> 10 + #include <linux/irqchip/irq-msi-lib.h> 10 11 #include <linux/irqdomain.h> 11 12 #include <linux/msi.h> 12 13 #include <linux/seq_file.h> ··· 16 15 #include <asm/hw_irq.h> 17 16 #include <asm/ppc-pci.h> 18 17 #include <asm/machdep.h> 19 - #include <asm/xive.h> 20 18 21 19 #include "pseries.h" 22 20 ··· 430 430 static int pseries_msi_ops_prepare(struct irq_domain *domain, struct device *dev, 431 431 int nvec, msi_alloc_info_t *arg) 432 432 { 433 + struct msi_domain_info *info = domain->host_data; 433 434 struct pci_dev *pdev = to_pci_dev(dev); 434 - int type = pdev->msix_enabled ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI; 435 + int type = (info->flags & MSI_FLAG_PCI_MSIX) ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI; 435 436 436 437 return rtas_prepare_msi_irqs(pdev, nvec, type, arg); 437 - } 438 - 439 - /* 440 - * ->msi_free() is called before irq_domain_free_irqs_top() when the 441 - * handler data is still available. Use that to clear the XIVE 442 - * controller data. 443 - */ 444 - static void pseries_msi_ops_msi_free(struct irq_domain *domain, 445 - struct msi_domain_info *info, 446 - unsigned int irq) 447 - { 448 - if (xive_enabled()) 449 - xive_irq_free_data(irq); 450 438 } 451 439 452 440 /* 453 441 * RTAS can not disable one MSI at a time. It's all or nothing. Do it 454 442 * at the end after all IRQs have been freed. 455 443 */ 456 - static void pseries_msi_post_free(struct irq_domain *domain, struct device *dev) 444 + static void pseries_msi_ops_teardown(struct irq_domain *domain, msi_alloc_info_t *arg) 457 445 { 458 - if (WARN_ON_ONCE(!dev_is_pci(dev))) 459 - return; 446 + struct msi_desc *desc = arg->desc; 447 + struct pci_dev *pdev = msi_desc_to_pci_dev(desc); 460 448 461 - rtas_disable_msi(to_pci_dev(dev)); 449 + rtas_disable_msi(pdev); 462 450 } 463 - 464 - static struct msi_domain_ops pseries_pci_msi_domain_ops = { 465 - .msi_prepare = pseries_msi_ops_prepare, 466 - .msi_free = pseries_msi_ops_msi_free, 467 - .msi_post_free = pseries_msi_post_free, 468 - }; 469 451 470 452 static void pseries_msi_shutdown(struct irq_data *d) 471 453 { 472 454 d = d->parent_data; 473 455 if (d->chip->irq_shutdown) 474 456 d->chip->irq_shutdown(d); 475 - } 476 - 477 - static void pseries_msi_mask(struct irq_data *d) 478 - { 479 - pci_msi_mask_irq(d); 480 - irq_chip_mask_parent(d); 481 - } 482 - 483 - static void pseries_msi_unmask(struct irq_data *d) 484 - { 485 - pci_msi_unmask_irq(d); 486 - irq_chip_unmask_parent(d); 487 457 } 488 458 489 459 static void pseries_msi_write_msg(struct irq_data *data, struct msi_msg *msg) ··· 470 500 entry->msg = *msg; 471 501 } 472 502 473 - static struct irq_chip pseries_pci_msi_irq_chip = { 474 - .name = "pSeries-PCI-MSI", 475 - .irq_shutdown = pseries_msi_shutdown, 476 - .irq_mask = pseries_msi_mask, 477 - .irq_unmask = pseries_msi_unmask, 478 - .irq_eoi = irq_chip_eoi_parent, 479 - .irq_write_msi_msg = pseries_msi_write_msg, 480 - }; 503 + static bool pseries_init_dev_msi_info(struct device *dev, struct irq_domain *domain, 504 + struct irq_domain *real_parent, struct msi_domain_info *info) 505 + { 506 + struct irq_chip *chip = info->chip; 481 507 508 + if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info)) 509 + return false; 482 510 483 - /* 484 - * Set MSI_FLAG_MSIX_CONTIGUOUS as there is no way to express to 485 - * firmware to request a discontiguous or non-zero based range of 486 - * MSI-X entries. Core code will reject such setup attempts. 487 - */ 488 - static struct msi_domain_info pseries_msi_domain_info = { 489 - .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | 490 - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX | 491 - MSI_FLAG_MSIX_CONTIGUOUS), 492 - .ops = &pseries_pci_msi_domain_ops, 493 - .chip = &pseries_pci_msi_irq_chip, 511 + chip->irq_shutdown = pseries_msi_shutdown; 512 + chip->irq_write_msi_msg = pseries_msi_write_msg; 513 + 514 + info->ops->msi_prepare = pseries_msi_ops_prepare; 515 + info->ops->msi_teardown = pseries_msi_ops_teardown; 516 + 517 + return true; 518 + } 519 + 520 + #define PSERIES_PCI_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ 521 + MSI_FLAG_USE_DEF_CHIP_OPS | \ 522 + MSI_FLAG_PCI_MSI_MASK_PARENT) 523 + #define PSERIES_PCI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ 524 + MSI_FLAG_PCI_MSIX | \ 525 + MSI_FLAG_MSIX_CONTIGUOUS | \ 526 + MSI_FLAG_MULTI_PCI_MSI) 527 + 528 + static const struct msi_parent_ops pseries_msi_parent_ops = { 529 + .required_flags = PSERIES_PCI_MSI_FLAGS_REQUIRED, 530 + .supported_flags = PSERIES_PCI_MSI_FLAGS_SUPPORTED, 531 + .chip_flags = MSI_CHIP_FLAG_SET_EOI, 532 + .bus_select_token = DOMAIN_BUS_NEXUS, 533 + .bus_select_mask = MATCH_PCI_MSI, 534 + .prefix = "pSeries-", 535 + .init_dev_msi_info = pseries_init_dev_msi_info, 494 536 }; 495 537 496 538 static void pseries_msi_compose_msg(struct irq_data *data, struct msi_msg *msg) ··· 575 593 576 594 out: 577 595 /* TODO: handle RTAS cleanup in ->msi_finish() ? */ 578 - irq_domain_free_irqs_parent(domain, virq, i - 1); 596 + irq_domain_free_irqs_parent(domain, virq, i); 579 597 return ret; 580 598 } 581 599 ··· 586 604 struct pci_controller *phb = irq_data_get_irq_chip_data(d); 587 605 588 606 pr_debug("%s bridge %pOF %d #%d\n", __func__, phb->dn, virq, nr_irqs); 589 - 590 - /* XIVE domain data is cleared through ->msi_free() */ 607 + irq_domain_free_irqs_parent(domain, virq, nr_irqs); 591 608 } 592 609 593 610 static const struct irq_domain_ops pseries_irq_domain_ops = { 611 + .select = msi_lib_irq_domain_select, 594 612 .alloc = pseries_irq_domain_alloc, 595 613 .free = pseries_irq_domain_free, 596 614 }; ··· 599 617 unsigned int count) 600 618 { 601 619 struct irq_domain *parent = irq_get_default_domain(); 620 + struct irq_domain_info info = { 621 + .fwnode = of_fwnode_handle(phb->dn), 622 + .ops = &pseries_irq_domain_ops, 623 + .host_data = phb, 624 + .size = count, 625 + .parent = parent, 626 + }; 602 627 603 - phb->fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI", 604 - phb->global_number); 605 - if (!phb->fwnode) 606 - return -ENOMEM; 607 - 608 - phb->dev_domain = irq_domain_create_hierarchy(parent, 0, count, 609 - phb->fwnode, 610 - &pseries_irq_domain_ops, phb); 628 + phb->dev_domain = msi_create_parent_irq_domain(&info, &pseries_msi_parent_ops); 611 629 if (!phb->dev_domain) { 612 - pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n", 613 - phb->dn, phb->global_number); 614 - irq_domain_free_fwnode(phb->fwnode); 615 - return -ENOMEM; 616 - } 617 - 618 - phb->msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(phb->dn), 619 - &pseries_msi_domain_info, 620 - phb->dev_domain); 621 - if (!phb->msi_domain) { 622 630 pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n", 623 631 phb->dn, phb->global_number); 624 - irq_domain_free_fwnode(phb->fwnode); 625 - irq_domain_remove(phb->dev_domain); 626 632 return -ENOMEM; 627 633 } 628 634 ··· 632 662 633 663 void pseries_msi_free_domains(struct pci_controller *phb) 634 664 { 635 - if (phb->msi_domain) 636 - irq_domain_remove(phb->msi_domain); 637 665 if (phb->dev_domain) 638 666 irq_domain_remove(phb->dev_domain); 639 - if (phb->fwnode) 640 - irq_domain_free_fwnode(phb->fwnode); 641 667 } 642 668 643 669 static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)

+818

arch/powerpc/platforms/pseries/papr-hvpipe.c

··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + 3 + #define pr_fmt(fmt) "papr-hvpipe: " fmt 4 + 5 + #include <linux/module.h> 6 + #include <linux/kernel.h> 7 + #include <linux/types.h> 8 + #include <linux/delay.h> 9 + #include <linux/anon_inodes.h> 10 + #include <linux/miscdevice.h> 11 + #include <linux/file.h> 12 + #include <linux/fs.h> 13 + #include <linux/poll.h> 14 + #include <linux/of.h> 15 + #include <asm/machdep.h> 16 + #include <asm/rtas.h> 17 + #include <asm/rtas-work-area.h> 18 + #include <asm/papr-sysparm.h> 19 + #include <uapi/asm/papr-hvpipe.h> 20 + #include "pseries.h" 21 + #include "papr-hvpipe.h" 22 + 23 + static DEFINE_SPINLOCK(hvpipe_src_list_lock); 24 + static LIST_HEAD(hvpipe_src_list); 25 + 26 + static unsigned char hvpipe_ras_buf[RTAS_ERROR_LOG_MAX]; 27 + static struct workqueue_struct *papr_hvpipe_wq; 28 + static struct work_struct *papr_hvpipe_work; 29 + static int hvpipe_check_exception_token; 30 + static bool hvpipe_feature; 31 + 32 + /* 33 + * New PowerPC FW provides support for partitions and various 34 + * sources (Ex: remote hardware management console (HMC)) to 35 + * exchange information through an inband hypervisor channel 36 + * called HVPIPE. Only HMCs are supported right now and 37 + * partitions can communicate with multiple HMCs and each 38 + * source represented by source ID. 39 + * 40 + * FW introduces send HVPIPE and recv HVPIPE RTAS calls for 41 + * partitions to send and receive payloads respectively. 42 + * 43 + * These RTAS functions have the following certain requirements 44 + * / limitations: 45 + * - One hvpipe per partition for all sources. 46 + * - Assume the return status of send HVPIPE as delivered to source 47 + * - Assume the return status of recv HVPIPE as ACK to source 48 + * - Generates HVPIPE event message when the payload is ready 49 + * for the partition. The hypervisor will not deliver another 50 + * event until the partition read the previous payload which 51 + * means the pipe is blocked for any sources. 52 + * 53 + * Linux implementation: 54 + * Follow the similar interfaces that the OS has for other RTAS calls. 55 + * ex: /dev/papr-indices, /dev/papr-vpd, etc. 56 + * - /dev/papr-hvpipe is available for the user space. 57 + * - devfd = open("/dev/papr-hvpipe", ..) 58 + * - fd = ioctl(fd,HVPIPE_IOC_CREATE_HANDLE,&srcID)-for each source 59 + * - write(fd, buf, size) --> Issue send HVPIPE RTAS call and 60 + * returns size for success or the corresponding error for RTAS 61 + * return code for failure. 62 + * - poll(fd,..) -> wakeup FD if the payload is available to read. 63 + * HVPIPE event message handler wakeup FD based on source ID in 64 + * the event message 65 + * - read(fd, buf, size) --> Issue recv HVPIPE RTAS call and 66 + * returns size for success or the corresponding error for RTAS 67 + * return code for failure. 68 + */ 69 + 70 + /* 71 + * ibm,receive-hvpipe-msg RTAS call. 72 + * @area: Caller-provided work area buffer for results. 73 + * @srcID: Source ID returned by the RTAS call. 74 + * @bytesw: Bytes written by RTAS call to @area. 75 + */ 76 + static int rtas_ibm_receive_hvpipe_msg(struct rtas_work_area *area, 77 + u32 *srcID, u32 *bytesw) 78 + { 79 + const s32 token = rtas_function_token(RTAS_FN_IBM_RECEIVE_HVPIPE_MSG); 80 + u32 rets[2]; 81 + s32 fwrc; 82 + int ret; 83 + 84 + if (token == RTAS_UNKNOWN_SERVICE) 85 + return -ENOENT; 86 + 87 + do { 88 + fwrc = rtas_call(token, 2, 3, rets, 89 + rtas_work_area_phys(area), 90 + rtas_work_area_size(area)); 91 + 92 + } while (rtas_busy_delay(fwrc)); 93 + 94 + switch (fwrc) { 95 + case RTAS_SUCCESS: 96 + *srcID = rets[0]; 97 + *bytesw = rets[1]; 98 + ret = 0; 99 + break; 100 + case RTAS_HARDWARE_ERROR: 101 + ret = -EIO; 102 + break; 103 + case RTAS_INVALID_PARAMETER: 104 + ret = -EINVAL; 105 + break; 106 + case RTAS_FUNC_NOT_SUPPORTED: 107 + ret = -EOPNOTSUPP; 108 + break; 109 + default: 110 + ret = -EIO; 111 + pr_err_ratelimited("unexpected ibm,receive-hvpipe-msg status %d\n", fwrc); 112 + break; 113 + } 114 + 115 + return ret; 116 + } 117 + 118 + /* 119 + * ibm,send-hvpipe-msg RTAS call 120 + * @area: Caller-provided work area buffer to send. 121 + * @srcID: Target source for the send pipe message. 122 + */ 123 + static int rtas_ibm_send_hvpipe_msg(struct rtas_work_area *area, u32 srcID) 124 + { 125 + const s32 token = rtas_function_token(RTAS_FN_IBM_SEND_HVPIPE_MSG); 126 + s32 fwrc; 127 + int ret; 128 + 129 + if (token == RTAS_UNKNOWN_SERVICE) 130 + return -ENOENT; 131 + 132 + do { 133 + fwrc = rtas_call(token, 2, 1, NULL, srcID, 134 + rtas_work_area_phys(area)); 135 + 136 + } while (rtas_busy_delay(fwrc)); 137 + 138 + switch (fwrc) { 139 + case RTAS_SUCCESS: 140 + ret = 0; 141 + break; 142 + case RTAS_HARDWARE_ERROR: 143 + ret = -EIO; 144 + break; 145 + case RTAS_INVALID_PARAMETER: 146 + ret = -EINVAL; 147 + break; 148 + case RTAS_HVPIPE_CLOSED: 149 + ret = -EPIPE; 150 + break; 151 + case RTAS_FUNC_NOT_SUPPORTED: 152 + ret = -EOPNOTSUPP; 153 + break; 154 + default: 155 + ret = -EIO; 156 + pr_err_ratelimited("unexpected ibm,receive-hvpipe-msg status %d\n", fwrc); 157 + break; 158 + } 159 + 160 + return ret; 161 + } 162 + 163 + static struct hvpipe_source_info *hvpipe_find_source(u32 srcID) 164 + { 165 + struct hvpipe_source_info *src_info; 166 + 167 + list_for_each_entry(src_info, &hvpipe_src_list, list) 168 + if (src_info->srcID == srcID) 169 + return src_info; 170 + 171 + return NULL; 172 + } 173 + 174 + /* 175 + * This work function collects receive buffer with recv HVPIPE 176 + * RTAS call. Called from read() 177 + * @buf: User specified buffer to copy the payload that returned 178 + * from recv HVPIPE RTAS. 179 + * @size: Size of buffer user passed. 180 + */ 181 + static int hvpipe_rtas_recv_msg(char __user *buf, int size) 182 + { 183 + struct rtas_work_area *work_area; 184 + u32 srcID, bytes_written; 185 + int ret; 186 + 187 + work_area = rtas_work_area_alloc(SZ_4K); 188 + if (!work_area) { 189 + pr_err("Could not allocate RTAS buffer for recv pipe\n"); 190 + return -ENOMEM; 191 + } 192 + 193 + ret = rtas_ibm_receive_hvpipe_msg(work_area, &srcID, 194 + &bytes_written); 195 + if (!ret) { 196 + /* 197 + * Recv HVPIPE RTAS is successful. 198 + * When releasing FD or no one is waiting on the 199 + * specific source, issue recv HVPIPE RTAS call 200 + * so that pipe is not blocked - this func is called 201 + * with NULL buf. 202 + */ 203 + if (buf) { 204 + if (size < bytes_written) { 205 + pr_err("Received the payload size = %d, but the buffer size = %d\n", 206 + bytes_written, size); 207 + bytes_written = size; 208 + } 209 + ret = copy_to_user(buf, 210 + rtas_work_area_raw_buf(work_area), 211 + bytes_written); 212 + if (!ret) 213 + ret = bytes_written; 214 + } 215 + } else { 216 + pr_err("ibm,receive-hvpipe-msg failed with %d\n", 217 + ret); 218 + } 219 + 220 + rtas_work_area_free(work_area); 221 + return ret; 222 + } 223 + 224 + /* 225 + * papr_hvpipe_handle_write - Issue send HVPIPE RTAS and return 226 + * the size (payload + HVPIPE_HDR_LEN) for RTAS success. 227 + * Otherwise returns the status of RTAS to the user space 228 + */ 229 + static ssize_t papr_hvpipe_handle_write(struct file *file, 230 + const char __user *buf, size_t size, loff_t *off) 231 + { 232 + struct hvpipe_source_info *src_info = file->private_data; 233 + struct rtas_work_area *work_area, *work_buf; 234 + unsigned long ret, len; 235 + __be64 *area_be; 236 + 237 + /* 238 + * Return -ENXIO during migration 239 + */ 240 + if (!hvpipe_feature) 241 + return -ENXIO; 242 + 243 + if (!src_info) 244 + return -EIO; 245 + 246 + /* 247 + * Send HVPIPE RTAS is used to send payload to the specific 248 + * source with the input parameters source ID and the payload 249 + * as buffer list. Each entry in the buffer list contains 250 + * address/length pair of the buffer. 251 + * 252 + * The buffer list format is as follows: 253 + * 254 + * Header (length of address/length pairs and the header length) 255 + * Address of 4K buffer 1 256 + * Length of 4K buffer 1 used 257 + * ... 258 + * Address of 4K buffer n 259 + * Length of 4K buffer n used 260 + * 261 + * See PAPR 7.3.32.2 ibm,send-hvpipe-msg 262 + * 263 + * Even though can support max 1MB payload, the hypervisor 264 + * supports only 4048 bytes payload at present and also 265 + * just one address/length entry. 266 + * 267 + * writev() interface can be added in future when the 268 + * hypervisor supports multiple buffer list entries. 269 + */ 270 + /* HVPIPE_MAX_WRITE_BUFFER_SIZE = 4048 bytes */ 271 + if ((size > (HVPIPE_HDR_LEN + HVPIPE_MAX_WRITE_BUFFER_SIZE)) || 272 + (size <= HVPIPE_HDR_LEN)) 273 + return -EINVAL; 274 + 275 + /* 276 + * The length of (address + length) pair + the length of header 277 + */ 278 + len = (2 * sizeof(u64)) + sizeof(u64); 279 + size -= HVPIPE_HDR_LEN; 280 + buf += HVPIPE_HDR_LEN; 281 + mutex_lock(&rtas_ibm_send_hvpipe_msg_lock); 282 + work_area = rtas_work_area_alloc(SZ_4K); 283 + if (!work_area) { 284 + ret = -ENOMEM; 285 + goto out; 286 + } 287 + area_be = (__be64 *)rtas_work_area_raw_buf(work_area); 288 + /* header */ 289 + area_be[0] = cpu_to_be64(len); 290 + 291 + work_buf = rtas_work_area_alloc(SZ_4K); 292 + if (!work_buf) { 293 + ret = -ENOMEM; 294 + goto out_work; 295 + } 296 + /* First buffer address */ 297 + area_be[1] = cpu_to_be64(rtas_work_area_phys(work_buf)); 298 + /* First buffer address length */ 299 + area_be[2] = cpu_to_be64(size); 300 + 301 + if (!copy_from_user(rtas_work_area_raw_buf(work_buf), buf, size)) { 302 + ret = rtas_ibm_send_hvpipe_msg(work_area, src_info->srcID); 303 + if (!ret) 304 + ret = size + HVPIPE_HDR_LEN; 305 + } else 306 + ret = -EPERM; 307 + 308 + rtas_work_area_free(work_buf); 309 + out_work: 310 + rtas_work_area_free(work_area); 311 + out: 312 + mutex_unlock(&rtas_ibm_send_hvpipe_msg_lock); 313 + return ret; 314 + } 315 + 316 + /* 317 + * papr_hvpipe_handle_read - If the payload for the specific 318 + * source is pending in the hypervisor, issue recv HVPIPE RTAS 319 + * and return the payload to the user space. 320 + * 321 + * When the payload is available for the partition, the 322 + * hypervisor notifies HVPIPE event with the source ID 323 + * and the event handler wakeup FD(s) that are waiting. 324 + */ 325 + static ssize_t papr_hvpipe_handle_read(struct file *file, 326 + char __user *buf, size_t size, loff_t *off) 327 + { 328 + 329 + struct hvpipe_source_info *src_info = file->private_data; 330 + struct papr_hvpipe_hdr hdr; 331 + long ret; 332 + 333 + /* 334 + * Return -ENXIO during migration 335 + */ 336 + if (!hvpipe_feature) 337 + return -ENXIO; 338 + 339 + if (!src_info) 340 + return -EIO; 341 + 342 + /* 343 + * Max payload is 4048 (HVPIPE_MAX_WRITE_BUFFER_SIZE) 344 + */ 345 + if ((size > (HVPIPE_HDR_LEN + HVPIPE_MAX_WRITE_BUFFER_SIZE)) || 346 + (size < HVPIPE_HDR_LEN)) 347 + return -EINVAL; 348 + 349 + /* 350 + * Payload is not available to receive or source pipe 351 + * is not closed. 352 + */ 353 + if (!src_info->hvpipe_status) 354 + return 0; 355 + 356 + hdr.version = 0; 357 + hdr.flags = 0; 358 + 359 + /* 360 + * In case if the hvpipe has payload and also the 361 + * hypervisor closed the pipe to the source, retrieve 362 + * the payload and return to the user space first and 363 + * then notify the userspace about the hvpipe close in 364 + * next read(). 365 + */ 366 + if (src_info->hvpipe_status & HVPIPE_MSG_AVAILABLE) 367 + hdr.flags = HVPIPE_MSG_AVAILABLE; 368 + else if (src_info->hvpipe_status & HVPIPE_LOST_CONNECTION) 369 + hdr.flags = HVPIPE_LOST_CONNECTION; 370 + else 371 + /* 372 + * Should not be here without one of the above 373 + * flags set 374 + */ 375 + return -EIO; 376 + 377 + ret = copy_to_user(buf, &hdr, HVPIPE_HDR_LEN); 378 + if (ret) 379 + return ret; 380 + 381 + /* 382 + * Message event has payload, so get the payload with 383 + * recv HVPIPE RTAS. 384 + */ 385 + if (hdr.flags & HVPIPE_MSG_AVAILABLE) { 386 + ret = hvpipe_rtas_recv_msg(buf + HVPIPE_HDR_LEN, 387 + size - HVPIPE_HDR_LEN); 388 + if (ret > 0) { 389 + src_info->hvpipe_status &= ~HVPIPE_MSG_AVAILABLE; 390 + ret += HVPIPE_HDR_LEN; 391 + } 392 + } else if (hdr.flags & HVPIPE_LOST_CONNECTION) { 393 + /* 394 + * Hypervisor is closing the pipe for the specific 395 + * source. So notify user space. 396 + */ 397 + src_info->hvpipe_status &= ~HVPIPE_LOST_CONNECTION; 398 + ret = HVPIPE_HDR_LEN; 399 + } 400 + 401 + return ret; 402 + } 403 + 404 + /* 405 + * The user space waits for the payload to receive. 406 + * The hypervisor sends HVPIPE event message to the partition 407 + * when the payload is available. The event handler wakeup FD 408 + * depends on the source ID in the message event. 409 + */ 410 + static __poll_t papr_hvpipe_handle_poll(struct file *filp, 411 + struct poll_table_struct *wait) 412 + { 413 + struct hvpipe_source_info *src_info = filp->private_data; 414 + 415 + /* 416 + * HVPIPE is disabled during SUSPEND and enabled after migration. 417 + * So return POLLRDHUP during migration 418 + */ 419 + if (!hvpipe_feature) 420 + return POLLRDHUP; 421 + 422 + if (!src_info) 423 + return POLLNVAL; 424 + 425 + /* 426 + * If hvpipe already has pending payload, return so that 427 + * the user space can issue read(). 428 + */ 429 + if (src_info->hvpipe_status) 430 + return POLLIN | POLLRDNORM; 431 + 432 + /* 433 + * Wait for the message event 434 + * hvpipe_event_interrupt() wakes up this wait_queue 435 + */ 436 + poll_wait(filp, &src_info->recv_wqh, wait); 437 + if (src_info->hvpipe_status) 438 + return POLLIN | POLLRDNORM; 439 + 440 + return 0; 441 + } 442 + 443 + static int papr_hvpipe_handle_release(struct inode *inode, 444 + struct file *file) 445 + { 446 + struct hvpipe_source_info *src_info; 447 + 448 + /* 449 + * Hold the lock, remove source from src_list, reset the 450 + * hvpipe status and release the lock to prevent any race 451 + * with message event IRQ. 452 + */ 453 + spin_lock(&hvpipe_src_list_lock); 454 + src_info = file->private_data; 455 + list_del(&src_info->list); 456 + file->private_data = NULL; 457 + /* 458 + * If the pipe for this specific source has any pending 459 + * payload, issue recv HVPIPE RTAS so that pipe will not 460 + * be blocked. 461 + */ 462 + if (src_info->hvpipe_status & HVPIPE_MSG_AVAILABLE) { 463 + src_info->hvpipe_status = 0; 464 + spin_unlock(&hvpipe_src_list_lock); 465 + hvpipe_rtas_recv_msg(NULL, 0); 466 + } else 467 + spin_unlock(&hvpipe_src_list_lock); 468 + 469 + kfree(src_info); 470 + return 0; 471 + } 472 + 473 + static const struct file_operations papr_hvpipe_handle_ops = { 474 + .read = papr_hvpipe_handle_read, 475 + .write = papr_hvpipe_handle_write, 476 + .release = papr_hvpipe_handle_release, 477 + .poll = papr_hvpipe_handle_poll, 478 + }; 479 + 480 + static int papr_hvpipe_dev_create_handle(u32 srcID) 481 + { 482 + struct hvpipe_source_info *src_info; 483 + struct file *file; 484 + long err; 485 + int fd; 486 + 487 + spin_lock(&hvpipe_src_list_lock); 488 + /* 489 + * Do not allow more than one process communicates with 490 + * each source. 491 + */ 492 + src_info = hvpipe_find_source(srcID); 493 + if (src_info) { 494 + spin_unlock(&hvpipe_src_list_lock); 495 + pr_err("pid(%d) is already using the source(%d)\n", 496 + src_info->tsk->pid, srcID); 497 + return -EALREADY; 498 + } 499 + spin_unlock(&hvpipe_src_list_lock); 500 + 501 + src_info = kzalloc(sizeof(*src_info), GFP_KERNEL_ACCOUNT); 502 + if (!src_info) 503 + return -ENOMEM; 504 + 505 + src_info->srcID = srcID; 506 + src_info->tsk = current; 507 + init_waitqueue_head(&src_info->recv_wqh); 508 + 509 + fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); 510 + if (fd < 0) { 511 + err = fd; 512 + goto free_buf; 513 + } 514 + 515 + file = anon_inode_getfile("[papr-hvpipe]", 516 + &papr_hvpipe_handle_ops, (void *)src_info, 517 + O_RDWR); 518 + if (IS_ERR(file)) { 519 + err = PTR_ERR(file); 520 + goto free_fd; 521 + } 522 + 523 + spin_lock(&hvpipe_src_list_lock); 524 + /* 525 + * If two processes are executing ioctl() for the same 526 + * source ID concurrently, prevent the second process to 527 + * acquire FD. 528 + */ 529 + if (hvpipe_find_source(srcID)) { 530 + spin_unlock(&hvpipe_src_list_lock); 531 + err = -EALREADY; 532 + goto free_file; 533 + } 534 + list_add(&src_info->list, &hvpipe_src_list); 535 + spin_unlock(&hvpipe_src_list_lock); 536 + 537 + fd_install(fd, file); 538 + return fd; 539 + 540 + free_file: 541 + fput(file); 542 + free_fd: 543 + put_unused_fd(fd); 544 + free_buf: 545 + kfree(src_info); 546 + return err; 547 + } 548 + 549 + /* 550 + * Top-level ioctl handler for /dev/papr_hvpipe 551 + * 552 + * Use separate FD for each source (exa :HMC). So ioctl is called 553 + * with source ID which returns FD. 554 + */ 555 + static long papr_hvpipe_dev_ioctl(struct file *filp, unsigned int ioctl, 556 + unsigned long arg) 557 + { 558 + u32 __user *argp = (void __user *)arg; 559 + u32 srcID; 560 + long ret; 561 + 562 + /* 563 + * Return -ENXIO during migration 564 + */ 565 + if (!hvpipe_feature) 566 + return -ENXIO; 567 + 568 + if (get_user(srcID, argp)) 569 + return -EFAULT; 570 + 571 + /* 572 + * Support only HMC source right now 573 + */ 574 + if (!(srcID & HVPIPE_HMC_ID_MASK)) 575 + return -EINVAL; 576 + 577 + switch (ioctl) { 578 + case PAPR_HVPIPE_IOC_CREATE_HANDLE: 579 + ret = papr_hvpipe_dev_create_handle(srcID); 580 + break; 581 + default: 582 + ret = -ENOIOCTLCMD; 583 + break; 584 + } 585 + 586 + return ret; 587 + } 588 + 589 + /* 590 + * papr_hvpipe_work_fn - called to issue recv HVPIPE RTAS for 591 + * sources that are not monitored by user space so that pipe 592 + * will not be blocked. 593 + */ 594 + static void papr_hvpipe_work_fn(struct work_struct *work) 595 + { 596 + hvpipe_rtas_recv_msg(NULL, 0); 597 + } 598 + 599 + /* 600 + * HVPIPE event message IRQ handler. 601 + * The hypervisor sends event IRQ if the partition has payload 602 + * and generates another event only after payload is read with 603 + * recv HVPIPE RTAS. 604 + */ 605 + static irqreturn_t hvpipe_event_interrupt(int irq, void *dev_id) 606 + { 607 + struct hvpipe_event_buf *hvpipe_event; 608 + struct pseries_errorlog *pseries_log; 609 + struct hvpipe_source_info *src_info; 610 + struct rtas_error_log *elog; 611 + int rc; 612 + 613 + rc = rtas_call(hvpipe_check_exception_token, 6, 1, NULL, 614 + RTAS_VECTOR_EXTERNAL_INTERRUPT, virq_to_hw(irq), 615 + RTAS_HVPIPE_MSG_EVENTS, 1, __pa(&hvpipe_ras_buf), 616 + rtas_get_error_log_max()); 617 + 618 + if (rc != 0) { 619 + pr_err_ratelimited("unexpected hvpipe-event-notification failed %d\n", rc); 620 + return IRQ_HANDLED; 621 + } 622 + 623 + elog = (struct rtas_error_log *)hvpipe_ras_buf; 624 + if (unlikely(rtas_error_type(elog) != RTAS_TYPE_HVPIPE)) { 625 + pr_warn_ratelimited("Unexpected event type %d\n", 626 + rtas_error_type(elog)); 627 + return IRQ_HANDLED; 628 + } 629 + 630 + pseries_log = get_pseries_errorlog(elog, 631 + PSERIES_ELOG_SECT_ID_HVPIPE_EVENT); 632 + hvpipe_event = (struct hvpipe_event_buf *)pseries_log->data; 633 + 634 + /* 635 + * The hypervisor notifies partition when the payload is 636 + * available to read with recv HVPIPE RTAS and it will not 637 + * notify another event for any source until the previous 638 + * payload is read. Means the pipe is blocked in the 639 + * hypervisor until the payload is read. 640 + * 641 + * If the source is ready to accept payload and wakeup the 642 + * corresponding FD. Hold lock and update hvpipe_status 643 + * and this lock is needed in case the user space process 644 + * is in release FD instead of poll() so that release() 645 + * reads the payload to unblock pipe before closing FD. 646 + * 647 + * otherwise (means no other user process waiting for the 648 + * payload, issue recv HVPIPE RTAS (papr_hvpipe_work_fn()) 649 + * to unblock pipe. 650 + */ 651 + spin_lock(&hvpipe_src_list_lock); 652 + src_info = hvpipe_find_source(be32_to_cpu(hvpipe_event->srcID)); 653 + if (src_info) { 654 + u32 flags = 0; 655 + 656 + if (hvpipe_event->event_type & HVPIPE_LOST_CONNECTION) 657 + flags = HVPIPE_LOST_CONNECTION; 658 + else if (hvpipe_event->event_type & HVPIPE_MSG_AVAILABLE) 659 + flags = HVPIPE_MSG_AVAILABLE; 660 + 661 + src_info->hvpipe_status |= flags; 662 + wake_up(&src_info->recv_wqh); 663 + spin_unlock(&hvpipe_src_list_lock); 664 + } else { 665 + spin_unlock(&hvpipe_src_list_lock); 666 + /* 667 + * user space is not waiting on this source. So 668 + * execute receive pipe RTAS so that pipe will not 669 + * be blocked. 670 + */ 671 + if (hvpipe_event->event_type & HVPIPE_MSG_AVAILABLE) 672 + queue_work(papr_hvpipe_wq, papr_hvpipe_work); 673 + } 674 + 675 + return IRQ_HANDLED; 676 + } 677 + 678 + /* 679 + * Enable hvpipe by system parameter set with parameter 680 + * token = 64 and with 1 byte buffer data: 681 + * 0 = hvpipe not in use/disable 682 + * 1 = hvpipe in use/enable 683 + */ 684 + static int set_hvpipe_sys_param(u8 val) 685 + { 686 + struct papr_sysparm_buf *buf; 687 + int ret; 688 + 689 + buf = papr_sysparm_buf_alloc(); 690 + if (!buf) 691 + return -ENOMEM; 692 + 693 + buf->len = cpu_to_be16(1); 694 + buf->val[0] = val; 695 + ret = papr_sysparm_set(PAPR_SYSPARM_HVPIPE_ENABLE, buf); 696 + if (ret) 697 + pr_err("Can not enable hvpipe %d\n", ret); 698 + 699 + papr_sysparm_buf_free(buf); 700 + 701 + return ret; 702 + } 703 + 704 + static int __init enable_hvpipe_IRQ(void) 705 + { 706 + struct device_node *np; 707 + 708 + hvpipe_check_exception_token = rtas_function_token(RTAS_FN_CHECK_EXCEPTION); 709 + if (hvpipe_check_exception_token == RTAS_UNKNOWN_SERVICE) 710 + return -ENODEV; 711 + 712 + /* hvpipe events */ 713 + np = of_find_node_by_path("/event-sources/ibm,hvpipe-msg-events"); 714 + if (np != NULL) { 715 + request_event_sources_irqs(np, hvpipe_event_interrupt, 716 + "HPIPE_EVENT"); 717 + of_node_put(np); 718 + } else { 719 + pr_err("Can not enable hvpipe event IRQ\n"); 720 + return -ENODEV; 721 + } 722 + 723 + return 0; 724 + } 725 + 726 + void hvpipe_migration_handler(int action) 727 + { 728 + pr_info("hvpipe migration event %d\n", action); 729 + 730 + /* 731 + * HVPIPE is not used (Failed to create /dev/papr-hvpipe). 732 + * So nothing to do for migration. 733 + */ 734 + if (!papr_hvpipe_work) 735 + return; 736 + 737 + switch (action) { 738 + case HVPIPE_SUSPEND: 739 + if (hvpipe_feature) { 740 + /* 741 + * Disable hvpipe_feature to the user space. 742 + * It will be enabled with RESUME event. 743 + */ 744 + hvpipe_feature = false; 745 + /* 746 + * set system parameter hvpipe 'disable' 747 + */ 748 + set_hvpipe_sys_param(0); 749 + } 750 + break; 751 + case HVPIPE_RESUME: 752 + /* 753 + * set system parameter hvpipe 'enable' 754 + */ 755 + if (!set_hvpipe_sys_param(1)) 756 + hvpipe_feature = true; 757 + else 758 + pr_err("hvpipe is not enabled after migration\n"); 759 + 760 + break; 761 + } 762 + } 763 + 764 + static const struct file_operations papr_hvpipe_ops = { 765 + .unlocked_ioctl = papr_hvpipe_dev_ioctl, 766 + }; 767 + 768 + static struct miscdevice papr_hvpipe_dev = { 769 + .minor = MISC_DYNAMIC_MINOR, 770 + .name = "papr-hvpipe", 771 + .fops = &papr_hvpipe_ops, 772 + }; 773 + 774 + static int __init papr_hvpipe_init(void) 775 + { 776 + int ret; 777 + 778 + if (!of_find_property(rtas.dev, "ibm,hypervisor-pipe-capable", 779 + NULL)) 780 + return -ENODEV; 781 + 782 + if (!rtas_function_implemented(RTAS_FN_IBM_SEND_HVPIPE_MSG) || 783 + !rtas_function_implemented(RTAS_FN_IBM_RECEIVE_HVPIPE_MSG)) 784 + return -ENODEV; 785 + 786 + papr_hvpipe_work = kzalloc(sizeof(struct work_struct), GFP_ATOMIC); 787 + if (!papr_hvpipe_work) 788 + return -ENOMEM; 789 + 790 + INIT_WORK(papr_hvpipe_work, papr_hvpipe_work_fn); 791 + 792 + papr_hvpipe_wq = alloc_ordered_workqueue("papr hvpipe workqueue", 0); 793 + if (!papr_hvpipe_wq) { 794 + ret = -ENOMEM; 795 + goto out; 796 + } 797 + 798 + ret = enable_hvpipe_IRQ(); 799 + if (!ret) { 800 + ret = set_hvpipe_sys_param(1); 801 + if (!ret) 802 + ret = misc_register(&papr_hvpipe_dev); 803 + } 804 + 805 + if (!ret) { 806 + pr_info("hvpipe feature is enabled\n"); 807 + hvpipe_feature = true; 808 + return 0; 809 + } 810 + 811 + pr_err("hvpipe feature is not enabled %d\n", ret); 812 + destroy_workqueue(papr_hvpipe_wq); 813 + out: 814 + kfree(papr_hvpipe_work); 815 + papr_hvpipe_work = NULL; 816 + return ret; 817 + } 818 + machine_device_initcall(pseries, papr_hvpipe_init);

+42

arch/powerpc/platforms/pseries/papr-hvpipe.h

··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + #ifndef _PAPR_HVPIPE_H 3 + #define _PAPR_HVPIPE_H 4 + 5 + #define HVPIPE_HMC_ID_MASK 0x02000000 /*02-HMC,00-reserved and HMC ID */ 6 + #define HVPIPE_MAX_WRITE_BUFFER_SIZE 4048 7 + /* 8 + * hvpipe specific RTAS return values 9 + */ 10 + #define RTAS_HVPIPE_CLOSED -4 11 + 12 + #define HVPIPE_HDR_LEN sizeof(struct papr_hvpipe_hdr) 13 + 14 + enum hvpipe_migrate_action { 15 + HVPIPE_SUSPEND, 16 + HVPIPE_RESUME, 17 + }; 18 + 19 + struct hvpipe_source_info { 20 + struct list_head list; /* list of sources */ 21 + u32 srcID; 22 + u32 hvpipe_status; 23 + wait_queue_head_t recv_wqh; /* wake up poll() waitq */ 24 + struct task_struct *tsk; 25 + }; 26 + 27 + /* 28 + * Source ID Format 0xCCRRQQQQ 29 + * CC = indicating value is source type (ex: 0x02 for HMC) 30 + * RR = 0x00 (reserved) 31 + * QQQQ = 0x0000 – 0xFFFF indicating the source index indetifier 32 + */ 33 + struct hvpipe_event_buf { 34 + __be32 srcID; /* Source ID */ 35 + u8 event_type; /* 0x01 for hvpipe message available */ 36 + /* from specified src ID */ 37 + /* 0x02 for loss of pipe connection */ 38 + /* with specified src ID */ 39 + }; 40 + 41 + void hvpipe_migration_handler(int action); 42 + #endif /* _PAPR_HVPIPE_H */

+28 -28

arch/powerpc/sysdev/cpm_common.c

··· 28 28 29 29 #include <mm/mmu_decl.h> 30 30 31 - #if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO) 32 - #include <linux/gpio/legacy-of-mm-gpiochip.h> 33 - #endif 34 - 35 31 static int __init cpm_init(void) 36 32 { 37 33 struct device_node *np; ··· 87 91 88 92 #if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO) 89 93 94 + #include <linux/gpio/driver.h> 95 + 90 96 struct cpm2_ioports { 91 97 u32 dir, par, sor, odr, dat; 92 98 u32 res[3]; 93 99 }; 94 100 95 101 struct cpm2_gpio32_chip { 96 - struct of_mm_gpio_chip mm_gc; 102 + struct gpio_chip gc; 103 + void __iomem *regs; 97 104 spinlock_t lock; 98 105 99 106 /* shadowed data register to clear/set bits safely */ 100 107 u32 cpdata; 101 108 }; 102 109 103 - static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc) 110 + static void cpm2_gpio32_save_regs(struct cpm2_gpio32_chip *cpm2_gc) 104 111 { 105 - struct cpm2_gpio32_chip *cpm2_gc = 106 - container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc); 107 - struct cpm2_ioports __iomem *iop = mm_gc->regs; 112 + struct cpm2_ioports __iomem *iop = cpm2_gc->regs; 108 113 109 114 cpm2_gc->cpdata = in_be32(&iop->dat); 110 115 } 111 116 112 117 static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio) 113 118 { 114 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 115 - struct cpm2_ioports __iomem *iop = mm_gc->regs; 119 + struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc); 120 + struct cpm2_ioports __iomem *iop = cpm2_gc->regs; 116 121 u32 pin_mask; 117 122 118 123 pin_mask = 1 << (31 - gpio); ··· 121 124 return !!(in_be32(&iop->dat) & pin_mask); 122 125 } 123 126 124 - static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask, 125 - int value) 127 + static void __cpm2_gpio32_set(struct cpm2_gpio32_chip *cpm2_gc, u32 pin_mask, int value) 126 128 { 127 - struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(&mm_gc->gc); 128 - struct cpm2_ioports __iomem *iop = mm_gc->regs; 129 + struct cpm2_ioports __iomem *iop = cpm2_gc->regs; 129 130 130 131 if (value) 131 132 cpm2_gc->cpdata |= pin_mask; ··· 135 140 136 141 static int cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) 137 142 { 138 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 139 143 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc); 140 144 unsigned long flags; 141 145 u32 pin_mask = 1 << (31 - gpio); 142 146 143 147 spin_lock_irqsave(&cpm2_gc->lock, flags); 144 148 145 - __cpm2_gpio32_set(mm_gc, pin_mask, value); 149 + __cpm2_gpio32_set(cpm2_gc, pin_mask, value); 146 150 147 151 spin_unlock_irqrestore(&cpm2_gc->lock, flags); 148 152 ··· 150 156 151 157 static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 152 158 { 153 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 154 159 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc); 155 - struct cpm2_ioports __iomem *iop = mm_gc->regs; 160 + struct cpm2_ioports __iomem *iop = cpm2_gc->regs; 156 161 unsigned long flags; 157 162 u32 pin_mask = 1 << (31 - gpio); 158 163 159 164 spin_lock_irqsave(&cpm2_gc->lock, flags); 160 165 161 166 setbits32(&iop->dir, pin_mask); 162 - __cpm2_gpio32_set(mm_gc, pin_mask, val); 167 + __cpm2_gpio32_set(cpm2_gc, pin_mask, val); 163 168 164 169 spin_unlock_irqrestore(&cpm2_gc->lock, flags); 165 170 ··· 167 174 168 175 static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) 169 176 { 170 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 171 177 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc); 172 - struct cpm2_ioports __iomem *iop = mm_gc->regs; 178 + struct cpm2_ioports __iomem *iop = cpm2_gc->regs; 173 179 unsigned long flags; 174 180 u32 pin_mask = 1 << (31 - gpio); 175 181 ··· 185 193 { 186 194 struct device_node *np = dev->of_node; 187 195 struct cpm2_gpio32_chip *cpm2_gc; 188 - struct of_mm_gpio_chip *mm_gc; 189 196 struct gpio_chip *gc; 190 197 191 - cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL); 198 + cpm2_gc = devm_kzalloc(dev, sizeof(*cpm2_gc), GFP_KERNEL); 192 199 if (!cpm2_gc) 193 200 return -ENOMEM; 194 201 195 202 spin_lock_init(&cpm2_gc->lock); 196 203 197 - mm_gc = &cpm2_gc->mm_gc; 198 - gc = &mm_gc->gc; 204 + gc = &cpm2_gc->gc; 199 205 200 - mm_gc->save_regs = cpm2_gpio32_save_regs; 206 + gc->base = -1; 201 207 gc->ngpio = 32; 202 208 gc->direction_input = cpm2_gpio32_dir_in; 203 209 gc->direction_output = cpm2_gpio32_dir_out; ··· 204 214 gc->parent = dev; 205 215 gc->owner = THIS_MODULE; 206 216 207 - return of_mm_gpiochip_add_data(np, mm_gc, cpm2_gc); 217 + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); 218 + if (!gc->label) 219 + return -ENOMEM; 220 + 221 + cpm2_gc->regs = devm_of_iomap(dev, np, 0, NULL); 222 + if (IS_ERR(cpm2_gc->regs)) 223 + return PTR_ERR(cpm2_gc->regs); 224 + 225 + cpm2_gpio32_save_regs(cpm2_gc); 226 + 227 + return devm_gpiochip_add_data(dev, gc, cpm2_gc); 208 228 } 209 229 #endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */

+31 -32

arch/powerpc/sysdev/xive/common.c

··· 317 317 if (d) { 318 318 char buffer[128]; 319 319 320 - xive_irq_data_dump(irq_data_get_irq_handler_data(d), 320 + xive_irq_data_dump(irq_data_get_irq_chip_data(d), 321 321 buffer, sizeof(buffer)); 322 322 xmon_printf("%s", buffer); 323 323 } ··· 437 437 /* irq_chip eoi callback, called with irq descriptor lock held */ 438 438 static void xive_irq_eoi(struct irq_data *d) 439 439 { 440 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 440 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 441 441 struct xive_cpu *xc = __this_cpu_read(xive_cpu); 442 442 443 443 DBG_VERBOSE("eoi_irq: irq=%d [0x%lx] pending=%02x\n", ··· 595 595 const struct cpumask *affinity) 596 596 { 597 597 static unsigned int fuzz; 598 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 598 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 599 599 cpumask_var_t mask; 600 600 int cpu = -1; 601 601 ··· 628 628 629 629 static unsigned int xive_irq_startup(struct irq_data *d) 630 630 { 631 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 631 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 632 632 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); 633 633 int target, rc; 634 634 ··· 673 673 /* called with irq descriptor lock held */ 674 674 static void xive_irq_shutdown(struct irq_data *d) 675 675 { 676 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 676 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 677 677 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); 678 678 679 679 pr_debug("%s: irq %d [0x%x] data @%p\n", __func__, d->irq, hw_irq, d); ··· 698 698 699 699 static void xive_irq_unmask(struct irq_data *d) 700 700 { 701 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 701 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 702 702 703 703 pr_debug("%s: irq %d data @%p\n", __func__, d->irq, xd); 704 704 ··· 707 707 708 708 static void xive_irq_mask(struct irq_data *d) 709 709 { 710 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 710 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 711 711 712 712 pr_debug("%s: irq %d data @%p\n", __func__, d->irq, xd); 713 713 ··· 718 718 const struct cpumask *cpumask, 719 719 bool force) 720 720 { 721 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 721 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 722 722 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); 723 723 u32 target, old_target; 724 724 int rc = 0; ··· 776 776 777 777 static int xive_irq_set_type(struct irq_data *d, unsigned int flow_type) 778 778 { 779 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 779 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 780 780 781 781 /* 782 782 * We only support these. This has really no effect other than setting ··· 815 815 816 816 static int xive_irq_retrigger(struct irq_data *d) 817 817 { 818 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 818 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 819 819 820 820 /* This should be only for MSIs */ 821 821 if (WARN_ON(xd->flags & XIVE_IRQ_FLAG_LSI)) ··· 837 837 */ 838 838 static int xive_irq_set_vcpu_affinity(struct irq_data *d, void *state) 839 839 { 840 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); 840 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(d); 841 841 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); 842 842 int rc; 843 843 u8 pq; ··· 951 951 static int xive_get_irqchip_state(struct irq_data *data, 952 952 enum irqchip_irq_state which, bool *state) 953 953 { 954 - struct xive_irq_data *xd = irq_data_get_irq_handler_data(data); 954 + struct xive_irq_data *xd = irq_data_get_irq_chip_data(data); 955 955 u8 pq; 956 956 957 957 switch (which) { ··· 1011 1011 } 1012 1012 EXPORT_SYMBOL_GPL(xive_cleanup_irq_data); 1013 1013 1014 - static int xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw) 1014 + static struct xive_irq_data *xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw) 1015 1015 { 1016 1016 struct xive_irq_data *xd; 1017 1017 int rc; 1018 1018 1019 1019 xd = kzalloc(sizeof(struct xive_irq_data), GFP_KERNEL); 1020 1020 if (!xd) 1021 - return -ENOMEM; 1021 + return ERR_PTR(-ENOMEM); 1022 1022 rc = xive_ops->populate_irq_data(hw, xd); 1023 1023 if (rc) { 1024 1024 kfree(xd); 1025 - return rc; 1025 + return ERR_PTR(rc); 1026 1026 } 1027 1027 xd->target = XIVE_INVALID_TARGET; 1028 - irq_set_handler_data(virq, xd); 1029 1028 1030 1029 /* 1031 1030 * Turn OFF by default the interrupt being mapped. A side ··· 1035 1036 */ 1036 1037 xive_esb_read(xd, XIVE_ESB_SET_PQ_01); 1037 1038 1038 - return 0; 1039 + return xd; 1039 1040 } 1040 1041 1041 - void xive_irq_free_data(unsigned int virq) 1042 + static void xive_irq_free_data(unsigned int virq) 1042 1043 { 1043 - struct xive_irq_data *xd = irq_get_handler_data(virq); 1044 + struct xive_irq_data *xd = irq_get_chip_data(virq); 1044 1045 1045 1046 if (!xd) 1046 1047 return; 1047 - irq_set_handler_data(virq, NULL); 1048 + irq_set_chip_data(virq, NULL); 1048 1049 xive_cleanup_irq_data(xd); 1049 1050 kfree(xd); 1050 1051 } 1051 - EXPORT_SYMBOL_GPL(xive_irq_free_data); 1052 1052 1053 1053 #ifdef CONFIG_SMP 1054 1054 ··· 1284 1286 static int xive_irq_domain_map(struct irq_domain *h, unsigned int virq, 1285 1287 irq_hw_number_t hw) 1286 1288 { 1287 - int rc; 1289 + struct xive_irq_data *xd; 1288 1290 1289 1291 /* 1290 1292 * Mark interrupts as edge sensitive by default so that resend ··· 1292 1294 */ 1293 1295 irq_clear_status_flags(virq, IRQ_LEVEL); 1294 1296 1295 - rc = xive_irq_alloc_data(virq, hw); 1296 - if (rc) 1297 - return rc; 1297 + xd = xive_irq_alloc_data(virq, hw); 1298 + if (IS_ERR(xd)) 1299 + return PTR_ERR(xd); 1298 1300 1299 1301 irq_set_chip_and_handler(virq, &xive_irq_chip, handle_fasteoi_irq); 1302 + irq_set_chip_data(virq, xd); 1300 1303 1301 1304 return 0; 1302 1305 } ··· 1365 1366 seq_printf(m, "%*sXIVE:\n", ind, ""); 1366 1367 ind++; 1367 1368 1368 - xd = irq_data_get_irq_handler_data(irqd); 1369 + xd = irq_data_get_irq_chip_data(irqd); 1369 1370 if (!xd) { 1370 1371 seq_printf(m, "%*snot assigned\n", ind, ""); 1371 1372 return; ··· 1402 1403 unsigned int nr_irqs, void *arg) 1403 1404 { 1404 1405 struct irq_fwspec *fwspec = arg; 1406 + struct xive_irq_data *xd; 1405 1407 irq_hw_number_t hwirq; 1406 1408 unsigned int type = IRQ_TYPE_NONE; 1407 1409 int i, rc; ··· 1423 1423 irq_clear_status_flags(virq, IRQ_LEVEL); 1424 1424 1425 1425 /* allocates and sets handler data */ 1426 - rc = xive_irq_alloc_data(virq + i, hwirq + i); 1427 - if (rc) 1428 - return rc; 1426 + xd = xive_irq_alloc_data(virq + i, hwirq + i); 1427 + if (IS_ERR(xd)) 1428 + return PTR_ERR(xd); 1429 1429 1430 - irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, 1431 - &xive_irq_chip, domain->host_data); 1430 + irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, &xive_irq_chip, xd); 1432 1431 irq_set_handler(virq + i, handle_fasteoi_irq); 1433 1432 } 1434 1433 ··· 1763 1764 seq_printf(m, "IRQ 0x%08x : target=0x%x prio=%02x lirq=0x%x ", 1764 1765 hw_irq, target, prio, lirq); 1765 1766 1766 - xive_irq_data_dump(irq_data_get_irq_handler_data(d), buffer, sizeof(buffer)); 1767 + xive_irq_data_dump(irq_data_get_irq_chip_data(d), buffer, sizeof(buffer)); 1767 1768 seq_puts(m, buffer); 1768 1769 seq_puts(m, "\n"); 1769 1770 }

+6 -10

arch/powerpc/xmon/ppc-opc.c

··· 954 954 { 0xff, 11, NULL, NULL, PPC_OPERAND_SIGNOPT }, 955 955 }; 956 956 957 - const unsigned int num_powerpc_operands = (sizeof (powerpc_operands) 958 - / sizeof (powerpc_operands[0])); 957 + const unsigned int num_powerpc_operands = ARRAY_SIZE(powerpc_operands); 959 958 960 959 /* The functions used to insert and extract complicated operands. */ 961 960 ··· 6967 6968 {"fcfidu.", XRC(63,974,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}}, 6968 6969 }; 6969 6970 6970 - const int powerpc_num_opcodes = 6971 - sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]); 6972 - 6971 + const int powerpc_num_opcodes = ARRAY_SIZE(powerpc_opcodes); 6972 + 6973 6973 /* The VLE opcode table. 6974 6974 6975 6975 The format of this opcode table is the same as the main opcode table. */ ··· 7205 7207 {"se_bl", BD8(58,0,1), BD8_MASK, PPCVLE, 0, {B8}}, 7206 7208 }; 7207 7209 7208 - const int vle_num_opcodes = 7209 - sizeof (vle_opcodes) / sizeof (vle_opcodes[0]); 7210 - 7210 + const int vle_num_opcodes = ARRAY_SIZE(vle_opcodes); 7211 + 7211 7212 /* The macro table. This is only used by the assembler. */ 7212 7213 7213 7214 /* The expressions of the form (-x ! 31) & (x | 31) have the value 0 ··· 7273 7276 {"e_clrlslwi",4, PPCVLE, "e_rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"}, 7274 7277 }; 7275 7278 7276 - const int powerpc_num_macros = 7277 - sizeof (powerpc_macros) / sizeof (powerpc_macros[0]); 7279 + const int powerpc_num_macros = ARRAY_SIZE(powerpc_macros);

+2 -2

arch/powerpc/xmon/xmon_bpts.h

··· 3 3 #define XMON_BPTS_H 4 4 5 5 #define NBPTS 256 6 - #ifndef __ASSEMBLY__ 6 + #ifndef __ASSEMBLER__ 7 7 #include <asm/inst.h> 8 8 #define BPT_SIZE (sizeof(ppc_inst_t) * 2) 9 9 #define BPT_WORDS (BPT_SIZE / sizeof(ppc_inst_t)) 10 10 11 11 extern unsigned int bpt_table[NBPTS * BPT_WORDS]; 12 - #endif /* __ASSEMBLY__ */ 12 + #endif /* __ASSEMBLER__ */ 13 13 14 14 #endif /* XMON_BPTS_H */

-1

drivers/gpio/Kconfig

··· 485 485 config GPIO_MPC5200 486 486 def_bool y 487 487 depends on PPC_MPC52xx 488 - select OF_GPIO_MM_GPIOCHIP 489 488 490 489 config GPIO_MPC8XXX 491 490 bool "MPC512x/MPC8xxx/QorIQ GPIO support"

+43 -35

drivers/gpio/gpio-mpc5200.c

··· 8 8 #include <linux/of.h> 9 9 #include <linux/kernel.h> 10 10 #include <linux/slab.h> 11 - #include <linux/gpio/legacy-of-mm-gpiochip.h> 11 + #include <linux/gpio/driver.h> 12 12 #include <linux/io.h> 13 13 #include <linux/platform_device.h> 14 14 #include <linux/module.h> ··· 19 19 static DEFINE_SPINLOCK(gpio_lock); 20 20 21 21 struct mpc52xx_gpiochip { 22 - struct of_mm_gpio_chip mmchip; 22 + struct gpio_chip gc; 23 + void __iomem *regs; 23 24 unsigned int shadow_dvo; 24 25 unsigned int shadow_gpioe; 25 26 unsigned int shadow_ddr; ··· 44 43 */ 45 44 static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio) 46 45 { 47 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 48 - struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; 46 + struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 47 + struct mpc52xx_gpio_wkup __iomem *regs = chip->regs; 49 48 unsigned int ret; 50 49 51 50 ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1; ··· 58 57 static inline void 59 58 __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 60 59 { 61 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 62 60 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 63 - struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; 61 + struct mpc52xx_gpio_wkup __iomem *regs = chip->regs; 64 62 65 63 if (val) 66 64 chip->shadow_dvo |= 1 << (7 - gpio); ··· 87 87 88 88 static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 89 89 { 90 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 91 90 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 92 - struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; 91 + struct mpc52xx_gpio_wkup __iomem *regs = chip->regs; 93 92 unsigned long flags; 94 93 95 94 spin_lock_irqsave(&gpio_lock, flags); ··· 109 110 static int 110 111 mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 111 112 { 112 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 113 - struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; 114 113 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 114 + struct mpc52xx_gpio_wkup __iomem *regs = chip->regs; 115 115 unsigned long flags; 116 116 117 117 spin_lock_irqsave(&gpio_lock, flags); ··· 134 136 135 137 static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev) 136 138 { 139 + struct device *dev = &ofdev->dev; 140 + struct device_node *np = dev->of_node; 137 141 struct mpc52xx_gpiochip *chip; 138 142 struct mpc52xx_gpio_wkup __iomem *regs; 139 143 struct gpio_chip *gc; 140 144 int ret; 141 145 142 - chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL); 146 + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 143 147 if (!chip) 144 148 return -ENOMEM; 145 149 146 150 platform_set_drvdata(ofdev, chip); 147 151 148 - gc = &chip->mmchip.gc; 152 + gc = &chip->gc; 149 153 154 + gc->base = -1; 150 155 gc->ngpio = 8; 151 156 gc->direction_input = mpc52xx_wkup_gpio_dir_in; 152 157 gc->direction_output = mpc52xx_wkup_gpio_dir_out; 153 158 gc->get = mpc52xx_wkup_gpio_get; 154 159 gc->set = mpc52xx_wkup_gpio_set; 155 160 156 - ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip); 161 + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); 162 + if (!gc->label) 163 + return -ENOMEM; 164 + 165 + chip->regs = devm_of_iomap(dev, np, 0, NULL); 166 + if (IS_ERR(chip->regs)) 167 + return PTR_ERR(chip->regs); 168 + 169 + ret = devm_gpiochip_add_data(dev, gc, chip); 157 170 if (ret) 158 171 return ret; 159 172 160 - regs = chip->mmchip.regs; 173 + regs = chip->regs; 161 174 chip->shadow_gpioe = in_8(&regs->wkup_gpioe); 162 175 chip->shadow_ddr = in_8(&regs->wkup_ddr); 163 176 chip->shadow_dvo = in_8(&regs->wkup_dvo); 164 177 165 178 return 0; 166 - } 167 - 168 - static void mpc52xx_gpiochip_remove(struct platform_device *ofdev) 169 - { 170 - struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev); 171 - 172 - of_mm_gpiochip_remove(&chip->mmchip); 173 179 } 174 180 175 181 static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = { ··· 187 185 .of_match_table = mpc52xx_wkup_gpiochip_match, 188 186 }, 189 187 .probe = mpc52xx_wkup_gpiochip_probe, 190 - .remove = mpc52xx_gpiochip_remove, 191 188 }; 192 189 193 190 /* ··· 208 207 */ 209 208 static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio) 210 209 { 211 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 212 - struct mpc52xx_gpio __iomem *regs = mm_gc->regs; 210 + struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 211 + struct mpc52xx_gpio __iomem *regs = chip->regs; 213 212 unsigned int ret; 214 213 215 214 ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1; ··· 220 219 static inline void 221 220 __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 222 221 { 223 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 224 222 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 225 - struct mpc52xx_gpio __iomem *regs = mm_gc->regs; 223 + struct mpc52xx_gpio __iomem *regs = chip->regs; 226 224 227 225 if (val) 228 226 chip->shadow_dvo |= 1 << (31 - gpio); ··· 248 248 249 249 static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 250 250 { 251 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 252 251 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 253 - struct mpc52xx_gpio __iomem *regs = mm_gc->regs; 252 + struct mpc52xx_gpio __iomem *regs = chip->regs; 254 253 unsigned long flags; 255 254 256 255 spin_lock_irqsave(&gpio_lock, flags); ··· 270 271 static int 271 272 mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 272 273 { 273 - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 274 274 struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc); 275 - struct mpc52xx_gpio __iomem *regs = mm_gc->regs; 275 + struct mpc52xx_gpio __iomem *regs = chip->regs; 276 276 unsigned long flags; 277 277 278 278 spin_lock_irqsave(&gpio_lock, flags); ··· 296 298 297 299 static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev) 298 300 { 301 + struct device *dev = &ofdev->dev; 302 + struct device_node *np = dev->of_node; 299 303 struct mpc52xx_gpiochip *chip; 300 304 struct gpio_chip *gc; 301 305 struct mpc52xx_gpio __iomem *regs; 302 306 int ret; 303 307 304 - chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL); 308 + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 305 309 if (!chip) 306 310 return -ENOMEM; 307 311 308 312 platform_set_drvdata(ofdev, chip); 309 313 310 - gc = &chip->mmchip.gc; 314 + gc = &chip->gc; 311 315 316 + gc->base = -1; 312 317 gc->ngpio = 32; 313 318 gc->direction_input = mpc52xx_simple_gpio_dir_in; 314 319 gc->direction_output = mpc52xx_simple_gpio_dir_out; 315 320 gc->get = mpc52xx_simple_gpio_get; 316 321 gc->set = mpc52xx_simple_gpio_set; 317 322 318 - ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip); 323 + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); 324 + if (!gc->label) 325 + return -ENOMEM; 326 + 327 + chip->regs = devm_of_iomap(dev, np, 0, NULL); 328 + if (IS_ERR(chip->regs)) 329 + return PTR_ERR(chip->regs); 330 + 331 + ret = devm_gpiochip_add_data(dev, gc, chip); 319 332 if (ret) 320 333 return ret; 321 334 322 - regs = chip->mmchip.regs; 335 + regs = chip->regs; 323 336 chip->shadow_gpioe = in_be32(&regs->simple_gpioe); 324 337 chip->shadow_ddr = in_be32(&regs->simple_ddr); 325 338 chip->shadow_dvo = in_be32(&regs->simple_dvo); ··· 349 340 .of_match_table = mpc52xx_simple_gpiochip_match, 350 341 }, 351 342 .probe = mpc52xx_simple_gpiochip_probe, 352 - .remove = mpc52xx_gpiochip_remove, 353 343 }; 354 344 355 345 static struct platform_driver * const drivers[] = {

+2 -1

drivers/ps3/ps3stor_lib.c

··· 8 8 9 9 #include <linux/dma-mapping.h> 10 10 #include <linux/module.h> 11 + #include <linux/string_choices.h> 11 12 12 13 #include <asm/lv1call.h> 13 14 #include <asm/ps3stor.h> ··· 266 265 u64 start_sector, u64 sectors, int write) 267 266 { 268 267 unsigned int region_id = dev->regions[dev->region_idx].id; 269 - const char *op = write ? "write" : "read"; 268 + const char *op = str_write_read(write); 270 269 int res; 271 270 272 271 dev_dbg(&dev->sbd.core, "%s:%u: %s %llu sectors starting at %llu\n",

-4

include/linux/msi.h

··· 431 431 * function. 432 432 * @domain_free_irqs: Optional function to override the default free 433 433 * function. 434 - * @msi_post_free: Optional function which is invoked after freeing 435 - * all interrupts. 436 434 * @msi_translate: Optional translate callback to support the odd wire to 437 435 * MSI bridges, e.g. MBIGEN 438 436 * ··· 471 473 struct device *dev, int nvec); 472 474 void (*domain_free_irqs)(struct irq_domain *domain, 473 475 struct device *dev); 474 - void (*msi_post_free)(struct irq_domain *domain, 475 - struct device *dev); 476 476 int (*msi_translate)(struct irq_domain *domain, struct irq_fwspec *fwspec, 477 477 irq_hw_number_t *hwirq, unsigned int *type); 478 478 };

-3

kernel/irq/msi.c

··· 1644 1644 else 1645 1645 __msi_domain_free_irqs(dev, domain, ctrl); 1646 1646 1647 - if (ops->msi_post_free) 1648 - ops->msi_post_free(domain, dev); 1649 - 1650 1647 if (info->flags & MSI_FLAG_FREE_MSI_DESCS) 1651 1648 msi_domain_free_descs(dev, ctrl); 1652 1649 }

+1 -1

tools/testing/selftests/powerpc/include/instructions.h

··· 67 67 #define PPC_INST_PASTE_LAST __PASTE(0, 0, 1, 1) 68 68 69 69 /* This defines the prefixed load/store instructions */ 70 - #ifdef __ASSEMBLY__ 70 + #ifdef __ASSEMBLER__ 71 71 # define stringify_in_c(...) __VA_ARGS__ 72 72 #else 73 73 # define __stringify_in_c(...) #__VA_ARGS__

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