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Merge tag 'soc-fixes-5.16-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
"A few more fixes have come in, nothing overly severe but would be good
to get in by final release:

- More specific compatible fields on the qspi controller for socfpga,
to enable quirks in the driver

- A runtime PM fix for Renesas to fix mismatched reference counts on
errors"

* tag 'soc-fixes-5.16-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dts: socfpga: change qspi to "intel,socfpga-qspi"
dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"
reset: renesas: Fix Runtime PM usage

+11 -5
+1
Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
··· 29 29 - ti,am654-ospi 30 30 - intel,lgm-qspi 31 31 - xlnx,versal-ospi-1.0 32 + - intel,socfpga-qspi 32 33 - const: cdns,qspi-nor 33 34 - const: cdns,qspi-nor 34 35
+1 -1
arch/arm/boot/dts/socfpga.dtsi
··· 782 782 }; 783 783 784 784 qspi: spi@ff705000 { 785 - compatible = "cdns,qspi-nor"; 785 + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; 786 786 #address-cells = <1>; 787 787 #size-cells = <0>; 788 788 reg = <0xff705000 0x1000>,
+1 -1
arch/arm/boot/dts/socfpga_arria10.dtsi
··· 756 756 }; 757 757 758 758 qspi: spi@ff809000 { 759 - compatible = "cdns,qspi-nor"; 759 + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; 760 760 #address-cells = <1>; 761 761 #size-cells = <0>; 762 762 reg = <0xff809000 0x100>,
+1 -1
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
··· 594 594 }; 595 595 596 596 qspi: spi@ff8d2000 { 597 - compatible = "cdns,qspi-nor"; 597 + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; 598 598 #address-cells = <1>; 599 599 #size-cells = <0>; 600 600 reg = <0xff8d2000 0x100>,
+1 -1
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
··· 628 628 }; 629 629 630 630 qspi: spi@ff8d2000 { 631 - compatible = "cdns,qspi-nor"; 631 + compatible = "intel,socfpga-qspi", "cdns,qspi-nor"; 632 632 #address-cells = <1>; 633 633 #size-cells = <0>; 634 634 reg = <0xff8d2000 0x100>,
+6 -1
drivers/reset/reset-rzg2l-usbphy-ctrl.c
··· 137 137 dev_set_drvdata(dev, priv); 138 138 139 139 pm_runtime_enable(&pdev->dev); 140 - pm_runtime_resume_and_get(&pdev->dev); 140 + error = pm_runtime_resume_and_get(&pdev->dev); 141 + if (error < 0) { 142 + pm_runtime_disable(&pdev->dev); 143 + reset_control_assert(priv->rstc); 144 + return dev_err_probe(&pdev->dev, error, "pm_runtime_resume_and_get failed"); 145 + } 141 146 142 147 /* put pll and phy into reset state */ 143 148 spin_lock_irqsave(&priv->lock, flags);