Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'hwmon-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck:
"New drivers:
- Lenovo Yoga/Legion fan monitoring (yogafan)
- LattePanda Sigma EC
- Infineon XDP720 eFuse
- Microchip MCP998X
New device support:
- TI INA234
- Infineon XDPE1A2G5B/7B
- Renesas RAA228942 and RAA228943 (isl68137)
- Delta Q54SN120A1 and Q54SW120A7 (pmbus)
- TI TMP110 and TMP113 (tmp102)
- Sony APS-379 (pmbus)
- ITE IT8689E (it87)
- ASUS ROG STRIX Z790-H, X470-F, and CROSSHAIR X670E (asus-ec-sensors)
- GPD Win 5 (gpd-fan)
Modernization and Cleanups:
- Convert asus_atk0110 and acpi_power_meter ACPI drivers to platform
drivers
- Remove i2c_match_id() usage in many PMBus drivers
- Use guard() for mutex protection in pmbus_core
- Replace sprintf() with sysfs_emit() in ads7871, emc1403, max6650,
ads7828, max31722, and tc74
- Various markup and documentation improvements for yogafan and
ltc4282
Bug fixes:
- Fix use-after-free and missing usb_kill_urb on disconnect in powerz
driver
- Avoid cacheline sharing for DMA buffer in powerz driver
- Fix integer overflow in power calculation on 32-bit in isl28022
driver
- Fix bugs in pt5161l_read_block_data()
- Propagate SPI errors and fix incorrect error codes in ads7871
driver
- Fix i2c_smbus_write_byte_data wrapper argument type in max31785
driver
Device tree bindings:
- Convert npcm750-pwm-fan to DT schema
- Add bindings for Infineon XDP720, Microchip MCP998X, Sony APS-379,
Renesas RAA228942/3, Delta Q54SN120A1/7, XDPE1A2G5B/7B, Aosong
AHT10/20, DHT20, and TI INA234
- Adapt moortec,mr75203 bindings for T-Head TH1520"
* tag 'hwmon-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (82 commits)
hwmon: (ina233) Don't check for specific errors when parsing properties
hwmon: (isl28022) Don't check for specific errors when parsing properties
hwmon: (pmbus/tps25990) Don't check for specific errors when parsing properties
hwmon: (nct6683) Add customer ID for ASRock B650I Lightning WiFi
hwmon:(pmbus/xdp720) Add support for efuse xdp720
dt-bindings: hwmon/pmbus: Add Infineon XDP720
hwmon: add support for MCP998X
dt-bindings: hwmon: add support for MCP998X
hwmon: (powerz) Avoid cacheline sharing for DMA buffer
hwmon: (isl28022) Fix integer overflow in power calculation on 32-bit
hwmon: (pt5161l) Fix bugs in pt5161l_read_block_data()
hwmon: (powerz) Fix missing usb_kill_urb() on signal interrupt
hwmon: (powerz) Fix use-after-free on USB disconnect
hwmon: pmbus: Add support for Sony APS-379
dt-bindings: trivial-devices: Add sony,aps-379
hwmon: (yogafan) various markup improvements
hwmon: (sparx5) Make it selectable for ARCH_LAN969X
hwmon: (tmp102) add support for update interval
hwmon: (yogafan) fix markup warning
hwmon: (yogafan) Add support for Lenovo Yoga/Legion fan monitoring
...
+3857
-2479
-105
Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml
-105
Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml
···
1
-
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
-
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
3
-
%YAML 1.2
4
-
---
5
-
$id: http://devicetree.org/schemas/hwmon/baikal,bt1-pvt.yaml#
6
-
$schema: http://devicetree.org/meta-schemas/core.yaml#
7
-
8
-
title: Baikal-T1 PVT Sensor
9
-
10
-
maintainers:
11
-
- Serge Semin <fancer.lancer@gmail.com>
12
-
13
-
description: |
14
-
Baikal-T1 SoC provides an embedded process, voltage and temperature
15
-
sensor to monitor an internal SoC environment (chip temperature, supply
16
-
voltage and process monitor) and on time detect critical situations,
17
-
which may cause the system instability and even damages. The IP-block
18
-
is based on the Analog Bits PVT sensor, but is equipped with a dedicated
19
-
control wrapper, which provides a MMIO registers-based access to the
20
-
sensor core functionality (APB3-bus based) and exposes an additional
21
-
functions like thresholds/data ready interrupts, its status and masks,
22
-
measurements timeout. Its internal structure is depicted on the next
23
-
diagram:
24
-
25
-
Analog Bits core Bakal-T1 PVT control block
26
-
+--------------------+ +------------------------+
27
-
| Temperature sensor |-+ +------| Sensors control |
28
-
|--------------------| |<---En---| |------------------------|
29
-
| Voltage sensor |-|<--Mode--| +--->| Sampled data |
30
-
|--------------------| |<--Trim--+ | |------------------------|
31
-
| Low-Vt sensor |-| | +--| Thresholds comparator |
32
-
|--------------------| |---Data----| | |------------------------|
33
-
| High-Vt sensor |-| | +->| Interrupts status |
34
-
|--------------------| |--Valid--+-+ | |------------------------|
35
-
| Standard-Vt sensor |-+ +---+--| Interrupts mask |
36
-
+--------------------+ |------------------------|
37
-
^ | Interrupts timeout |
38
-
| +------------------------+
39
-
| ^ ^
40
-
Rclk-----+----------------------------------------+ |
41
-
APB3-------------------------------------------------+
42
-
43
-
This bindings describes the external Baikal-T1 PVT control interfaces
44
-
like MMIO registers space, interrupt request number and clocks source.
45
-
These are then used by the corresponding hwmon device driver to
46
-
implement the sysfs files-based access to the sensors functionality.
47
-
48
-
properties:
49
-
compatible:
50
-
const: baikal,bt1-pvt
51
-
52
-
reg:
53
-
maxItems: 1
54
-
55
-
interrupts:
56
-
maxItems: 1
57
-
58
-
clocks:
59
-
items:
60
-
- description: PVT reference clock
61
-
- description: APB3 interface clock
62
-
63
-
clock-names:
64
-
items:
65
-
- const: ref
66
-
- const: pclk
67
-
68
-
"#thermal-sensor-cells":
69
-
description: Baikal-T1 can be referenced as the CPU thermal-sensor
70
-
const: 0
71
-
72
-
baikal,pvt-temp-offset-millicelsius:
73
-
description: |
74
-
Temperature sensor trimming factor. It can be used to manually adjust the
75
-
temperature measurements within 7.130 degrees Celsius.
76
-
default: 0
77
-
minimum: 0
78
-
maximum: 7130
79
-
80
-
additionalProperties: false
81
-
82
-
required:
83
-
- compatible
84
-
- reg
85
-
- interrupts
86
-
- clocks
87
-
- clock-names
88
-
89
-
examples:
90
-
- |
91
-
#include <dt-bindings/interrupt-controller/mips-gic.h>
92
-
93
-
pvt@1f200000 {
94
-
compatible = "baikal,bt1-pvt";
95
-
reg = <0x1f200000 0x1000>;
96
-
#thermal-sensor-cells = <0>;
97
-
98
-
interrupts = <GIC_SHARED 31 IRQ_TYPE_LEVEL_HIGH>;
99
-
100
-
baikal,pvt-temp-offset-millicelsius = <1000>;
101
-
102
-
clocks = <&ccu_sys>, <&ccu_sys>;
103
-
clock-names = "ref", "pclk";
104
-
};
105
-
...
+237
Documentation/devicetree/bindings/hwmon/microchip,mcp9982.yaml
+237
Documentation/devicetree/bindings/hwmon/microchip,mcp9982.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/hwmon/microchip,mcp9982.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Microchip MCP998X/33 and MCP998XD/33D Temperature Monitor
8
+
9
+
maintainers:
10
+
- Victor Duicu <victor.duicu@microchip.com>
11
+
12
+
description: |
13
+
The MCP998X/33 and MCP998XD/33D family is a high-accuracy 2-wire
14
+
multichannel automotive temperature monitor.
15
+
The datasheet can be found here:
16
+
https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP998X-Family-Data-Sheet-DS20006827.pdf
17
+
18
+
properties:
19
+
compatible:
20
+
enum:
21
+
- microchip,mcp9933
22
+
- microchip,mcp9933d
23
+
- microchip,mcp9982
24
+
- microchip,mcp9982d
25
+
- microchip,mcp9983
26
+
- microchip,mcp9983d
27
+
- microchip,mcp9984
28
+
- microchip,mcp9984d
29
+
- microchip,mcp9985
30
+
- microchip,mcp9985d
31
+
32
+
reg:
33
+
maxItems: 1
34
+
35
+
interrupts:
36
+
minItems: 1
37
+
maxItems: 2
38
+
39
+
interrupt-names:
40
+
description:
41
+
The chip family has three different interrupt pins divided among them.
42
+
The chips without "D" have alert-therm and therm-addr.
43
+
The chips with "D" have alert-therm and sys-shtdwn.
44
+
minItems: 1
45
+
items:
46
+
- enum: [alert-therm, therm-addr, sys-shtdwn]
47
+
- enum: [therm-addr, sys-shtdwn]
48
+
49
+
"#address-cells":
50
+
const: 1
51
+
52
+
"#size-cells":
53
+
const: 0
54
+
55
+
microchip,enable-anti-parallel:
56
+
description:
57
+
Enable anti-parallel diode mode operation.
58
+
MCP9984/84D/85/85D and MCP9933/33D support reading two external diodes
59
+
in anti-parallel connection on the same set of pins.
60
+
type: boolean
61
+
62
+
microchip,parasitic-res-on-channel1-2:
63
+
description:
64
+
Indicates that the chip and the diodes/transistors are sufficiently far
65
+
apart that a parasitic resistance is added to the wires, which can affect
66
+
the measurements. Due to the anti-parallel diode connections, channels
67
+
1 and 2 are affected together.
68
+
type: boolean
69
+
70
+
microchip,parasitic-res-on-channel3-4:
71
+
description:
72
+
Indicates that the chip and the diodes/transistors are sufficiently far
73
+
apart that a parasitic resistance is added to the wires, which can affect
74
+
the measurements. Due to the anti-parallel diode connections, channels
75
+
3 and 4 are affected together.
76
+
type: boolean
77
+
78
+
microchip,power-state:
79
+
description:
80
+
The chip can be set in Run state or Standby state. In Run state the ADC
81
+
is converting on all channels at the programmed conversion rate.
82
+
In Standby state the host must initiate a conversion cycle by writing
83
+
to the One-Shot register.
84
+
True value sets Run state.
85
+
Chips with "D" in the name can only be set in Run mode.
86
+
type: boolean
87
+
88
+
vdd-supply: true
89
+
90
+
patternProperties:
91
+
"^channel@[1-4]$":
92
+
description:
93
+
Represents the external temperature channels to which
94
+
a remote diode is connected.
95
+
type: object
96
+
97
+
properties:
98
+
reg:
99
+
items:
100
+
maxItems: 1
101
+
102
+
label:
103
+
description: Unique name to identify which channel this is.
104
+
105
+
required:
106
+
- reg
107
+
108
+
additionalProperties: false
109
+
110
+
required:
111
+
- compatible
112
+
- reg
113
+
- vdd-supply
114
+
115
+
allOf:
116
+
- if:
117
+
properties:
118
+
compatible:
119
+
contains:
120
+
enum:
121
+
- microchip,mcp9982d
122
+
- microchip,mcp9983d
123
+
- microchip,mcp9984d
124
+
- microchip,mcp9985d
125
+
- microchip,mcp9933d
126
+
then:
127
+
properties:
128
+
interrupt-names:
129
+
items:
130
+
enum:
131
+
- alert-therm
132
+
- sys-shtdwn
133
+
required:
134
+
- microchip,power-state
135
+
- microchip,parasitic-res-on-channel1-2
136
+
else:
137
+
properties:
138
+
microchip,power-state: true
139
+
interrupt-names:
140
+
items:
141
+
enum:
142
+
- alert-therm
143
+
- therm-addr
144
+
145
+
- if:
146
+
properties:
147
+
compatible:
148
+
contains:
149
+
enum:
150
+
- microchip,mcp9983d
151
+
- microchip,mcp9984d
152
+
- microchip,mcp9985d
153
+
then:
154
+
required:
155
+
- microchip,parasitic-res-on-channel3-4
156
+
157
+
- if:
158
+
properties:
159
+
compatible:
160
+
contains:
161
+
enum:
162
+
- microchip,mcp9982
163
+
- microchip,mcp9982d
164
+
then:
165
+
properties:
166
+
microchip,enable-anti-parallel: false
167
+
patternProperties:
168
+
"^channel@[2-4]$": false
169
+
170
+
- if:
171
+
properties:
172
+
compatible:
173
+
contains:
174
+
enum:
175
+
- microchip,mcp9983
176
+
- microchip,mcp9983d
177
+
then:
178
+
properties:
179
+
microchip,enable-anti-parallel: false
180
+
patternProperties:
181
+
"^channel@[3-4]$": false
182
+
183
+
- if:
184
+
properties:
185
+
compatible:
186
+
contains:
187
+
enum:
188
+
- microchip,mcp9933
189
+
- microchip,mcp9933d
190
+
then:
191
+
patternProperties:
192
+
"^channel@[3-4]$": false
193
+
194
+
- if:
195
+
properties:
196
+
compatible:
197
+
contains:
198
+
enum:
199
+
- microchip,mcp9984
200
+
- microchip,mcp9984d
201
+
then:
202
+
properties:
203
+
channel@4: false
204
+
205
+
additionalProperties: false
206
+
207
+
examples:
208
+
- |
209
+
i2c {
210
+
#address-cells = <1>;
211
+
#size-cells = <0>;
212
+
213
+
temperature-sensor@4c {
214
+
compatible = "microchip,mcp9985";
215
+
reg = <0x4c>;
216
+
217
+
#address-cells = <1>;
218
+
#size-cells = <0>;
219
+
220
+
microchip,enable-anti-parallel;
221
+
microchip,parasitic-res-on-channel1-2;
222
+
microchip,parasitic-res-on-channel3-4;
223
+
vdd-supply = <&vdd>;
224
+
225
+
channel@1 {
226
+
reg = <1>;
227
+
label = "Room Temperature";
228
+
};
229
+
230
+
channel@2 {
231
+
reg = <2>;
232
+
label = "GPU Temperature";
233
+
};
234
+
};
235
+
};
236
+
237
+
...
+2
-2
Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml
+2
-2
Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml
···
105
105
G coefficient for temperature equation.
106
106
Default for series 5 = 60000
107
107
Default for series 6 = 57400
108
-
multipleOf: 100
108
+
multipleOf: 10
109
109
minimum: 1000
110
110
$ref: /schemas/types.yaml#/definitions/uint32
111
111
···
131
131
J coefficient for temperature equation.
132
132
Default for series 5 = -100
133
133
Default for series 6 = 0
134
-
multipleOf: 100
134
+
multipleOf: 10
135
135
maximum: 0
136
136
$ref: /schemas/types.yaml#/definitions/int32
137
137
-88
Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
-88
Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
···
1
-
Nuvoton NPCM PWM and Fan Tacho controller device
2
-
3
-
The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
4
-
controller outputs and 16 Fan tachometer controller inputs.
5
-
6
-
The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
7
-
controller outputs and 16 Fan tachometer controller inputs.
8
-
9
-
Required properties for pwm-fan node
10
-
- #address-cells : should be 1.
11
-
- #size-cells : should be 0.
12
-
- compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
13
-
: "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
14
-
- reg : specifies physical base address and size of the registers.
15
-
- reg-names : must contain:
16
-
* "pwm" for the PWM registers.
17
-
* "fan" for the Fan registers.
18
-
- clocks : phandle of reference clocks.
19
-
- clock-names : must contain
20
-
* "pwm" for PWM controller operating clock.
21
-
* "fan" for Fan controller operating clock.
22
-
- interrupts : contain the Fan interrupts with flags for falling edge.
23
-
- pinctrl-names : a pinctrl state named "default" must be defined.
24
-
- pinctrl-0 : phandle referencing pin configuration of the PWM and Fan
25
-
controller ports.
26
-
27
-
fan subnode format:
28
-
===================
29
-
Under fan subnode can be upto 8 child nodes, each child node representing a fan.
30
-
Each fan subnode must have one PWM channel and at least one Fan tach channel.
31
-
32
-
For PWM channel can be configured cooling-levels to create cooling device.
33
-
Cooling device could be bound to a thermal zone for the thermal control.
34
-
35
-
Required properties for each child node:
36
-
- reg : specify the PWM output channel.
37
-
integer value in the range 0 through 7, that represent
38
-
the PWM channel number that used.
39
-
40
-
- fan-tach-ch : specify the Fan tach input channel.
41
-
integer value in the range 0 through 15, that represent
42
-
the fan tach channel number that used.
43
-
44
-
At least one Fan tach input channel is required
45
-
46
-
Optional property for each child node:
47
-
- cooling-levels: PWM duty cycle values in a range from 0 to 255
48
-
which correspond to thermal cooling states.
49
-
50
-
Examples:
51
-
52
-
pwm_fan:pwm-fan-controller@103000 {
53
-
#address-cells = <1>;
54
-
#size-cells = <0>;
55
-
compatible = "nuvoton,npcm750-pwm-fan";
56
-
reg = <0x103000 0x2000>,
57
-
<0x180000 0x8000>;
58
-
reg-names = "pwm", "fan";
59
-
clocks = <&clk NPCM7XX_CLK_APB3>,
60
-
<&clk NPCM7XX_CLK_APB4>;
61
-
clock-names = "pwm","fan";
62
-
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
63
-
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
64
-
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
65
-
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
66
-
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
67
-
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
68
-
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
69
-
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
70
-
pinctrl-names = "default";
71
-
pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
72
-
&fanin0_pins &fanin1_pins &fanin2_pins
73
-
&fanin3_pins &fanin4_pins>;
74
-
fan@0 {
75
-
reg = <0x00>;
76
-
fan-tach-ch = /bits/ 8 <0x00 0x01>;
77
-
cooling-levels = <127 255>;
78
-
};
79
-
fan@1 {
80
-
reg = <0x01>;
81
-
fan-tach-ch = /bits/ 8 <0x02 0x03>;
82
-
};
83
-
fan@2 {
84
-
reg = <0x02>;
85
-
fan-tach-ch = /bits/ 8 <0x04>;
86
-
};
87
-
88
-
};
+139
Documentation/devicetree/bindings/hwmon/nuvoton,npcm750-pwm-fan.yaml
+139
Documentation/devicetree/bindings/hwmon/nuvoton,npcm750-pwm-fan.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/hwmon/nuvoton,npcm750-pwm-fan.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Nuvoton NPCM7xx/NPCM8xx PWM and Fan Tach Controller
8
+
9
+
maintainers:
10
+
- Tomer Maimon <tmaimon77@gmail.com>
11
+
12
+
description:
13
+
The NPCM7xx/NPCM8xx family includes a PWM and Fan Tachometer controller.
14
+
The controller provides up to 8 (NPCM7xx) or 12 (NPCM8xx) PWM channels and up
15
+
to 16 tachometer inputs. It is used for fan speed control and monitoring.
16
+
17
+
properties:
18
+
compatible:
19
+
enum:
20
+
- nuvoton,npcm750-pwm-fan
21
+
- nuvoton,npcm845-pwm-fan
22
+
23
+
reg:
24
+
maxItems: 2
25
+
description: Register addresses for PWM and Fan Tach units.
26
+
27
+
reg-names:
28
+
items:
29
+
- const: pwm
30
+
- const: fan
31
+
32
+
clocks:
33
+
maxItems: 2
34
+
description: Clocks for the PWM and Fan Tach modules.
35
+
36
+
clock-names:
37
+
items:
38
+
- const: pwm
39
+
- const: fan
40
+
41
+
interrupts:
42
+
description:
43
+
Contains the Fan interrupts with flags for falling edge.
44
+
For NPCM7XX, 8 interrupt lines are expected (one per PWM channel).
45
+
For NPCM8XX, 12 interrupt lines are expected (one per PWM channel).
46
+
47
+
minItems: 8
48
+
maxItems: 12
49
+
50
+
"#address-cells":
51
+
const: 1
52
+
53
+
"#size-cells":
54
+
const: 0
55
+
56
+
patternProperties:
57
+
"^fan@[0-9a-f]+$":
58
+
type: object
59
+
$ref: fan-common.yaml#
60
+
unevaluatedProperties: false
61
+
62
+
properties:
63
+
reg:
64
+
description:
65
+
Specify the PWM output channel. Integer value in the range 0-7 for
66
+
NPCM7XX or 0-11 for NPCM8XX, representing the PWM channel number.
67
+
68
+
maximum: 11
69
+
70
+
fan-tach-ch:
71
+
$ref: /schemas/types.yaml#/definitions/uint8-array
72
+
description:
73
+
The tach channel(s) used for the fan.
74
+
Integer values in the range 0-15.
75
+
76
+
items:
77
+
maximum: 15
78
+
79
+
cooling-levels:
80
+
description:
81
+
PWM duty cycle values in a range from 0 to 255 which
82
+
correspond to thermal cooling states. This property enables
83
+
thermal zone integration for automatic fan speed control
84
+
based on temperature.
85
+
86
+
items:
87
+
maximum: 255
88
+
89
+
required:
90
+
- reg
91
+
- fan-tach-ch
92
+
93
+
required:
94
+
- compatible
95
+
- reg
96
+
- reg-names
97
+
- clocks
98
+
- clock-names
99
+
- interrupts
100
+
101
+
additionalProperties: false
102
+
103
+
examples:
104
+
- |
105
+
#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
106
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
107
+
pwm_fan: pwm-fan@103000 {
108
+
compatible = "nuvoton,npcm750-pwm-fan";
109
+
#address-cells = <1>;
110
+
#size-cells = <0>;
111
+
112
+
reg = <0x103000 0x2000>, <0x180000 0x8000>;
113
+
reg-names = "pwm", "fan";
114
+
115
+
clocks = <&clk NPCM7XX_CLK_APB3>, <&clk NPCM7XX_CLK_APB4>;
116
+
clock-names = "pwm", "fan";
117
+
118
+
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
119
+
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
120
+
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
121
+
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
122
+
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
123
+
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
124
+
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
125
+
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
126
+
pinctrl-names = "default";
127
+
pinctrl-0 = <&pwm0_pins &fanin0_pins>;
128
+
129
+
fan@0 {
130
+
reg = <0>;
131
+
fan-tach-ch = <0 1>;
132
+
cooling-levels = <64 128 192 255>;
133
+
};
134
+
135
+
fan@1 {
136
+
reg = <1>;
137
+
fan-tach-ch = <2>;
138
+
};
139
+
};
+59
Documentation/devicetree/bindings/hwmon/pmbus/infineon,xdp720.yaml
+59
Documentation/devicetree/bindings/hwmon/pmbus/infineon,xdp720.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
5
+
$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,xdp720.yaml#
6
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
7
+
8
+
title: Infineon XDP720 Digital eFuse Controller
9
+
10
+
maintainers:
11
+
- Ashish Yadav <ashish.yadav@infineon.com>
12
+
13
+
description: |
14
+
The XDP720 is an eFuse with integrated current sensor and digital
15
+
controller. It provides accurate system telemetry (V, I, P, T) and
16
+
reports analog current at the IMON pin for post-processing.
17
+
18
+
Datasheet:
19
+
https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp720-001-datasheet-en.pdf
20
+
21
+
properties:
22
+
compatible:
23
+
enum:
24
+
- infineon,xdp720
25
+
26
+
reg:
27
+
maxItems: 1
28
+
29
+
infineon,rimon-micro-ohms:
30
+
description:
31
+
The value of the RIMON resistor, in micro ohms, required to enable
32
+
the system overcurrent protection.
33
+
34
+
vdd-vin-supply:
35
+
description:
36
+
Supply for the VDD_VIN pin (pin 9), the IC controller power supply.
37
+
Typically connected to the input bus (VIN) through a 100 ohm / 100 nF
38
+
RC filter.
39
+
40
+
required:
41
+
- compatible
42
+
- reg
43
+
- vdd-vin-supply
44
+
45
+
additionalProperties: false
46
+
47
+
examples:
48
+
- |
49
+
i2c {
50
+
#address-cells = <1>;
51
+
#size-cells = <0>;
52
+
53
+
hwmon@11 {
54
+
compatible = "infineon,xdp720";
55
+
reg = <0x11>;
56
+
vdd-vin-supply = <&vdd_vin>;
57
+
infineon,rimon-micro-ohms = <1098000000>; /* 1.098k ohm */
58
+
};
59
+
};
+50
-43
Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml
+50
-43
Documentation/devicetree/bindings/hwmon/pmbus/isil,isl68137.yaml
···
16
16
17
17
properties:
18
18
compatible:
19
-
enum:
20
-
- isil,isl68137
21
-
- renesas,isl68220
22
-
- renesas,isl68221
23
-
- renesas,isl68222
24
-
- renesas,isl68223
25
-
- renesas,isl68224
26
-
- renesas,isl68225
27
-
- renesas,isl68226
28
-
- renesas,isl68227
29
-
- renesas,isl68229
30
-
- renesas,isl68233
31
-
- renesas,isl68239
32
-
- renesas,isl69222
33
-
- renesas,isl69223
34
-
- renesas,isl69224
35
-
- renesas,isl69225
36
-
- renesas,isl69227
37
-
- renesas,isl69228
38
-
- renesas,isl69234
39
-
- renesas,isl69236
40
-
- renesas,isl69239
41
-
- renesas,isl69242
42
-
- renesas,isl69243
43
-
- renesas,isl69247
44
-
- renesas,isl69248
45
-
- renesas,isl69254
46
-
- renesas,isl69255
47
-
- renesas,isl69256
48
-
- renesas,isl69259
49
-
- isil,isl69260
50
-
- renesas,isl69268
51
-
- isil,isl69269
52
-
- renesas,isl69298
53
-
- renesas,raa228000
54
-
- renesas,raa228004
55
-
- renesas,raa228006
56
-
- renesas,raa228228
57
-
- renesas,raa228244
58
-
- renesas,raa228246
59
-
- renesas,raa229001
60
-
- renesas,raa229004
61
-
- renesas,raa229621
19
+
oneOf:
20
+
- enum:
21
+
- isil,isl68137
22
+
- renesas,isl68220
23
+
- renesas,isl68221
24
+
- renesas,isl68222
25
+
- renesas,isl68223
26
+
- renesas,isl68224
27
+
- renesas,isl68225
28
+
- renesas,isl68226
29
+
- renesas,isl68227
30
+
- renesas,isl68229
31
+
- renesas,isl68233
32
+
- renesas,isl68239
33
+
- renesas,isl69222
34
+
- renesas,isl69223
35
+
- renesas,isl69224
36
+
- renesas,isl69225
37
+
- renesas,isl69227
38
+
- renesas,isl69228
39
+
- renesas,isl69234
40
+
- renesas,isl69236
41
+
- renesas,isl69239
42
+
- renesas,isl69242
43
+
- renesas,isl69243
44
+
- renesas,isl69247
45
+
- renesas,isl69248
46
+
- renesas,isl69254
47
+
- renesas,isl69255
48
+
- renesas,isl69256
49
+
- renesas,isl69259
50
+
- isil,isl69260
51
+
- renesas,isl69268
52
+
- isil,isl69269
53
+
- renesas,isl69298
54
+
- renesas,raa228000
55
+
- renesas,raa228004
56
+
- renesas,raa228006
57
+
- renesas,raa228228
58
+
- renesas,raa228244
59
+
- renesas,raa228246
60
+
- renesas,raa229001
61
+
- renesas,raa229004
62
+
- renesas,raa229621
63
+
64
+
- items:
65
+
- enum:
66
+
- renesas,raa228942
67
+
- renesas,raa228943
68
+
- const: renesas,raa228244
62
69
63
70
reg:
64
71
maxItems: 1
+3
Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
+3
Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
···
29
29
- ti,ina230
30
30
- ti,ina231
31
31
- ti,ina233
32
+
- ti,ina234
32
33
- ti,ina237
33
34
- ti,ina238
34
35
- ti,ina260
···
114
113
- ti,ina228
115
114
- ti,ina230
116
115
- ti,ina231
116
+
- ti,ina234
117
117
- ti,ina237
118
118
- ti,ina238
119
119
- ti,ina260
···
136
134
- ti,ina226
137
135
- ti,ina230
138
136
- ti,ina231
137
+
- ti,ina234
139
138
- ti,ina260
140
139
- ti,ina700
141
140
- ti,ina780
+13
Documentation/devicetree/bindings/trivial-devices.yaml
+13
Documentation/devicetree/bindings/trivial-devices.yaml
···
59
59
- adi,lt7182s
60
60
# AMS iAQ-Core VOC Sensor
61
61
- ams,iaq-core
62
+
# Aosong temperature & humidity sensors with I2C interface
63
+
- aosong,aht10
64
+
- aosong,aht20
65
+
- aosong,dht20
62
66
# Arduino microcontroller interface over SPI on UnoQ board
63
67
- arduino,unoq-mcu
64
68
# Temperature monitoring of Astera Labs PT5161L PCIe retimer
···
101
97
- delta,dps920ab
102
98
# 1/4 Brick DC/DC Regulated Power Module
103
99
- delta,q54sj108a2
100
+
# 1300W 1/4 Brick DC/DC Regulated Power Module
101
+
- delta,q54sn120a1
102
+
# 2000W 1/4 Brick DC/DC Regulated Power Module
103
+
- delta,q54sw120a7
104
104
# Devantech SRF02 ultrasonic ranger in I2C mode
105
105
- devantech,srf02
106
106
# Devantech SRF08 ultrasonic ranger
···
165
157
- infineon,xdpe15284
166
158
# Infineon Multi-phase Digital VR Controller xdpe152c4
167
159
- infineon,xdpe152c4
160
+
# Infineon Multi-phase Digital VR Controller xdpe1a2g7b
161
+
- infineon,xdpe1a2g5b
162
+
- infineon,xdpe1a2g7b
168
163
# Injoinic IP5108 2.0A Power Bank IC with I2C
169
164
- injoinic,ip5108
170
165
# Injoinic IP5109 2.1A Power Bank IC with I2C
···
441
430
- smsc,emc6d103s
442
431
# Socionext Uniphier SMP control registers
443
432
- socionext,uniphier-smpctrl
433
+
# Sony APS-379 Power Supply
434
+
- sony,aps-379
444
435
# SparkFun Qwiic Joystick (COM-15168) with i2c interface
445
436
- sparkfun,qwiic-joystick
446
437
# STMicroelectronics Hot-swap controller stef48h28
+57
Documentation/hwmon/aps-379.rst
+57
Documentation/hwmon/aps-379.rst
···
1
+
Kernel driver aps-379
2
+
=====================
3
+
4
+
Supported chips:
5
+
6
+
* Sony APS-379
7
+
8
+
Prefix: 'aps-379'
9
+
10
+
Addresses scanned: -
11
+
12
+
Authors:
13
+
- Chris Packham
14
+
15
+
Description
16
+
-----------
17
+
18
+
This driver implements support for the PMBus monitor on the Sony APS-379
19
+
modular power supply. The APS-379 deviates from the PMBus standard for the
20
+
READ_VOUT command by using the linear11 format instead of linear16.
21
+
22
+
The known supported PMBus commands are:
23
+
24
+
=== ============================= ========= ======= =====
25
+
Cmd Function Protocol Scaling Bytes
26
+
=== ============================= ========= ======= =====
27
+
01 On / Off Command (OPERATION) Byte R/W -- 1
28
+
10 WRITE_PROTECT Byte R/W -- 1
29
+
3B FAN_COMMAND_1 Word R/W -- 2
30
+
46 Current Limit (in percent) Word R/W 2^0 2
31
+
47 Current Limit Fault Response Byte R/W -- 1
32
+
79 Alarm Data Bits (STATUS_WORD) Word Rd -- 2
33
+
8B Output Voltage (READ_VOUT) Word Rd 2^-4 2
34
+
8C Output Current (READ_IOUT) Word Rd 2^-2 2
35
+
8D Power Supply Ambient Temp Word Rd 2^0 2
36
+
90 READ_FAN_SPEED_1 Word Rd 2^6 2
37
+
91 READ_FAN_SPEED_2 Word Rd 2^6 2
38
+
96 Output Wattage (READ_POUT) Word Rd 2^1 2
39
+
97 Input Wattage (READ_PIN) Word Rd 2^1 2
40
+
9A Unit Model Number (MFR_MODEL) Block R/W -- 10
41
+
9B Unit Revision Number Block R/W -- 10
42
+
9E Unit Serial Number Block R/W -- 8
43
+
99 Unit Manufacturer ID (MFR_ID) Block R/W -- 8
44
+
D0 Unit Run Time Information Block Rd -- 4
45
+
D5 Firmware Version Rd cust -- 8
46
+
B0 User Data 1 (USER_DATA_00) Block R/W -- 4
47
+
B1 User Data 2 (USER_DATA_01) Block R/W -- 4
48
+
B2 User Data 3 (USER_DATA_02) Block R/W -- 4
49
+
B3 User Data 4 (USER_DATA_03) Block R/W -- 4
50
+
B4 User Data 5 (USER_DATA_04) Block R/W -- 4
51
+
B5 User Data 6 (USER_DATA_05) Block R/W -- 4
52
+
B6 User Data 7 (USER_DATA_06) Block R/W -- 4
53
+
B7 User Data 8 (USER_DATA_07) Block R/W -- 4
54
+
F0 Calibration command Byte R/W -- 1
55
+
F1 Calibration data Word Wr 2^9 2
56
+
F2 Unlock Calibration Byte Wr -- 1
57
+
=== ============================= ========= ======= =====
+3
Documentation/hwmon/asus_ec_sensors.rst
+3
Documentation/hwmon/asus_ec_sensors.rst
···
22
22
* ROG CROSSHAIR VIII FORMULA
23
23
* ROG CROSSHAIR VIII HERO
24
24
* ROG CROSSHAIR VIII IMPACT
25
+
* ROG CROSSHAIR X670E EXTREME
25
26
* ROG CROSSHAIR X670E HERO
26
27
* ROG CROSSHAIR X670E GENE
27
28
* ROG MAXIMUS X HERO
···
33
32
* ROG STRIX B550-I GAMING
34
33
* ROG STRIX B650E-I GAMING WIFI
35
34
* ROG STRIX B850-I GAMING WIFI
35
+
* ROG STRIX X470-F GAMING
36
36
* ROG STRIX X470-I GAMING
37
37
* ROG STRIX X570-E GAMING
38
38
* ROG STRIX X570-E GAMING WIFI II
···
50
48
* ROG STRIX Z690-A GAMING WIFI D4
51
49
* ROG STRIX Z690-E GAMING WIFI
52
50
* ROG STRIX Z790-E GAMING WIFI II
51
+
* ROG STRIX Z790-H GAMING WIFI
53
52
* ROG STRIX Z790-I GAMING WIFI
54
53
* ROG ZENITH II EXTREME
55
54
* ROG ZENITH II EXTREME ALPHA
-117
Documentation/hwmon/bt1-pvt.rst
-117
Documentation/hwmon/bt1-pvt.rst
···
1
-
.. SPDX-License-Identifier: GPL-2.0-only
2
-
3
-
Kernel driver bt1-pvt
4
-
=====================
5
-
6
-
Supported chips:
7
-
8
-
* Baikal-T1 PVT sensor (in SoC)
9
-
10
-
Prefix: 'bt1-pvt'
11
-
12
-
Addresses scanned: -
13
-
14
-
Datasheet: Provided by BAIKAL ELECTRONICS upon request and under NDA
15
-
16
-
Authors:
17
-
Maxim Kaurkin <maxim.kaurkin@baikalelectronics.ru>
18
-
Serge Semin <Sergey.Semin@baikalelectronics.ru>
19
-
20
-
Description
21
-
-----------
22
-
23
-
This driver implements support for the hardware monitoring capabilities of the
24
-
embedded into Baikal-T1 process, voltage and temperature sensors. PVT IP-core
25
-
consists of one temperature and four voltage sensors, which can be used to
26
-
monitor the chip internal environment like heating, supply voltage and
27
-
transistors performance. The driver can optionally provide the hwmon alarms
28
-
for each sensor the PVT controller supports. The alarms functionality is made
29
-
compile-time configurable due to the hardware interface implementation
30
-
peculiarity, which is connected with an ability to convert data from only one
31
-
sensor at a time. Additional limitation is that the controller performs the
32
-
thresholds checking synchronously with the data conversion procedure. Due to
33
-
these in order to have the hwmon alarms automatically detected the driver code
34
-
must switch from one sensor to another, read converted data and manually check
35
-
the threshold status bits. Depending on the measurements timeout settings
36
-
(update_interval sysfs node value) this design may cause additional burden on
37
-
the system performance. So in case if alarms are unnecessary in your system
38
-
design it's recommended to have them disabled to prevent the PVT IRQs being
39
-
periodically raised to get the data cache/alarms status up to date. By default
40
-
in alarm-less configuration the data conversion is performed by the driver
41
-
on demand when read operation is requested via corresponding _input-file.
42
-
43
-
Temperature Monitoring
44
-
----------------------
45
-
46
-
Temperature is measured with 10-bit resolution and reported in millidegree
47
-
Celsius. The driver performs all the scaling by itself therefore reports true
48
-
temperatures that don't need any user-space adjustments. While the data
49
-
translation formulae isn't linear, which gives us non-linear discreteness,
50
-
it's close to one, but giving a bit better accuracy for higher temperatures.
51
-
The temperature input is mapped as follows (the last column indicates the input
52
-
ranges)::
53
-
54
-
temp1: CPU embedded diode -48.38C - +147.438C
55
-
56
-
In case if the alarms kernel config is enabled in the driver the temperature input
57
-
has associated min and max limits which trigger an alarm when crossed.
58
-
59
-
Voltage Monitoring
60
-
------------------
61
-
62
-
The voltage inputs are also sampled with 10-bit resolution and reported in
63
-
millivolts. But in this case the data translation formulae is linear, which
64
-
provides a constant measurements discreteness. The data scaling is also
65
-
performed by the driver, so returning true millivolts. The voltage inputs are
66
-
mapped as follows (the last column indicates the input ranges)::
67
-
68
-
in0: VDD (processor core) 0.62V - 1.168V
69
-
in1: Low-Vt (low voltage threshold) 0.62V - 1.168V
70
-
in2: High-Vt (high voltage threshold) 0.62V - 1.168V
71
-
in3: Standard-Vt (standard voltage threshold) 0.62V - 1.168V
72
-
73
-
In case if the alarms config is enabled in the driver the voltage inputs
74
-
have associated min and max limits which trigger an alarm when crossed.
75
-
76
-
Sysfs Attributes
77
-
----------------
78
-
79
-
Following is a list of all sysfs attributes that the driver provides, their
80
-
permissions and a short description:
81
-
82
-
=============================== ======= =======================================
83
-
Name Perm Description
84
-
=============================== ======= =======================================
85
-
update_interval RW Measurements update interval per
86
-
sensor.
87
-
temp1_type RO Sensor type (always 1 as CPU embedded
88
-
diode).
89
-
temp1_label RO CPU Core Temperature sensor.
90
-
temp1_input RO Measured temperature in millidegree
91
-
Celsius.
92
-
temp1_min RW Low limit for temp input.
93
-
temp1_max RW High limit for temp input.
94
-
temp1_min_alarm RO Temperature input alarm. Returns 1 if
95
-
temperature input went below min limit,
96
-
0 otherwise.
97
-
temp1_max_alarm RO Temperature input alarm. Returns 1 if
98
-
temperature input went above max limit,
99
-
0 otherwise.
100
-
temp1_offset RW Temperature offset in millidegree
101
-
Celsius which is added to the
102
-
temperature reading by the chip. It can
103
-
be used to manually adjust the
104
-
temperature measurements within 7.130
105
-
degrees Celsius.
106
-
in[0-3]_label RO CPU Voltage sensor (either core or
107
-
low/high/standard thresholds).
108
-
in[0-3]_input RO Measured voltage in millivolts.
109
-
in[0-3]_min RW Low limit for voltage input.
110
-
in[0-3]_max RW High limit for voltage input.
111
-
in[0-3]_min_alarm RO Voltage input alarm. Returns 1 if
112
-
voltage input went below min limit,
113
-
0 otherwise.
114
-
in[0-3]_max_alarm RO Voltage input alarm. Returns 1 if
115
-
voltage input went above max limit,
116
-
0 otherwise.
117
-
=============================== ======= =======================================
+22
-3
Documentation/hwmon/ina2xx.rst
+22
-3
Documentation/hwmon/ina2xx.rst
···
74
74
https://us1.silergy.com/
75
75
76
76
77
+
* Texas Instruments INA234
78
+
79
+
Prefix: 'ina234'
80
+
81
+
Addresses: I2C 0x40 - 0x43
82
+
83
+
Datasheet: Publicly available at the Texas Instruments website
84
+
85
+
https://www.ti.com/
86
+
77
87
Author: Lothar Felten <lothar.felten@gmail.com>
78
88
79
89
Description
···
99
89
The INA226 is a current shunt and power monitor with an I2C interface.
100
90
The INA226 monitors both a shunt voltage drop and bus supply voltage.
101
91
102
-
INA230 and INA231 are high or low side current shunt and power monitors
92
+
INA230, INA231, and INA234 are high or low side current shunt and power monitors
103
93
with an I2C interface. The chips monitor both a shunt voltage drop and
104
94
bus supply voltage.
105
95
···
134
124
shunt_resistor Shunt resistance(uOhm) channel (not for ina260)
135
125
======================= ===============================================
136
126
137
-
Additional sysfs entries for ina226, ina230, ina231, ina260, and sy24655
138
-
------------------------------------------------------------------------
127
+
Additional sysfs entries
128
+
------------------------
129
+
130
+
Additional entries are available for the following chips:
131
+
132
+
* ina226
133
+
* ina230
134
+
* ina231
135
+
* ina234
136
+
* ina260
137
+
* sy24655
139
138
140
139
======================= ====================================================
141
140
curr1_lcrit Critical low current
+4
-1
Documentation/hwmon/index.rst
+4
-1
Documentation/hwmon/index.rst
···
41
41
adt7475
42
42
aht10
43
43
amc6821
44
+
aps-379
44
45
aquacomputer_d5next
45
46
asb100
46
47
asc7621
···
53
52
bcm54140
54
53
bel-pfe
55
54
bpa-rs600
56
-
bt1-pvt
57
55
cgbc-hwmon
58
56
chipcap2
59
57
coretemp
···
111
111
kbatt
112
112
kfan
113
113
lan966x
114
+
lattepanda-sigma-ec
114
115
lineage-pem
115
116
lm25066
116
117
lm63
···
175
174
mc33xs2410_hwmon
176
175
mc34vr500
177
176
mcp3021
177
+
mcp9982
178
178
menf21bmc
179
179
mlxreg-fan
180
180
mp2856
···
284
282
xdp710
285
283
xdpe12284
286
284
xdpe152c4
285
+
yogafan
287
286
zl6100
+20
Documentation/hwmon/isl68137.rst
+20
Documentation/hwmon/isl68137.rst
···
394
394
395
395
Provided by Renesas upon request and NDA
396
396
397
+
* Renesas RAA228942
398
+
399
+
Prefix: 'raa228942'
400
+
401
+
Addresses scanned: -
402
+
403
+
Datasheet:
404
+
405
+
Provided by Renesas upon request and NDA
406
+
407
+
* Renesas RAA228943
408
+
409
+
Prefix: 'raa228943'
410
+
411
+
Addresses scanned: -
412
+
413
+
Datasheet:
414
+
415
+
Provided by Renesas upon request and NDA
416
+
397
417
* Renesas RAA229001
398
418
399
419
Prefix: 'raa229001'
+20
-6
Documentation/hwmon/it87.rst
+20
-6
Documentation/hwmon/it87.rst
···
25
25
26
26
Datasheet: Not publicly available
27
27
28
+
* IT8689E
29
+
30
+
Prefix: 'it8689'
31
+
32
+
Addresses scanned: from Super I/O config space (8 I/O ports)
33
+
34
+
Datasheet: Not publicly available
35
+
28
36
* IT8705F
29
37
30
38
Prefix: 'it87'
···
236
228
-----------
237
229
238
230
This driver implements support for the IT8603E, IT8620E, IT8623E, IT8628E,
239
-
IT8705F, IT8712F, IT8716F, IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8732F,
240
-
IT8758E, IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F, IT8786E, IT8790E,
241
-
IT8792E/IT8795E, IT87952E and SiS950 chips.
231
+
IT8689E, IT8705F, IT8712F, IT8716F, IT8718F, IT8720F, IT8721F, IT8726F,
232
+
IT8728F, IT8732F, IT8758E, IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F,
233
+
IT8786E, IT8790E, IT8792E/IT8795E, IT87952E and SiS950 chips.
242
234
243
235
These chips are 'Super I/O chips', supporting floppy disks, infrared ports,
244
236
joysticks and other miscellaneous stuff. For hardware monitoring, they
···
282
274
The IT8620E and IT8628E are custom designs, hardware monitoring part is similar
283
275
to IT8728F. It only supports 16-bit fan mode. Both chips support up to 6 fans.
284
276
277
+
The IT8689E supports newer autopwm, 12mV ADC, 16-bit fans, six fans, six PWM
278
+
channels, PWM frequency 2, six temperature inputs, and AVCC3 (in9).
279
+
285
280
The IT8790E, IT8792E/IT8795E and IT87952E support up to 3 fans. 16-bit fan
286
281
mode is always enabled.
287
282
···
312
301
2.8 volts with a resolution of 0.0109 volt. The battery voltage in8 does not
313
302
have limit registers.
314
303
315
-
On the IT8603E, IT8620E, IT8628E, IT8721F/IT8758E, IT8732F, IT8781F, IT8782F,
316
-
and IT8783E/F, some voltage inputs are internal and scaled inside the chip:
304
+
On the IT8603E, IT8620E, IT8628E, IT8689E, IT8721F/IT8758E, IT8732F, IT8781F,
305
+
IT8782F, and IT8783E/F, some voltage inputs are internal and scaled inside the
306
+
chip:
307
+
317
308
* in3 (optional)
318
309
* in7 (optional for IT8781F, IT8782F, and IT8783E/F)
319
310
* in8 (always)
320
-
* in9 (relevant for IT8603E only)
311
+
* in9 (IT8603E, IT8622E, and IT8689E: always AVCC3; others: optional)
312
+
321
313
The driver handles this transparently so user-space doesn't have to care.
322
314
323
315
The VID lines (IT8712F/IT8716F/IT8718F/IT8720F) encode the core voltage value:
+61
Documentation/hwmon/lattepanda-sigma-ec.rst
+61
Documentation/hwmon/lattepanda-sigma-ec.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0-or-later
2
+
3
+
Kernel driver lattepanda-sigma-ec
4
+
=================================
5
+
6
+
Supported systems:
7
+
8
+
* LattePanda Sigma (Intel 13th Gen i5-1340P)
9
+
10
+
DMI vendor: LattePanda
11
+
12
+
DMI product: LattePanda Sigma
13
+
14
+
BIOS version: 5.27 (verified)
15
+
16
+
Datasheet: Not available (EC registers discovered empirically)
17
+
18
+
Author: Mariano Abad <weimaraner@gmail.com>
19
+
20
+
Description
21
+
-----------
22
+
23
+
This driver provides hardware monitoring for the LattePanda Sigma
24
+
single-board computer made by DFRobot. The board uses an ITE IT8613E
25
+
Embedded Controller to manage a CPU cooling fan and thermal sensors.
26
+
27
+
The BIOS declares the ACPI Embedded Controller (``PNP0C09``) with
28
+
``_STA`` returning 0, preventing the kernel's ACPI EC subsystem from
29
+
initializing. This driver reads the EC directly via the standard ACPI
30
+
EC I/O ports (``0x62`` data, ``0x66`` command/status).
31
+
32
+
Sysfs attributes
33
+
----------------
34
+
35
+
======================= ===============================================
36
+
``fan1_input`` Fan speed in RPM (EC registers 0x2E:0x2F,
37
+
16-bit big-endian)
38
+
``fan1_label`` "CPU Fan"
39
+
``temp1_input`` Board/ambient temperature in millidegrees
40
+
Celsius (EC register 0x60, unsigned)
41
+
``temp1_label`` "Board Temp"
42
+
``temp2_input`` CPU proximity temperature in millidegrees
43
+
Celsius (EC register 0x70, unsigned)
44
+
``temp2_label`` "CPU Temp"
45
+
======================= ===============================================
46
+
47
+
Module parameters
48
+
-----------------
49
+
50
+
``force`` (bool, default false)
51
+
Force loading on BIOS versions other than 5.27. The driver still
52
+
requires DMI vendor and product name matching.
53
+
54
+
Known limitations
55
+
-----------------
56
+
57
+
* Fan speed control is not supported. The fan is always under EC
58
+
automatic control.
59
+
* The EC register map was verified only on BIOS version 5.27.
60
+
Other versions may use different register offsets; use the ``force``
61
+
parameter at your own risk.
+1
-2
Documentation/hwmon/ltc4282.rst
+1
-2
Documentation/hwmon/ltc4282.rst
+111
Documentation/hwmon/mcp9982.rst
+111
Documentation/hwmon/mcp9982.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0+
2
+
3
+
Kernel driver MCP998X
4
+
=====================
5
+
6
+
Supported chips:
7
+
8
+
* Microchip Technology MCP998X/MCP9933 and MCP998XD/MCP9933D
9
+
10
+
Prefix: 'mcp9982'
11
+
12
+
Datasheet:
13
+
https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP998X-Family-Data-Sheet-DS20006827.pdf
14
+
15
+
Authors:
16
+
17
+
- Victor Duicu <victor.duicu@microchip.com>
18
+
19
+
Description
20
+
-----------
21
+
22
+
This driver implements support for the MCP998X family containing: MCP9982,
23
+
MCP9982D, MCP9983, MCP9983D, MCP9984, MCP9984D, MCP9985, MCP9985D,
24
+
MCP9933 and MCP9933D.
25
+
26
+
The MCP998X Family is a high accuracy 2-wire multichannel automotive
27
+
temperature monitor.
28
+
29
+
The chips in the family have different numbers of external channels,
30
+
ranging from 1 (MCP9982) to 4 channels (MCP9985). Reading diodes in
31
+
anti-parallel connection is supported by MCP9984/85/33 and
32
+
MCP9984D/85D/33D. Dedicated hardware shutdown circuitry is present
33
+
only in MCP998XD and MCP9933D.
34
+
35
+
Temperatures are read in millidegrees Celsius, ranging from -64 to
36
+
191.875 with 0.125 precision.
37
+
38
+
Each channel has a minimum, maximum, and critical limit alongside associated alarms.
39
+
The chips also implement a hysteresis mechanism which applies only to the maximum
40
+
and critical limits. The relative difference between a limit and its hysteresis
41
+
is the same for both and the value is kept in a single register.
42
+
43
+
The chips measure temperatures with a variable conversion rate.
44
+
Update_interval = Conversion/Second, so the available options are:
45
+
- 16000 (ms) = 1 conv/16 sec
46
+
- 8000 (ms) = 1 conv/8 sec
47
+
- 4000 (ms) = 1 conv/4 sec
48
+
- 2000 (ms) = 1 conv/2 sec
49
+
- 1000 (ms) = 1 conv/sec
50
+
- 500 (ms) = 2 conv/sec
51
+
- 250 (ms) = 4 conv/sec
52
+
- 125 (ms) = 8 conv/sec
53
+
- 64 (ms) = 16 conv/sec
54
+
- 32 (ms) = 32 conv/sec
55
+
- 16 (ms) = 64 conv/sec
56
+
57
+
Usage Notes
58
+
-----------
59
+
60
+
Parameters that can be configured in devicetree:
61
+
- anti-parallel diode mode operation
62
+
- resistance error correction on channels 1 and 2
63
+
- resistance error correction on channels 3 and 4
64
+
- power state
65
+
66
+
Chips 82/83 and 82D/83D do not support anti-parallel diode mode.
67
+
For chips with "D" in the name resistance error correction must be on.
68
+
Please see Documentation/devicetree/bindings/hwmon/microchip,mcp9982.yaml
69
+
for details.
70
+
71
+
There are two power states:
72
+
- Active state: in which the chip is converting on all channels at the
73
+
programmed rate.
74
+
75
+
- Standby state: in which the host must initiate a conversion cycle.
76
+
77
+
Chips with "D" in the name work in Active state only and those without
78
+
can work in either state.
79
+
80
+
Chips with "D" in the name can't set update interval slower than 1 second.
81
+
82
+
Among the hysteresis attributes, only the tempX_crit_hyst ones are writeable
83
+
while the others are read only. Setting tempX_crit_hyst writes the difference
84
+
between tempX_crit and tempX_crit_hyst in the hysteresis register. The new value
85
+
applies automatically to the other limits. At power up the device starts with
86
+
a 10 degree hysteresis.
87
+
88
+
Sysfs entries
89
+
-------------
90
+
91
+
The following attributes are supported. The temperature limits and
92
+
update_interval are read-write. The attribute tempX_crit_hyst is read-write,
93
+
while tempX_max_hyst is read only. All other attributes are read only.
94
+
95
+
======================= ==================================================
96
+
temp[1-5]_label User name for channel.
97
+
temp[1-5]_input Measured temperature for channel.
98
+
99
+
temp[1-5]_crit Critical temperature limit.
100
+
temp[1-5]_crit_alarm Critical temperature limit alarm.
101
+
temp[1-5]_crit_hyst Critical temperature limit hysteresis.
102
+
103
+
temp[1-5]_max High temperature limit.
104
+
temp[1-5]_max_alarm High temperature limit alarm.
105
+
temp[1-5]_max_hyst High temperature limit hysteresis.
106
+
107
+
temp[1-5]_min Low temperature limit.
108
+
temp[1-5]_min_alarm Low temperature limit alarm.
109
+
110
+
update_interval The interval at which the chip will update readings.
111
+
======================= ==================================================
+37
-3
Documentation/hwmon/tmp102.rst
+37
-3
Documentation/hwmon/tmp102.rst
···
11
11
12
12
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp102.html
13
13
14
+
* Texas Instruments TMP110
15
+
16
+
Prefix: 'tmp110'
17
+
18
+
Addresses scanned: none
19
+
20
+
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp110.html
21
+
22
+
* Texas Instruments TMP113
23
+
24
+
Prefix: 'tmp113'
25
+
26
+
Addresses scanned: none
27
+
28
+
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp113.html
29
+
14
30
Author:
15
31
16
32
Steven King <sfking@fdwdc.com>
···
41
25
operating temperature has a minimum of -55 C and a maximum of +150 C.
42
26
43
27
The TMP102 has a programmable update rate that can select between 8, 4, 1, and
44
-
0.5 Hz. (Currently the driver only supports the default of 4 Hz).
28
+
0.25 Hz.
45
29
46
-
The driver provides the common sysfs-interface for temperatures (see
47
-
Documentation/hwmon/sysfs-interface.rst under Temperatures).
30
+
The TMP110 and TMP113 are software compatible with TMP102, but have different
31
+
accuracy (maximum error) specifications. The TMP110 has an accuracy (maximum error)
32
+
of 1.0 degree, TMP113 has an accuracy (maximum error) of 0.3 degree, while TMP102
33
+
has an accuracy (maximum error) of 2.0 degree.
34
+
35
+
sysfs-Interface
36
+
---------------
37
+
38
+
The following list includes the sysfs attributes that the driver provides, their
39
+
permissions and a short description:
40
+
41
+
=============================== ======= ===========================================
42
+
Name Perm Description
43
+
=============================== ======= ===========================================
44
+
temp1_input: RO Temperature input
45
+
temp1_label: RO Descriptive name for the sensor
46
+
temp1_max: RW Maximum temperature
47
+
temp1_max_hyst: RW Maximum hysteresis temperature
48
+
update_interval RW Update conversions interval in milliseconds
49
+
=============================== ======= ===========================================
+138
Documentation/hwmon/yogafan.rst
+138
Documentation/hwmon/yogafan.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0-only
2
+
3
+
===============================================================================================
4
+
Kernel driver yogafan
5
+
===============================================================================================
6
+
7
+
Supported chips:
8
+
9
+
* Lenovo Yoga, Legion, IdeaPad, Slim, Flex, and LOQ Embedded Controllers
10
+
* Prefix: 'yogafan'
11
+
* Addresses: ACPI handle (See Database Below)
12
+
13
+
Author: Sergio Melas <sergiomelas@gmail.com>
14
+
15
+
Description
16
+
-----------
17
+
18
+
This driver provides fan speed monitoring for modern Lenovo consumer laptops.
19
+
Most Lenovo laptops do not provide fan tachometer data through standard
20
+
ISA/LPC hardware monitoring chips. Instead, the data is stored in the
21
+
Embedded Controller (EC) and exposed via ACPI.
22
+
23
+
The driver implements a **Rate-Limited Lag (RLLag)** filter to handle
24
+
the low-resolution and jittery sampling found in Lenovo EC firmware.
25
+
26
+
Hardware Identification and Multiplier Logic
27
+
--------------------------------------------
28
+
29
+
The driver supports two distinct EC architectures. Differentiation is handled
30
+
deterministically via a DMI Product Family quirk table during the probe phase,
31
+
eliminating the need for runtime heuristics.
32
+
33
+
1. 8-bit EC Architecture (Multiplier: 100)
34
+
35
+
- **Families:** Yoga, IdeaPad, Slim, Flex.
36
+
- **Technical Detail:** These models allocate a single 8-bit register for
37
+
tachometer data. Since 8-bit fields are limited to a value of 255, the
38
+
BIOS stores fan speed in units of 100 RPM (e.g., 42 = 4200 RPM).
39
+
40
+
2. 16-bit EC Architecture (Multiplier: 1)
41
+
42
+
- **Families:** Legion, LOQ.
43
+
- **Technical Detail:** High-performance gaming models require greater
44
+
precision for fans exceeding 6000 RPM. These use a 16-bit word (2 bytes)
45
+
storing the raw RPM value directly.
46
+
47
+
Filter Details
48
+
--------------
49
+
50
+
The RLLag filter is a passive discrete-time first-order lag model that ensures:
51
+
- **Smoothing:** Low-resolution step increments are smoothed into 1-RPM increments.
52
+
- **Slew-Rate Limiting:** Prevents unrealistic readings by capping the change
53
+
to 1500 RPM/s, matching physical fan inertia.
54
+
- **Polling Independence:** The filter math scales based on the time delta
55
+
between userspace reads, ensuring a consistent physical curve regardless
56
+
of polling frequency.
57
+
58
+
Suspend and Resume
59
+
------------------
60
+
61
+
The driver utilizes the boottime clock (ktime_get_boottime()) to calculate the
62
+
sampling delta. This ensures that time spent in system suspend is accounted
63
+
for. If the delta exceeds 5 seconds (e.g., after waking the laptop), the
64
+
filter automatically resets to the current hardware value to prevent
65
+
reporting "ghost" RPM data from before the sleep state.
66
+
67
+
Usage
68
+
-----
69
+
70
+
The driver exposes standard hwmon sysfs attributes:
71
+
72
+
=============== ============================
73
+
Attribute Description
74
+
fanX_input Filtered fan speed in RPM.
75
+
=============== ============================
76
+
77
+
78
+
Note: If the hardware reports 0 RPM, the filter is bypassed and 0 is reported
79
+
immediately to ensure the user knows the fan has stopped.
80
+
81
+
82
+
====================================================================================================
83
+
LENOVO FAN CONTROLLER: MASTER REFERENCE DATABASE (2026)
84
+
====================================================================================================
85
+
86
+
::
87
+
88
+
MODEL (DMI PN) | FAMILY / SERIES | EC OFFSET | FULL ACPI OBJECT PATH | WIDTH | MULTiplier
89
+
----------------------------------------------------------------------------------------------------
90
+
82N7 | Yoga 14cACN | 0x06 | \_SB.PCI0.LPC0.EC0.FANS | 8-bit | 100
91
+
80V2 / 81C3 | Yoga 710/720 | 0x06 | \_SB.PCI0.LPC0.EC0.FAN0 | 8-bit | 100
92
+
83E2 / 83DN | Yoga Pro 7/9 | 0xFE | \_SB.PCI0.LPC0.EC0.FANS | 8-bit | 100
93
+
82A2 / 82A3 | Yoga Slim 7 | 0x06 | \_SB.PCI0.LPC0.EC0.FANS | 8-bit | 100
94
+
81YM / 82FG | IdeaPad 5 | 0x06 | \_SB.PCI0.LPC0.EC0.FAN0 | 8-bit | 100
95
+
82JW / 82JU | Legion 5 (AMD) | 0xFE/0xFF | \_SB.PCI0.LPC0.EC0.FANS (Fan1) | 16-bit | 1
96
+
82JW / 82JU | Legion 5 (AMD) | 0xFE/0xFF | \_SB.PCI0.LPC0.EC0.FA2S (Fan2) | 16-bit | 1
97
+
82WQ | Legion 7i (Int) | 0xFE/0xFF | \_SB.PCI0.LPC0.EC0.FANS (Fan1) | 16-bit | 1
98
+
82WQ | Legion 7i (Int) | 0xFE/0xFF | \_SB.PCI0.LPC0.EC0.FA2S (Fan2) | 16-bit | 1
99
+
82XV / 83DV | LOQ 15/16 | 0xFE/0xFF | \_SB.PCI0.LPC0.EC0.FANS /FA2S | 16-bit | 1
100
+
83AK | ThinkBook G6 | 0x06 | \_SB.PCI0.LPC0.EC0.FAN0 | 8-bit | 100
101
+
81X1 | Flex 5 | 0x06 | \_SB.PCI0.LPC0.EC0.FAN0 | 8-bit | 100
102
+
*Legacy* | Pre-2020 Models | 0x06 | \_SB.PCI0.LPC.EC.FAN0 | 8-bit | 100
103
+
----------------------------------------------------------------------------------------------------
104
+
105
+
METHODOLOGY & IDENTIFICATION:
106
+
107
+
1. DSDT ANALYSIS (THE PATH):
108
+
BIOS ACPI tables were analyzed using 'iasl' and cross-referenced with
109
+
public dumps. Internal labels (FANS, FAN0, FA2S) are mapped to
110
+
EmbeddedControl OperationRegion offsets.
111
+
112
+
2. EC MEMORY MAPPING (THE OFFSET):
113
+
Validated by matching NBFC (NoteBook FanControl) XML logic with DSDT Field
114
+
definitions found in BIOS firmware.
115
+
116
+
3. DATA-WIDTH ANALYSIS (THE MULTIPLIER):
117
+
- 8-bit (Multiplier 100): Standard for Yoga/IdeaPad. Raw values (0-255).
118
+
- 16-bit (Multiplier 1): Standard for Legion/LOQ. Two registers (0xFE/0xFF).
119
+
120
+
121
+
References
122
+
----------
123
+
124
+
1. **ACPI Specification (Field Objects):** Documentation on how 8-bit vs 16-bit
125
+
fields are accessed in OperationRegions.
126
+
https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#field-objects
127
+
128
+
2. **NBFC Projects:** Community-driven reverse engineering
129
+
of Lenovo Legion/LOQ EC memory maps (16-bit raw registers).
130
+
https://github.com/hirschmann/nbfc/tree/master/Configs
131
+
132
+
3. **Linux Kernel Timekeeping API:** Documentation for ktime_get_boottime() and
133
+
handling deltas across suspend states.
134
+
https://www.kernel.org/doc/html/latest/core-api/timekeeping.html
135
+
136
+
4. **Lenovo IdeaPad Laptop Driver:** Reference for DMI-based hardware
137
+
feature gating in Lenovo laptops.
138
+
https://github.com/torvalds/linux/blob/master/drivers/platform/x86/ideapad-laptop.c
+23
MAINTAINERS
+23
MAINTAINERS
···
14498
14498
F: drivers/pinctrl/pinctrl-pef2256.c
14499
14499
F: include/linux/framer/
14500
14500
14501
+
LATTEPANDA SIGMA EC HARDWARE MONITOR DRIVER
14502
+
M: Mariano Abad <weimaraner@gmail.com>
14503
+
L: linux-hwmon@vger.kernel.org
14504
+
S: Maintained
14505
+
F: Documentation/hwmon/lattepanda-sigma-ec.rst
14506
+
F: drivers/hwmon/lattepanda-sigma-ec.c
14507
+
14501
14508
LASI 53c700 driver for PARISC
14502
14509
M: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
14503
14510
L: linux-scsi@vger.kernel.org
···
14953
14946
W: https://linuxtv.org
14954
14947
Q: http://patchwork.linuxtv.org/project/linux-media/list/
14955
14948
F: drivers/media/usb/dvb-usb-v2/lmedm04*
14949
+
14950
+
LENOVO YOGA FAN DRIVER
14951
+
M: Sergio Melas <sergiomelas@gmail.com>
14952
+
L: linux-hwmon@vger.kernel.org
14953
+
S: Maintained
14954
+
W: https://github.com/sergiomelas
14955
+
F: Documentation/hwmon/yogafan.rst
14956
+
F: drivers/hwmon/yogafan.c
14956
14957
14957
14958
LOADPIN SECURITY MODULE
14958
14959
M: Kees Cook <kees@kernel.org>
···
17440
17425
S: Maintained
17441
17426
F: Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml
17442
17427
F: drivers/iio/adc/mcp3911.c
17428
+
17429
+
MICROCHIP MCP9982 TEMPERATURE DRIVER
17430
+
M: Victor Duicu <victor.duicu@microchip.com>
17431
+
L: linux-hwmon@vger.kernel.org
17432
+
S: Supported
17433
+
F: Documentation/devicetree/bindings/hwmon/microchip,mcp9982.yaml
17434
+
F: Documentation/hwmon/mcp9982.rst
17435
+
F: drivers/hwmon/mcp9982.c
17443
17436
17444
17437
MICROCHIP MMC/SD/SDIO MCI DRIVER
17445
17438
M: Aubin Constans <aubin.constans@microchip.com>
+46
-33
drivers/hwmon/Kconfig
+46
-33
drivers/hwmon/Kconfig
···
457
457
This driver can also be built as a module. If so, the module
458
458
will be called atxp1.
459
459
460
-
config SENSORS_BT1_PVT
461
-
tristate "Baikal-T1 Process, Voltage, Temperature sensor driver"
462
-
depends on MIPS_BAIKAL_T1 || COMPILE_TEST
463
-
select POLYNOMIAL
464
-
help
465
-
If you say yes here you get support for Baikal-T1 PVT sensor
466
-
embedded into the SoC.
467
-
468
-
This driver can also be built as a module. If so, the module will be
469
-
called bt1-pvt.
470
-
471
-
config SENSORS_BT1_PVT_ALARMS
472
-
bool "Enable Baikal-T1 PVT sensor alarms"
473
-
depends on SENSORS_BT1_PVT
474
-
help
475
-
Baikal-T1 PVT IP-block provides threshold registers for each
476
-
supported sensor. But the corresponding interrupts might be
477
-
generated by the thresholds comparator only in synchronization with
478
-
a data conversion. Additionally there is only one sensor data can
479
-
be converted at a time. All of these makes the interface impossible
480
-
to be used for the hwmon alarms implementation without periodic
481
-
switch between the PVT sensors. By default the data conversion is
482
-
performed on demand from the user-space. If this config is enabled
483
-
the data conversion will be periodically performed and the data will be
484
-
saved in the internal driver cache.
485
-
486
460
config SENSORS_CGBC
487
461
tristate "Congatec Board Controller Sensors"
488
462
depends on MFD_CGBC
···
606
632
607
633
config SENSORS_SPARX5
608
634
tristate "Sparx5 SoC temperature sensor"
609
-
depends on ARCH_SPARX5 || COMPILE_TEST
635
+
depends on ARCH_SPARX5 || ARCH_LAN969X || COMPILE_TEST
610
636
help
611
637
If you say yes here you get support for temperature monitoring
612
638
with the Microchip Sparx5 SoC.
···
775
801
776
802
config SENSORS_GPIO_FAN
777
803
tristate "GPIO fan"
778
-
depends on OF_GPIO
779
804
depends on GPIOLIB || COMPILE_TEST
780
805
depends on THERMAL || THERMAL=n
781
806
help
···
909
936
If you say yes here you get support for ITE IT8705F, IT8712F, IT8716F,
910
937
IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8732F, IT8758E,
911
938
IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F, IT8786E, IT8790E,
912
-
IT8603E, IT8620E, IT8623E, and IT8628E sensor chips, and the SiS950
913
-
clone.
939
+
IT8603E, IT8620E, IT8623E, IT8628E, and IT8689E sensor chips, and
940
+
the SiS950 clone.
914
941
915
942
This driver can also be built as a module. If so, the module
916
943
will be called it87.
···
962
989
963
990
This driver can also be built as a module. If so, the module
964
991
will be called lan966x-hwmon.
992
+
993
+
config SENSORS_LATTEPANDA_SIGMA_EC
994
+
tristate "LattePanda Sigma EC hardware monitoring"
995
+
depends on X86
996
+
depends on DMI
997
+
depends on HAS_IOPORT
998
+
help
999
+
If you say yes here you get support for the hardware monitoring
1000
+
features of the Embedded Controller on LattePanda Sigma
1001
+
single-board computers, including CPU fan speed (RPM) and
1002
+
board and CPU temperatures.
1003
+
1004
+
The driver reads the EC directly via ACPI EC I/O ports and
1005
+
uses DMI matching to ensure it only loads on supported hardware.
1006
+
1007
+
This driver can also be built as a module. If so, the module
1008
+
will be called lattepanda-sigma-ec.
965
1009
966
1010
config SENSORS_LENOVO_EC
967
1011
tristate "Sensor reader for Lenovo ThinkStations"
···
1377
1387
1378
1388
This driver can also be built as a module. If so, the module
1379
1389
will be called mcp3021.
1390
+
1391
+
config SENSORS_MCP9982
1392
+
tristate "Microchip Technology MCP9982 driver"
1393
+
depends on I2C
1394
+
select REGMAP_I2C
1395
+
help
1396
+
Say yes here to include support for Microchip Technology's MCP998X/33
1397
+
and MCP998XD/33D Multichannel Automotive Temperature Monitor Family.
1398
+
1399
+
This driver can also be built as a module. If so, the module
1400
+
will be called mcp9982.
1380
1401
1381
1402
config SENSORS_MLXREG_FAN
1382
1403
tristate "Mellanox FAN driver"
···
2274
2273
select REGMAP_I2C
2275
2274
help
2276
2275
If you say yes here you get support for INA219, INA220, INA226,
2277
-
INA230, INA231, INA260, and SY24655 power monitor chips.
2276
+
INA230, INA231, INA234, INA260, and SY24655 power monitor chips.
2278
2277
2279
2278
The INA2xx driver is configured for the default configuration of
2280
2279
the part as described in the datasheet.
···
2363
2362
depends on I2C
2364
2363
select REGMAP_I2C
2365
2364
help
2366
-
If you say yes here you get support for Texas Instruments TMP102
2367
-
sensor chips.
2365
+
If you say yes here you get support for Texas Instruments TMP102,
2366
+
TMP110 and TMP113 sensor chips.
2368
2367
2369
2368
This driver can also be built as a module. If so, the module
2370
2369
will be called tmp102.
···
2661
2660
help
2662
2661
If you say yes here you get support for the temperature
2663
2662
and power sensors for APM X-Gene SoC.
2663
+
2664
+
config SENSORS_YOGAFAN
2665
+
tristate "Lenovo Yoga Fan Hardware Monitoring"
2666
+
depends on ACPI && HWMON && DMI
2667
+
help
2668
+
If you say yes here you get support for fan speed monitoring
2669
+
on Lenovo Yoga, Legion, IdeaPad, Slim and LOQ laptops.
2670
+
The driver interfaces with the Embedded Controller via ACPI
2671
+
and uses a Rate-Limited Lag filter to smooth RPM readings.
2672
+
2673
+
This driver can also be built as a module. If so, the module
2674
+
will be called yogafan.
2664
2675
2665
2676
config SENSORS_INTEL_M10_BMC_HWMON
2666
2677
tristate "Intel MAX10 BMC Hardware Monitoring"
+3
-1
drivers/hwmon/Makefile
+3
-1
drivers/hwmon/Makefile
···
58
58
obj-$(CONFIG_SENSORS_ASUS_ROG_RYUJIN) += asus_rog_ryujin.o
59
59
obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o
60
60
obj-$(CONFIG_SENSORS_AXI_FAN_CONTROL) += axi-fan-control.o
61
-
obj-$(CONFIG_SENSORS_BT1_PVT) += bt1-pvt.o
62
61
obj-$(CONFIG_SENSORS_CGBC) += cgbc-hwmon.o
63
62
obj-$(CONFIG_SENSORS_CHIPCAP2) += chipcap2.o
64
63
obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o
···
113
114
obj-$(CONFIG_SENSORS_KBATT) += kbatt.o
114
115
obj-$(CONFIG_SENSORS_KFAN) += kfan.o
115
116
obj-$(CONFIG_SENSORS_LAN966X) += lan966x-hwmon.o
117
+
obj-$(CONFIG_SENSORS_LATTEPANDA_SIGMA_EC) += lattepanda-sigma-ec.o
116
118
obj-$(CONFIG_SENSORS_LENOVO_EC) += lenovo-ec-sensors.o
117
119
obj-$(CONFIG_SENSORS_LINEAGE) += lineage-pem.o
118
120
obj-$(CONFIG_SENSORS_LOCHNAGAR) += lochnagar-hwmon.o
···
170
170
obj-$(CONFIG_SENSORS_MC33XS2410) += mc33xs2410_hwmon.o
171
171
obj-$(CONFIG_SENSORS_MC34VR500) += mc34vr500.o
172
172
obj-$(CONFIG_SENSORS_MCP3021) += mcp3021.o
173
+
obj-$(CONFIG_SENSORS_MCP9982) += mcp9982.o
173
174
obj-$(CONFIG_SENSORS_TC654) += tc654.o
174
175
obj-$(CONFIG_SENSORS_TPS23861) += tps23861.o
175
176
obj-$(CONFIG_SENSORS_MLXREG_FAN) += mlxreg-fan.o
···
246
245
obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o
247
246
obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o
248
247
obj-$(CONFIG_SENSORS_XGENE) += xgene-hwmon.o
248
+
obj-$(CONFIG_SENSORS_YOGAFAN) += yogafan.o
249
249
250
250
obj-$(CONFIG_SENSORS_OCC) += occ/
251
251
obj-$(CONFIG_SENSORS_PECI) += peci/
+45
-51
drivers/hwmon/acpi_power_meter.c
+45
-51
drivers/hwmon/acpi_power_meter.c
···
18
18
#include <linux/time.h>
19
19
#include <linux/err.h>
20
20
#include <linux/acpi.h>
21
+
#include <linux/platform_device.h>
21
22
22
23
#define ACPI_POWER_METER_NAME "power_meter"
23
24
#define ACPI_POWER_METER_DEVICE_NAME "Power Meter"
···
815
814
}
816
815
817
816
/* Handle ACPI event notifications */
818
-
static void acpi_power_meter_notify(struct acpi_device *device, u32 event)
817
+
static void acpi_power_meter_notify(acpi_handle handle, u32 event, void *data)
819
818
{
820
-
struct acpi_power_meter_resource *resource;
819
+
struct device *dev = data;
820
+
struct acpi_power_meter_resource *resource = dev_get_drvdata(dev);
821
821
int res;
822
-
823
-
if (!device || !acpi_driver_data(device))
824
-
return;
825
-
826
-
resource = acpi_driver_data(device);
827
822
828
823
guard(mutex)(&acpi_notify_lock);
829
824
···
834
837
remove_domain_devices(resource);
835
838
res = read_capabilities(resource);
836
839
if (res)
837
-
dev_err_once(&device->dev, "read capabilities failed.\n");
840
+
dev_err_once(dev, "read capabilities failed.\n");
838
841
res = read_domain_devices(resource);
839
842
if (res && res != -ENODEV)
840
-
dev_err_once(&device->dev, "read domain devices failed.\n");
843
+
dev_err_once(dev, "read domain devices failed.\n");
841
844
842
845
mutex_unlock(&resource->lock);
843
846
844
847
resource->hwmon_dev =
845
-
hwmon_device_register_with_info(&device->dev,
848
+
hwmon_device_register_with_info(dev,
846
849
ACPI_POWER_METER_NAME,
847
850
resource,
848
851
&power_meter_chip_info,
849
852
power_extra_groups);
850
853
if (IS_ERR(resource->hwmon_dev))
851
-
dev_err_once(&device->dev, "register hwmon device failed.\n");
854
+
dev_err_once(dev, "register hwmon device failed.\n");
852
855
853
856
break;
854
857
case METER_NOTIFY_TRIP:
855
-
sysfs_notify(&device->dev.kobj, NULL, POWER_AVERAGE_NAME);
858
+
sysfs_notify(&dev->kobj, NULL, POWER_AVERAGE_NAME);
856
859
break;
857
860
case METER_NOTIFY_CAP:
858
861
mutex_lock(&resource->lock);
859
862
res = update_cap(resource);
860
863
if (res)
861
-
dev_err_once(&device->dev, "update cap failed when capping value is changed.\n");
864
+
dev_err_once(dev, "update cap failed when capping value is changed.\n");
862
865
mutex_unlock(&resource->lock);
863
-
sysfs_notify(&device->dev.kobj, NULL, POWER_CAP_NAME);
866
+
sysfs_notify(&dev->kobj, NULL, POWER_CAP_NAME);
864
867
break;
865
868
case METER_NOTIFY_INTERVAL:
866
-
sysfs_notify(&device->dev.kobj, NULL, POWER_AVG_INTERVAL_NAME);
869
+
sysfs_notify(&dev->kobj, NULL, POWER_AVG_INTERVAL_NAME);
867
870
break;
868
871
case METER_NOTIFY_CAPPING:
869
872
mutex_lock(&resource->lock);
870
873
resource->power_alarm = true;
871
874
mutex_unlock(&resource->lock);
872
-
sysfs_notify(&device->dev.kobj, NULL, POWER_ALARM_NAME);
873
-
dev_info(&device->dev, "Capping in progress.\n");
875
+
sysfs_notify(&dev->kobj, NULL, POWER_ALARM_NAME);
876
+
dev_info(dev, "Capping in progress.\n");
874
877
break;
875
878
default:
876
879
WARN(1, "Unexpected event %d\n", event);
···
878
881
}
879
882
880
883
acpi_bus_generate_netlink_event(ACPI_POWER_METER_CLASS,
881
-
dev_name(&device->dev), event, 0);
884
+
dev_name(&resource->acpi_dev->dev),
885
+
event, 0);
882
886
}
883
887
884
-
static int acpi_power_meter_add(struct acpi_device *device)
888
+
static int acpi_power_meter_probe(struct platform_device *pdev)
885
889
{
886
-
int res;
890
+
struct acpi_device *device = ACPI_COMPANION(&pdev->dev);
887
891
struct acpi_power_meter_resource *resource;
888
-
889
-
if (!device)
890
-
return -EINVAL;
892
+
int res;
891
893
892
894
resource = kzalloc_obj(*resource);
893
895
if (!resource)
···
897
901
mutex_init(&resource->lock);
898
902
strscpy(acpi_device_name(device), ACPI_POWER_METER_DEVICE_NAME);
899
903
strscpy(acpi_device_class(device), ACPI_POWER_METER_CLASS);
900
-
device->driver_data = resource;
904
+
905
+
platform_set_drvdata(pdev, resource);
901
906
902
907
#if IS_REACHABLE(CONFIG_ACPI_IPMI)
903
908
/*
···
911
914
struct acpi_device *ipi_device = acpi_dev_get_first_match_dev("IPI0001", NULL, -1);
912
915
913
916
if (ipi_device && acpi_wait_for_acpi_ipmi())
914
-
dev_warn(&device->dev, "Waiting for ACPI IPMI timeout");
917
+
dev_warn(&pdev->dev, "Waiting for ACPI IPMI timeout");
915
918
acpi_dev_put(ipi_device);
916
919
}
917
920
#endif
···
929
932
goto exit_free_capability;
930
933
931
934
resource->hwmon_dev =
932
-
hwmon_device_register_with_info(&device->dev,
935
+
hwmon_device_register_with_info(&pdev->dev,
933
936
ACPI_POWER_METER_NAME, resource,
934
937
&power_meter_chip_info,
935
938
power_extra_groups);
···
938
941
goto exit_remove;
939
942
}
940
943
944
+
res = acpi_dev_install_notify_handler(device, ACPI_DEVICE_NOTIFY,
945
+
acpi_power_meter_notify, &pdev->dev);
946
+
if (res)
947
+
goto exit_hwmon;
948
+
941
949
res = 0;
942
950
goto exit;
943
951
952
+
exit_hwmon:
953
+
hwmon_device_unregister(resource->hwmon_dev);
944
954
exit_remove:
945
955
remove_domain_devices(resource);
946
956
exit_free_capability:
···
958
954
return res;
959
955
}
960
956
961
-
static void acpi_power_meter_remove(struct acpi_device *device)
957
+
static void acpi_power_meter_remove(struct platform_device *pdev)
962
958
{
963
-
struct acpi_power_meter_resource *resource;
959
+
struct acpi_power_meter_resource *resource = platform_get_drvdata(pdev);
964
960
965
-
if (!device || !acpi_driver_data(device))
966
-
return;
961
+
acpi_dev_remove_notify_handler(resource->acpi_dev, ACPI_DEVICE_NOTIFY,
962
+
acpi_power_meter_notify);
967
963
968
-
resource = acpi_driver_data(device);
969
964
if (!IS_ERR(resource->hwmon_dev))
970
965
hwmon_device_unregister(resource->hwmon_dev);
971
966
···
976
973
977
974
static int acpi_power_meter_resume(struct device *dev)
978
975
{
979
-
struct acpi_power_meter_resource *resource;
980
-
981
-
if (!dev)
982
-
return -EINVAL;
983
-
984
-
resource = acpi_driver_data(to_acpi_device(dev));
985
-
if (!resource)
986
-
return -EINVAL;
976
+
struct acpi_power_meter_resource *resource = dev_get_drvdata(dev);
987
977
988
978
free_capabilities(resource);
989
979
read_capabilities(resource);
···
987
991
static DEFINE_SIMPLE_DEV_PM_OPS(acpi_power_meter_pm, NULL,
988
992
acpi_power_meter_resume);
989
993
990
-
static struct acpi_driver acpi_power_meter_driver = {
991
-
.name = "power_meter",
992
-
.class = ACPI_POWER_METER_CLASS,
993
-
.ids = power_meter_ids,
994
-
.ops = {
995
-
.add = acpi_power_meter_add,
996
-
.remove = acpi_power_meter_remove,
997
-
.notify = acpi_power_meter_notify,
998
-
},
999
-
.drv.pm = pm_sleep_ptr(&acpi_power_meter_pm),
994
+
static struct platform_driver acpi_power_meter_driver = {
995
+
.probe = acpi_power_meter_probe,
996
+
.remove = acpi_power_meter_remove,
997
+
.driver = {
998
+
.name = "acpi-power-meter",
999
+
.acpi_match_table = power_meter_ids,
1000
+
.pm = &acpi_power_meter_pm,
1001
+
},
1000
1002
};
1001
1003
1002
1004
/* Module init/exit routines */
···
1023
1029
1024
1030
dmi_check_system(pm_dmi_table);
1025
1031
1026
-
result = acpi_bus_register_driver(&acpi_power_meter_driver);
1032
+
result = platform_driver_register(&acpi_power_meter_driver);
1027
1033
if (result < 0)
1028
1034
return result;
1029
1035
···
1032
1038
1033
1039
static void __exit acpi_power_meter_exit(void)
1034
1040
{
1035
-
acpi_bus_unregister_driver(&acpi_power_meter_driver);
1041
+
platform_driver_unregister(&acpi_power_meter_driver);
1036
1042
}
1037
1043
1038
1044
MODULE_AUTHOR("Darrick J. Wong <darrick.wong@oracle.com>");
+2
-2
drivers/hwmon/ads7828.c
+2
-2
drivers/hwmon/ads7828.c
···
62
62
if (err < 0)
63
63
return err;
64
64
65
-
return sprintf(buf, "%d\n",
66
-
DIV_ROUND_CLOSEST(regval * data->lsb_resol, 1000));
65
+
return sysfs_emit(buf, "%d\n",
66
+
DIV_ROUND_CLOSEST(regval * data->lsb_resol, 1000));
67
67
}
68
68
69
69
static SENSOR_DEVICE_ATTR_RO(in0_input, ads7828_in, 0);
+13
-5
drivers/hwmon/ads7871.c
+13
-5
drivers/hwmon/ads7871.c
···
104
104
*/
105
105
/*MUX_M3_BM forces single ended*/
106
106
/*This is also where the gain of the PGA would be set*/
107
-
ads7871_write_reg8(spi, REG_GAIN_MUX,
108
-
(MUX_CNV_BM | MUX_M3_BM | channel));
107
+
ret = ads7871_write_reg8(spi, REG_GAIN_MUX,
108
+
(MUX_CNV_BM | MUX_M3_BM | channel));
109
+
if (ret < 0)
110
+
return ret;
109
111
110
112
ret = ads7871_read_reg8(spi, REG_GAIN_MUX);
113
+
if (ret < 0)
114
+
return ret;
111
115
mux_cnv = ((ret & MUX_CNV_BM) >> MUX_CNV_BV);
112
116
/*
113
117
* on 400MHz arm9 platform the conversion
···
120
116
while ((i < 2) && mux_cnv) {
121
117
i++;
122
118
ret = ads7871_read_reg8(spi, REG_GAIN_MUX);
119
+
if (ret < 0)
120
+
return ret;
123
121
mux_cnv = ((ret & MUX_CNV_BM) >> MUX_CNV_BV);
124
122
msleep_interruptible(1);
125
123
}
126
124
127
125
if (mux_cnv == 0) {
128
126
val = ads7871_read_reg16(spi, REG_LS_BYTE);
127
+
if (val < 0)
128
+
return val;
129
129
/*result in volts*10000 = (val/8192)*2.5*10000*/
130
130
val = ((val >> 2) * 25000) / 8192;
131
-
return sprintf(buf, "%d\n", val);
132
-
} else {
133
-
return -1;
131
+
return sysfs_emit(buf, "%d\n", val);
134
132
}
133
+
134
+
return -ETIMEDOUT;
135
135
}
136
136
137
137
static SENSOR_DEVICE_ATTR_RO(in0_input, voltage, 0);
+10
drivers/hwmon/aht10.c
+10
drivers/hwmon/aht10.c
···
62
62
};
63
63
MODULE_DEVICE_TABLE(i2c, aht10_id);
64
64
65
+
static const struct of_device_id aht10_of_match[] = {
66
+
{ .compatible = "aosong,aht10", .data = (void *)aht10 },
67
+
{ .compatible = "aosong,aht20", .data = (void *)aht20 },
68
+
{ .compatible = "aosong,dht20", .data = (void *)dht20 },
69
+
{}
70
+
};
71
+
72
+
MODULE_DEVICE_TABLE(of, aht10_of_match);
73
+
65
74
/**
66
75
* struct aht10_data - All the data required to operate an AHT10/AHT20 chip
67
76
* @client: the i2c client associated with the AHT10/AHT20
···
386
377
static struct i2c_driver aht10_driver = {
387
378
.driver = {
388
379
.name = "aht10",
380
+
.of_match_table = aht10_of_match,
389
381
},
390
382
.probe = aht10_probe,
391
383
.id_table = aht10_id,
-8
drivers/hwmon/aspeed-g6-pwm-tach.c
-8
drivers/hwmon/aspeed-g6-pwm-tach.c
···
517
517
return 0;
518
518
}
519
519
520
-
static void aspeed_pwm_tach_remove(struct platform_device *pdev)
521
-
{
522
-
struct aspeed_pwm_tach_data *priv = platform_get_drvdata(pdev);
523
-
524
-
reset_control_assert(priv->reset);
525
-
}
526
-
527
520
static const struct of_device_id aspeed_pwm_tach_match[] = {
528
521
{
529
522
.compatible = "aspeed,ast2600-pwm-tach",
···
530
537
531
538
static struct platform_driver aspeed_pwm_tach_driver = {
532
539
.probe = aspeed_pwm_tach_probe,
533
-
.remove = aspeed_pwm_tach_remove,
534
540
.driver = {
535
541
.name = "aspeed-g6-pwm-tach",
536
542
.of_match_table = aspeed_pwm_tach_match,
+29
drivers/hwmon/asus-ec-sensors.c
+29
drivers/hwmon/asus-ec-sensors.c
···
456
456
.family = family_amd_500_series,
457
457
};
458
458
459
+
static const struct ec_board_info board_info_crosshair_x670e_extreme = {
460
+
.sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
461
+
SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
462
+
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_WATER_IN |
463
+
SENSOR_TEMP_WATER_OUT,
464
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
465
+
.family = family_amd_600_series,
466
+
};
467
+
459
468
static const struct ec_board_info board_info_crosshair_x670e_gene = {
460
469
.sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
461
470
SENSOR_TEMP_T_SENSOR |
···
635
626
.family = family_amd_800_series,
636
627
};
637
628
629
+
static const struct ec_board_info board_info_strix_x470_f_gaming = {
630
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
631
+
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
632
+
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
633
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
634
+
.family = family_amd_400_series,
635
+
};
636
+
638
637
static const struct ec_board_info board_info_strix_x470_i_gaming = {
639
638
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
640
639
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
···
767
750
.family = family_intel_700_series,
768
751
};
769
752
753
+
static const struct ec_board_info board_info_strix_z790_h_gaming_wifi = {
754
+
.sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
755
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
756
+
.family = family_intel_700_series,
757
+
};
758
+
770
759
static const struct ec_board_info board_info_strix_z790_i_gaming_wifi = {
771
760
.sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_T_SENSOR_2 |
772
761
SENSOR_TEMP_VRM,
···
848
825
&board_info_crosshair_viii_hero),
849
826
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT",
850
827
&board_info_crosshair_viii_impact),
828
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E EXTREME",
829
+
&board_info_crosshair_x670e_extreme),
851
830
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E GENE",
852
831
&board_info_crosshair_x670e_gene),
853
832
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E HERO",
···
870
845
&board_info_strix_b650e_i_gaming),
871
846
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B850-I GAMING WIFI",
872
847
&board_info_strix_b850_i_gaming_wifi),
848
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-F GAMING",
849
+
&board_info_strix_x470_f_gaming),
873
850
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-I GAMING",
874
851
&board_info_strix_x470_i_gaming),
875
852
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING",
···
904
877
&board_info_strix_z690_e_gaming_wifi),
905
878
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-E GAMING WIFI II",
906
879
&board_info_strix_z790_e_gaming_wifi_ii),
880
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-H GAMING WIFI",
881
+
&board_info_strix_z790_h_gaming_wifi),
907
882
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-I GAMING WIFI",
908
883
&board_info_strix_z790_i_gaming_wifi),
909
884
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME",
+46
-46
drivers/hwmon/asus_atk0110.c
+46
-46
drivers/hwmon/asus_atk0110.c
···
17
17
#include <linux/jiffies.h>
18
18
#include <linux/err.h>
19
19
#include <linux/acpi.h>
20
+
#include <linux/platform_device.h>
20
21
#include <linux/string_choices.h>
21
22
22
23
#define ATK_HID "ATK0110"
···
108
107
struct atk_data {
109
108
struct device *hwmon_dev;
110
109
acpi_handle atk_handle;
111
-
struct acpi_device *acpi_dev;
110
+
struct device *dev;
112
111
113
112
bool old_interface;
114
113
···
188
187
u32 param2;
189
188
};
190
189
191
-
static int atk_add(struct acpi_device *device);
192
-
static void atk_remove(struct acpi_device *device);
190
+
static int atk_probe(struct platform_device *pdev);
191
+
static void atk_remove(struct platform_device *pdev);
193
192
static void atk_print_sensor(struct atk_data *data, union acpi_object *obj);
194
193
static int atk_read_value(struct atk_sensor_data *sensor, u64 *value);
195
194
196
-
static struct acpi_driver atk_driver = {
197
-
.name = ATK_HID,
198
-
.class = "hwmon",
199
-
.ids = atk_ids,
200
-
.ops = {
201
-
.add = atk_add,
202
-
.remove = atk_remove,
195
+
static struct platform_driver atk_driver = {
196
+
.probe = atk_probe,
197
+
.remove = atk_remove,
198
+
.driver = {
199
+
.name = ATK_HID,
200
+
.acpi_match_table = atk_ids,
203
201
},
204
202
};
205
203
···
327
327
*/
328
328
static int validate_hwmon_pack(struct atk_data *data, union acpi_object *obj)
329
329
{
330
-
struct device *dev = &data->acpi_dev->dev;
330
+
struct device *dev = data->dev;
331
331
union acpi_object *tmp;
332
332
bool old_if = data->old_interface;
333
333
int const expected_size = old_if ? _HWMON_OLD_PACK_SIZE :
···
422
422
static void atk_print_sensor(struct atk_data *data, union acpi_object *obj)
423
423
{
424
424
#ifdef DEBUG
425
-
struct device *dev = &data->acpi_dev->dev;
425
+
struct device *dev = data->dev;
426
426
union acpi_object *flags;
427
427
union acpi_object *name;
428
428
union acpi_object *limit1;
···
449
449
static int atk_read_value_old(struct atk_sensor_data *sensor, u64 *value)
450
450
{
451
451
struct atk_data *data = sensor->data;
452
-
struct device *dev = &data->acpi_dev->dev;
452
+
struct device *dev = data->dev;
453
453
struct acpi_object_list params;
454
454
union acpi_object id;
455
455
acpi_status status;
···
487
487
488
488
static union acpi_object *atk_ggrp(struct atk_data *data, u16 mux)
489
489
{
490
-
struct device *dev = &data->acpi_dev->dev;
490
+
struct device *dev = data->dev;
491
491
struct acpi_buffer buf;
492
492
acpi_status ret;
493
493
struct acpi_object_list params;
···
523
523
524
524
static union acpi_object *atk_gitm(struct atk_data *data, u64 id)
525
525
{
526
-
struct device *dev = &data->acpi_dev->dev;
526
+
struct device *dev = data->dev;
527
527
struct atk_acpi_input_buf buf;
528
528
union acpi_object tmp;
529
529
struct acpi_object_list params;
···
565
565
static union acpi_object *atk_sitm(struct atk_data *data,
566
566
struct atk_acpi_input_buf *buf)
567
567
{
568
-
struct device *dev = &data->acpi_dev->dev;
568
+
struct device *dev = data->dev;
569
569
struct acpi_object_list params;
570
570
union acpi_object tmp;
571
571
struct acpi_buffer ret;
···
602
602
static int atk_read_value_new(struct atk_sensor_data *sensor, u64 *value)
603
603
{
604
604
struct atk_data *data = sensor->data;
605
-
struct device *dev = &data->acpi_dev->dev;
605
+
struct device *dev = data->dev;
606
606
union acpi_object *obj;
607
607
struct atk_acpi_ret_buffer *buf;
608
608
int err = 0;
···
819
819
820
820
static int atk_add_sensor(struct atk_data *data, union acpi_object *obj)
821
821
{
822
-
struct device *dev = &data->acpi_dev->dev;
822
+
struct device *dev = data->dev;
823
823
union acpi_object *flags;
824
824
union acpi_object *name;
825
825
union acpi_object *limit1;
···
937
937
938
938
static int atk_enumerate_old_hwmon(struct atk_data *data)
939
939
{
940
-
struct device *dev = &data->acpi_dev->dev;
940
+
struct device *dev = data->dev;
941
941
struct acpi_buffer buf;
942
942
union acpi_object *pack;
943
943
acpi_status status;
···
1012
1012
1013
1013
static int atk_ec_present(struct atk_data *data)
1014
1014
{
1015
-
struct device *dev = &data->acpi_dev->dev;
1015
+
struct device *dev = data->dev;
1016
1016
union acpi_object *pack;
1017
1017
union acpi_object *ec;
1018
1018
int ret;
···
1058
1058
1059
1059
static int atk_ec_enabled(struct atk_data *data)
1060
1060
{
1061
-
struct device *dev = &data->acpi_dev->dev;
1061
+
struct device *dev = data->dev;
1062
1062
union acpi_object *obj;
1063
1063
struct atk_acpi_ret_buffer *buf;
1064
1064
int err;
···
1084
1084
1085
1085
static int atk_ec_ctl(struct atk_data *data, int enable)
1086
1086
{
1087
-
struct device *dev = &data->acpi_dev->dev;
1087
+
struct device *dev = data->dev;
1088
1088
union acpi_object *obj;
1089
1089
struct atk_acpi_input_buf sitm;
1090
1090
struct atk_acpi_ret_buffer *ec_ret;
···
1113
1113
1114
1114
static int atk_enumerate_new_hwmon(struct atk_data *data)
1115
1115
{
1116
-
struct device *dev = &data->acpi_dev->dev;
1116
+
struct device *dev = data->dev;
1117
1117
union acpi_object *pack;
1118
1118
int err;
1119
1119
int i;
···
1155
1155
1156
1156
static int atk_init_attribute_groups(struct atk_data *data)
1157
1157
{
1158
-
struct device *dev = &data->acpi_dev->dev;
1158
+
struct device *dev = data->dev;
1159
1159
struct atk_sensor_data *s;
1160
1160
struct attribute **attrs;
1161
1161
int i = 0;
···
1181
1181
1182
1182
static int atk_register_hwmon(struct atk_data *data)
1183
1183
{
1184
-
struct device *dev = &data->acpi_dev->dev;
1184
+
struct device *dev = data->dev;
1185
1185
1186
1186
dev_dbg(dev, "registering hwmon device\n");
1187
1187
data->hwmon_dev = hwmon_device_register_with_groups(dev, "atk0110",
···
1193
1193
1194
1194
static int atk_probe_if(struct atk_data *data)
1195
1195
{
1196
-
struct device *dev = &data->acpi_dev->dev;
1196
+
struct device *dev = data->dev;
1197
1197
acpi_handle ret;
1198
1198
acpi_status status;
1199
1199
int err = 0;
···
1266
1266
return err;
1267
1267
}
1268
1268
1269
-
static int atk_add(struct acpi_device *device)
1269
+
static int atk_probe(struct platform_device *pdev)
1270
1270
{
1271
1271
acpi_status ret;
1272
1272
int err;
···
1274
1274
union acpi_object *obj;
1275
1275
struct atk_data *data;
1276
1276
1277
-
dev_dbg(&device->dev, "adding...\n");
1277
+
dev_dbg(&pdev->dev, "adding...\n");
1278
1278
1279
-
data = devm_kzalloc(&device->dev, sizeof(*data), GFP_KERNEL);
1279
+
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
1280
1280
if (!data)
1281
1281
return -ENOMEM;
1282
1282
1283
-
data->acpi_dev = device;
1284
-
data->atk_handle = device->handle;
1283
+
data->dev = &pdev->dev;
1284
+
data->atk_handle = ACPI_HANDLE(&pdev->dev);
1285
1285
INIT_LIST_HEAD(&data->sensor_list);
1286
1286
data->disable_ec = false;
1287
1287
···
1289
1289
ret = acpi_evaluate_object_typed(data->atk_handle, BOARD_ID, NULL,
1290
1290
&buf, ACPI_TYPE_PACKAGE);
1291
1291
if (ret != AE_OK) {
1292
-
dev_dbg(&device->dev, "atk: method MBIF not found\n");
1292
+
dev_dbg(&pdev->dev, "atk: method MBIF not found\n");
1293
1293
} else {
1294
1294
obj = buf.pointer;
1295
1295
if (obj->package.count >= 2) {
1296
1296
union acpi_object *id = &obj->package.elements[1];
1297
1297
if (id->type == ACPI_TYPE_STRING)
1298
-
dev_dbg(&device->dev, "board ID = %s\n",
1298
+
dev_dbg(&pdev->dev, "board ID = %s\n",
1299
1299
id->string.pointer);
1300
1300
}
1301
1301
ACPI_FREE(buf.pointer);
···
1303
1303
1304
1304
err = atk_probe_if(data);
1305
1305
if (err) {
1306
-
dev_err(&device->dev, "No usable hwmon interface detected\n");
1306
+
dev_err(&pdev->dev, "No usable hwmon interface detected\n");
1307
1307
goto out;
1308
1308
}
1309
1309
1310
1310
if (data->old_interface) {
1311
-
dev_dbg(&device->dev, "Using old hwmon interface\n");
1311
+
dev_dbg(&pdev->dev, "Using old hwmon interface\n");
1312
1312
err = atk_enumerate_old_hwmon(data);
1313
1313
} else {
1314
-
dev_dbg(&device->dev, "Using new hwmon interface\n");
1314
+
dev_dbg(&pdev->dev, "Using new hwmon interface\n");
1315
1315
err = atk_enumerate_new_hwmon(data);
1316
1316
}
1317
1317
if (err < 0)
1318
1318
goto out;
1319
1319
if (err == 0) {
1320
-
dev_info(&device->dev,
1320
+
dev_info(&pdev->dev,
1321
1321
"No usable sensor detected, bailing out\n");
1322
1322
err = -ENODEV;
1323
1323
goto out;
···
1332
1332
1333
1333
atk_debugfs_init(data);
1334
1334
1335
-
device->driver_data = data;
1335
+
platform_set_drvdata(pdev, data);
1336
+
1336
1337
return 0;
1337
1338
out:
1338
1339
if (data->disable_ec)
···
1341
1340
return err;
1342
1341
}
1343
1342
1344
-
static void atk_remove(struct acpi_device *device)
1343
+
static void atk_remove(struct platform_device *pdev)
1345
1344
{
1346
-
struct atk_data *data = device->driver_data;
1347
-
dev_dbg(&device->dev, "removing...\n");
1345
+
struct atk_data *data = platform_get_drvdata(pdev);
1348
1346
1349
-
device->driver_data = NULL;
1347
+
dev_dbg(&pdev->dev, "removing...\n");
1350
1348
1351
1349
atk_debugfs_cleanup(data);
1352
1350
···
1353
1353
1354
1354
if (data->disable_ec) {
1355
1355
if (atk_ec_ctl(data, 0))
1356
-
dev_err(&device->dev, "Failed to disable EC\n");
1356
+
dev_err(&pdev->dev, "Failed to disable EC\n");
1357
1357
}
1358
1358
}
1359
1359
···
1370
1370
if (dmi_check_system(atk_force_new_if))
1371
1371
new_if = true;
1372
1372
1373
-
ret = acpi_bus_register_driver(&atk_driver);
1373
+
ret = platform_driver_register(&atk_driver);
1374
1374
if (ret)
1375
-
pr_info("acpi_bus_register_driver failed: %d\n", ret);
1375
+
pr_info("platform_driver_register failed: %d\n", ret);
1376
1376
1377
1377
return ret;
1378
1378
}
1379
1379
1380
1380
static void __exit atk0110_exit(void)
1381
1381
{
1382
-
acpi_bus_unregister_driver(&atk_driver);
1382
+
platform_driver_unregister(&atk_driver);
1383
1383
}
1384
1384
1385
1385
module_init(atk0110_init);
-1171
drivers/hwmon/bt1-pvt.c
-1171
drivers/hwmon/bt1-pvt.c
···
1
-
// SPDX-License-Identifier: GPL-2.0-only
2
-
/*
3
-
* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
4
-
*
5
-
* Authors:
6
-
* Maxim Kaurkin <maxim.kaurkin@baikalelectronics.ru>
7
-
* Serge Semin <Sergey.Semin@baikalelectronics.ru>
8
-
*
9
-
* Baikal-T1 Process, Voltage, Temperature sensor driver
10
-
*/
11
-
12
-
#include <linux/bitfield.h>
13
-
#include <linux/bitops.h>
14
-
#include <linux/clk.h>
15
-
#include <linux/completion.h>
16
-
#include <linux/delay.h>
17
-
#include <linux/device.h>
18
-
#include <linux/hwmon-sysfs.h>
19
-
#include <linux/hwmon.h>
20
-
#include <linux/interrupt.h>
21
-
#include <linux/io.h>
22
-
#include <linux/kernel.h>
23
-
#include <linux/ktime.h>
24
-
#include <linux/limits.h>
25
-
#include <linux/module.h>
26
-
#include <linux/mutex.h>
27
-
#include <linux/of.h>
28
-
#include <linux/platform_device.h>
29
-
#include <linux/polynomial.h>
30
-
#include <linux/seqlock.h>
31
-
#include <linux/sysfs.h>
32
-
#include <linux/types.h>
33
-
34
-
#include "bt1-pvt.h"
35
-
36
-
/*
37
-
* For the sake of the code simplification we created the sensors info table
38
-
* with the sensor names, activation modes, threshold registers base address
39
-
* and the thresholds bit fields.
40
-
*/
41
-
static const struct pvt_sensor_info pvt_info[] = {
42
-
PVT_SENSOR_INFO(0, "CPU Core Temperature", hwmon_temp, TEMP, TTHRES),
43
-
PVT_SENSOR_INFO(0, "CPU Core Voltage", hwmon_in, VOLT, VTHRES),
44
-
PVT_SENSOR_INFO(1, "CPU Core Low-Vt", hwmon_in, LVT, LTHRES),
45
-
PVT_SENSOR_INFO(2, "CPU Core High-Vt", hwmon_in, HVT, HTHRES),
46
-
PVT_SENSOR_INFO(3, "CPU Core Standard-Vt", hwmon_in, SVT, STHRES),
47
-
};
48
-
49
-
/*
50
-
* The original translation formulae of the temperature (in degrees of Celsius)
51
-
* to PVT data and vice-versa are following:
52
-
* N = 1.8322e-8*(T^4) + 2.343e-5*(T^3) + 8.7018e-3*(T^2) + 3.9269*(T^1) +
53
-
* 1.7204e2,
54
-
* T = -1.6743e-11*(N^4) + 8.1542e-8*(N^3) + -1.8201e-4*(N^2) +
55
-
* 3.1020e-1*(N^1) - 4.838e1,
56
-
* where T = [-48.380, 147.438]C and N = [0, 1023].
57
-
* They must be accordingly altered to be suitable for the integer arithmetics.
58
-
* The technique is called 'factor redistribution', which just makes sure the
59
-
* multiplications and divisions are made so to have a result of the operations
60
-
* within the integer numbers limit. In addition we need to translate the
61
-
* formulae to accept millidegrees of Celsius. Here what they look like after
62
-
* the alterations:
63
-
* N = (18322e-20*(T^4) + 2343e-13*(T^3) + 87018e-9*(T^2) + 39269e-3*T +
64
-
* 17204e2) / 1e4,
65
-
* T = -16743e-12*(D^4) + 81542e-9*(D^3) - 182010e-6*(D^2) + 310200e-3*D -
66
-
* 48380,
67
-
* where T = [-48380, 147438] mC and N = [0, 1023].
68
-
*/
69
-
static const struct polynomial __maybe_unused poly_temp_to_N = {
70
-
.total_divider = 10000,
71
-
.terms = {
72
-
{4, 18322, 10000, 10000},
73
-
{3, 2343, 10000, 10},
74
-
{2, 87018, 10000, 10},
75
-
{1, 39269, 1000, 1},
76
-
{0, 1720400, 1, 1}
77
-
}
78
-
};
79
-
80
-
static const struct polynomial poly_N_to_temp = {
81
-
.total_divider = 1,
82
-
.terms = {
83
-
{4, -16743, 1000, 1},
84
-
{3, 81542, 1000, 1},
85
-
{2, -182010, 1000, 1},
86
-
{1, 310200, 1000, 1},
87
-
{0, -48380, 1, 1}
88
-
}
89
-
};
90
-
91
-
/*
92
-
* Similar alterations are performed for the voltage conversion equations.
93
-
* The original formulae are:
94
-
* N = 1.8658e3*V - 1.1572e3,
95
-
* V = (N + 1.1572e3) / 1.8658e3,
96
-
* where V = [0.620, 1.168] V and N = [0, 1023].
97
-
* After the optimization they looks as follows:
98
-
* N = (18658e-3*V - 11572) / 10,
99
-
* V = N * 10^5 / 18658 + 11572 * 10^4 / 18658.
100
-
*/
101
-
static const struct polynomial __maybe_unused poly_volt_to_N = {
102
-
.total_divider = 10,
103
-
.terms = {
104
-
{1, 18658, 1000, 1},
105
-
{0, -11572, 1, 1}
106
-
}
107
-
};
108
-
109
-
static const struct polynomial poly_N_to_volt = {
110
-
.total_divider = 10,
111
-
.terms = {
112
-
{1, 100000, 18658, 1},
113
-
{0, 115720000, 1, 18658}
114
-
}
115
-
};
116
-
117
-
static inline u32 pvt_update(void __iomem *reg, u32 mask, u32 data)
118
-
{
119
-
u32 old;
120
-
121
-
old = readl_relaxed(reg);
122
-
writel((old & ~mask) | (data & mask), reg);
123
-
124
-
return old & mask;
125
-
}
126
-
127
-
/*
128
-
* Baikal-T1 PVT mode can be updated only when the controller is disabled.
129
-
* So first we disable it, then set the new mode together with the controller
130
-
* getting back enabled. The same concerns the temperature trim and
131
-
* measurements timeout. If it is necessary the interface mutex is supposed
132
-
* to be locked at the time the operations are performed.
133
-
*/
134
-
static inline void pvt_set_mode(struct pvt_hwmon *pvt, u32 mode)
135
-
{
136
-
u32 old;
137
-
138
-
mode = FIELD_PREP(PVT_CTRL_MODE_MASK, mode);
139
-
140
-
old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
141
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_MODE_MASK | PVT_CTRL_EN,
142
-
mode | old);
143
-
}
144
-
145
-
static inline u32 pvt_calc_trim(long temp)
146
-
{
147
-
temp = clamp_val(temp, 0, PVT_TRIM_TEMP);
148
-
149
-
return DIV_ROUND_UP(temp, PVT_TRIM_STEP);
150
-
}
151
-
152
-
static inline void pvt_set_trim(struct pvt_hwmon *pvt, u32 trim)
153
-
{
154
-
u32 old;
155
-
156
-
trim = FIELD_PREP(PVT_CTRL_TRIM_MASK, trim);
157
-
158
-
old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
159
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_TRIM_MASK | PVT_CTRL_EN,
160
-
trim | old);
161
-
}
162
-
163
-
static inline void pvt_set_tout(struct pvt_hwmon *pvt, u32 tout)
164
-
{
165
-
u32 old;
166
-
167
-
old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
168
-
writel(tout, pvt->regs + PVT_TTIMEOUT);
169
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, old);
170
-
}
171
-
172
-
/*
173
-
* This driver can optionally provide the hwmon alarms for each sensor the PVT
174
-
* controller supports. The alarms functionality is made compile-time
175
-
* configurable due to the hardware interface implementation peculiarity
176
-
* described further in this comment. So in case if alarms are unnecessary in
177
-
* your system design it's recommended to have them disabled to prevent the PVT
178
-
* IRQs being periodically raised to get the data cache/alarms status up to
179
-
* date.
180
-
*
181
-
* Baikal-T1 PVT embedded controller is based on the Analog Bits PVT sensor,
182
-
* but is equipped with a dedicated control wrapper. It exposes the PVT
183
-
* sub-block registers space via the APB3 bus. In addition the wrapper provides
184
-
* a common interrupt vector of the sensors conversion completion events and
185
-
* threshold value alarms. Alas the wrapper interface hasn't been fully thought
186
-
* through. There is only one sensor can be activated at a time, for which the
187
-
* thresholds comparator is enabled right after the data conversion is
188
-
* completed. Due to this if alarms need to be implemented for all available
189
-
* sensors we can't just set the thresholds and enable the interrupts. We need
190
-
* to enable the sensors one after another and let the controller to detect
191
-
* the alarms by itself at each conversion. This also makes pointless to handle
192
-
* the alarms interrupts, since in occasion they happen synchronously with
193
-
* data conversion completion. The best driver design would be to have the
194
-
* completion interrupts enabled only and keep the converted value in the
195
-
* driver data cache. This solution is implemented if hwmon alarms are enabled
196
-
* in this driver. In case if the alarms are disabled, the conversion is
197
-
* performed on demand at the time a sensors input file is read.
198
-
*/
199
-
200
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
201
-
202
-
#define pvt_hard_isr NULL
203
-
204
-
static irqreturn_t pvt_soft_isr(int irq, void *data)
205
-
{
206
-
const struct pvt_sensor_info *info;
207
-
struct pvt_hwmon *pvt = data;
208
-
struct pvt_cache *cache;
209
-
u32 val, thres_sts, old;
210
-
211
-
/*
212
-
* DVALID bit will be cleared by reading the data. We need to save the
213
-
* status before the next conversion happens. Threshold events will be
214
-
* handled a bit later.
215
-
*/
216
-
thres_sts = readl(pvt->regs + PVT_RAW_INTR_STAT);
217
-
218
-
/*
219
-
* Then lets recharge the PVT interface with the next sampling mode.
220
-
* Lock the interface mutex to serialize trim, timeouts and alarm
221
-
* thresholds settings.
222
-
*/
223
-
cache = &pvt->cache[pvt->sensor];
224
-
info = &pvt_info[pvt->sensor];
225
-
pvt->sensor = (pvt->sensor == PVT_SENSOR_LAST) ?
226
-
PVT_SENSOR_FIRST : (pvt->sensor + 1);
227
-
228
-
/*
229
-
* For some reason we have to mask the interrupt before changing the
230
-
* mode, otherwise sometimes the temperature mode doesn't get
231
-
* activated even though the actual mode in the ctrl register
232
-
* corresponds to one. Then we read the data. By doing so we also
233
-
* recharge the data conversion. After this the mode corresponding
234
-
* to the next sensor in the row is set. Finally we enable the
235
-
* interrupts back.
236
-
*/
237
-
mutex_lock(&pvt->iface_mtx);
238
-
239
-
old = pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
240
-
PVT_INTR_DVALID);
241
-
242
-
val = readl(pvt->regs + PVT_DATA);
243
-
244
-
pvt_set_mode(pvt, pvt_info[pvt->sensor].mode);
245
-
246
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID, old);
247
-
248
-
mutex_unlock(&pvt->iface_mtx);
249
-
250
-
/*
251
-
* We can now update the data cache with data just retrieved from the
252
-
* sensor. Lock write-seqlock to make sure the reader has a coherent
253
-
* data.
254
-
*/
255
-
write_seqlock(&cache->data_seqlock);
256
-
257
-
cache->data = FIELD_GET(PVT_DATA_DATA_MASK, val);
258
-
259
-
write_sequnlock(&cache->data_seqlock);
260
-
261
-
/*
262
-
* While PVT core is doing the next mode data conversion, we'll check
263
-
* whether the alarms were triggered for the current sensor. Note that
264
-
* according to the documentation only one threshold IRQ status can be
265
-
* set at a time, that's why if-else statement is utilized.
266
-
*/
267
-
if ((thres_sts & info->thres_sts_lo) ^ cache->thres_sts_lo) {
268
-
WRITE_ONCE(cache->thres_sts_lo, thres_sts & info->thres_sts_lo);
269
-
hwmon_notify_event(pvt->hwmon, info->type, info->attr_min_alarm,
270
-
info->channel);
271
-
} else if ((thres_sts & info->thres_sts_hi) ^ cache->thres_sts_hi) {
272
-
WRITE_ONCE(cache->thres_sts_hi, thres_sts & info->thres_sts_hi);
273
-
hwmon_notify_event(pvt->hwmon, info->type, info->attr_max_alarm,
274
-
info->channel);
275
-
}
276
-
277
-
return IRQ_HANDLED;
278
-
}
279
-
280
-
static inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type)
281
-
{
282
-
return 0644;
283
-
}
284
-
285
-
static inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type)
286
-
{
287
-
return 0444;
288
-
}
289
-
290
-
static int pvt_read_data(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
291
-
long *val)
292
-
{
293
-
struct pvt_cache *cache = &pvt->cache[type];
294
-
unsigned int seq;
295
-
u32 data;
296
-
297
-
do {
298
-
seq = read_seqbegin(&cache->data_seqlock);
299
-
data = cache->data;
300
-
} while (read_seqretry(&cache->data_seqlock, seq));
301
-
302
-
if (type == PVT_TEMP)
303
-
*val = polynomial_calc(&poly_N_to_temp, data);
304
-
else
305
-
*val = polynomial_calc(&poly_N_to_volt, data);
306
-
307
-
return 0;
308
-
}
309
-
310
-
static int pvt_read_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
311
-
bool is_low, long *val)
312
-
{
313
-
u32 data;
314
-
315
-
/* No need in serialization, since it is just read from MMIO. */
316
-
data = readl(pvt->regs + pvt_info[type].thres_base);
317
-
318
-
if (is_low)
319
-
data = FIELD_GET(PVT_THRES_LO_MASK, data);
320
-
else
321
-
data = FIELD_GET(PVT_THRES_HI_MASK, data);
322
-
323
-
if (type == PVT_TEMP)
324
-
*val = polynomial_calc(&poly_N_to_temp, data);
325
-
else
326
-
*val = polynomial_calc(&poly_N_to_volt, data);
327
-
328
-
return 0;
329
-
}
330
-
331
-
static int pvt_write_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
332
-
bool is_low, long val)
333
-
{
334
-
u32 data, limit, mask;
335
-
int ret;
336
-
337
-
if (type == PVT_TEMP) {
338
-
val = clamp(val, PVT_TEMP_MIN, PVT_TEMP_MAX);
339
-
data = polynomial_calc(&poly_temp_to_N, val);
340
-
} else {
341
-
val = clamp(val, PVT_VOLT_MIN, PVT_VOLT_MAX);
342
-
data = polynomial_calc(&poly_volt_to_N, val);
343
-
}
344
-
345
-
/* Serialize limit update, since a part of the register is changed. */
346
-
ret = mutex_lock_interruptible(&pvt->iface_mtx);
347
-
if (ret)
348
-
return ret;
349
-
350
-
/* Make sure the upper and lower ranges don't intersect. */
351
-
limit = readl(pvt->regs + pvt_info[type].thres_base);
352
-
if (is_low) {
353
-
limit = FIELD_GET(PVT_THRES_HI_MASK, limit);
354
-
data = clamp_val(data, PVT_DATA_MIN, limit);
355
-
data = FIELD_PREP(PVT_THRES_LO_MASK, data);
356
-
mask = PVT_THRES_LO_MASK;
357
-
} else {
358
-
limit = FIELD_GET(PVT_THRES_LO_MASK, limit);
359
-
data = clamp_val(data, limit, PVT_DATA_MAX);
360
-
data = FIELD_PREP(PVT_THRES_HI_MASK, data);
361
-
mask = PVT_THRES_HI_MASK;
362
-
}
363
-
364
-
pvt_update(pvt->regs + pvt_info[type].thres_base, mask, data);
365
-
366
-
mutex_unlock(&pvt->iface_mtx);
367
-
368
-
return 0;
369
-
}
370
-
371
-
static int pvt_read_alarm(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
372
-
bool is_low, long *val)
373
-
{
374
-
if (is_low)
375
-
*val = !!READ_ONCE(pvt->cache[type].thres_sts_lo);
376
-
else
377
-
*val = !!READ_ONCE(pvt->cache[type].thres_sts_hi);
378
-
379
-
return 0;
380
-
}
381
-
382
-
static const struct hwmon_channel_info * const pvt_channel_info[] = {
383
-
HWMON_CHANNEL_INFO(chip,
384
-
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
385
-
HWMON_CHANNEL_INFO(temp,
386
-
HWMON_T_INPUT | HWMON_T_TYPE | HWMON_T_LABEL |
387
-
HWMON_T_MIN | HWMON_T_MIN_ALARM |
388
-
HWMON_T_MAX | HWMON_T_MAX_ALARM |
389
-
HWMON_T_OFFSET),
390
-
HWMON_CHANNEL_INFO(in,
391
-
HWMON_I_INPUT | HWMON_I_LABEL |
392
-
HWMON_I_MIN | HWMON_I_MIN_ALARM |
393
-
HWMON_I_MAX | HWMON_I_MAX_ALARM,
394
-
HWMON_I_INPUT | HWMON_I_LABEL |
395
-
HWMON_I_MIN | HWMON_I_MIN_ALARM |
396
-
HWMON_I_MAX | HWMON_I_MAX_ALARM,
397
-
HWMON_I_INPUT | HWMON_I_LABEL |
398
-
HWMON_I_MIN | HWMON_I_MIN_ALARM |
399
-
HWMON_I_MAX | HWMON_I_MAX_ALARM,
400
-
HWMON_I_INPUT | HWMON_I_LABEL |
401
-
HWMON_I_MIN | HWMON_I_MIN_ALARM |
402
-
HWMON_I_MAX | HWMON_I_MAX_ALARM),
403
-
NULL
404
-
};
405
-
406
-
#else /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
407
-
408
-
static irqreturn_t pvt_hard_isr(int irq, void *data)
409
-
{
410
-
struct pvt_hwmon *pvt = data;
411
-
struct pvt_cache *cache;
412
-
u32 val;
413
-
414
-
/*
415
-
* Mask the DVALID interrupt so after exiting from the handler a
416
-
* repeated conversion wouldn't happen.
417
-
*/
418
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
419
-
PVT_INTR_DVALID);
420
-
421
-
/*
422
-
* Nothing special for alarm-less driver. Just read the data, update
423
-
* the cache and notify a waiter of this event.
424
-
*/
425
-
val = readl(pvt->regs + PVT_DATA);
426
-
if (!(val & PVT_DATA_VALID)) {
427
-
dev_err(pvt->dev, "Got IRQ when data isn't valid\n");
428
-
return IRQ_HANDLED;
429
-
}
430
-
431
-
cache = &pvt->cache[pvt->sensor];
432
-
433
-
WRITE_ONCE(cache->data, FIELD_GET(PVT_DATA_DATA_MASK, val));
434
-
435
-
complete(&cache->conversion);
436
-
437
-
return IRQ_HANDLED;
438
-
}
439
-
440
-
#define pvt_soft_isr NULL
441
-
442
-
static inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type)
443
-
{
444
-
return 0;
445
-
}
446
-
447
-
static inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type)
448
-
{
449
-
return 0;
450
-
}
451
-
452
-
static int pvt_read_data(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
453
-
long *val)
454
-
{
455
-
struct pvt_cache *cache = &pvt->cache[type];
456
-
unsigned long timeout;
457
-
u32 data;
458
-
int ret;
459
-
460
-
/*
461
-
* Lock PVT conversion interface until data cache is updated. The
462
-
* data read procedure is following: set the requested PVT sensor
463
-
* mode, enable IRQ and conversion, wait until conversion is finished,
464
-
* then disable conversion and IRQ, and read the cached data.
465
-
*/
466
-
ret = mutex_lock_interruptible(&pvt->iface_mtx);
467
-
if (ret)
468
-
return ret;
469
-
470
-
pvt->sensor = type;
471
-
pvt_set_mode(pvt, pvt_info[type].mode);
472
-
473
-
/*
474
-
* Unmask the DVALID interrupt and enable the sensors conversions.
475
-
* Do the reverse procedure when conversion is done.
476
-
*/
477
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID, 0);
478
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, PVT_CTRL_EN);
479
-
480
-
/*
481
-
* Wait with timeout since in case if the sensor is suddenly powered
482
-
* down the request won't be completed and the caller will hang up on
483
-
* this procedure until the power is back up again. Multiply the
484
-
* timeout by the factor of two to prevent a false timeout.
485
-
*/
486
-
timeout = 2 * usecs_to_jiffies(ktime_to_us(pvt->timeout));
487
-
ret = wait_for_completion_timeout(&cache->conversion, timeout);
488
-
489
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
490
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
491
-
PVT_INTR_DVALID);
492
-
493
-
data = READ_ONCE(cache->data);
494
-
495
-
mutex_unlock(&pvt->iface_mtx);
496
-
497
-
if (!ret)
498
-
return -ETIMEDOUT;
499
-
500
-
if (type == PVT_TEMP)
501
-
*val = polynomial_calc(&poly_N_to_temp, data);
502
-
else
503
-
*val = polynomial_calc(&poly_N_to_volt, data);
504
-
505
-
return 0;
506
-
}
507
-
508
-
static int pvt_read_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
509
-
bool is_low, long *val)
510
-
{
511
-
return -EOPNOTSUPP;
512
-
}
513
-
514
-
static int pvt_write_limit(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
515
-
bool is_low, long val)
516
-
{
517
-
return -EOPNOTSUPP;
518
-
}
519
-
520
-
static int pvt_read_alarm(struct pvt_hwmon *pvt, enum pvt_sensor_type type,
521
-
bool is_low, long *val)
522
-
{
523
-
return -EOPNOTSUPP;
524
-
}
525
-
526
-
static const struct hwmon_channel_info * const pvt_channel_info[] = {
527
-
HWMON_CHANNEL_INFO(chip,
528
-
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
529
-
HWMON_CHANNEL_INFO(temp,
530
-
HWMON_T_INPUT | HWMON_T_TYPE | HWMON_T_LABEL |
531
-
HWMON_T_OFFSET),
532
-
HWMON_CHANNEL_INFO(in,
533
-
HWMON_I_INPUT | HWMON_I_LABEL,
534
-
HWMON_I_INPUT | HWMON_I_LABEL,
535
-
HWMON_I_INPUT | HWMON_I_LABEL,
536
-
HWMON_I_INPUT | HWMON_I_LABEL),
537
-
NULL
538
-
};
539
-
540
-
#endif /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
541
-
542
-
static inline bool pvt_hwmon_channel_is_valid(enum hwmon_sensor_types type,
543
-
int ch)
544
-
{
545
-
switch (type) {
546
-
case hwmon_temp:
547
-
if (ch < 0 || ch >= PVT_TEMP_CHS)
548
-
return false;
549
-
break;
550
-
case hwmon_in:
551
-
if (ch < 0 || ch >= PVT_VOLT_CHS)
552
-
return false;
553
-
break;
554
-
default:
555
-
break;
556
-
}
557
-
558
-
/* The rest of the types are independent from the channel number. */
559
-
return true;
560
-
}
561
-
562
-
static umode_t pvt_hwmon_is_visible(const void *data,
563
-
enum hwmon_sensor_types type,
564
-
u32 attr, int ch)
565
-
{
566
-
if (!pvt_hwmon_channel_is_valid(type, ch))
567
-
return 0;
568
-
569
-
switch (type) {
570
-
case hwmon_chip:
571
-
switch (attr) {
572
-
case hwmon_chip_update_interval:
573
-
return 0644;
574
-
}
575
-
break;
576
-
case hwmon_temp:
577
-
switch (attr) {
578
-
case hwmon_temp_input:
579
-
case hwmon_temp_type:
580
-
case hwmon_temp_label:
581
-
return 0444;
582
-
case hwmon_temp_min:
583
-
case hwmon_temp_max:
584
-
return pvt_limit_is_visible(ch);
585
-
case hwmon_temp_min_alarm:
586
-
case hwmon_temp_max_alarm:
587
-
return pvt_alarm_is_visible(ch);
588
-
case hwmon_temp_offset:
589
-
return 0644;
590
-
}
591
-
break;
592
-
case hwmon_in:
593
-
switch (attr) {
594
-
case hwmon_in_input:
595
-
case hwmon_in_label:
596
-
return 0444;
597
-
case hwmon_in_min:
598
-
case hwmon_in_max:
599
-
return pvt_limit_is_visible(PVT_VOLT + ch);
600
-
case hwmon_in_min_alarm:
601
-
case hwmon_in_max_alarm:
602
-
return pvt_alarm_is_visible(PVT_VOLT + ch);
603
-
}
604
-
break;
605
-
default:
606
-
break;
607
-
}
608
-
609
-
return 0;
610
-
}
611
-
612
-
static int pvt_read_trim(struct pvt_hwmon *pvt, long *val)
613
-
{
614
-
u32 data;
615
-
616
-
data = readl(pvt->regs + PVT_CTRL);
617
-
*val = FIELD_GET(PVT_CTRL_TRIM_MASK, data) * PVT_TRIM_STEP;
618
-
619
-
return 0;
620
-
}
621
-
622
-
static int pvt_write_trim(struct pvt_hwmon *pvt, long val)
623
-
{
624
-
u32 trim;
625
-
int ret;
626
-
627
-
/*
628
-
* Serialize trim update, since a part of the register is changed and
629
-
* the controller is supposed to be disabled during this operation.
630
-
*/
631
-
ret = mutex_lock_interruptible(&pvt->iface_mtx);
632
-
if (ret)
633
-
return ret;
634
-
635
-
trim = pvt_calc_trim(val);
636
-
pvt_set_trim(pvt, trim);
637
-
638
-
mutex_unlock(&pvt->iface_mtx);
639
-
640
-
return 0;
641
-
}
642
-
643
-
static int pvt_read_timeout(struct pvt_hwmon *pvt, long *val)
644
-
{
645
-
int ret;
646
-
647
-
ret = mutex_lock_interruptible(&pvt->iface_mtx);
648
-
if (ret)
649
-
return ret;
650
-
651
-
/* Return the result in msec as hwmon sysfs interface requires. */
652
-
*val = ktime_to_ms(pvt->timeout);
653
-
654
-
mutex_unlock(&pvt->iface_mtx);
655
-
656
-
return 0;
657
-
}
658
-
659
-
static int pvt_write_timeout(struct pvt_hwmon *pvt, long val)
660
-
{
661
-
unsigned long rate;
662
-
ktime_t kt, cache;
663
-
u32 data;
664
-
int ret;
665
-
666
-
rate = clk_get_rate(pvt->clks[PVT_CLOCK_REF].clk);
667
-
if (!rate)
668
-
return -ENODEV;
669
-
670
-
/*
671
-
* If alarms are enabled, the requested timeout must be divided
672
-
* between all available sensors to have the requested delay
673
-
* applicable to each individual sensor.
674
-
*/
675
-
cache = kt = ms_to_ktime(val);
676
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
677
-
kt = ktime_divns(kt, PVT_SENSORS_NUM);
678
-
#endif
679
-
680
-
/*
681
-
* Subtract a constant lag, which always persists due to the limited
682
-
* PVT sampling rate. Make sure the timeout is not negative.
683
-
*/
684
-
kt = ktime_sub_ns(kt, PVT_TOUT_MIN);
685
-
if (ktime_to_ns(kt) < 0)
686
-
kt = ktime_set(0, 0);
687
-
688
-
/*
689
-
* Finally recalculate the timeout in terms of the reference clock
690
-
* period.
691
-
*/
692
-
data = ktime_divns(kt * rate, NSEC_PER_SEC);
693
-
694
-
/*
695
-
* Update the measurements delay, but lock the interface first, since
696
-
* we have to disable PVT in order to have the new delay actually
697
-
* updated.
698
-
*/
699
-
ret = mutex_lock_interruptible(&pvt->iface_mtx);
700
-
if (ret)
701
-
return ret;
702
-
703
-
pvt_set_tout(pvt, data);
704
-
pvt->timeout = cache;
705
-
706
-
mutex_unlock(&pvt->iface_mtx);
707
-
708
-
return 0;
709
-
}
710
-
711
-
static int pvt_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
712
-
u32 attr, int ch, long *val)
713
-
{
714
-
struct pvt_hwmon *pvt = dev_get_drvdata(dev);
715
-
716
-
if (!pvt_hwmon_channel_is_valid(type, ch))
717
-
return -EINVAL;
718
-
719
-
switch (type) {
720
-
case hwmon_chip:
721
-
switch (attr) {
722
-
case hwmon_chip_update_interval:
723
-
return pvt_read_timeout(pvt, val);
724
-
}
725
-
break;
726
-
case hwmon_temp:
727
-
switch (attr) {
728
-
case hwmon_temp_input:
729
-
return pvt_read_data(pvt, ch, val);
730
-
case hwmon_temp_type:
731
-
*val = 1;
732
-
return 0;
733
-
case hwmon_temp_min:
734
-
return pvt_read_limit(pvt, ch, true, val);
735
-
case hwmon_temp_max:
736
-
return pvt_read_limit(pvt, ch, false, val);
737
-
case hwmon_temp_min_alarm:
738
-
return pvt_read_alarm(pvt, ch, true, val);
739
-
case hwmon_temp_max_alarm:
740
-
return pvt_read_alarm(pvt, ch, false, val);
741
-
case hwmon_temp_offset:
742
-
return pvt_read_trim(pvt, val);
743
-
}
744
-
break;
745
-
case hwmon_in:
746
-
switch (attr) {
747
-
case hwmon_in_input:
748
-
return pvt_read_data(pvt, PVT_VOLT + ch, val);
749
-
case hwmon_in_min:
750
-
return pvt_read_limit(pvt, PVT_VOLT + ch, true, val);
751
-
case hwmon_in_max:
752
-
return pvt_read_limit(pvt, PVT_VOLT + ch, false, val);
753
-
case hwmon_in_min_alarm:
754
-
return pvt_read_alarm(pvt, PVT_VOLT + ch, true, val);
755
-
case hwmon_in_max_alarm:
756
-
return pvt_read_alarm(pvt, PVT_VOLT + ch, false, val);
757
-
}
758
-
break;
759
-
default:
760
-
break;
761
-
}
762
-
763
-
return -EOPNOTSUPP;
764
-
}
765
-
766
-
static int pvt_hwmon_read_string(struct device *dev,
767
-
enum hwmon_sensor_types type,
768
-
u32 attr, int ch, const char **str)
769
-
{
770
-
if (!pvt_hwmon_channel_is_valid(type, ch))
771
-
return -EINVAL;
772
-
773
-
switch (type) {
774
-
case hwmon_temp:
775
-
switch (attr) {
776
-
case hwmon_temp_label:
777
-
*str = pvt_info[ch].label;
778
-
return 0;
779
-
}
780
-
break;
781
-
case hwmon_in:
782
-
switch (attr) {
783
-
case hwmon_in_label:
784
-
*str = pvt_info[PVT_VOLT + ch].label;
785
-
return 0;
786
-
}
787
-
break;
788
-
default:
789
-
break;
790
-
}
791
-
792
-
return -EOPNOTSUPP;
793
-
}
794
-
795
-
static int pvt_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
796
-
u32 attr, int ch, long val)
797
-
{
798
-
struct pvt_hwmon *pvt = dev_get_drvdata(dev);
799
-
800
-
if (!pvt_hwmon_channel_is_valid(type, ch))
801
-
return -EINVAL;
802
-
803
-
switch (type) {
804
-
case hwmon_chip:
805
-
switch (attr) {
806
-
case hwmon_chip_update_interval:
807
-
return pvt_write_timeout(pvt, val);
808
-
}
809
-
break;
810
-
case hwmon_temp:
811
-
switch (attr) {
812
-
case hwmon_temp_min:
813
-
return pvt_write_limit(pvt, ch, true, val);
814
-
case hwmon_temp_max:
815
-
return pvt_write_limit(pvt, ch, false, val);
816
-
case hwmon_temp_offset:
817
-
return pvt_write_trim(pvt, val);
818
-
}
819
-
break;
820
-
case hwmon_in:
821
-
switch (attr) {
822
-
case hwmon_in_min:
823
-
return pvt_write_limit(pvt, PVT_VOLT + ch, true, val);
824
-
case hwmon_in_max:
825
-
return pvt_write_limit(pvt, PVT_VOLT + ch, false, val);
826
-
}
827
-
break;
828
-
default:
829
-
break;
830
-
}
831
-
832
-
return -EOPNOTSUPP;
833
-
}
834
-
835
-
static const struct hwmon_ops pvt_hwmon_ops = {
836
-
.is_visible = pvt_hwmon_is_visible,
837
-
.read = pvt_hwmon_read,
838
-
.read_string = pvt_hwmon_read_string,
839
-
.write = pvt_hwmon_write
840
-
};
841
-
842
-
static const struct hwmon_chip_info pvt_hwmon_info = {
843
-
.ops = &pvt_hwmon_ops,
844
-
.info = pvt_channel_info
845
-
};
846
-
847
-
static void pvt_clear_data(void *data)
848
-
{
849
-
struct pvt_hwmon *pvt = data;
850
-
#if !defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
851
-
int idx;
852
-
853
-
for (idx = 0; idx < PVT_SENSORS_NUM; ++idx)
854
-
complete_all(&pvt->cache[idx].conversion);
855
-
#endif
856
-
857
-
mutex_destroy(&pvt->iface_mtx);
858
-
}
859
-
860
-
static struct pvt_hwmon *pvt_create_data(struct platform_device *pdev)
861
-
{
862
-
struct device *dev = &pdev->dev;
863
-
struct pvt_hwmon *pvt;
864
-
int ret, idx;
865
-
866
-
pvt = devm_kzalloc(dev, sizeof(*pvt), GFP_KERNEL);
867
-
if (!pvt)
868
-
return ERR_PTR(-ENOMEM);
869
-
870
-
ret = devm_add_action(dev, pvt_clear_data, pvt);
871
-
if (ret) {
872
-
dev_err(dev, "Can't add PVT data clear action\n");
873
-
return ERR_PTR(ret);
874
-
}
875
-
876
-
pvt->dev = dev;
877
-
pvt->sensor = PVT_SENSOR_FIRST;
878
-
mutex_init(&pvt->iface_mtx);
879
-
880
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
881
-
for (idx = 0; idx < PVT_SENSORS_NUM; ++idx)
882
-
seqlock_init(&pvt->cache[idx].data_seqlock);
883
-
#else
884
-
for (idx = 0; idx < PVT_SENSORS_NUM; ++idx)
885
-
init_completion(&pvt->cache[idx].conversion);
886
-
#endif
887
-
888
-
return pvt;
889
-
}
890
-
891
-
static int pvt_request_regs(struct pvt_hwmon *pvt)
892
-
{
893
-
struct platform_device *pdev = to_platform_device(pvt->dev);
894
-
895
-
pvt->regs = devm_platform_ioremap_resource(pdev, 0);
896
-
if (IS_ERR(pvt->regs))
897
-
return PTR_ERR(pvt->regs);
898
-
899
-
return 0;
900
-
}
901
-
902
-
static void pvt_disable_clks(void *data)
903
-
{
904
-
struct pvt_hwmon *pvt = data;
905
-
906
-
clk_bulk_disable_unprepare(PVT_CLOCK_NUM, pvt->clks);
907
-
}
908
-
909
-
static int pvt_request_clks(struct pvt_hwmon *pvt)
910
-
{
911
-
int ret;
912
-
913
-
pvt->clks[PVT_CLOCK_APB].id = "pclk";
914
-
pvt->clks[PVT_CLOCK_REF].id = "ref";
915
-
916
-
ret = devm_clk_bulk_get(pvt->dev, PVT_CLOCK_NUM, pvt->clks);
917
-
if (ret) {
918
-
dev_err(pvt->dev, "Couldn't get PVT clocks descriptors\n");
919
-
return ret;
920
-
}
921
-
922
-
ret = clk_bulk_prepare_enable(PVT_CLOCK_NUM, pvt->clks);
923
-
if (ret) {
924
-
dev_err(pvt->dev, "Couldn't enable the PVT clocks\n");
925
-
return ret;
926
-
}
927
-
928
-
ret = devm_add_action_or_reset(pvt->dev, pvt_disable_clks, pvt);
929
-
if (ret) {
930
-
dev_err(pvt->dev, "Can't add PVT clocks disable action\n");
931
-
return ret;
932
-
}
933
-
934
-
return 0;
935
-
}
936
-
937
-
static int pvt_check_pwr(struct pvt_hwmon *pvt)
938
-
{
939
-
unsigned long tout;
940
-
int ret = 0;
941
-
u32 data;
942
-
943
-
/*
944
-
* Test out the sensor conversion functionality. If it is not done on
945
-
* time then the domain must have been unpowered and we won't be able
946
-
* to use the device later in this driver.
947
-
* Note If the power source is lost during the normal driver work the
948
-
* data read procedure will either return -ETIMEDOUT (for the
949
-
* alarm-less driver configuration) or just stop the repeated
950
-
* conversion. In the later case alas we won't be able to detect the
951
-
* problem.
952
-
*/
953
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_ALL, PVT_INTR_ALL);
954
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, PVT_CTRL_EN);
955
-
pvt_set_tout(pvt, 0);
956
-
readl(pvt->regs + PVT_DATA);
957
-
958
-
tout = PVT_TOUT_MIN / NSEC_PER_USEC;
959
-
usleep_range(tout, 2 * tout);
960
-
961
-
data = readl(pvt->regs + PVT_DATA);
962
-
if (!(data & PVT_DATA_VALID)) {
963
-
ret = -ENODEV;
964
-
dev_err(pvt->dev, "Sensor is powered down\n");
965
-
}
966
-
967
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
968
-
969
-
return ret;
970
-
}
971
-
972
-
static int pvt_init_iface(struct pvt_hwmon *pvt)
973
-
{
974
-
unsigned long rate;
975
-
u32 trim, temp;
976
-
977
-
rate = clk_get_rate(pvt->clks[PVT_CLOCK_REF].clk);
978
-
if (!rate) {
979
-
dev_err(pvt->dev, "Invalid reference clock rate\n");
980
-
return -ENODEV;
981
-
}
982
-
983
-
/*
984
-
* Make sure all interrupts and controller are disabled so not to
985
-
* accidentally have ISR executed before the driver data is fully
986
-
* initialized. Clear the IRQ status as well.
987
-
*/
988
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_ALL, PVT_INTR_ALL);
989
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
990
-
readl(pvt->regs + PVT_CLR_INTR);
991
-
readl(pvt->regs + PVT_DATA);
992
-
993
-
/* Setup default sensor mode, timeout and temperature trim. */
994
-
pvt_set_mode(pvt, pvt_info[pvt->sensor].mode);
995
-
pvt_set_tout(pvt, PVT_TOUT_DEF);
996
-
997
-
/*
998
-
* Preserve the current ref-clock based delay (Ttotal) between the
999
-
* sensors data samples in the driver data so not to recalculate it
1000
-
* each time on the data requests and timeout reads. It consists of the
1001
-
* delay introduced by the internal ref-clock timer (N / Fclk) and the
1002
-
* constant timeout caused by each conversion latency (Tmin):
1003
-
* Ttotal = N / Fclk + Tmin
1004
-
* If alarms are enabled the sensors are polled one after another and
1005
-
* in order to get the next measurement of a particular sensor the
1006
-
* caller will have to wait for at most until all the others are
1007
-
* polled. In that case the formulae will look a bit different:
1008
-
* Ttotal = 5 * (N / Fclk + Tmin)
1009
-
*/
1010
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
1011
-
pvt->timeout = ktime_set(PVT_SENSORS_NUM * PVT_TOUT_DEF, 0);
1012
-
pvt->timeout = ktime_divns(pvt->timeout, rate);
1013
-
pvt->timeout = ktime_add_ns(pvt->timeout, PVT_SENSORS_NUM * PVT_TOUT_MIN);
1014
-
#else
1015
-
pvt->timeout = ktime_set(PVT_TOUT_DEF, 0);
1016
-
pvt->timeout = ktime_divns(pvt->timeout, rate);
1017
-
pvt->timeout = ktime_add_ns(pvt->timeout, PVT_TOUT_MIN);
1018
-
#endif
1019
-
1020
-
trim = PVT_TRIM_DEF;
1021
-
if (!of_property_read_u32(pvt->dev->of_node,
1022
-
"baikal,pvt-temp-offset-millicelsius", &temp))
1023
-
trim = pvt_calc_trim(temp);
1024
-
1025
-
pvt_set_trim(pvt, trim);
1026
-
1027
-
return 0;
1028
-
}
1029
-
1030
-
static int pvt_request_irq(struct pvt_hwmon *pvt)
1031
-
{
1032
-
struct platform_device *pdev = to_platform_device(pvt->dev);
1033
-
int ret;
1034
-
1035
-
pvt->irq = platform_get_irq(pdev, 0);
1036
-
if (pvt->irq < 0)
1037
-
return pvt->irq;
1038
-
1039
-
ret = devm_request_threaded_irq(pvt->dev, pvt->irq,
1040
-
pvt_hard_isr, pvt_soft_isr,
1041
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
1042
-
IRQF_SHARED | IRQF_TRIGGER_HIGH |
1043
-
IRQF_ONESHOT,
1044
-
#else
1045
-
IRQF_SHARED | IRQF_TRIGGER_HIGH,
1046
-
#endif
1047
-
"pvt", pvt);
1048
-
if (ret) {
1049
-
dev_err(pvt->dev, "Couldn't request PVT IRQ\n");
1050
-
return ret;
1051
-
}
1052
-
1053
-
return 0;
1054
-
}
1055
-
1056
-
static int pvt_create_hwmon(struct pvt_hwmon *pvt)
1057
-
{
1058
-
pvt->hwmon = devm_hwmon_device_register_with_info(pvt->dev, "pvt", pvt,
1059
-
&pvt_hwmon_info, NULL);
1060
-
if (IS_ERR(pvt->hwmon)) {
1061
-
dev_err(pvt->dev, "Couldn't create hwmon device\n");
1062
-
return PTR_ERR(pvt->hwmon);
1063
-
}
1064
-
1065
-
return 0;
1066
-
}
1067
-
1068
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
1069
-
1070
-
static void pvt_disable_iface(void *data)
1071
-
{
1072
-
struct pvt_hwmon *pvt = data;
1073
-
1074
-
mutex_lock(&pvt->iface_mtx);
1075
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0);
1076
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID,
1077
-
PVT_INTR_DVALID);
1078
-
mutex_unlock(&pvt->iface_mtx);
1079
-
}
1080
-
1081
-
static int pvt_enable_iface(struct pvt_hwmon *pvt)
1082
-
{
1083
-
int ret;
1084
-
1085
-
ret = devm_add_action(pvt->dev, pvt_disable_iface, pvt);
1086
-
if (ret) {
1087
-
dev_err(pvt->dev, "Can't add PVT disable interface action\n");
1088
-
return ret;
1089
-
}
1090
-
1091
-
/*
1092
-
* Enable sensors data conversion and IRQ. We need to lock the
1093
-
* interface mutex since hwmon has just been created and the
1094
-
* corresponding sysfs files are accessible from user-space,
1095
-
* which theoretically may cause races.
1096
-
*/
1097
-
mutex_lock(&pvt->iface_mtx);
1098
-
pvt_update(pvt->regs + PVT_INTR_MASK, PVT_INTR_DVALID, 0);
1099
-
pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, PVT_CTRL_EN);
1100
-
mutex_unlock(&pvt->iface_mtx);
1101
-
1102
-
return 0;
1103
-
}
1104
-
1105
-
#else /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
1106
-
1107
-
static int pvt_enable_iface(struct pvt_hwmon *pvt)
1108
-
{
1109
-
return 0;
1110
-
}
1111
-
1112
-
#endif /* !CONFIG_SENSORS_BT1_PVT_ALARMS */
1113
-
1114
-
static int pvt_probe(struct platform_device *pdev)
1115
-
{
1116
-
struct pvt_hwmon *pvt;
1117
-
int ret;
1118
-
1119
-
pvt = pvt_create_data(pdev);
1120
-
if (IS_ERR(pvt))
1121
-
return PTR_ERR(pvt);
1122
-
1123
-
ret = pvt_request_regs(pvt);
1124
-
if (ret)
1125
-
return ret;
1126
-
1127
-
ret = pvt_request_clks(pvt);
1128
-
if (ret)
1129
-
return ret;
1130
-
1131
-
ret = pvt_check_pwr(pvt);
1132
-
if (ret)
1133
-
return ret;
1134
-
1135
-
ret = pvt_init_iface(pvt);
1136
-
if (ret)
1137
-
return ret;
1138
-
1139
-
ret = pvt_request_irq(pvt);
1140
-
if (ret)
1141
-
return ret;
1142
-
1143
-
ret = pvt_create_hwmon(pvt);
1144
-
if (ret)
1145
-
return ret;
1146
-
1147
-
ret = pvt_enable_iface(pvt);
1148
-
if (ret)
1149
-
return ret;
1150
-
1151
-
return 0;
1152
-
}
1153
-
1154
-
static const struct of_device_id pvt_of_match[] = {
1155
-
{ .compatible = "baikal,bt1-pvt" },
1156
-
{ }
1157
-
};
1158
-
MODULE_DEVICE_TABLE(of, pvt_of_match);
1159
-
1160
-
static struct platform_driver pvt_driver = {
1161
-
.probe = pvt_probe,
1162
-
.driver = {
1163
-
.name = "bt1-pvt",
1164
-
.of_match_table = pvt_of_match
1165
-
}
1166
-
};
1167
-
module_platform_driver(pvt_driver);
1168
-
1169
-
MODULE_AUTHOR("Maxim Kaurkin <maxim.kaurkin@baikalelectronics.ru>");
1170
-
MODULE_DESCRIPTION("Baikal-T1 PVT driver");
1171
-
MODULE_LICENSE("GPL v2");
-247
drivers/hwmon/bt1-pvt.h
-247
drivers/hwmon/bt1-pvt.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0-only */
2
-
/*
3
-
* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
4
-
*
5
-
* Baikal-T1 Process, Voltage, Temperature sensor driver
6
-
*/
7
-
#ifndef __HWMON_BT1_PVT_H__
8
-
#define __HWMON_BT1_PVT_H__
9
-
10
-
#include <linux/completion.h>
11
-
#include <linux/hwmon.h>
12
-
#include <linux/kernel.h>
13
-
#include <linux/ktime.h>
14
-
#include <linux/mutex.h>
15
-
#include <linux/seqlock.h>
16
-
17
-
/* Baikal-T1 PVT registers and their bitfields */
18
-
#define PVT_CTRL 0x00
19
-
#define PVT_CTRL_EN BIT(0)
20
-
#define PVT_CTRL_MODE_FLD 1
21
-
#define PVT_CTRL_MODE_MASK GENMASK(3, PVT_CTRL_MODE_FLD)
22
-
#define PVT_CTRL_MODE_TEMP 0x0
23
-
#define PVT_CTRL_MODE_VOLT 0x1
24
-
#define PVT_CTRL_MODE_LVT 0x2
25
-
#define PVT_CTRL_MODE_HVT 0x4
26
-
#define PVT_CTRL_MODE_SVT 0x6
27
-
#define PVT_CTRL_TRIM_FLD 4
28
-
#define PVT_CTRL_TRIM_MASK GENMASK(8, PVT_CTRL_TRIM_FLD)
29
-
#define PVT_DATA 0x04
30
-
#define PVT_DATA_VALID BIT(10)
31
-
#define PVT_DATA_DATA_FLD 0
32
-
#define PVT_DATA_DATA_MASK GENMASK(9, PVT_DATA_DATA_FLD)
33
-
#define PVT_TTHRES 0x08
34
-
#define PVT_VTHRES 0x0C
35
-
#define PVT_LTHRES 0x10
36
-
#define PVT_HTHRES 0x14
37
-
#define PVT_STHRES 0x18
38
-
#define PVT_THRES_LO_FLD 0
39
-
#define PVT_THRES_LO_MASK GENMASK(9, PVT_THRES_LO_FLD)
40
-
#define PVT_THRES_HI_FLD 10
41
-
#define PVT_THRES_HI_MASK GENMASK(19, PVT_THRES_HI_FLD)
42
-
#define PVT_TTIMEOUT 0x1C
43
-
#define PVT_INTR_STAT 0x20
44
-
#define PVT_INTR_MASK 0x24
45
-
#define PVT_RAW_INTR_STAT 0x28
46
-
#define PVT_INTR_DVALID BIT(0)
47
-
#define PVT_INTR_TTHRES_LO BIT(1)
48
-
#define PVT_INTR_TTHRES_HI BIT(2)
49
-
#define PVT_INTR_VTHRES_LO BIT(3)
50
-
#define PVT_INTR_VTHRES_HI BIT(4)
51
-
#define PVT_INTR_LTHRES_LO BIT(5)
52
-
#define PVT_INTR_LTHRES_HI BIT(6)
53
-
#define PVT_INTR_HTHRES_LO BIT(7)
54
-
#define PVT_INTR_HTHRES_HI BIT(8)
55
-
#define PVT_INTR_STHRES_LO BIT(9)
56
-
#define PVT_INTR_STHRES_HI BIT(10)
57
-
#define PVT_INTR_ALL GENMASK(10, 0)
58
-
#define PVT_CLR_INTR 0x2C
59
-
60
-
/*
61
-
* PVT sensors-related limits and default values
62
-
* @PVT_TEMP_MIN: Minimal temperature in millidegrees of Celsius.
63
-
* @PVT_TEMP_MAX: Maximal temperature in millidegrees of Celsius.
64
-
* @PVT_TEMP_CHS: Number of temperature hwmon channels.
65
-
* @PVT_VOLT_MIN: Minimal voltage in mV.
66
-
* @PVT_VOLT_MAX: Maximal voltage in mV.
67
-
* @PVT_VOLT_CHS: Number of voltage hwmon channels.
68
-
* @PVT_DATA_MIN: Minimal PVT raw data value.
69
-
* @PVT_DATA_MAX: Maximal PVT raw data value.
70
-
* @PVT_TRIM_MIN: Minimal temperature sensor trim value.
71
-
* @PVT_TRIM_MAX: Maximal temperature sensor trim value.
72
-
* @PVT_TRIM_DEF: Default temperature sensor trim value (set a proper value
73
-
* when one is determined for Baikal-T1 SoC).
74
-
* @PVT_TRIM_TEMP: Maximum temperature encoded by the trim factor.
75
-
* @PVT_TRIM_STEP: Temperature stride corresponding to the trim value.
76
-
* @PVT_TOUT_MIN: Minimal timeout between samples in nanoseconds.
77
-
* @PVT_TOUT_DEF: Default data measurements timeout. In case if alarms are
78
-
* activated the PVT IRQ is enabled to be raised after each
79
-
* conversion in order to have the thresholds checked and the
80
-
* converted value cached. Too frequent conversions may cause
81
-
* the system CPU overload. Lets set the 50ms delay between
82
-
* them by default to prevent this.
83
-
*/
84
-
#define PVT_TEMP_MIN -48380L
85
-
#define PVT_TEMP_MAX 147438L
86
-
#define PVT_TEMP_CHS 1
87
-
#define PVT_VOLT_MIN 620L
88
-
#define PVT_VOLT_MAX 1168L
89
-
#define PVT_VOLT_CHS 4
90
-
#define PVT_DATA_MIN 0
91
-
#define PVT_DATA_MAX (PVT_DATA_DATA_MASK >> PVT_DATA_DATA_FLD)
92
-
#define PVT_TRIM_MIN 0
93
-
#define PVT_TRIM_MAX (PVT_CTRL_TRIM_MASK >> PVT_CTRL_TRIM_FLD)
94
-
#define PVT_TRIM_TEMP 7130
95
-
#define PVT_TRIM_STEP (PVT_TRIM_TEMP / PVT_TRIM_MAX)
96
-
#define PVT_TRIM_DEF 0
97
-
#define PVT_TOUT_MIN (NSEC_PER_SEC / 3000)
98
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
99
-
# define PVT_TOUT_DEF 60000
100
-
#else
101
-
# define PVT_TOUT_DEF 0
102
-
#endif
103
-
104
-
/*
105
-
* enum pvt_sensor_type - Baikal-T1 PVT sensor types (correspond to each PVT
106
-
* sampling mode)
107
-
* @PVT_SENSOR*: helpers to traverse the sensors in loops.
108
-
* @PVT_TEMP: PVT Temperature sensor.
109
-
* @PVT_VOLT: PVT Voltage sensor.
110
-
* @PVT_LVT: PVT Low-Voltage threshold sensor.
111
-
* @PVT_HVT: PVT High-Voltage threshold sensor.
112
-
* @PVT_SVT: PVT Standard-Voltage threshold sensor.
113
-
*/
114
-
enum pvt_sensor_type {
115
-
PVT_SENSOR_FIRST,
116
-
PVT_TEMP = PVT_SENSOR_FIRST,
117
-
PVT_VOLT,
118
-
PVT_LVT,
119
-
PVT_HVT,
120
-
PVT_SVT,
121
-
PVT_SENSOR_LAST = PVT_SVT,
122
-
PVT_SENSORS_NUM
123
-
};
124
-
125
-
/*
126
-
* enum pvt_clock_type - Baikal-T1 PVT clocks.
127
-
* @PVT_CLOCK_APB: APB clock.
128
-
* @PVT_CLOCK_REF: PVT reference clock.
129
-
*/
130
-
enum pvt_clock_type {
131
-
PVT_CLOCK_APB,
132
-
PVT_CLOCK_REF,
133
-
PVT_CLOCK_NUM
134
-
};
135
-
136
-
/*
137
-
* struct pvt_sensor_info - Baikal-T1 PVT sensor informational structure
138
-
* @channel: Sensor channel ID.
139
-
* @label: hwmon sensor label.
140
-
* @mode: PVT mode corresponding to the channel.
141
-
* @thres_base: upper and lower threshold values of the sensor.
142
-
* @thres_sts_lo: low threshold status bitfield.
143
-
* @thres_sts_hi: high threshold status bitfield.
144
-
* @type: Sensor type.
145
-
* @attr_min_alarm: Min alarm attribute ID.
146
-
* @attr_min_alarm: Max alarm attribute ID.
147
-
*/
148
-
struct pvt_sensor_info {
149
-
int channel;
150
-
const char *label;
151
-
u32 mode;
152
-
unsigned long thres_base;
153
-
u32 thres_sts_lo;
154
-
u32 thres_sts_hi;
155
-
enum hwmon_sensor_types type;
156
-
u32 attr_min_alarm;
157
-
u32 attr_max_alarm;
158
-
};
159
-
160
-
#define PVT_SENSOR_INFO(_ch, _label, _type, _mode, _thres) \
161
-
{ \
162
-
.channel = _ch, \
163
-
.label = _label, \
164
-
.mode = PVT_CTRL_MODE_ ##_mode, \
165
-
.thres_base = PVT_ ##_thres, \
166
-
.thres_sts_lo = PVT_INTR_ ##_thres## _LO, \
167
-
.thres_sts_hi = PVT_INTR_ ##_thres## _HI, \
168
-
.type = _type, \
169
-
.attr_min_alarm = _type## _min, \
170
-
.attr_max_alarm = _type## _max, \
171
-
}
172
-
173
-
/*
174
-
* struct pvt_cache - PVT sensors data cache
175
-
* @data: data cache in raw format.
176
-
* @thres_sts_lo: low threshold status saved on the previous data conversion.
177
-
* @thres_sts_hi: high threshold status saved on the previous data conversion.
178
-
* @data_seqlock: cached data seq-lock.
179
-
* @conversion: data conversion completion.
180
-
*/
181
-
struct pvt_cache {
182
-
u32 data;
183
-
#if defined(CONFIG_SENSORS_BT1_PVT_ALARMS)
184
-
seqlock_t data_seqlock;
185
-
u32 thres_sts_lo;
186
-
u32 thres_sts_hi;
187
-
#else
188
-
struct completion conversion;
189
-
#endif
190
-
};
191
-
192
-
/*
193
-
* struct pvt_hwmon - Baikal-T1 PVT private data
194
-
* @dev: device structure of the PVT platform device.
195
-
* @hwmon: hwmon device structure.
196
-
* @regs: pointer to the Baikal-T1 PVT registers region.
197
-
* @irq: PVT events IRQ number.
198
-
* @clks: Array of the PVT clocks descriptor (APB/ref clocks).
199
-
* @ref_clk: Pointer to the reference clocks descriptor.
200
-
* @iface_mtx: Generic interface mutex (used to lock the alarm registers
201
-
* when the alarms enabled, or the data conversion interface
202
-
* if alarms are disabled).
203
-
* @sensor: current PVT sensor the data conversion is being performed for.
204
-
* @cache: data cache descriptor.
205
-
* @timeout: conversion timeout cache.
206
-
*/
207
-
struct pvt_hwmon {
208
-
struct device *dev;
209
-
struct device *hwmon;
210
-
211
-
void __iomem *regs;
212
-
int irq;
213
-
214
-
struct clk_bulk_data clks[PVT_CLOCK_NUM];
215
-
216
-
struct mutex iface_mtx;
217
-
enum pvt_sensor_type sensor;
218
-
struct pvt_cache cache[PVT_SENSORS_NUM];
219
-
ktime_t timeout;
220
-
};
221
-
222
-
/*
223
-
* struct pvt_poly_term - a term descriptor of the PVT data translation
224
-
* polynomial
225
-
* @deg: degree of the term.
226
-
* @coef: multiplication factor of the term.
227
-
* @divider: distributed divider per each degree.
228
-
* @divider_leftover: divider leftover, which couldn't be redistributed.
229
-
*/
230
-
struct pvt_poly_term {
231
-
unsigned int deg;
232
-
long coef;
233
-
long divider;
234
-
long divider_leftover;
235
-
};
236
-
237
-
/*
238
-
* struct pvt_poly - PVT data translation polynomial descriptor
239
-
* @total_divider: total data divider.
240
-
* @terms: polynomial terms up to a free one.
241
-
*/
242
-
struct pvt_poly {
243
-
long total_divider;
244
-
struct pvt_poly_term terms[];
245
-
};
246
-
247
-
#endif /* __HWMON_BT1_PVT_H__ */
+1
-1
drivers/hwmon/emc1403.c
+1
-1
drivers/hwmon/emc1403.c
···
40
40
retval = regmap_read(data->regmap, 0x03, &val);
41
41
if (retval < 0)
42
42
return retval;
43
-
return sprintf(buf, "%d\n", !!(val & BIT(6)));
43
+
return sysfs_emit(buf, "%d\n", !!(val & BIT(6)));
44
44
}
45
45
46
46
static ssize_t power_state_store(struct device *dev, struct device_attribute *attr,
+8
drivers/hwmon/gpd-fan.c
+8
drivers/hwmon/gpd-fan.c
···
210
210
.driver_data = &gpd_duo_drvdata,
211
211
},
212
212
{
213
+
// GPD Win 5 with AMD AI MAX 395
214
+
.matches = {
215
+
DMI_MATCH(DMI_SYS_VENDOR, "GPD"),
216
+
DMI_MATCH(DMI_PRODUCT_NAME, "G1618-05"),
217
+
},
218
+
.driver_data = &gpd_duo_drvdata,
219
+
},
220
+
{
213
221
// GPD Pocket 4
214
222
.matches = {
215
223
DMI_MATCH(DMI_SYS_VENDOR, "GPD"),
+1
drivers/hwmon/hwmon.c
+1
drivers/hwmon/hwmon.c
···
505
505
(type == hwmon_curr && attr == hwmon_curr_label) ||
506
506
(type == hwmon_power && attr == hwmon_power_label) ||
507
507
(type == hwmon_energy && attr == hwmon_energy_label) ||
508
+
(type == hwmon_energy64 && attr == hwmon_energy_label) ||
508
509
(type == hwmon_humidity && attr == hwmon_humidity_label) ||
509
510
(type == hwmon_fan && attr == hwmon_fan_label);
510
511
}
+2
-9
drivers/hwmon/ina209.c
+2
-9
drivers/hwmon/ina209.c
···
27
27
#include <linux/hwmon.h>
28
28
#include <linux/hwmon-sysfs.h>
29
29
30
-
#include <linux/platform_data/ina2xx.h>
31
-
32
30
/* register definitions */
33
31
#define INA209_CONFIGURATION 0x00
34
32
#define INA209_STATUS 0x01
···
485
487
static int ina209_init_client(struct i2c_client *client,
486
488
struct ina209_data *data)
487
489
{
488
-
struct ina2xx_platform_data *pdata = dev_get_platdata(&client->dev);
489
490
u32 shunt;
490
491
int reg;
491
492
···
498
501
return reg;
499
502
data->config_orig = reg;
500
503
501
-
if (pdata) {
502
-
if (pdata->shunt_uohms <= 0)
503
-
return -EINVAL;
504
-
shunt = pdata->shunt_uohms;
505
-
} else if (!of_property_read_u32(client->dev.of_node, "shunt-resistor",
506
-
&shunt)) {
504
+
if (!of_property_read_u32(client->dev.of_node, "shunt-resistor",
505
+
&shunt)) {
507
506
if (shunt == 0)
508
507
return -EINVAL;
509
508
} else {
+52
-24
drivers/hwmon/ina2xx.c
+52
-24
drivers/hwmon/ina2xx.c
···
1
1
// SPDX-License-Identifier: GPL-2.0-only
2
2
/*
3
-
* Driver for Texas Instruments INA219, INA226 power monitor chips
4
-
*
5
-
* INA219:
6
-
* Zero Drift Bi-Directional Current/Power Monitor with I2C Interface
7
-
* Datasheet: https://www.ti.com/product/ina219
8
-
*
9
-
* INA220:
10
-
* Bi-Directional Current/Power Monitor with I2C Interface
11
-
* Datasheet: https://www.ti.com/product/ina220
12
-
*
13
-
* INA226:
14
-
* Bi-Directional Current/Power Monitor with I2C Interface
15
-
* Datasheet: https://www.ti.com/product/ina226
16
-
*
17
-
* INA230:
18
-
* Bi-directional Current/Power Monitor with I2C Interface
19
-
* Datasheet: https://www.ti.com/product/ina230
3
+
* Driver for Texas Instruments INA219, INA226 and register-layout compatible
4
+
* current/power monitor chips with I2C Interface
20
5
*
21
6
* Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com>
22
7
* Thanks to Jan Volkering
···
34
49
/* INA226 register definitions */
35
50
#define INA226_MASK_ENABLE 0x06
36
51
#define INA226_ALERT_LIMIT 0x07
37
-
#define INA226_DIE_ID 0xFF
38
52
39
53
/* SY24655 register definitions */
40
54
#define SY24655_EIN 0x0A
···
119
135
.writeable_reg = ina2xx_writeable_reg,
120
136
};
121
137
122
-
enum ina2xx_ids { ina219, ina226, ina260, sy24655 };
138
+
enum ina2xx_ids {
139
+
ina219,
140
+
ina226,
141
+
ina234,
142
+
ina260,
143
+
sy24655
144
+
};
123
145
124
146
struct ina2xx_config {
125
147
u16 config_default;
126
148
bool has_alerts; /* chip supports alerts and limits */
127
149
bool has_ishunt; /* chip has internal shunt resistor */
128
-
bool has_power_average; /* chip has internal shunt resistor */
150
+
bool has_power_average; /* chip supports average power */
151
+
bool has_update_interval;
129
152
int calibration_value;
130
153
int shunt_div;
154
+
int shunt_voltage_shift;
131
155
int bus_voltage_shift;
132
156
int bus_voltage_lsb; /* uV */
133
157
int power_lsb_factor;
158
+
int current_shift;
134
159
};
135
160
136
161
struct ina2xx_data {
···
158
165
.config_default = INA219_CONFIG_DEFAULT,
159
166
.calibration_value = 4096,
160
167
.shunt_div = 100,
168
+
.shunt_voltage_shift = 0,
161
169
.bus_voltage_shift = 3,
162
170
.bus_voltage_lsb = 4000,
163
171
.power_lsb_factor = 20,
164
172
.has_alerts = false,
165
173
.has_ishunt = false,
166
174
.has_power_average = false,
175
+
.current_shift = 0,
176
+
.has_update_interval = false,
167
177
},
168
178
[ina226] = {
169
179
.config_default = INA226_CONFIG_DEFAULT,
170
180
.calibration_value = 2048,
171
181
.shunt_div = 400,
182
+
.shunt_voltage_shift = 0,
172
183
.bus_voltage_shift = 0,
173
184
.bus_voltage_lsb = 1250,
174
185
.power_lsb_factor = 25,
175
186
.has_alerts = true,
176
187
.has_ishunt = false,
177
188
.has_power_average = false,
189
+
.current_shift = 0,
190
+
.has_update_interval = true,
191
+
},
192
+
[ina234] = {
193
+
.config_default = INA226_CONFIG_DEFAULT,
194
+
.calibration_value = 2048,
195
+
.shunt_div = 25, /* 2.5 µV/LSB raw ADC reading from INA2XX_SHUNT_VOLTAGE */
196
+
.shunt_voltage_shift = 4,
197
+
.bus_voltage_shift = 4,
198
+
.bus_voltage_lsb = 25600,
199
+
.power_lsb_factor = 32,
200
+
.has_alerts = true,
201
+
.has_ishunt = false,
202
+
.has_power_average = false,
203
+
.current_shift = 4,
204
+
.has_update_interval = true,
178
205
},
179
206
[ina260] = {
180
207
.config_default = INA260_CONFIG_DEFAULT,
181
208
.shunt_div = 400,
209
+
.shunt_voltage_shift = 0,
182
210
.bus_voltage_shift = 0,
183
211
.bus_voltage_lsb = 1250,
184
212
.power_lsb_factor = 8,
185
213
.has_alerts = true,
186
214
.has_ishunt = true,
187
215
.has_power_average = false,
216
+
.current_shift = 0,
217
+
.has_update_interval = true,
188
218
},
189
219
[sy24655] = {
190
220
.config_default = SY24655_CONFIG_DEFAULT,
191
221
.calibration_value = 4096,
192
222
.shunt_div = 400,
223
+
.shunt_voltage_shift = 0,
193
224
.bus_voltage_shift = 0,
194
225
.bus_voltage_lsb = 1250,
195
226
.power_lsb_factor = 25,
196
227
.has_alerts = true,
197
228
.has_ishunt = false,
198
229
.has_power_average = true,
230
+
.current_shift = 0,
231
+
.has_update_interval = false,
199
232
},
200
233
};
201
234
···
274
255
switch (reg) {
275
256
case INA2XX_SHUNT_VOLTAGE:
276
257
/* signed register */
277
-
val = DIV_ROUND_CLOSEST((s16)regval, data->config->shunt_div);
258
+
val = (s16)regval >> data->config->shunt_voltage_shift;
259
+
val = DIV_ROUND_CLOSEST(val, data->config->shunt_div);
278
260
break;
279
261
case INA2XX_BUS_VOLTAGE:
280
262
val = (regval >> data->config->bus_voltage_shift) *
···
287
267
break;
288
268
case INA2XX_CURRENT:
289
269
/* signed register, result in mA */
290
-
val = (s16)regval * data->current_lsb_uA;
270
+
val = ((s16)regval >> data->config->current_shift) *
271
+
data->current_lsb_uA;
291
272
val = DIV_ROUND_CLOSEST(val, 1000);
292
273
break;
293
274
case INA2XX_CALIBRATION:
···
382
361
case INA2XX_SHUNT_VOLTAGE:
383
362
val = clamp_val(val, 0, SHRT_MAX * data->config->shunt_div);
384
363
val *= data->config->shunt_div;
364
+
val <<= data->config->shunt_voltage_shift;
385
365
return clamp_val(val, 0, SHRT_MAX);
386
366
case INA2XX_BUS_VOLTAGE:
387
367
val = clamp_val(val, 0, 200000);
···
397
375
val = clamp_val(val, INT_MIN / 1000, INT_MAX / 1000);
398
376
/* signed register, result in mA */
399
377
val = DIV_ROUND_CLOSEST(val * 1000, data->current_lsb_uA);
378
+
val <<= data->config->current_shift;
400
379
return clamp_val(val, SHRT_MIN, SHRT_MAX);
401
380
default:
402
381
/* programmer goofed */
···
729
706
const struct ina2xx_data *data = _data;
730
707
bool has_alerts = data->config->has_alerts;
731
708
bool has_power_average = data->config->has_power_average;
732
-
enum ina2xx_ids chip = data->chip;
709
+
bool has_update_interval = data->config->has_update_interval;
733
710
734
711
switch (type) {
735
712
case hwmon_in:
···
791
768
case hwmon_chip:
792
769
switch (attr) {
793
770
case hwmon_chip_update_interval:
794
-
if (chip == ina226 || chip == ina260)
771
+
if (has_update_interval)
795
772
return 0644;
796
773
break;
797
774
default:
···
1005
982
{ "ina226", ina226 },
1006
983
{ "ina230", ina226 },
1007
984
{ "ina231", ina226 },
985
+
{ "ina234", ina234 },
1008
986
{ "ina260", ina260 },
1009
987
{ "sy24655", sy24655 },
1010
988
{ }
···
1036
1012
{
1037
1013
.compatible = "ti,ina231",
1038
1014
.data = (void *)ina226
1015
+
},
1016
+
{
1017
+
.compatible = "ti,ina234",
1018
+
.data = (void *)ina234
1039
1019
},
1040
1020
{
1041
1021
.compatible = "ti,ina260",
+27
-20
drivers/hwmon/isl28022.c
+27
-20
drivers/hwmon/isl28022.c
···
9
9
#include <linux/err.h>
10
10
#include <linux/hwmon.h>
11
11
#include <linux/i2c.h>
12
+
#include <linux/math64.h>
12
13
#include <linux/module.h>
13
14
#include <linux/regmap.h>
14
15
···
186
185
ISL28022_REG_POWER, ®val);
187
186
if (err < 0)
188
187
return err;
189
-
*val = ((51200000L * ((long)data->gain)) /
190
-
(long)data->shunt) * (long)regval;
188
+
*val = min(div_u64(51200000ULL * data->gain * regval,
189
+
data->shunt), LONG_MAX);
191
190
break;
192
191
default:
193
192
return -EOPNOTSUPP;
···
338
337
*/
339
338
static int isl28022_read_properties(struct device *dev, struct isl28022_data *data)
340
339
{
340
+
const char *propname;
341
341
u32 val;
342
342
int err;
343
343
344
-
err = device_property_read_u32(dev, "shunt-resistor-micro-ohms", &val);
345
-
if (err == -EINVAL)
344
+
propname = "shunt-resistor-micro-ohms";
345
+
if (device_property_present(dev, propname)) {
346
+
err = device_property_read_u32(dev, propname, &val);
347
+
if (err)
348
+
return err;
349
+
} else {
346
350
val = 10000;
347
-
else if (err < 0)
348
-
return err;
351
+
}
349
352
data->shunt = val;
350
353
351
-
err = device_property_read_u32(dev, "renesas,shunt-range-microvolt", &val);
352
-
if (err == -EINVAL)
354
+
propname = "renesas,shunt-range-microvolt";
355
+
if (device_property_present(dev, propname)) {
356
+
err = device_property_read_u32(dev, propname, &val);
357
+
if (err)
358
+
return err;
359
+
} else {
353
360
val = 320000;
354
-
else if (err < 0)
355
-
return err;
361
+
}
356
362
357
363
switch (val) {
358
364
case 40000:
···
383
375
goto shunt_invalid;
384
376
break;
385
377
default:
386
-
return dev_err_probe(dev, -EINVAL,
387
-
"renesas,shunt-range-microvolt invalid value %d\n",
388
-
val);
378
+
return dev_err_probe(dev, -EINVAL, "%s invalid value %u\n", propname, val);
389
379
}
390
380
391
-
err = device_property_read_u32(dev, "renesas,average-samples", &val);
392
-
if (err == -EINVAL)
381
+
propname = "renesas,average-samples";
382
+
if (device_property_present(dev, propname)) {
383
+
err = device_property_read_u32(dev, propname, &val);
384
+
if (err)
385
+
return err;
386
+
} else {
393
387
val = 1;
394
-
else if (err < 0)
395
-
return err;
388
+
}
396
389
if (val > 128 || hweight32(val) != 1)
397
-
return dev_err_probe(dev, -EINVAL,
398
-
"renesas,average-samples invalid value %d\n",
399
-
val);
390
+
return dev_err_probe(dev, -EINVAL, "%s invalid value %u\n", propname, val);
400
391
401
392
data->average = val;
402
393
+60
-1
drivers/hwmon/it87.c
+60
-1
drivers/hwmon/it87.c
···
16
16
* IT8622E Super I/O chip w/LPC interface
17
17
* IT8623E Super I/O chip w/LPC interface
18
18
* IT8628E Super I/O chip w/LPC interface
19
+
* IT8689E Super I/O chip w/LPC interface
19
20
* IT8705F Super I/O chip w/LPC interface
20
21
* IT8712F Super I/O chip w/LPC interface
21
22
* IT8716F Super I/O chip w/LPC interface
···
65
64
66
65
enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
67
66
it8771, it8772, it8781, it8782, it8783, it8786, it8790,
68
-
it8792, it8603, it8620, it8622, it8628, it87952 };
67
+
it8792, it8603, it8620, it8622, it8628, it8689, it87952 };
69
68
70
69
static struct platform_device *it87_pdev[2];
71
70
···
163
162
#define IT8622E_DEVID 0x8622
164
163
#define IT8623E_DEVID 0x8623
165
164
#define IT8628E_DEVID 0x8628
165
+
#define IT8689E_DEVID 0x8689
166
166
#define IT87952E_DEVID 0x8695
167
167
168
168
/* Logical device 4 (Environmental Monitor) registers */
···
503
501
| FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
504
502
| FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF,
505
503
.peci_mask = 0x07,
504
+
},
505
+
[it8689] = {
506
+
.name = "it8689",
507
+
.model = "IT8689E",
508
+
.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
509
+
| FEAT_TEMP_OFFSET | FEAT_SIX_FANS | FEAT_IN7_INTERNAL
510
+
| FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_AVCC3
511
+
| FEAT_FANCTL_ONOFF,
512
+
.smbus_bitmap = BIT(1) | BIT(2),
506
513
},
507
514
[it87952] = {
508
515
.name = "it87952",
···
2796
2785
case IT8628E_DEVID:
2797
2786
sio_data->type = it8628;
2798
2787
break;
2788
+
case IT8689E_DEVID:
2789
+
sio_data->type = it8689;
2790
+
break;
2799
2791
case IT87952E_DEVID:
2800
2792
sio_data->type = it87952;
2801
2793
break;
···
3013
2999
sio_data->internal |= BIT(0);
3014
3000
else
3015
3001
sio_data->skip_in |= BIT(9);
3002
+
3003
+
sio_data->beep_pin = superio_inb(sioaddr,
3004
+
IT87_SIO_BEEP_PIN_REG) & 0x3f;
3005
+
} else if (sio_data->type == it8689) {
3006
+
int reg;
3007
+
3008
+
superio_select(sioaddr, GPIO);
3009
+
3010
+
/* Check for pwm5 */
3011
+
reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3012
+
if (reg & BIT(6))
3013
+
sio_data->skip_pwm |= BIT(4);
3014
+
3015
+
/* Check for fan4, fan5 */
3016
+
reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3017
+
if (!(reg & BIT(5)))
3018
+
sio_data->skip_fan |= BIT(3);
3019
+
if (!(reg & BIT(4)))
3020
+
sio_data->skip_fan |= BIT(4);
3021
+
3022
+
/* Check for pwm3, fan3 */
3023
+
reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3024
+
if (reg & BIT(6))
3025
+
sio_data->skip_pwm |= BIT(2);
3026
+
if (reg & BIT(7))
3027
+
sio_data->skip_fan |= BIT(2);
3028
+
3029
+
/* Check for pwm4 */
3030
+
reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3031
+
if (reg & BIT(2))
3032
+
sio_data->skip_pwm |= BIT(3);
3033
+
3034
+
/* Check for pwm2, fan2 */
3035
+
reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3036
+
if (reg & BIT(1))
3037
+
sio_data->skip_pwm |= BIT(1);
3038
+
if (reg & BIT(2))
3039
+
sio_data->skip_fan |= BIT(1);
3040
+
/* Check for pwm6, fan6 */
3041
+
if (!(reg & BIT(7))) {
3042
+
sio_data->skip_pwm |= BIT(5);
3043
+
sio_data->skip_fan |= BIT(5);
3044
+
}
3045
+
3046
+
/* in9 (AVCC3) is always internal, no PINX2 check needed */
3016
3047
3017
3048
sio_data->beep_pin = superio_inb(sioaddr,
3018
3049
IT87_SIO_BEEP_PIN_REG) & 0x3f;
+359
drivers/hwmon/lattepanda-sigma-ec.c
+359
drivers/hwmon/lattepanda-sigma-ec.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Hardware monitoring driver for LattePanda Sigma EC.
4
+
*
5
+
* The LattePanda Sigma is an x86 SBC made by DFRobot with an ITE IT8613E
6
+
* Embedded Controller that manages a CPU fan and thermal sensors.
7
+
*
8
+
* The BIOS declares the ACPI Embedded Controller (PNP0C09) with _STA
9
+
* returning 0 and provides only stub ECRD/ECWT methods that return Zero
10
+
* for all registers. Since the kernel's ACPI EC subsystem never initializes,
11
+
* ec_read() is not available and direct port I/O to the standard ACPI EC
12
+
* ports (0x62/0x66) is used instead.
13
+
*
14
+
* Because ACPI never initializes the EC, there is no concurrent firmware
15
+
* access to these ports, and no ACPI Global Lock or namespace mutex is
16
+
* required. The hwmon with_info API serializes all sysfs callbacks,
17
+
* so no additional driver-level locking is needed.
18
+
*
19
+
* The EC register map was discovered by dumping all 256 registers,
20
+
* identifying those that change in real-time, and validating by physically
21
+
* stopping the fan and observing the RPM register drop to zero. The map
22
+
* has been verified on BIOS version 5.27; other versions may differ.
23
+
*
24
+
* Copyright (c) 2026 Mariano Abad <weimaraner@gmail.com>
25
+
*/
26
+
27
+
#include <linux/delay.h>
28
+
#include <linux/dmi.h>
29
+
#include <linux/hwmon.h>
30
+
#include <linux/io.h>
31
+
#include <linux/ioport.h>
32
+
#include <linux/module.h>
33
+
#include <linux/platform_device.h>
34
+
35
+
#define DRIVER_NAME "lattepanda_sigma_ec"
36
+
37
+
/* EC I/O ports (standard ACPI EC interface) */
38
+
#define EC_DATA_PORT 0x62
39
+
#define EC_CMD_PORT 0x66 /* also status port */
40
+
41
+
/* EC commands */
42
+
#define EC_CMD_READ 0x80
43
+
44
+
/* EC status register bits */
45
+
#define EC_STATUS_OBF 0x01 /* Output Buffer Full */
46
+
#define EC_STATUS_IBF 0x02 /* Input Buffer Full */
47
+
48
+
/* EC register offsets for LattePanda Sigma (BIOS 5.27) */
49
+
#define EC_REG_FAN_RPM_HI 0x2E
50
+
#define EC_REG_FAN_RPM_LO 0x2F
51
+
#define EC_REG_TEMP_BOARD 0x60
52
+
#define EC_REG_TEMP_CPU 0x70
53
+
#define EC_REG_FAN_DUTY 0x93
54
+
55
+
/*
56
+
* EC polling uses udelay() because the EC typically responds within a
57
+
* few microseconds. The kernel's own ACPI EC driver (drivers/acpi/ec.c)
58
+
* likewise uses udelay() for busy-polling with a per-poll delay of 550us.
59
+
*
60
+
* usleep_range() was tested but caused EC protocol failures: the EC
61
+
* clears its status flags within microseconds, and sleeping for 50-100us
62
+
* between polls allowed the flags to transition past the expected state.
63
+
*
64
+
* The worst-case total busy-wait of 25ms covers EC recovery after errors.
65
+
* In practice the EC responds within 10us so the loop exits immediately.
66
+
*/
67
+
#define EC_TIMEOUT_US 25000
68
+
#define EC_POLL_US 1
69
+
70
+
static bool force;
71
+
module_param(force, bool, 0444);
72
+
MODULE_PARM_DESC(force,
73
+
"Force loading on untested BIOS versions (default: false)");
74
+
75
+
static struct platform_device *lps_ec_pdev;
76
+
77
+
static int ec_wait_ibf_clear(void)
78
+
{
79
+
int i;
80
+
81
+
for (i = 0; i < EC_TIMEOUT_US; i++) {
82
+
if (!(inb(EC_CMD_PORT) & EC_STATUS_IBF))
83
+
return 0;
84
+
udelay(EC_POLL_US);
85
+
}
86
+
return -ETIMEDOUT;
87
+
}
88
+
89
+
static int ec_wait_obf_set(void)
90
+
{
91
+
int i;
92
+
93
+
for (i = 0; i < EC_TIMEOUT_US; i++) {
94
+
if (inb(EC_CMD_PORT) & EC_STATUS_OBF)
95
+
return 0;
96
+
udelay(EC_POLL_US);
97
+
}
98
+
return -ETIMEDOUT;
99
+
}
100
+
101
+
static int ec_read_reg(u8 reg, u8 *val)
102
+
{
103
+
int ret;
104
+
105
+
ret = ec_wait_ibf_clear();
106
+
if (ret)
107
+
return ret;
108
+
109
+
outb(EC_CMD_READ, EC_CMD_PORT);
110
+
111
+
ret = ec_wait_ibf_clear();
112
+
if (ret)
113
+
return ret;
114
+
115
+
outb(reg, EC_DATA_PORT);
116
+
117
+
ret = ec_wait_obf_set();
118
+
if (ret)
119
+
return ret;
120
+
121
+
*val = inb(EC_DATA_PORT);
122
+
return 0;
123
+
}
124
+
125
+
/*
126
+
* Read a 16-bit big-endian value from two consecutive EC registers.
127
+
*
128
+
* The EC may update the register pair between reading the high and low
129
+
* bytes, which could produce a corrupted value if the high byte rolls
130
+
* over (e.g., 0x0100 -> 0x00FF read as 0x01FF). Guard against this by
131
+
* re-reading the high byte after reading the low byte. If the high byte
132
+
* changed, re-read the low byte to get a consistent pair.
133
+
* See also lm90_read16() which uses the same approach.
134
+
*/
135
+
static int ec_read_reg16(u8 reg_hi, u8 reg_lo, u16 *val)
136
+
{
137
+
int ret;
138
+
u8 oldh, newh, lo;
139
+
140
+
ret = ec_read_reg(reg_hi, &oldh);
141
+
if (ret)
142
+
return ret;
143
+
144
+
ret = ec_read_reg(reg_lo, &lo);
145
+
if (ret)
146
+
return ret;
147
+
148
+
ret = ec_read_reg(reg_hi, &newh);
149
+
if (ret)
150
+
return ret;
151
+
152
+
if (oldh != newh) {
153
+
ret = ec_read_reg(reg_lo, &lo);
154
+
if (ret)
155
+
return ret;
156
+
}
157
+
158
+
*val = ((u16)newh << 8) | lo;
159
+
return 0;
160
+
}
161
+
162
+
static int
163
+
lps_ec_read_string(struct device *dev,
164
+
enum hwmon_sensor_types type,
165
+
u32 attr, int channel,
166
+
const char **str)
167
+
{
168
+
switch (type) {
169
+
case hwmon_fan:
170
+
*str = "CPU Fan";
171
+
return 0;
172
+
case hwmon_temp:
173
+
*str = channel == 0 ? "Board Temp" : "CPU Temp";
174
+
return 0;
175
+
default:
176
+
return -EOPNOTSUPP;
177
+
}
178
+
}
179
+
180
+
static umode_t
181
+
lps_ec_is_visible(const void *drvdata,
182
+
enum hwmon_sensor_types type,
183
+
u32 attr, int channel)
184
+
{
185
+
switch (type) {
186
+
case hwmon_fan:
187
+
if (attr == hwmon_fan_input || attr == hwmon_fan_label)
188
+
return 0444;
189
+
break;
190
+
case hwmon_temp:
191
+
if (attr == hwmon_temp_input || attr == hwmon_temp_label)
192
+
return 0444;
193
+
break;
194
+
default:
195
+
break;
196
+
}
197
+
return 0;
198
+
}
199
+
200
+
static int
201
+
lps_ec_read(struct device *dev,
202
+
enum hwmon_sensor_types type,
203
+
u32 attr, int channel, long *val)
204
+
{
205
+
u16 rpm;
206
+
u8 v;
207
+
int ret;
208
+
209
+
switch (type) {
210
+
case hwmon_fan:
211
+
if (attr != hwmon_fan_input)
212
+
return -EOPNOTSUPP;
213
+
ret = ec_read_reg16(EC_REG_FAN_RPM_HI,
214
+
EC_REG_FAN_RPM_LO, &rpm);
215
+
if (ret)
216
+
return ret;
217
+
*val = rpm;
218
+
return 0;
219
+
220
+
case hwmon_temp:
221
+
if (attr != hwmon_temp_input)
222
+
return -EOPNOTSUPP;
223
+
ret = ec_read_reg(channel == 0 ? EC_REG_TEMP_BOARD
224
+
: EC_REG_TEMP_CPU,
225
+
&v);
226
+
if (ret)
227
+
return ret;
228
+
/* EC reports unsigned 8-bit temperature in degrees Celsius */
229
+
*val = (unsigned long)v * 1000;
230
+
return 0;
231
+
232
+
default:
233
+
return -EOPNOTSUPP;
234
+
}
235
+
}
236
+
237
+
static const struct hwmon_channel_info * const lps_ec_info[] = {
238
+
HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_LABEL),
239
+
HWMON_CHANNEL_INFO(temp,
240
+
HWMON_T_INPUT | HWMON_T_LABEL,
241
+
HWMON_T_INPUT | HWMON_T_LABEL),
242
+
NULL
243
+
};
244
+
245
+
static const struct hwmon_ops lps_ec_ops = {
246
+
.is_visible = lps_ec_is_visible,
247
+
.read = lps_ec_read,
248
+
.read_string = lps_ec_read_string,
249
+
};
250
+
251
+
static const struct hwmon_chip_info lps_ec_chip_info = {
252
+
.ops = &lps_ec_ops,
253
+
.info = lps_ec_info,
254
+
};
255
+
256
+
static int lps_ec_probe(struct platform_device *pdev)
257
+
{
258
+
struct device *dev = &pdev->dev;
259
+
struct device *hwmon;
260
+
u8 test;
261
+
int ret;
262
+
263
+
if (!devm_request_region(dev, EC_DATA_PORT, 1, DRIVER_NAME))
264
+
return dev_err_probe(dev, -EBUSY,
265
+
"Failed to request EC data port 0x%x\n",
266
+
EC_DATA_PORT);
267
+
268
+
if (!devm_request_region(dev, EC_CMD_PORT, 1, DRIVER_NAME))
269
+
return dev_err_probe(dev, -EBUSY,
270
+
"Failed to request EC cmd port 0x%x\n",
271
+
EC_CMD_PORT);
272
+
273
+
/* Sanity check: verify EC is responsive */
274
+
ret = ec_read_reg(EC_REG_FAN_DUTY, &test);
275
+
if (ret)
276
+
return dev_err_probe(dev, ret,
277
+
"EC not responding on ports 0x%x/0x%x\n",
278
+
EC_DATA_PORT, EC_CMD_PORT);
279
+
280
+
hwmon = devm_hwmon_device_register_with_info(dev, DRIVER_NAME, NULL,
281
+
&lps_ec_chip_info, NULL);
282
+
if (IS_ERR(hwmon))
283
+
return dev_err_probe(dev, PTR_ERR(hwmon),
284
+
"Failed to register hwmon device\n");
285
+
286
+
dev_info(dev, "EC hwmon registered (fan duty: %u%%)\n", test);
287
+
return 0;
288
+
}
289
+
290
+
/* DMI table with strict BIOS version match (override with force=1) */
291
+
static const struct dmi_system_id lps_ec_dmi_table[] = {
292
+
{
293
+
.ident = "LattePanda Sigma",
294
+
.matches = {
295
+
DMI_MATCH(DMI_SYS_VENDOR, "LattePanda"),
296
+
DMI_MATCH(DMI_PRODUCT_NAME, "LattePanda Sigma"),
297
+
DMI_MATCH(DMI_BIOS_VERSION, "5.27"),
298
+
},
299
+
},
300
+
{ } /* terminator */
301
+
};
302
+
MODULE_DEVICE_TABLE(dmi, lps_ec_dmi_table);
303
+
304
+
/* Loose table (vendor + product only) for use with force=1 */
305
+
static const struct dmi_system_id lps_ec_dmi_table_force[] = {
306
+
{
307
+
.ident = "LattePanda Sigma",
308
+
.matches = {
309
+
DMI_MATCH(DMI_SYS_VENDOR, "LattePanda"),
310
+
DMI_MATCH(DMI_PRODUCT_NAME, "LattePanda Sigma"),
311
+
},
312
+
},
313
+
{ } /* terminator */
314
+
};
315
+
316
+
static struct platform_driver lps_ec_driver = {
317
+
.probe = lps_ec_probe,
318
+
.driver = {
319
+
.name = DRIVER_NAME,
320
+
},
321
+
};
322
+
323
+
static int __init lps_ec_init(void)
324
+
{
325
+
int ret;
326
+
327
+
if (!dmi_check_system(lps_ec_dmi_table)) {
328
+
if (!force || !dmi_check_system(lps_ec_dmi_table_force))
329
+
return -ENODEV;
330
+
pr_warn("%s: BIOS version not verified, loading due to force=1\n",
331
+
DRIVER_NAME);
332
+
}
333
+
334
+
ret = platform_driver_register(&lps_ec_driver);
335
+
if (ret)
336
+
return ret;
337
+
338
+
lps_ec_pdev = platform_device_register_simple(DRIVER_NAME, -1,
339
+
NULL, 0);
340
+
if (IS_ERR(lps_ec_pdev)) {
341
+
platform_driver_unregister(&lps_ec_driver);
342
+
return PTR_ERR(lps_ec_pdev);
343
+
}
344
+
345
+
return 0;
346
+
}
347
+
348
+
static void __exit lps_ec_exit(void)
349
+
{
350
+
platform_device_unregister(lps_ec_pdev);
351
+
platform_driver_unregister(&lps_ec_driver);
352
+
}
353
+
354
+
module_init(lps_ec_init);
355
+
module_exit(lps_ec_exit);
356
+
357
+
MODULE_AUTHOR("Mariano Abad <weimaraner@gmail.com>");
358
+
MODULE_DESCRIPTION("Hardware monitoring driver for LattePanda Sigma EC");
359
+
MODULE_LICENSE("GPL");
+19
-1
drivers/hwmon/lm75.c
+19
-1
drivers/hwmon/lm75.c
···
108
108
#define PCT2075_REG_IDLE 0x04
109
109
110
110
struct lm75_data {
111
+
const char *label;
111
112
struct regmap *regmap;
112
113
u16 orig_conf;
113
114
u8 resolution; /* In bits, 9 to 16 */
···
364
363
return IRQ_HANDLED;
365
364
}
366
365
366
+
static int lm75_read_string(struct device *dev, enum hwmon_sensor_types type,
367
+
u32 attr, int channel, const char **str)
368
+
{
369
+
struct lm75_data *data = dev_get_drvdata(dev);
370
+
371
+
*str = data->label;
372
+
373
+
return 0;
374
+
}
375
+
367
376
static int lm75_read(struct device *dev, enum hwmon_sensor_types type,
368
377
u32 attr, int channel, long *val)
369
378
{
···
545
534
switch (attr) {
546
535
case hwmon_temp_input:
547
536
return 0444;
537
+
case hwmon_temp_label:
538
+
/* Hide label node if label is not provided */
539
+
return config_data->label ? 0444 : 0;
548
540
case hwmon_temp_max:
549
541
case hwmon_temp_max_hyst:
550
542
return 0644;
···
567
553
HWMON_CHANNEL_INFO(chip,
568
554
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
569
555
HWMON_CHANNEL_INFO(temp,
570
-
HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
556
+
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX | HWMON_T_MAX_HYST |
571
557
HWMON_T_ALARM),
572
558
NULL
573
559
};
574
560
575
561
static const struct hwmon_ops lm75_hwmon_ops = {
576
562
.is_visible = lm75_is_visible,
563
+
.read_string = lm75_read_string,
577
564
.read = lm75_read,
578
565
.write = lm75_write,
579
566
};
···
735
720
736
721
/* needed by custom regmap callbacks */
737
722
dev_set_drvdata(dev, data);
723
+
724
+
/* Save the connected input label if available */
725
+
device_property_read_string(dev, "label", &data->label);
738
726
739
727
data->kind = kind;
740
728
data->regmap = regmap;
+8
-7
drivers/hwmon/ltc4282.c
+8
-7
drivers/hwmon/ltc4282.c
···
1328
1328
if (ret)
1329
1329
return ret;
1330
1330
1331
+
/* default to 1 milli-ohm so we can probe without FW properties */
1332
+
st->rsense = 1 * (NANO / MILLI);
1331
1333
ret = device_property_read_u32(dev, "adi,rsense-nano-ohms",
1332
1334
&st->rsense);
1333
-
if (ret)
1334
-
return dev_err_probe(dev, ret,
1335
-
"Failed to read adi,rsense-nano-ohms\n");
1336
-
if (st->rsense < CENTI)
1337
-
return dev_err_probe(dev, -EINVAL,
1338
-
"adi,rsense-nano-ohms too small (< %lu)\n",
1339
-
CENTI);
1335
+
if (!ret) {
1336
+
if (st->rsense < CENTI)
1337
+
return dev_err_probe(dev, -EINVAL,
1338
+
"adi,rsense-nano-ohms too small (< %lu)\n",
1339
+
CENTI);
1340
+
}
1340
1341
1341
1342
/*
1342
1343
* The resolution for rsense is tenths of micro (eg: 62.5 uOhm) which
+2
-1
drivers/hwmon/max31722.c
+2
-1
drivers/hwmon/max31722.c
···
11
11
#include <linux/kernel.h>
12
12
#include <linux/module.h>
13
13
#include <linux/spi/spi.h>
14
+
#include <linux/sysfs.h>
14
15
15
16
#define MAX31722_REG_CFG 0x00
16
17
#define MAX31722_REG_TEMP_LSB 0x01
···
57
56
if (ret < 0)
58
57
return ret;
59
58
/* Keep 12 bits and multiply by the scale of 62.5 millidegrees/bit. */
60
-
return sprintf(buf, "%d\n", (s16)le16_to_cpu(ret) * 125 / 32);
59
+
return sysfs_emit(buf, "%d\n", (s16)le16_to_cpu(ret) * 125 / 32);
61
60
}
62
61
63
62
static SENSOR_DEVICE_ATTR_RO(temp1_input, max31722_temp, 0);
+2
-1
drivers/hwmon/max6650.c
+2
-1
drivers/hwmon/max6650.c
···
27
27
#include <linux/hwmon-sysfs.h>
28
28
#include <linux/err.h>
29
29
#include <linux/of.h>
30
+
#include <linux/sysfs.h>
30
31
#include <linux/thermal.h>
31
32
32
33
/*
···
313
312
mutex_unlock(&data->update_lock);
314
313
}
315
314
316
-
return sprintf(buf, "%d\n", alarm);
315
+
return sysfs_emit(buf, "%d\n", alarm);
317
316
}
318
317
319
318
static SENSOR_DEVICE_ATTR_RO(gpio1_alarm, alarm, MAX6650_ALRM_GPIO1);
+998
drivers/hwmon/mcp9982.c
+998
drivers/hwmon/mcp9982.c
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/*
3
+
* HWMON driver for MCP998X/33 and MCP998XD/33D Multichannel Automotive
4
+
* Temperature Monitor Family
5
+
*
6
+
* Copyright (C) 2026 Microchip Technology Inc. and its subsidiaries
7
+
*
8
+
* Author: Victor Duicu <victor.duicu@microchip.com>
9
+
*
10
+
* Datasheet can be found here:
11
+
* https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP998X-Family-Data-Sheet-DS20006827.pdf
12
+
*/
13
+
14
+
#include <linux/array_size.h>
15
+
#include <linux/bitfield.h>
16
+
#include <linux/bitops.h>
17
+
#include <linux/bits.h>
18
+
#include <linux/byteorder/generic.h>
19
+
#include <linux/delay.h>
20
+
#include <linux/device/devres.h>
21
+
#include <linux/device.h>
22
+
#include <linux/dev_printk.h>
23
+
#include <linux/err.h>
24
+
#include <linux/hwmon.h>
25
+
#include <linux/i2c.h>
26
+
#include <linux/math.h>
27
+
#include <linux/minmax.h>
28
+
#include <linux/property.h>
29
+
#include <linux/regmap.h>
30
+
#include <linux/time64.h>
31
+
#include <linux/util_macros.h>
32
+
33
+
/* MCP9982 Registers */
34
+
#define MCP9982_HIGH_BYTE_ADDR(index) (2 * (index))
35
+
#define MCP9982_ONE_SHOT_ADDR 0x0A
36
+
#define MCP9982_INTERNAL_HIGH_LIMIT_ADDR 0x0B
37
+
#define MCP9982_INTERNAL_LOW_LIMIT_ADDR 0x0C
38
+
#define MCP9982_EXT_HIGH_LIMIT_ADDR(index) (4 * ((index) - 1) + 0x0D)
39
+
#define MCP9982_EXT_LOW_LIMIT_ADDR(index) (4 * ((index) - 1) + 0x0F)
40
+
#define MCP9982_THERM_LIMIT_ADDR(index) ((index) + 0x1D)
41
+
#define MCP9982_CFG_ADDR 0x22
42
+
#define MCP9982_CONV_ADDR 0x24
43
+
#define MCP9982_HYS_ADDR 0x25
44
+
#define MCP9982_CONSEC_ALRT_ADDR 0x26
45
+
#define MCP9982_ALRT_CFG_ADDR 0x27
46
+
#define MCP9982_RUNNING_AVG_ADDR 0x28
47
+
#define MCP9982_HOTTEST_CFG_ADDR 0x29
48
+
#define MCP9982_STATUS_ADDR 0x2A
49
+
#define MCP9982_EXT_FAULT_STATUS_ADDR 0x2B
50
+
#define MCP9982_HIGH_LIMIT_STATUS_ADDR 0x2C
51
+
#define MCP9982_LOW_LIMIT_STATUS_ADDR 0x2D
52
+
#define MCP9982_THERM_LIMIT_STATUS_ADDR 0x2E
53
+
#define MCP9982_HOTTEST_HIGH_BYTE_ADDR 0x2F
54
+
#define MCP9982_HOTTEST_LOW_BYTE_ADDR 0x30
55
+
#define MCP9982_HOTTEST_STATUS_ADDR 0x31
56
+
#define MCP9982_THERM_SHTDWN_CFG_ADDR 0x32
57
+
#define MCP9982_HRDW_THERM_SHTDWN_LIMIT_ADDR 0x33
58
+
#define MCP9982_EXT_BETA_CFG_ADDR(index) ((index) + 0x33)
59
+
#define MCP9982_EXT_IDEAL_ADDR(index) ((index) + 0x35)
60
+
61
+
/* MCP9982 Bits */
62
+
#define MCP9982_CFG_MSKAL BIT(7)
63
+
#define MCP9982_CFG_RS BIT(6)
64
+
#define MCP9982_CFG_ATTHM BIT(5)
65
+
#define MCP9982_CFG_RECD12 BIT(4)
66
+
#define MCP9982_CFG_RECD34 BIT(3)
67
+
#define MCP9982_CFG_RANGE BIT(2)
68
+
#define MCP9982_CFG_DA_ENA BIT(1)
69
+
#define MCP9982_CFG_APDD BIT(0)
70
+
71
+
#define MCP9982_STATUS_BUSY BIT(5)
72
+
73
+
/* Constants and default values */
74
+
#define MCP9982_MAX_NUM_CHANNELS 5
75
+
#define MCP9982_BETA_AUTODETECT 16
76
+
#define MCP9982_IDEALITY_DEFAULT 18
77
+
#define MCP9982_OFFSET 64
78
+
#define MCP9982_DEFAULT_CONSEC_ALRT_VAL 112
79
+
#define MCP9982_DEFAULT_HYS_VAL 10
80
+
#define MCP9982_DEFAULT_CONV_VAL 6
81
+
#define MCP9982_WAKE_UP_TIME_US 125000
82
+
#define MCP9982_WAKE_UP_TIME_MAX_US 130000
83
+
#define MCP9982_HIGH_LIMIT_DEFAULT 85000
84
+
#define MCP9982_LOW_LIMIT_DEFAULT 0
85
+
86
+
static const struct hwmon_channel_info * const mcp9985_info[] = {
87
+
HWMON_CHANNEL_INFO(temp,
88
+
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MIN |
89
+
HWMON_T_MIN_ALARM | HWMON_T_MAX | HWMON_T_MAX_ALARM |
90
+
HWMON_T_MAX_HYST | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
91
+
HWMON_T_CRIT_HYST,
92
+
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MIN |
93
+
HWMON_T_MIN_ALARM | HWMON_T_MAX | HWMON_T_MAX_ALARM |
94
+
HWMON_T_MAX_HYST | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
95
+
HWMON_T_CRIT_HYST,
96
+
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MIN |
97
+
HWMON_T_MIN_ALARM | HWMON_T_MAX | HWMON_T_MAX_ALARM |
98
+
HWMON_T_MAX_HYST | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
99
+
HWMON_T_CRIT_HYST,
100
+
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MIN |
101
+
HWMON_T_MIN_ALARM | HWMON_T_MAX | HWMON_T_MAX_ALARM |
102
+
HWMON_T_MAX_HYST | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
103
+
HWMON_T_CRIT_HYST,
104
+
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MIN |
105
+
HWMON_T_MIN_ALARM | HWMON_T_MAX | HWMON_T_MAX_ALARM |
106
+
HWMON_T_MAX_HYST | HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
107
+
HWMON_T_CRIT_HYST),
108
+
HWMON_CHANNEL_INFO(chip,
109
+
HWMON_C_UPDATE_INTERVAL),
110
+
NULL
111
+
};
112
+
113
+
/**
114
+
* struct mcp9982_features - features of a mcp9982 instance
115
+
* @name: chip's name
116
+
* @phys_channels: number of physical channels supported by the chip
117
+
* @hw_thermal_shutdown: presence of hardware thermal shutdown circuitry
118
+
* @allow_apdd: whether the chip supports enabling APDD
119
+
* @has_recd34: whether the chip has the channels that are affected by recd34
120
+
*/
121
+
struct mcp9982_features {
122
+
const char *name;
123
+
u8 phys_channels;
124
+
bool hw_thermal_shutdown;
125
+
bool allow_apdd;
126
+
bool has_recd34;
127
+
};
128
+
129
+
static const struct mcp9982_features mcp9933_chip_config = {
130
+
.name = "mcp9933",
131
+
.phys_channels = 3,
132
+
.hw_thermal_shutdown = false,
133
+
.allow_apdd = true,
134
+
.has_recd34 = false,
135
+
};
136
+
137
+
static const struct mcp9982_features mcp9933d_chip_config = {
138
+
.name = "mcp9933d",
139
+
.phys_channels = 3,
140
+
.hw_thermal_shutdown = true,
141
+
.allow_apdd = true,
142
+
.has_recd34 = false,
143
+
};
144
+
145
+
static const struct mcp9982_features mcp9982_chip_config = {
146
+
.name = "mcp9982",
147
+
.phys_channels = 2,
148
+
.hw_thermal_shutdown = false,
149
+
.allow_apdd = false,
150
+
.has_recd34 = false,
151
+
};
152
+
153
+
static const struct mcp9982_features mcp9982d_chip_config = {
154
+
.name = "mcp9982d",
155
+
.phys_channels = 2,
156
+
.hw_thermal_shutdown = true,
157
+
.allow_apdd = false,
158
+
.has_recd34 = false,
159
+
};
160
+
161
+
static const struct mcp9982_features mcp9983_chip_config = {
162
+
.name = "mcp9983",
163
+
.phys_channels = 3,
164
+
.hw_thermal_shutdown = false,
165
+
.allow_apdd = false,
166
+
.has_recd34 = true,
167
+
};
168
+
169
+
static const struct mcp9982_features mcp9983d_chip_config = {
170
+
.name = "mcp9983d",
171
+
.phys_channels = 3,
172
+
.hw_thermal_shutdown = true,
173
+
.allow_apdd = false,
174
+
.has_recd34 = true,
175
+
};
176
+
177
+
static const struct mcp9982_features mcp9984_chip_config = {
178
+
.name = "mcp9984",
179
+
.phys_channels = 4,
180
+
.hw_thermal_shutdown = false,
181
+
.allow_apdd = true,
182
+
.has_recd34 = true,
183
+
};
184
+
185
+
static const struct mcp9982_features mcp9984d_chip_config = {
186
+
.name = "mcp9984d",
187
+
.phys_channels = 4,
188
+
.hw_thermal_shutdown = true,
189
+
.allow_apdd = true,
190
+
.has_recd34 = true,
191
+
};
192
+
193
+
static const struct mcp9982_features mcp9985_chip_config = {
194
+
.name = "mcp9985",
195
+
.phys_channels = 5,
196
+
.hw_thermal_shutdown = false,
197
+
.allow_apdd = true,
198
+
.has_recd34 = true,
199
+
};
200
+
201
+
static const struct mcp9982_features mcp9985d_chip_config = {
202
+
.name = "mcp9985d",
203
+
.phys_channels = 5,
204
+
.hw_thermal_shutdown = true,
205
+
.allow_apdd = true,
206
+
.has_recd34 = true,
207
+
};
208
+
209
+
static const unsigned int mcp9982_update_interval[11] = {
210
+
16000, 8000, 4000, 2000, 1000, 500, 250, 125, 64, 32, 16
211
+
};
212
+
213
+
/* MCP9982 regmap configuration */
214
+
static const struct regmap_range mcp9982_regmap_wr_ranges[] = {
215
+
regmap_reg_range(MCP9982_ONE_SHOT_ADDR, MCP9982_CFG_ADDR),
216
+
regmap_reg_range(MCP9982_CONV_ADDR, MCP9982_HOTTEST_CFG_ADDR),
217
+
regmap_reg_range(MCP9982_THERM_SHTDWN_CFG_ADDR, MCP9982_THERM_SHTDWN_CFG_ADDR),
218
+
regmap_reg_range(MCP9982_EXT_BETA_CFG_ADDR(1), MCP9982_EXT_IDEAL_ADDR(4)),
219
+
};
220
+
221
+
static const struct regmap_access_table mcp9982_regmap_wr_table = {
222
+
.yes_ranges = mcp9982_regmap_wr_ranges,
223
+
.n_yes_ranges = ARRAY_SIZE(mcp9982_regmap_wr_ranges),
224
+
};
225
+
226
+
static const struct regmap_range mcp9982_regmap_rd_ranges[] = {
227
+
regmap_reg_range(MCP9982_HIGH_BYTE_ADDR(0), MCP9982_CFG_ADDR),
228
+
regmap_reg_range(MCP9982_CONV_ADDR, MCP9982_EXT_IDEAL_ADDR(4)),
229
+
};
230
+
231
+
static const struct regmap_access_table mcp9982_regmap_rd_table = {
232
+
.yes_ranges = mcp9982_regmap_rd_ranges,
233
+
.n_yes_ranges = ARRAY_SIZE(mcp9982_regmap_rd_ranges),
234
+
};
235
+
236
+
static bool mcp9982_is_volatile_reg(struct device *dev, unsigned int reg)
237
+
{
238
+
switch (reg) {
239
+
case MCP9982_ONE_SHOT_ADDR:
240
+
case MCP9982_INTERNAL_HIGH_LIMIT_ADDR:
241
+
case MCP9982_INTERNAL_LOW_LIMIT_ADDR:
242
+
case MCP9982_EXT_LOW_LIMIT_ADDR(1):
243
+
case MCP9982_EXT_LOW_LIMIT_ADDR(1) + 1:
244
+
case MCP9982_EXT_LOW_LIMIT_ADDR(2):
245
+
case MCP9982_EXT_LOW_LIMIT_ADDR(2) + 1:
246
+
case MCP9982_EXT_LOW_LIMIT_ADDR(3):
247
+
case MCP9982_EXT_LOW_LIMIT_ADDR(3) + 1:
248
+
case MCP9982_EXT_LOW_LIMIT_ADDR(4):
249
+
case MCP9982_EXT_LOW_LIMIT_ADDR(4) + 1:
250
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(1):
251
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(1) + 1:
252
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(2):
253
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(2) + 1:
254
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(3):
255
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(3) + 1:
256
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(4):
257
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(4) + 1:
258
+
case MCP9982_THERM_LIMIT_ADDR(0):
259
+
case MCP9982_THERM_LIMIT_ADDR(1):
260
+
case MCP9982_THERM_LIMIT_ADDR(2):
261
+
case MCP9982_THERM_LIMIT_ADDR(3):
262
+
case MCP9982_THERM_LIMIT_ADDR(4):
263
+
case MCP9982_CFG_ADDR:
264
+
case MCP9982_CONV_ADDR:
265
+
case MCP9982_HYS_ADDR:
266
+
case MCP9982_CONSEC_ALRT_ADDR:
267
+
case MCP9982_ALRT_CFG_ADDR:
268
+
case MCP9982_RUNNING_AVG_ADDR:
269
+
case MCP9982_HOTTEST_CFG_ADDR:
270
+
case MCP9982_THERM_SHTDWN_CFG_ADDR:
271
+
return false;
272
+
default:
273
+
return true;
274
+
}
275
+
}
276
+
277
+
static const struct regmap_config mcp9982_regmap_config = {
278
+
.reg_bits = 8,
279
+
.val_bits = 8,
280
+
.rd_table = &mcp9982_regmap_rd_table,
281
+
.wr_table = &mcp9982_regmap_wr_table,
282
+
.volatile_reg = mcp9982_is_volatile_reg,
283
+
.max_register = MCP9982_EXT_IDEAL_ADDR(4),
284
+
.cache_type = REGCACHE_MAPLE,
285
+
};
286
+
287
+
/**
288
+
* struct mcp9982_priv - information about chip parameters
289
+
* @regmap: device register map
290
+
* @chip: pointer to structure holding chip features
291
+
* @labels: labels of the channels
292
+
* @interval_idx: index representing the current update interval
293
+
* @enabled_channel_mask: mask containing which channels should be enabled
294
+
* @num_channels: number of active physical channels
295
+
* @recd34_enable: state of Resistance Error Correction(REC) on channels 3 and 4
296
+
* @recd12_enable: state of Resistance Error Correction(REC) on channels 1 and 2
297
+
* @apdd_enable: state of anti-parallel diode mode
298
+
* @run_state: chip is in Run state, otherwise is in Standby state
299
+
*/
300
+
struct mcp9982_priv {
301
+
struct regmap *regmap;
302
+
const struct mcp9982_features *chip;
303
+
const char *labels[MCP9982_MAX_NUM_CHANNELS];
304
+
unsigned int interval_idx;
305
+
unsigned long enabled_channel_mask;
306
+
u8 num_channels;
307
+
bool recd34_enable;
308
+
bool recd12_enable;
309
+
bool apdd_enable;
310
+
bool run_state;
311
+
};
312
+
313
+
static int mcp9982_read_limit(struct mcp9982_priv *priv, u8 address, long *val)
314
+
{
315
+
unsigned int limit, reg_high, reg_low;
316
+
int ret;
317
+
318
+
switch (address) {
319
+
case MCP9982_INTERNAL_HIGH_LIMIT_ADDR:
320
+
case MCP9982_INTERNAL_LOW_LIMIT_ADDR:
321
+
case MCP9982_THERM_LIMIT_ADDR(0):
322
+
case MCP9982_THERM_LIMIT_ADDR(1):
323
+
case MCP9982_THERM_LIMIT_ADDR(2):
324
+
case MCP9982_THERM_LIMIT_ADDR(3):
325
+
case MCP9982_THERM_LIMIT_ADDR(4):
326
+
ret = regmap_read(priv->regmap, address, &limit);
327
+
if (ret)
328
+
return ret;
329
+
330
+
*val = ((int)limit - MCP9982_OFFSET) * 1000;
331
+
332
+
return 0;
333
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(1):
334
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(2):
335
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(3):
336
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(4):
337
+
case MCP9982_EXT_LOW_LIMIT_ADDR(1):
338
+
case MCP9982_EXT_LOW_LIMIT_ADDR(2):
339
+
case MCP9982_EXT_LOW_LIMIT_ADDR(3):
340
+
case MCP9982_EXT_LOW_LIMIT_ADDR(4):
341
+
/*
342
+
* In order to keep consistency with reading temperature memory region we will use
343
+
* single byte I2C read.
344
+
*/
345
+
ret = regmap_read(priv->regmap, address, ®_high);
346
+
if (ret)
347
+
return ret;
348
+
349
+
ret = regmap_read(priv->regmap, address + 1, ®_low);
350
+
if (ret)
351
+
return ret;
352
+
353
+
*val = ((reg_high << 8) + reg_low) >> 5;
354
+
*val = (*val - (MCP9982_OFFSET << 3)) * 125;
355
+
356
+
return 0;
357
+
default:
358
+
return -EINVAL;
359
+
}
360
+
}
361
+
362
+
static int mcp9982_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
363
+
long *val)
364
+
{
365
+
struct mcp9982_priv *priv = dev_get_drvdata(dev);
366
+
unsigned int reg_high, reg_low, hyst, reg_status;
367
+
int ret;
368
+
u8 addr;
369
+
370
+
/*
371
+
* In Standby State the conversion cycle must be initated manually in
372
+
* order to read fresh temperature values and the status of the alarms.
373
+
*/
374
+
if (!priv->run_state) {
375
+
switch (type) {
376
+
case hwmon_temp:
377
+
switch (attr) {
378
+
case hwmon_temp_input:
379
+
case hwmon_temp_max_alarm:
380
+
case hwmon_temp_min_alarm:
381
+
case hwmon_temp_crit_alarm:
382
+
ret = regmap_write(priv->regmap, MCP9982_ONE_SHOT_ADDR, 1);
383
+
if (ret)
384
+
return ret;
385
+
/*
386
+
* When the device is in Standby mode, 125 ms need
387
+
* to pass from writing in One Shot register before
388
+
* the conversion cycle begins.
389
+
*/
390
+
usleep_range(MCP9982_WAKE_UP_TIME_US, MCP9982_WAKE_UP_TIME_MAX_US);
391
+
ret = regmap_read_poll_timeout
392
+
(priv->regmap, MCP9982_STATUS_ADDR,
393
+
reg_status, !(reg_status & MCP9982_STATUS_BUSY),
394
+
MCP9982_WAKE_UP_TIME_US,
395
+
MCP9982_WAKE_UP_TIME_US * 10);
396
+
break;
397
+
}
398
+
break;
399
+
default:
400
+
break;
401
+
}
402
+
}
403
+
404
+
switch (type) {
405
+
case hwmon_temp:
406
+
switch (attr) {
407
+
case hwmon_temp_input:
408
+
/*
409
+
* The only areas of memory that support SMBus block read are 80h->89h
410
+
* (temperature memory block) and 90h->97h(status memory block).
411
+
* In this context the read operation uses SMBus protocol and the first
412
+
* value returned will be the number of addresses that can be read.
413
+
* Temperature memory block is 10 bytes long and status memory block is 8
414
+
* bytes long.
415
+
*
416
+
* Depending on the read instruction used, the chip behaves differently:
417
+
* - regmap_bulk_read() when applied to the temperature memory block
418
+
* (80h->89h), the chip replies with SMBus block read, including count,
419
+
* additionally to the high and the low bytes. This function cannot be
420
+
* applied on the memory region 00h->09h(memory area which does not support
421
+
* block reads, returns wrong data) unless use_single_read is set in
422
+
* regmap_config.
423
+
*
424
+
* - regmap_multi_reg_read() when applied to the 00h->09h area uses I2C
425
+
* and returns only the high and low temperature bytes. When applied to
426
+
* the temperature memory block (80h->89h) returns the count till the end of
427
+
* the temperature memory block(aka SMBus count).
428
+
*
429
+
* - i2c_smbus_read_block_data() is not supported by all drivers.
430
+
*
431
+
* In order to keep consistency with reading limit memory region we will
432
+
* use single byte I2C read.
433
+
*
434
+
* Low register is latched when high temperature register is read.
435
+
*/
436
+
ret = regmap_read(priv->regmap, MCP9982_HIGH_BYTE_ADDR(channel), ®_high);
437
+
if (ret)
438
+
return ret;
439
+
440
+
ret = regmap_read(priv->regmap, MCP9982_HIGH_BYTE_ADDR(channel) + 1,
441
+
®_low);
442
+
if (ret)
443
+
return ret;
444
+
445
+
*val = ((reg_high << 8) + reg_low) >> 5;
446
+
*val = (*val - (MCP9982_OFFSET << 3)) * 125;
447
+
448
+
return 0;
449
+
case hwmon_temp_max:
450
+
if (channel)
451
+
addr = MCP9982_EXT_HIGH_LIMIT_ADDR(channel);
452
+
else
453
+
addr = MCP9982_INTERNAL_HIGH_LIMIT_ADDR;
454
+
455
+
return mcp9982_read_limit(priv, addr, val);
456
+
case hwmon_temp_max_alarm:
457
+
*val = regmap_test_bits(priv->regmap, MCP9982_HIGH_LIMIT_STATUS_ADDR,
458
+
BIT(channel));
459
+
if (*val < 0)
460
+
return *val;
461
+
462
+
return 0;
463
+
case hwmon_temp_max_hyst:
464
+
if (channel)
465
+
addr = MCP9982_EXT_HIGH_LIMIT_ADDR(channel);
466
+
else
467
+
addr = MCP9982_INTERNAL_HIGH_LIMIT_ADDR;
468
+
ret = mcp9982_read_limit(priv, addr, val);
469
+
if (ret)
470
+
return ret;
471
+
472
+
ret = regmap_read(priv->regmap, MCP9982_HYS_ADDR, &hyst);
473
+
if (ret)
474
+
return ret;
475
+
476
+
*val -= hyst * 1000;
477
+
478
+
return 0;
479
+
case hwmon_temp_min:
480
+
if (channel)
481
+
addr = MCP9982_EXT_LOW_LIMIT_ADDR(channel);
482
+
else
483
+
addr = MCP9982_INTERNAL_LOW_LIMIT_ADDR;
484
+
485
+
return mcp9982_read_limit(priv, addr, val);
486
+
case hwmon_temp_min_alarm:
487
+
*val = regmap_test_bits(priv->regmap, MCP9982_LOW_LIMIT_STATUS_ADDR,
488
+
BIT(channel));
489
+
if (*val < 0)
490
+
return *val;
491
+
492
+
return 0;
493
+
case hwmon_temp_crit:
494
+
return mcp9982_read_limit(priv, MCP9982_THERM_LIMIT_ADDR(channel), val);
495
+
case hwmon_temp_crit_alarm:
496
+
*val = regmap_test_bits(priv->regmap, MCP9982_THERM_LIMIT_STATUS_ADDR,
497
+
BIT(channel));
498
+
if (*val < 0)
499
+
return *val;
500
+
501
+
return 0;
502
+
case hwmon_temp_crit_hyst:
503
+
ret = mcp9982_read_limit(priv, MCP9982_THERM_LIMIT_ADDR(channel), val);
504
+
if (ret)
505
+
return ret;
506
+
507
+
ret = regmap_read(priv->regmap, MCP9982_HYS_ADDR, &hyst);
508
+
if (ret)
509
+
return ret;
510
+
511
+
*val -= hyst * 1000;
512
+
513
+
return 0;
514
+
default:
515
+
return -EINVAL;
516
+
}
517
+
case hwmon_chip:
518
+
switch (attr) {
519
+
case hwmon_chip_update_interval:
520
+
*val = mcp9982_update_interval[priv->interval_idx];
521
+
return 0;
522
+
default:
523
+
return -EINVAL;
524
+
}
525
+
default:
526
+
return -EINVAL;
527
+
}
528
+
}
529
+
530
+
static int mcp9982_read_label(struct device *dev, enum hwmon_sensor_types type, u32 attr,
531
+
int channel, const char **str)
532
+
{
533
+
struct mcp9982_priv *priv = dev_get_drvdata(dev);
534
+
535
+
switch (type) {
536
+
case hwmon_temp:
537
+
switch (attr) {
538
+
case hwmon_temp_label:
539
+
*str = priv->labels[channel];
540
+
return 0;
541
+
default:
542
+
return -EOPNOTSUPP;
543
+
}
544
+
default:
545
+
return -EOPNOTSUPP;
546
+
}
547
+
}
548
+
549
+
static int mcp9982_write_limit(struct mcp9982_priv *priv, u8 address, long val)
550
+
{
551
+
int ret;
552
+
unsigned int regh, regl;
553
+
554
+
switch (address) {
555
+
case MCP9982_INTERNAL_HIGH_LIMIT_ADDR:
556
+
case MCP9982_INTERNAL_LOW_LIMIT_ADDR:
557
+
case MCP9982_THERM_LIMIT_ADDR(0):
558
+
case MCP9982_THERM_LIMIT_ADDR(1):
559
+
case MCP9982_THERM_LIMIT_ADDR(2):
560
+
case MCP9982_THERM_LIMIT_ADDR(3):
561
+
case MCP9982_THERM_LIMIT_ADDR(4):
562
+
regh = DIV_ROUND_CLOSEST(val, 1000);
563
+
regh = clamp_val(regh, 0, 255);
564
+
565
+
return regmap_write(priv->regmap, address, regh);
566
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(1):
567
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(2):
568
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(3):
569
+
case MCP9982_EXT_HIGH_LIMIT_ADDR(4):
570
+
case MCP9982_EXT_LOW_LIMIT_ADDR(1):
571
+
case MCP9982_EXT_LOW_LIMIT_ADDR(2):
572
+
case MCP9982_EXT_LOW_LIMIT_ADDR(3):
573
+
case MCP9982_EXT_LOW_LIMIT_ADDR(4):
574
+
val = DIV_ROUND_CLOSEST(val, 125);
575
+
regh = (val >> 3) & 0xff;
576
+
regl = (val & 0x07) << 5;
577
+
/* Block writing is not supported by the chip. */
578
+
ret = regmap_write(priv->regmap, address, regh);
579
+
if (ret)
580
+
return ret;
581
+
582
+
return regmap_write(priv->regmap, address + 1, regl);
583
+
default:
584
+
return -EINVAL;
585
+
}
586
+
}
587
+
588
+
static int mcp9982_write_hyst(struct mcp9982_priv *priv, int channel, long val)
589
+
{
590
+
int hyst, ret;
591
+
int limit;
592
+
593
+
val = DIV_ROUND_CLOSEST(val, 1000);
594
+
val = clamp_val(val, 0, 255);
595
+
596
+
/* Therm register is 8 bits and so it keeps only the integer part of the temperature. */
597
+
ret = regmap_read(priv->regmap, MCP9982_THERM_LIMIT_ADDR(channel), &limit);
598
+
if (ret)
599
+
return ret;
600
+
601
+
hyst = clamp_val(limit - val, 0, 255);
602
+
603
+
return regmap_write(priv->regmap, MCP9982_HYS_ADDR, hyst);
604
+
}
605
+
606
+
static int mcp9982_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
607
+
long val)
608
+
{
609
+
struct mcp9982_priv *priv = dev_get_drvdata(dev);
610
+
unsigned int idx;
611
+
u8 addr;
612
+
613
+
switch (type) {
614
+
case hwmon_chip:
615
+
switch (attr) {
616
+
case hwmon_chip_update_interval:
617
+
618
+
/*
619
+
* For MCP998XD and MCP9933D update interval
620
+
* can't be longer than 1 second.
621
+
*/
622
+
if (priv->chip->hw_thermal_shutdown)
623
+
val = clamp_val(val, 0, 1000);
624
+
625
+
idx = find_closest_descending(val, mcp9982_update_interval,
626
+
ARRAY_SIZE(mcp9982_update_interval));
627
+
priv->interval_idx = idx;
628
+
629
+
return regmap_write(priv->regmap, MCP9982_CONV_ADDR, idx);
630
+
default:
631
+
return -EINVAL;
632
+
}
633
+
case hwmon_temp:
634
+
val = clamp_val(val, -64000, 191875);
635
+
val = val + (MCP9982_OFFSET * 1000);
636
+
switch (attr) {
637
+
case hwmon_temp_max:
638
+
if (channel)
639
+
addr = MCP9982_EXT_HIGH_LIMIT_ADDR(channel);
640
+
else
641
+
addr = MCP9982_INTERNAL_HIGH_LIMIT_ADDR;
642
+
643
+
return mcp9982_write_limit(priv, addr, val);
644
+
case hwmon_temp_min:
645
+
if (channel)
646
+
addr = MCP9982_EXT_LOW_LIMIT_ADDR(channel);
647
+
else
648
+
addr = MCP9982_INTERNAL_LOW_LIMIT_ADDR;
649
+
650
+
return mcp9982_write_limit(priv, addr, val);
651
+
case hwmon_temp_crit:
652
+
return mcp9982_write_limit(priv, MCP9982_THERM_LIMIT_ADDR(channel), val);
653
+
case hwmon_temp_crit_hyst:
654
+
return mcp9982_write_hyst(priv, channel, val);
655
+
default:
656
+
return -EINVAL;
657
+
}
658
+
default:
659
+
return -EINVAL;
660
+
}
661
+
}
662
+
663
+
static umode_t mcp9982_is_visible(const void *_data, enum hwmon_sensor_types type, u32 attr,
664
+
int channel)
665
+
{
666
+
const struct mcp9982_priv *priv = _data;
667
+
668
+
if (!test_bit(channel, &priv->enabled_channel_mask))
669
+
return 0;
670
+
671
+
switch (type) {
672
+
case hwmon_temp:
673
+
switch (attr) {
674
+
case hwmon_temp_label:
675
+
if (priv->labels[channel])
676
+
return 0444;
677
+
else
678
+
return 0;
679
+
case hwmon_temp_input:
680
+
case hwmon_temp_min_alarm:
681
+
case hwmon_temp_max_alarm:
682
+
case hwmon_temp_max_hyst:
683
+
case hwmon_temp_crit_alarm:
684
+
return 0444;
685
+
case hwmon_temp_min:
686
+
case hwmon_temp_max:
687
+
case hwmon_temp_crit:
688
+
case hwmon_temp_crit_hyst:
689
+
return 0644;
690
+
default:
691
+
return 0;
692
+
}
693
+
case hwmon_chip:
694
+
switch (attr) {
695
+
case hwmon_chip_update_interval:
696
+
return 0644;
697
+
default:
698
+
return 0;
699
+
}
700
+
default:
701
+
return 0;
702
+
}
703
+
}
704
+
705
+
static const struct hwmon_ops mcp9982_hwmon_ops = {
706
+
.is_visible = mcp9982_is_visible,
707
+
.read = mcp9982_read,
708
+
.read_string = mcp9982_read_label,
709
+
.write = mcp9982_write,
710
+
};
711
+
712
+
static int mcp9982_init(struct device *dev, struct mcp9982_priv *priv)
713
+
{
714
+
long high_limit, low_limit;
715
+
unsigned int i;
716
+
int ret;
717
+
u8 val;
718
+
719
+
/* Chips 82/83 and 82D/83D do not support anti-parallel diode mode. */
720
+
if (!priv->chip->allow_apdd && priv->apdd_enable == 1)
721
+
return dev_err_probe(dev, -EINVAL, "Incorrect setting of APDD.\n");
722
+
723
+
/* Chips with "D" work only in Run state. */
724
+
if (priv->chip->hw_thermal_shutdown && !priv->run_state)
725
+
return dev_err_probe(dev, -EINVAL, "Incorrect setting of Power State.\n");
726
+
727
+
/* All chips with "D" in the name must have RECD12 enabled. */
728
+
if (priv->chip->hw_thermal_shutdown && !priv->recd12_enable)
729
+
return dev_err_probe(dev, -EINVAL, "Incorrect setting of RECD12.\n");
730
+
/* Chips 83D/84D/85D must have RECD34 enabled. */
731
+
if (priv->chip->hw_thermal_shutdown)
732
+
if ((priv->chip->has_recd34 && !priv->recd34_enable))
733
+
return dev_err_probe(dev, -EINVAL, "Incorrect setting of RECD34.\n");
734
+
735
+
/*
736
+
* Set default values in registers.
737
+
* APDD, RECD12 and RECD34 are active on 0.
738
+
*/
739
+
val = FIELD_PREP(MCP9982_CFG_MSKAL, 1) |
740
+
FIELD_PREP(MCP9982_CFG_RS, !priv->run_state) |
741
+
FIELD_PREP(MCP9982_CFG_ATTHM, 1) |
742
+
FIELD_PREP(MCP9982_CFG_RECD12, !priv->recd12_enable) |
743
+
FIELD_PREP(MCP9982_CFG_RECD34, !priv->recd34_enable) |
744
+
FIELD_PREP(MCP9982_CFG_RANGE, 1) | FIELD_PREP(MCP9982_CFG_DA_ENA, 0) |
745
+
FIELD_PREP(MCP9982_CFG_APDD, !priv->apdd_enable);
746
+
747
+
ret = regmap_write(priv->regmap, MCP9982_CFG_ADDR, val);
748
+
if (ret)
749
+
return ret;
750
+
751
+
/*
752
+
* Read initial value from register.
753
+
* The convert register utilises only 4 out of 8 bits.
754
+
* Numerical values 0->10 set their respective update intervals,
755
+
* while numerical values 11->15 default to 1 second.
756
+
*/
757
+
ret = regmap_read(priv->regmap, MCP9982_CONV_ADDR, &priv->interval_idx);
758
+
if (ret)
759
+
return ret;
760
+
if (priv->interval_idx >= 11)
761
+
priv->interval_idx = 4;
762
+
763
+
ret = regmap_write(priv->regmap, MCP9982_HYS_ADDR, MCP9982_DEFAULT_HYS_VAL);
764
+
if (ret)
765
+
return ret;
766
+
767
+
ret = regmap_write(priv->regmap, MCP9982_CONSEC_ALRT_ADDR, MCP9982_DEFAULT_CONSEC_ALRT_VAL);
768
+
if (ret)
769
+
return ret;
770
+
771
+
ret = regmap_write(priv->regmap, MCP9982_ALRT_CFG_ADDR, 0);
772
+
if (ret)
773
+
return ret;
774
+
775
+
ret = regmap_write(priv->regmap, MCP9982_RUNNING_AVG_ADDR, 0);
776
+
if (ret)
777
+
return ret;
778
+
779
+
ret = regmap_write(priv->regmap, MCP9982_HOTTEST_CFG_ADDR, 0);
780
+
if (ret)
781
+
return ret;
782
+
783
+
/*
784
+
* Only external channels 1 and 2 support beta compensation.
785
+
* Set beta auto-detection.
786
+
*/
787
+
for (i = 1; i < 3; i++)
788
+
if (test_bit(i, &priv->enabled_channel_mask)) {
789
+
ret = regmap_write(priv->regmap, MCP9982_EXT_BETA_CFG_ADDR(i),
790
+
MCP9982_BETA_AUTODETECT);
791
+
if (ret)
792
+
return ret;
793
+
}
794
+
795
+
high_limit = MCP9982_HIGH_LIMIT_DEFAULT + (MCP9982_OFFSET * 1000);
796
+
low_limit = MCP9982_LOW_LIMIT_DEFAULT + (MCP9982_OFFSET * 1000);
797
+
798
+
/* Set default values for internal channel limits. */
799
+
if (test_bit(0, &priv->enabled_channel_mask)) {
800
+
ret = mcp9982_write_limit(priv, MCP9982_INTERNAL_HIGH_LIMIT_ADDR, high_limit);
801
+
if (ret)
802
+
return ret;
803
+
804
+
ret = mcp9982_write_limit(priv, MCP9982_INTERNAL_LOW_LIMIT_ADDR, low_limit);
805
+
if (ret)
806
+
return ret;
807
+
808
+
ret = mcp9982_write_limit(priv, MCP9982_THERM_LIMIT_ADDR(0), high_limit);
809
+
if (ret)
810
+
return ret;
811
+
}
812
+
813
+
/* Set ideality factor and limits to default for external channels. */
814
+
for (i = 1; i < MCP9982_MAX_NUM_CHANNELS; i++)
815
+
if (test_bit(i, &priv->enabled_channel_mask)) {
816
+
ret = regmap_write(priv->regmap, MCP9982_EXT_IDEAL_ADDR(i),
817
+
MCP9982_IDEALITY_DEFAULT);
818
+
if (ret)
819
+
return ret;
820
+
821
+
ret = mcp9982_write_limit(priv, MCP9982_EXT_HIGH_LIMIT_ADDR(i), high_limit);
822
+
if (ret)
823
+
return ret;
824
+
825
+
ret = mcp9982_write_limit(priv, MCP9982_EXT_LOW_LIMIT_ADDR(i), low_limit);
826
+
if (ret)
827
+
return ret;
828
+
829
+
ret = mcp9982_write_limit(priv, MCP9982_THERM_LIMIT_ADDR(i), high_limit);
830
+
if (ret)
831
+
return ret;
832
+
}
833
+
834
+
return 0;
835
+
}
836
+
837
+
static int mcp9982_parse_fw_config(struct device *dev, int device_nr_channels)
838
+
{
839
+
struct mcp9982_priv *priv = dev_get_drvdata(dev);
840
+
unsigned int reg_nr;
841
+
int ret;
842
+
843
+
/* Initialise internal channel( which is always present ). */
844
+
priv->labels[0] = "internal diode";
845
+
priv->enabled_channel_mask = 1;
846
+
847
+
/* Default values to work on systems without devicetree or firmware nodes. */
848
+
if (!dev_fwnode(dev)) {
849
+
priv->num_channels = device_nr_channels;
850
+
priv->enabled_channel_mask = BIT(priv->num_channels) - 1;
851
+
priv->apdd_enable = false;
852
+
priv->recd12_enable = true;
853
+
priv->recd34_enable = true;
854
+
priv->run_state = true;
855
+
return 0;
856
+
}
857
+
858
+
priv->apdd_enable =
859
+
device_property_read_bool(dev, "microchip,enable-anti-parallel");
860
+
861
+
priv->recd12_enable =
862
+
device_property_read_bool(dev, "microchip,parasitic-res-on-channel1-2");
863
+
864
+
priv->recd34_enable =
865
+
device_property_read_bool(dev, "microchip,parasitic-res-on-channel3-4");
866
+
867
+
priv->run_state =
868
+
device_property_read_bool(dev, "microchip,power-state");
869
+
870
+
priv->num_channels = device_get_child_node_count(dev) + 1;
871
+
872
+
if (priv->num_channels > device_nr_channels)
873
+
return dev_err_probe(dev, -EINVAL,
874
+
"More channels than the chip supports.\n");
875
+
876
+
/* Read information about the external channels. */
877
+
device_for_each_named_child_node_scoped(dev, child, "channel") {
878
+
reg_nr = 0;
879
+
ret = fwnode_property_read_u32(child, "reg", ®_nr);
880
+
if (ret || !reg_nr || reg_nr >= device_nr_channels)
881
+
return dev_err_probe(dev, -EINVAL,
882
+
"Channel reg is incorrectly set.\n");
883
+
884
+
fwnode_property_read_string(child, "label", &priv->labels[reg_nr]);
885
+
set_bit(reg_nr, &priv->enabled_channel_mask);
886
+
}
887
+
888
+
return 0;
889
+
}
890
+
891
+
static const struct hwmon_chip_info mcp998x_chip_info = {
892
+
.ops = &mcp9982_hwmon_ops,
893
+
.info = mcp9985_info,
894
+
};
895
+
896
+
static int mcp9982_probe(struct i2c_client *client)
897
+
{
898
+
const struct mcp9982_features *chip;
899
+
struct device *dev = &client->dev;
900
+
struct mcp9982_priv *priv;
901
+
struct device *hwmon_dev;
902
+
int ret;
903
+
904
+
priv = devm_kzalloc(dev, sizeof(struct mcp9982_priv), GFP_KERNEL);
905
+
if (!priv)
906
+
return -ENOMEM;
907
+
908
+
priv->regmap = devm_regmap_init_i2c(client, &mcp9982_regmap_config);
909
+
910
+
if (IS_ERR(priv->regmap))
911
+
return dev_err_probe(dev, PTR_ERR(priv->regmap),
912
+
"Cannot initialize register map.\n");
913
+
914
+
dev_set_drvdata(dev, priv);
915
+
916
+
chip = i2c_get_match_data(client);
917
+
if (!chip)
918
+
return -EINVAL;
919
+
priv->chip = chip;
920
+
921
+
ret = mcp9982_parse_fw_config(dev, chip->phys_channels);
922
+
if (ret)
923
+
return ret;
924
+
925
+
ret = mcp9982_init(dev, priv);
926
+
if (ret)
927
+
return ret;
928
+
929
+
hwmon_dev = devm_hwmon_device_register_with_info(dev, chip->name, priv,
930
+
&mcp998x_chip_info, NULL);
931
+
932
+
return PTR_ERR_OR_ZERO(hwmon_dev);
933
+
}
934
+
935
+
static const struct i2c_device_id mcp9982_id[] = {
936
+
{ .name = "mcp9933", .driver_data = (kernel_ulong_t)&mcp9933_chip_config },
937
+
{ .name = "mcp9933d", .driver_data = (kernel_ulong_t)&mcp9933d_chip_config },
938
+
{ .name = "mcp9982", .driver_data = (kernel_ulong_t)&mcp9982_chip_config },
939
+
{ .name = "mcp9982d", .driver_data = (kernel_ulong_t)&mcp9982d_chip_config },
940
+
{ .name = "mcp9983", .driver_data = (kernel_ulong_t)&mcp9983_chip_config },
941
+
{ .name = "mcp9983d", .driver_data = (kernel_ulong_t)&mcp9983d_chip_config },
942
+
{ .name = "mcp9984", .driver_data = (kernel_ulong_t)&mcp9984_chip_config },
943
+
{ .name = "mcp9984d", .driver_data = (kernel_ulong_t)&mcp9984d_chip_config },
944
+
{ .name = "mcp9985", .driver_data = (kernel_ulong_t)&mcp9985_chip_config },
945
+
{ .name = "mcp9985d", .driver_data = (kernel_ulong_t)&mcp9985d_chip_config },
946
+
{ }
947
+
};
948
+
MODULE_DEVICE_TABLE(i2c, mcp9982_id);
949
+
950
+
static const struct of_device_id mcp9982_of_match[] = {
951
+
{
952
+
.compatible = "microchip,mcp9933",
953
+
.data = &mcp9933_chip_config,
954
+
}, {
955
+
.compatible = "microchip,mcp9933d",
956
+
.data = &mcp9933d_chip_config,
957
+
}, {
958
+
.compatible = "microchip,mcp9982",
959
+
.data = &mcp9982_chip_config,
960
+
}, {
961
+
.compatible = "microchip,mcp9982d",
962
+
.data = &mcp9982d_chip_config,
963
+
}, {
964
+
.compatible = "microchip,mcp9983",
965
+
.data = &mcp9983_chip_config,
966
+
}, {
967
+
.compatible = "microchip,mcp9983d",
968
+
.data = &mcp9983d_chip_config,
969
+
}, {
970
+
.compatible = "microchip,mcp9984",
971
+
.data = &mcp9984_chip_config,
972
+
}, {
973
+
.compatible = "microchip,mcp9984d",
974
+
.data = &mcp9984d_chip_config,
975
+
}, {
976
+
.compatible = "microchip,mcp9985",
977
+
.data = &mcp9985_chip_config,
978
+
}, {
979
+
.compatible = "microchip,mcp9985d",
980
+
.data = &mcp9985d_chip_config,
981
+
},
982
+
{ }
983
+
};
984
+
MODULE_DEVICE_TABLE(of, mcp9982_of_match);
985
+
986
+
static struct i2c_driver mcp9982_driver = {
987
+
.driver = {
988
+
.name = "mcp9982",
989
+
.of_match_table = mcp9982_of_match,
990
+
},
991
+
.probe = mcp9982_probe,
992
+
.id_table = mcp9982_id,
993
+
};
994
+
module_i2c_driver(mcp9982_driver);
995
+
996
+
MODULE_AUTHOR("Victor Duicu <victor.duicu@microchip.com>");
997
+
MODULE_DESCRIPTION("MCP998X/33 and MCP998XD/33D Multichannel Automotive Temperature Monitor Driver");
998
+
MODULE_LICENSE("GPL");
+3
drivers/hwmon/nct6683.c
+3
drivers/hwmon/nct6683.c
···
182
182
#define NCT6683_CUSTOMER_ID_ASROCK3 0x1631
183
183
#define NCT6683_CUSTOMER_ID_ASROCK4 0x163e
184
184
#define NCT6683_CUSTOMER_ID_ASROCK5 0x1621
185
+
#define NCT6683_CUSTOMER_ID_ASROCK6 0x1633
185
186
186
187
#define NCT6683_REG_BUILD_YEAR 0x604
187
188
#define NCT6683_REG_BUILD_MONTH 0x605
···
1245
1244
case NCT6683_CUSTOMER_ID_ASROCK4:
1246
1245
break;
1247
1246
case NCT6683_CUSTOMER_ID_ASROCK5:
1247
+
break;
1248
+
case NCT6683_CUSTOMER_ID_ASROCK6:
1248
1249
break;
1249
1250
default:
1250
1251
if (!force)
+23
drivers/hwmon/nct6775-platform.c
+23
drivers/hwmon/nct6775-platform.c
···
1159
1159
"Pro A520M-C",
1160
1160
"Pro A520M-C II",
1161
1161
"Pro B550M-C",
1162
+
"Pro WS W480-ACE",
1162
1163
"Pro WS X570-ACE",
1163
1164
"ProArt B550-CREATOR",
1164
1165
"ProArt X570-CREATOR WIFI",
···
1259
1258
"TUF Z390-PRO GAMING",
1260
1259
"TUF Z390M-PRO GAMING",
1261
1260
"TUF Z390M-PRO GAMING (WI-FI)",
1261
+
"W480/SYS",
1262
1262
"WS Z390 PRO",
1263
1263
"Z490-GUNDAM (WI-FI)",
1264
1264
};
···
1272
1270
"EX-B760M-V5 D4",
1273
1271
"EX-H510M-V3",
1274
1272
"EX-H610M-V3 D4",
1273
+
"G15CE",
1275
1274
"G15CF",
1276
1275
"PRIME A620M-A",
1277
1276
"PRIME B560-PLUS",
···
1323
1320
"PRIME X670-P",
1324
1321
"PRIME X670-P WIFI",
1325
1322
"PRIME X670E-PRO WIFI",
1323
+
"PRIME X870-P",
1324
+
"PRIME X870-P WIFI",
1326
1325
"PRIME Z590-A",
1327
1326
"PRIME Z590-P",
1328
1327
"PRIME Z590-P WIFI",
···
1367
1362
"ProArt B660-CREATOR D4",
1368
1363
"ProArt B760-CREATOR D4",
1369
1364
"ProArt X670E-CREATOR WIFI",
1365
+
"ProArt X870E-CREATOR WIFI",
1370
1366
"ProArt Z690-CREATOR WIFI",
1371
1367
"ProArt Z790-CREATOR WIFI",
1372
1368
"ROG CROSSHAIR X670E EXTREME",
1373
1369
"ROG CROSSHAIR X670E GENE",
1374
1370
"ROG CROSSHAIR X670E HERO",
1371
+
"ROG CROSSHAIR X870E APEX",
1372
+
"ROG CROSSHAIR X870E DARK HERO",
1373
+
"ROG CROSSHAIR X870E EXTREME",
1374
+
"ROG CROSSHAIR X870E GLACIAL",
1375
+
"ROG CROSSHAIR X870E HERO",
1376
+
"ROG CROSSHAIR X870E HERO BTF",
1375
1377
"ROG MAXIMUS XIII APEX",
1376
1378
"ROG MAXIMUS XIII EXTREME",
1377
1379
"ROG MAXIMUS XIII EXTREME GLACIAL",
···
1416
1404
"ROG STRIX X670E-E GAMING WIFI",
1417
1405
"ROG STRIX X670E-F GAMING WIFI",
1418
1406
"ROG STRIX X670E-I GAMING WIFI",
1407
+
"ROG STRIX X870-A GAMING WIFI",
1408
+
"ROG STRIX X870-F GAMING WIFI",
1409
+
"ROG STRIX X870-I GAMING WIFI",
1410
+
"ROG STRIX X870E-E GAMING WIFI",
1411
+
"ROG STRIX X870E-E GAMING WIFI7 R2",
1419
1412
"ROG STRIX X870E-H GAMING WIFI7",
1420
1413
"ROG STRIX Z590-A GAMING WIFI",
1421
1414
"ROG STRIX Z590-A GAMING WIFI II",
···
1468
1451
"TUF GAMING H770-PRO WIFI",
1469
1452
"TUF GAMING X670E-PLUS",
1470
1453
"TUF GAMING X670E-PLUS WIFI",
1454
+
"TUF GAMING X870-PLUS WIFI",
1455
+
"TUF GAMING X870-PRO WIFI7 W NEO",
1456
+
"TUF GAMING X870E-PLUS WIFI7",
1471
1457
"TUF GAMING Z590-PLUS",
1472
1458
"TUF GAMING Z590-PLUS WIFI",
1473
1459
"TUF GAMING Z690-PLUS",
···
1480
1460
"TUF GAMING Z790-PLUS D4",
1481
1461
"TUF GAMING Z790-PLUS WIFI",
1482
1462
"TUF GAMING Z790-PLUS WIFI D4",
1463
+
"X870 AYW GAMING WIFI W",
1464
+
"X870 MAX GAMING WIFI7",
1465
+
"X870 MAX GAMING WIFI7 W",
1483
1466
"Z590 WIFI GUNDAM EDITION",
1484
1467
};
1485
1468
+27
drivers/hwmon/pmbus/Kconfig
+27
drivers/hwmon/pmbus/Kconfig
···
77
77
µModule regulators that can provide microprocessor power from 54V
78
78
power distribution architecture.
79
79
80
+
config SENSORS_APS_379
81
+
tristate "Sony APS-379 Power Supplies"
82
+
help
83
+
If you say yes here you get hardware monitoring support for Sony
84
+
APS-379 Power Supplies.
85
+
86
+
This driver can also be built as a module. If so, the module will
87
+
be called aps-379.
88
+
80
89
config SENSORS_BEL_PFE
81
90
tristate "Bel PFE Compatible Power Supplies"
82
91
help
···
711
702
This driver can also be built as a module. If so, the module will
712
703
be called xdp710.
713
704
705
+
config SENSORS_XDP720
706
+
tristate "Infineon XDP720 family"
707
+
help
708
+
If you say yes here you get hardware monitoring support for Infineon
709
+
XDP720.
710
+
711
+
This driver can also be built as a module. If so, the module will
712
+
be called xdp720.
713
+
714
714
config SENSORS_XDPE152
715
715
tristate "Infineon XDPE152 family"
716
716
help
···
728
710
729
711
This driver can also be built as a module. If so, the module will
730
712
be called xdpe152c4.
713
+
714
+
config SENSORS_XDPE1A2G7B
715
+
tristate "Infineon XDPE1A2G7B"
716
+
help
717
+
If you say yes here you get hardware monitoring support for Infineon
718
+
XDPE1A2G5B and XDPE1A2G7B.
719
+
720
+
This driver can also be built as a module. If so, the module will
721
+
be called xdpe1a2g7b.
731
722
732
723
config SENSORS_XDPE122
733
724
tristate "Infineon XDPE122 family"
+3
drivers/hwmon/pmbus/Makefile
+3
drivers/hwmon/pmbus/Makefile
···
9
9
obj-$(CONFIG_SENSORS_ADM1266) += adm1266.o
10
10
obj-$(CONFIG_SENSORS_ADM1275) += adm1275.o
11
11
obj-$(CONFIG_SENSORS_ADP1050) += adp1050.o
12
+
obj-$(CONFIG_SENSORS_APS_379) += aps-379.o
12
13
obj-$(CONFIG_SENSORS_BEL_PFE) += bel-pfe.o
13
14
obj-$(CONFIG_SENSORS_BPA_RS600) += bpa-rs600.o
14
15
obj-$(CONFIG_SENSORS_DELTA_AHE50DC_FAN) += delta-ahe50dc-fan.o
···
69
68
obj-$(CONFIG_SENSORS_UCD9000) += ucd9000.o
70
69
obj-$(CONFIG_SENSORS_UCD9200) += ucd9200.o
71
70
obj-$(CONFIG_SENSORS_XDP710) += xdp710.o
71
+
obj-$(CONFIG_SENSORS_XDP720) += xdp720.o
72
72
obj-$(CONFIG_SENSORS_XDPE122) += xdpe12284.o
73
73
obj-$(CONFIG_SENSORS_XDPE152) += xdpe152c4.o
74
+
obj-$(CONFIG_SENSORS_XDPE1A2G7B) += xdpe1a2g7b.o
74
75
obj-$(CONFIG_SENSORS_ZL6100) += zl6100.o
75
76
obj-$(CONFIG_SENSORS_PIM4328) += pim4328.o
76
77
obj-$(CONFIG_SENSORS_CRPS) += crps.o
+155
drivers/hwmon/pmbus/aps-379.c
+155
drivers/hwmon/pmbus/aps-379.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Hardware monitoring driver for Sony APS-379 Power Supplies
4
+
*
5
+
* Copyright 2026 Allied Telesis Labs
6
+
*/
7
+
8
+
#include <linux/i2c.h>
9
+
#include <linux/init.h>
10
+
#include <linux/kernel.h>
11
+
#include <linux/module.h>
12
+
#include <linux/pmbus.h>
13
+
#include "pmbus.h"
14
+
15
+
/*
16
+
* The VOUT format used by the chip is linear11, not linear16. Provide a hard
17
+
* coded VOUT_MODE that says VOUT is in linear mode with a fixed exponent of
18
+
* 2^-4.
19
+
*/
20
+
#define APS_379_VOUT_MODE ((u8)(-4 & 0x1f))
21
+
22
+
static int aps_379_read_byte_data(struct i2c_client *client, int page, int reg)
23
+
{
24
+
switch (reg) {
25
+
case PMBUS_VOUT_MODE:
26
+
return APS_379_VOUT_MODE;
27
+
default:
28
+
return -ENODATA;
29
+
}
30
+
}
31
+
32
+
/*
33
+
* The APS-379 uses linear11 format instead of linear16. We've reported the exponent
34
+
* via the PMBUS_VOUT_MODE so we just return the mantissa here.
35
+
*/
36
+
static int aps_379_read_vout(struct i2c_client *client)
37
+
{
38
+
int ret;
39
+
40
+
ret = pmbus_read_word_data(client, 0, 0xff, PMBUS_READ_VOUT);
41
+
if (ret < 0)
42
+
return ret;
43
+
44
+
return clamp_val(sign_extend32(ret & 0x7ff, 10), 0, 0x3ff);
45
+
}
46
+
47
+
static int aps_379_read_word_data(struct i2c_client *client, int page, int phase, int reg)
48
+
{
49
+
switch (reg) {
50
+
case PMBUS_VOUT_UV_WARN_LIMIT:
51
+
case PMBUS_VOUT_OV_WARN_LIMIT:
52
+
case PMBUS_VOUT_UV_FAULT_LIMIT:
53
+
case PMBUS_VOUT_OV_FAULT_LIMIT:
54
+
case PMBUS_IOUT_OC_WARN_LIMIT:
55
+
case PMBUS_IOUT_UC_FAULT_LIMIT:
56
+
case PMBUS_UT_WARN_LIMIT:
57
+
case PMBUS_UT_FAULT_LIMIT:
58
+
case PMBUS_OT_WARN_LIMIT:
59
+
case PMBUS_OT_FAULT_LIMIT:
60
+
case PMBUS_PIN_OP_WARN_LIMIT:
61
+
case PMBUS_POUT_OP_WARN_LIMIT:
62
+
case PMBUS_MFR_IIN_MAX:
63
+
case PMBUS_MFR_PIN_MAX:
64
+
case PMBUS_MFR_VOUT_MIN:
65
+
case PMBUS_MFR_VOUT_MAX:
66
+
case PMBUS_MFR_IOUT_MAX:
67
+
case PMBUS_MFR_POUT_MAX:
68
+
case PMBUS_MFR_MAX_TEMP_1:
69
+
/* These commands return data but it is invalid/un-documented */
70
+
return -ENXIO;
71
+
case PMBUS_IOUT_OC_FAULT_LIMIT:
72
+
/*
73
+
* The standard requires this to be a value in Amps but it's
74
+
* actually a percentage of the rated output (123A for
75
+
* 110-240Vac, 110A for 90-100Vac) which we don't know. Ignore
76
+
* it rather than guessing.
77
+
*/
78
+
return -ENXIO;
79
+
case PMBUS_READ_VOUT:
80
+
return aps_379_read_vout(client);
81
+
default:
82
+
return -ENODATA;
83
+
}
84
+
}
85
+
86
+
static struct pmbus_driver_info aps_379_info = {
87
+
.pages = 1,
88
+
.format[PSC_VOLTAGE_OUT] = linear,
89
+
.format[PSC_CURRENT_OUT] = linear,
90
+
.format[PSC_POWER] = linear,
91
+
.format[PSC_TEMPERATURE] = linear,
92
+
.format[PSC_FAN] = linear,
93
+
.func[0] = PMBUS_HAVE_VOUT |
94
+
PMBUS_HAVE_IOUT |
95
+
PMBUS_HAVE_PIN | PMBUS_HAVE_POUT |
96
+
PMBUS_HAVE_TEMP |
97
+
PMBUS_HAVE_FAN12,
98
+
.read_byte_data = aps_379_read_byte_data,
99
+
.read_word_data = aps_379_read_word_data,
100
+
};
101
+
102
+
static const struct i2c_device_id aps_379_id[] = {
103
+
{ "aps-379", 0 },
104
+
{},
105
+
};
106
+
MODULE_DEVICE_TABLE(i2c, aps_379_id);
107
+
108
+
static int aps_379_probe(struct i2c_client *client)
109
+
{
110
+
struct device *dev = &client->dev;
111
+
u8 buf[I2C_SMBUS_BLOCK_MAX + 1] = { 0 };
112
+
int ret;
113
+
114
+
if (!i2c_check_functionality(client->adapter,
115
+
I2C_FUNC_SMBUS_READ_BYTE_DATA
116
+
| I2C_FUNC_SMBUS_READ_WORD_DATA
117
+
| I2C_FUNC_SMBUS_READ_BLOCK_DATA))
118
+
return -ENODEV;
119
+
120
+
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf);
121
+
if (ret < 0) {
122
+
dev_err(dev, "Failed to read Manufacturer Model\n");
123
+
return ret;
124
+
}
125
+
126
+
if (strncasecmp(buf, aps_379_id[0].name, strlen(aps_379_id[0].name)) != 0) {
127
+
buf[ret] = '\0';
128
+
dev_err(dev, "Unsupported Manufacturer Model '%s'\n", buf);
129
+
return -ENODEV;
130
+
}
131
+
132
+
return pmbus_do_probe(client, &aps_379_info);
133
+
}
134
+
135
+
static const struct of_device_id __maybe_unused aps_379_of_match[] = {
136
+
{ .compatible = "sony,aps-379" },
137
+
{},
138
+
};
139
+
MODULE_DEVICE_TABLE(of, aps_379_of_match);
140
+
141
+
static struct i2c_driver aps_379_driver = {
142
+
.driver = {
143
+
.name = "aps-379",
144
+
.of_match_table = of_match_ptr(aps_379_of_match),
145
+
},
146
+
.probe = aps_379_probe,
147
+
.id_table = aps_379_id,
148
+
};
149
+
150
+
module_i2c_driver(aps_379_driver);
151
+
152
+
MODULE_AUTHOR("Chris Packham");
153
+
MODULE_DESCRIPTION("PMBus driver for Sony APS-379");
154
+
MODULE_LICENSE("GPL");
155
+
MODULE_IMPORT_NS("PMBUS");
+1
-4
drivers/hwmon/pmbus/bel-pfe.c
+1
-4
drivers/hwmon/pmbus/bel-pfe.c
···
88
88
},
89
89
};
90
90
91
-
static const struct i2c_device_id pfe_device_id[];
92
-
93
91
static int pfe_pmbus_probe(struct i2c_client *client)
94
92
{
95
-
int model;
93
+
int model = (uintptr_t)i2c_get_match_data(client);
96
94
97
-
model = (int)i2c_match_id(pfe_device_id, client)->driver_data;
98
95
client->dev.platform_data = &pfe_plat_data;
99
96
100
97
/*
+6
-7
drivers/hwmon/pmbus/fsp-3y.c
+6
-7
drivers/hwmon/pmbus/fsp-3y.c
···
222
222
return -ENODEV;
223
223
}
224
224
225
-
static const struct i2c_device_id fsp3y_id[] = {
226
-
{"ym2151e", ym2151e},
227
-
{"yh5151e", yh5151e},
228
-
{ }
229
-
};
230
-
231
225
static int fsp3y_probe(struct i2c_client *client)
232
226
{
233
227
struct fsp3y_data *data;
···
236
242
if (data->chip < 0)
237
243
return data->chip;
238
244
239
-
id = i2c_match_id(fsp3y_id, client);
245
+
id = i2c_client_get_device_id(client);
240
246
if (data->chip != id->driver_data)
241
247
dev_warn(&client->dev, "Device mismatch: Configured %s (%d), detected %d\n",
242
248
id->name, (int)id->driver_data, data->chip);
···
270
276
return pmbus_do_probe(client, &data->info);
271
277
}
272
278
279
+
static const struct i2c_device_id fsp3y_id[] = {
280
+
{"ym2151e", ym2151e},
281
+
{"yh5151e", yh5151e},
282
+
{ }
283
+
};
273
284
MODULE_DEVICE_TABLE(i2c, fsp3y_id);
274
285
275
286
static struct i2c_driver fsp3y_driver = {
+3
-13
drivers/hwmon/pmbus/ibm-cffps.c
+3
-13
drivers/hwmon/pmbus/ibm-cffps.c
···
58
58
CFFPS_DEBUGFS_NUM_ENTRIES
59
59
};
60
60
61
-
enum versions { cffps1, cffps2, cffps_unknown };
61
+
enum versions { cffps_unknown, cffps1, cffps2 };
62
62
63
63
struct ibm_cffps {
64
64
enum versions version;
···
482
482
static int ibm_cffps_probe(struct i2c_client *client)
483
483
{
484
484
int i, rc;
485
-
enum versions vs = cffps_unknown;
485
+
enum versions vs = (uintptr_t)i2c_get_match_data(client);
486
486
struct dentry *debugfs;
487
487
struct ibm_cffps *psu;
488
-
const void *md = of_device_get_match_data(&client->dev);
489
-
const struct i2c_device_id *id;
490
-
491
-
if (md) {
492
-
vs = (uintptr_t)md;
493
-
} else {
494
-
id = i2c_match_id(ibm_cffps_id, client);
495
-
if (id)
496
-
vs = (enum versions)id->driver_data;
497
-
}
498
488
499
489
if (vs == cffps_unknown) {
500
490
u16 ccin_revision = 0;
···
524
534
}
525
535
526
536
/* Set the client name to include the version number. */
527
-
snprintf(client->name, I2C_NAME_SIZE, "cffps%d", vs + 1);
537
+
snprintf(client->name, I2C_NAME_SIZE, "cffps%d", vs);
528
538
}
529
539
530
540
client->dev.platform_data = &ibm_cffps_pdata;
+15
-13
drivers/hwmon/pmbus/ina233.c
+15
-13
drivers/hwmon/pmbus/ina233.c
···
85
85
static int ina233_probe(struct i2c_client *client)
86
86
{
87
87
struct device *dev = &client->dev;
88
+
const char *propname;
88
89
int ret, m, R;
89
90
u32 rshunt;
90
91
u32 max_current;
···
115
114
116
115
/* If INA233 skips current/power, shunt-resistor and current-lsb aren't needed. */
117
116
/* read rshunt value (uOhm) */
118
-
ret = device_property_read_u32(dev, "shunt-resistor", &rshunt);
119
-
if (ret) {
120
-
if (ret != -EINVAL)
121
-
return dev_err_probe(dev, ret, "Shunt resistor property read fail.\n");
117
+
propname = "shunt-resistor";
118
+
if (device_property_present(dev, propname)) {
119
+
ret = device_property_read_u32(dev, propname, &rshunt);
120
+
if (ret)
121
+
return dev_err_probe(dev, ret, "%s property read fail.\n", propname);
122
+
} else {
122
123
rshunt = INA233_RSHUNT_DEFAULT;
123
124
}
124
125
if (!rshunt)
125
-
return dev_err_probe(dev, -EINVAL,
126
-
"Shunt resistor cannot be zero.\n");
126
+
return dev_err_probe(dev, -EINVAL, "%s cannot be zero.\n", propname);
127
127
128
128
/* read Maximum expected current value (uA) */
129
-
ret = device_property_read_u32(dev, "ti,maximum-expected-current-microamp", &max_current);
130
-
if (ret) {
131
-
if (ret != -EINVAL)
132
-
return dev_err_probe(dev, ret,
133
-
"Maximum expected current property read fail.\n");
129
+
propname = "ti,maximum-expected-current-microamp";
130
+
if (device_property_present(dev, propname)) {
131
+
ret = device_property_read_u32(dev, propname, &max_current);
132
+
if (ret)
133
+
return dev_err_probe(dev, ret, "%s property read fail.\n", propname);
134
+
} else {
134
135
max_current = INA233_MAX_CURRENT_DEFAULT;
135
136
}
136
137
if (max_current < 32768)
137
-
return dev_err_probe(dev, -EINVAL,
138
-
"Maximum expected current cannot less then 32768.\n");
138
+
return dev_err_probe(dev, -EINVAL, "%s cannot be less than 32768.\n", propname);
139
139
140
140
/* Calculate Current_LSB according to the spec formula */
141
141
current_lsb = max_current / 32768;
+3
-49
drivers/hwmon/pmbus/isl68137.c
+3
-49
drivers/hwmon/pmbus/isl68137.c
···
23
23
#define RAA_DMPVR2_READ_VMON 0xc8
24
24
#define MAX_CHANNELS 4
25
25
26
-
enum chips {
27
-
isl68137,
28
-
isl68220,
29
-
isl68221,
30
-
isl68222,
31
-
isl68223,
32
-
isl68224,
33
-
isl68225,
34
-
isl68226,
35
-
isl68227,
36
-
isl68229,
37
-
isl68233,
38
-
isl68239,
39
-
isl69222,
40
-
isl69223,
41
-
isl69224,
42
-
isl69225,
43
-
isl69227,
44
-
isl69228,
45
-
isl69234,
46
-
isl69236,
47
-
isl69239,
48
-
isl69242,
49
-
isl69243,
50
-
isl69247,
51
-
isl69248,
52
-
isl69254,
53
-
isl69255,
54
-
isl69256,
55
-
isl69259,
56
-
isl69260,
57
-
isl69268,
58
-
isl69269,
59
-
isl69298,
60
-
raa228000,
61
-
raa228004,
62
-
raa228006,
63
-
raa228228,
64
-
raa228244,
65
-
raa228246,
66
-
raa229001,
67
-
raa229004,
68
-
raa229141,
69
-
raa229621,
70
-
};
71
-
72
26
enum variants {
73
27
raa_dmpvr1_2rail,
74
28
raa_dmpvr2_1rail,
···
43
89
};
44
90
45
91
#define to_isl68137_data(x) container_of(x, struct isl68137_data, info)
46
-
47
-
static const struct i2c_device_id raa_dmpvr_id[];
48
92
49
93
static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client,
50
94
int page,
···
345
393
memcpy(&data->info, &raa_dmpvr_info, sizeof(data->info));
346
394
info = &data->info;
347
395
348
-
switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) {
396
+
switch ((uintptr_t)i2c_get_match_data(client)) {
349
397
case raa_dmpvr1_2rail:
350
398
info->pages = 2;
351
399
info->R[PSC_VOLTAGE_IN] = 3;
···
450
498
{"raa228228", raa_dmpvr2_2rail_nontc},
451
499
{"raa228244", raa_dmpvr2_2rail_nontc},
452
500
{"raa228246", raa_dmpvr2_2rail_nontc},
501
+
{"raa228942", raa_dmpvr2_2rail_nontc},
502
+
{"raa228943", raa_dmpvr2_2rail_nontc},
453
503
{"raa229001", raa_dmpvr2_2rail},
454
504
{"raa229004", raa_dmpvr2_2rail},
455
505
{"raa229141", raa_dmpvr2_2rail_pmbus},
+1
-1
drivers/hwmon/pmbus/ltc2978.c
+1
-1
drivers/hwmon/pmbus/ltc2978.c
+1
-1
drivers/hwmon/pmbus/max16601.c
+1
-1
drivers/hwmon/pmbus/max16601.c
+1
-4
drivers/hwmon/pmbus/max20730.c
+1
-4
drivers/hwmon/pmbus/max20730.c
···
715
715
return -ENODEV;
716
716
}
717
717
718
-
if (client->dev.of_node)
719
-
chip_id = (uintptr_t)of_device_get_match_data(dev);
720
-
else
721
-
chip_id = i2c_match_id(max20730_id, client)->driver_data;
718
+
chip_id = (uintptr_t)i2c_get_match_data(client);
722
719
723
720
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
724
721
if (!data)
+63
-134
drivers/hwmon/pmbus/max31785.c
+63
-134
drivers/hwmon/pmbus/max31785.c
···
31
31
struct pmbus_driver_info info;
32
32
};
33
33
34
-
#define to_max31785_data(x) container_of(x, struct max31785_data, info)
35
-
36
34
/*
37
35
* MAX31785 Driver Workaround
38
36
*
···
38
40
* These issues are not indicated by the device itself, except for occasional
39
41
* NACK responses during master transactions. No error bits are set in STATUS_BYTE.
40
42
*
41
-
* To address this, we introduce a delay of 250us between consecutive accesses
42
-
* to the fan controller. This delay helps mitigate communication problems by
43
-
* allowing sufficient time between accesses.
43
+
* Keep minimal local delay handling for raw pre-probe SMBus accesses.
44
+
* Normal PMBus-mediated accesses use pmbus_driver_info.access_delay instead.
44
45
*/
45
46
static inline void max31785_wait(const struct max31785_data *data)
46
47
{
···
51
54
}
52
55
53
56
static int max31785_i2c_write_byte_data(struct i2c_client *client,
54
-
struct max31785_data *driver_data,
55
-
int command, u16 data)
57
+
struct max31785_data *data,
58
+
int command, u8 value)
56
59
{
57
60
int rc;
58
61
59
-
max31785_wait(driver_data);
60
-
rc = i2c_smbus_write_byte_data(client, command, data);
61
-
driver_data->access = ktime_get();
62
+
max31785_wait(data);
63
+
rc = i2c_smbus_write_byte_data(client, command, value);
64
+
data->access = ktime_get();
62
65
return rc;
63
66
}
64
67
65
68
static int max31785_i2c_read_word_data(struct i2c_client *client,
66
-
struct max31785_data *driver_data,
69
+
struct max31785_data *data,
67
70
int command)
68
71
{
69
72
int rc;
70
73
71
-
max31785_wait(driver_data);
74
+
max31785_wait(data);
72
75
rc = i2c_smbus_read_word_data(client, command);
73
-
driver_data->access = ktime_get();
74
-
return rc;
75
-
}
76
-
77
-
static int _max31785_read_byte_data(struct i2c_client *client,
78
-
struct max31785_data *driver_data,
79
-
int page, int command)
80
-
{
81
-
int rc;
82
-
83
-
max31785_wait(driver_data);
84
-
rc = pmbus_read_byte_data(client, page, command);
85
-
driver_data->access = ktime_get();
86
-
return rc;
87
-
}
88
-
89
-
static int _max31785_write_byte_data(struct i2c_client *client,
90
-
struct max31785_data *driver_data,
91
-
int page, int command, u16 data)
92
-
{
93
-
int rc;
94
-
95
-
max31785_wait(driver_data);
96
-
rc = pmbus_write_byte_data(client, page, command, data);
97
-
driver_data->access = ktime_get();
98
-
return rc;
99
-
}
100
-
101
-
static int _max31785_read_word_data(struct i2c_client *client,
102
-
struct max31785_data *driver_data,
103
-
int page, int phase, int command)
104
-
{
105
-
int rc;
106
-
107
-
max31785_wait(driver_data);
108
-
rc = pmbus_read_word_data(client, page, phase, command);
109
-
driver_data->access = ktime_get();
110
-
return rc;
111
-
}
112
-
113
-
static int _max31785_write_word_data(struct i2c_client *client,
114
-
struct max31785_data *driver_data,
115
-
int page, int command, u16 data)
116
-
{
117
-
int rc;
118
-
119
-
max31785_wait(driver_data);
120
-
rc = pmbus_write_word_data(client, page, command, data);
121
-
driver_data->access = ktime_get();
76
+
data->access = ktime_get();
122
77
return rc;
123
78
}
124
79
125
80
static int max31785_read_byte_data(struct i2c_client *client, int page, int reg)
126
81
{
127
-
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
128
-
struct max31785_data *driver_data = to_max31785_data(info);
129
-
130
82
switch (reg) {
131
83
case PMBUS_VOUT_MODE:
132
84
return -ENOTSUPP;
133
85
case PMBUS_FAN_CONFIG_12:
134
-
return _max31785_read_byte_data(client, driver_data,
135
-
page - MAX31785_NR_PAGES,
136
-
reg);
86
+
if (page < MAX31785_NR_PAGES)
87
+
return -ENODATA;
88
+
return pmbus_read_byte_data(client,
89
+
page - MAX31785_NR_PAGES,
90
+
reg);
137
91
}
138
92
139
93
return -ENODATA;
···
126
178
if (rc < 0)
127
179
return rc;
128
180
181
+
/*
182
+
* Ensure the raw transfer is properly spaced from the
183
+
* preceding PMBus transaction.
184
+
*/
185
+
pmbus_wait(client);
186
+
129
187
rc = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
130
-
if (rc < 0)
131
-
return rc;
188
+
189
+
/*
190
+
* Update PMBus core timing state for the raw transfer, even on error.
191
+
* Pass 0 as the operation mask since this is a raw read, intentionally
192
+
* neither PMBUS_OP_WRITE nor PMBUS_OP_PAGE_CHANGE.
193
+
*/
194
+
pmbus_update_ts(client, 0);
195
+
196
+
if (rc != ARRAY_SIZE(msg))
197
+
return rc < 0 ? rc : -EIO;
132
198
133
199
*data = (rspbuf[0] << (0 * 8)) | (rspbuf[1] << (1 * 8)) |
134
200
(rspbuf[2] << (2 * 8)) | (rspbuf[3] << (3 * 8));
135
201
136
-
return rc;
202
+
return 0;
137
203
}
138
204
139
205
static int max31785_get_pwm(struct i2c_client *client, int page)
···
165
203
return rv;
166
204
}
167
205
168
-
static int max31785_get_pwm_mode(struct i2c_client *client,
169
-
struct max31785_data *driver_data, int page)
206
+
static int max31785_get_pwm_mode(struct i2c_client *client, int page)
170
207
{
171
208
int config;
172
209
int command;
173
210
174
-
config = _max31785_read_byte_data(client, driver_data, page,
175
-
PMBUS_FAN_CONFIG_12);
211
+
config = pmbus_read_byte_data(client, page, PMBUS_FAN_CONFIG_12);
176
212
if (config < 0)
177
213
return config;
178
214
179
-
command = _max31785_read_word_data(client, driver_data, page, 0xff,
180
-
PMBUS_FAN_COMMAND_1);
215
+
command = pmbus_read_word_data(client, page, 0xff, PMBUS_FAN_COMMAND_1);
181
216
if (command < 0)
182
217
return command;
183
218
···
192
233
static int max31785_read_word_data(struct i2c_client *client, int page,
193
234
int phase, int reg)
194
235
{
195
-
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
196
-
struct max31785_data *driver_data = to_max31785_data(info);
197
236
u32 val;
198
237
int rv;
199
238
···
220
263
rv = max31785_get_pwm(client, page);
221
264
break;
222
265
case PMBUS_VIRT_PWM_ENABLE_1:
223
-
rv = max31785_get_pwm_mode(client, driver_data, page);
266
+
rv = max31785_get_pwm_mode(client, page);
224
267
break;
225
268
default:
226
269
rv = -ENODATA;
···
251
294
return (sensor_val * 100) / 255;
252
295
}
253
296
254
-
static int max31785_update_fan(struct i2c_client *client,
255
-
struct max31785_data *driver_data, int page,
256
-
u8 config, u8 mask, u16 command)
257
-
{
258
-
int from, rv;
259
-
u8 to;
260
-
261
-
from = _max31785_read_byte_data(client, driver_data, page,
262
-
PMBUS_FAN_CONFIG_12);
263
-
if (from < 0)
264
-
return from;
265
-
266
-
to = (from & ~mask) | (config & mask);
267
-
268
-
if (to != from) {
269
-
rv = _max31785_write_byte_data(client, driver_data, page,
270
-
PMBUS_FAN_CONFIG_12, to);
271
-
if (rv < 0)
272
-
return rv;
273
-
}
274
-
275
-
rv = _max31785_write_word_data(client, driver_data, page,
276
-
PMBUS_FAN_COMMAND_1, command);
277
-
278
-
return rv;
279
-
}
280
-
281
-
static int max31785_pwm_enable(struct i2c_client *client,
282
-
struct max31785_data *driver_data, int page,
297
+
static int max31785_pwm_enable(struct i2c_client *client, int page,
283
298
u16 word)
284
299
{
285
300
int config = 0;
···
280
351
return -EINVAL;
281
352
}
282
353
283
-
return max31785_update_fan(client, driver_data, page, config,
284
-
PB_FAN_1_RPM, rate);
354
+
return pmbus_update_fan(client, page, 0, config,
355
+
PB_FAN_1_RPM, rate);
285
356
}
286
357
287
358
static int max31785_write_word_data(struct i2c_client *client, int page,
288
359
int reg, u16 word)
289
360
{
290
-
const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
291
-
struct max31785_data *driver_data = to_max31785_data(info);
292
-
293
361
switch (reg) {
294
362
case PMBUS_VIRT_PWM_1:
295
-
return max31785_update_fan(client, driver_data, page, 0,
296
-
PB_FAN_1_RPM,
297
-
max31785_scale_pwm(word));
363
+
return pmbus_update_fan(client, page, 0, 0,
364
+
PB_FAN_1_RPM,
365
+
max31785_scale_pwm(word));
298
366
case PMBUS_VIRT_PWM_ENABLE_1:
299
-
return max31785_pwm_enable(client, driver_data, page, word);
367
+
return max31785_pwm_enable(client, page, word);
300
368
default:
301
369
break;
302
370
}
···
317
391
.read_byte_data = max31785_read_byte_data,
318
392
.read_word_data = max31785_read_word_data,
319
393
.write_byte = max31785_write_byte,
394
+
.access_delay = MAX31785_WAIT_DELAY_US,
320
395
321
396
/* RPM */
322
397
.format[PSC_FAN] = direct,
···
365
438
};
366
439
367
440
static int max31785_configure_dual_tach(struct i2c_client *client,
368
-
struct pmbus_driver_info *info)
441
+
struct max31785_data *data)
369
442
{
443
+
struct pmbus_driver_info *info = &data->info;
370
444
int ret;
371
445
int i;
372
-
struct max31785_data *driver_data = to_max31785_data(info);
373
446
374
447
for (i = 0; i < MAX31785_NR_FAN_PAGES; i++) {
375
-
ret = max31785_i2c_write_byte_data(client, driver_data,
448
+
ret = max31785_i2c_write_byte_data(client, data,
376
449
PMBUS_PAGE, i);
377
450
if (ret < 0)
378
451
return ret;
379
452
380
-
ret = max31785_i2c_read_word_data(client, driver_data,
453
+
ret = max31785_i2c_read_word_data(client, data,
381
454
MFR_FAN_CONFIG);
382
455
if (ret < 0)
383
456
return ret;
384
457
385
458
if (ret & MFR_FAN_CONFIG_DUAL_TACH) {
386
-
int virtual = MAX31785_NR_PAGES + i;
459
+
int vpage = MAX31785_NR_PAGES + i;
387
460
388
-
info->pages = virtual + 1;
389
-
info->func[virtual] |= PMBUS_HAVE_FAN12;
390
-
info->func[virtual] |= PMBUS_PAGE_VIRTUAL;
461
+
info->pages = vpage + 1;
462
+
info->func[vpage] |= PMBUS_HAVE_FAN12;
463
+
info->func[vpage] |= PMBUS_PAGE_VIRTUAL;
391
464
}
392
465
}
393
466
···
398
471
{
399
472
struct device *dev = &client->dev;
400
473
struct pmbus_driver_info *info;
401
-
struct max31785_data *driver_data;
474
+
struct max31785_data *data;
402
475
bool dual_tach = false;
403
476
int ret;
404
477
···
407
480
I2C_FUNC_SMBUS_WORD_DATA))
408
481
return -ENODEV;
409
482
410
-
driver_data = devm_kzalloc(dev, sizeof(struct max31785_data), GFP_KERNEL);
411
-
if (!driver_data)
483
+
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
484
+
if (!data)
412
485
return -ENOMEM;
413
486
414
-
info = &driver_data->info;
415
-
driver_data->access = ktime_get();
487
+
data->access = ktime_get();
488
+
info = &data->info;
416
489
*info = max31785_info;
417
490
418
-
ret = max31785_i2c_write_byte_data(client, driver_data,
419
-
PMBUS_PAGE, 255);
491
+
ret = max31785_i2c_write_byte_data(client, data,
492
+
PMBUS_PAGE, 0xff);
420
493
if (ret < 0)
421
494
return ret;
422
495
423
-
ret = i2c_smbus_read_word_data(client, MFR_REVISION);
496
+
ret = max31785_i2c_read_word_data(client, data, MFR_REVISION);
424
497
if (ret < 0)
425
498
return ret;
426
499
···
436
509
}
437
510
438
511
if (dual_tach) {
439
-
ret = max31785_configure_dual_tach(client, info);
512
+
ret = max31785_configure_dual_tach(client, data);
440
513
if (ret < 0)
441
514
return ret;
442
515
}
516
+
517
+
max31785_wait(data);
443
518
444
519
return pmbus_do_probe(client, info);
445
520
}
+1
-3
drivers/hwmon/pmbus/max34440.c
+1
-3
drivers/hwmon/pmbus/max34440.c
···
71
71
72
72
#define to_max34440_data(x) container_of(x, struct max34440_data, info)
73
73
74
-
static const struct i2c_device_id max34440_id[];
75
-
76
74
static int max34440_read_word_data(struct i2c_client *client, int page,
77
75
int phase, int reg)
78
76
{
···
626
628
GFP_KERNEL);
627
629
if (!data)
628
630
return -ENOMEM;
629
-
data->id = i2c_match_id(max34440_id, client)->driver_data;
631
+
data->id = (uintptr_t)i2c_get_match_data(client);
630
632
data->info = max34440_info[data->id];
631
633
data->iout_oc_fault_limit = MAX34440_IOUT_OC_FAULT_LIMIT;
632
634
data->iout_oc_warn_limit = MAX34440_IOUT_OC_WARN_LIMIT;
+1
-3
drivers/hwmon/pmbus/pmbus.c
+1
-3
drivers/hwmon/pmbus/pmbus.c
···
20
20
u32 flags;
21
21
};
22
22
23
-
static const struct i2c_device_id pmbus_id[];
24
-
25
23
/*
26
24
* Find sensor groups and status registers on each page.
27
25
*/
···
172
174
if (!info)
173
175
return -ENOMEM;
174
176
175
-
device_info = (struct pmbus_device_info *)i2c_match_id(pmbus_id, client)->driver_data;
177
+
device_info = (struct pmbus_device_info *)i2c_get_match_data(client);
176
178
if (device_info->flags) {
177
179
pdata = devm_kzalloc(dev, sizeof(struct pmbus_platform_data),
178
180
GFP_KERNEL);
+12
-1
drivers/hwmon/pmbus/pmbus.h
+12
-1
drivers/hwmon/pmbus/pmbus.h
···
10
10
#define PMBUS_H
11
11
12
12
#include <linux/bitops.h>
13
+
#include <linux/cleanup.h>
13
14
#include <linux/regulator/driver.h>
14
15
15
16
/*
···
417
416
#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */
418
417
419
418
enum pmbus_data_format { linear = 0, ieee754, direct, vid };
420
-
enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
419
+
enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv, nvidia195mv };
421
420
422
421
/* PMBus revision identifiers */
423
422
#define PMBUS_REV_10 0x00 /* PMBus revision 1.0 */
424
423
#define PMBUS_REV_11 0x11 /* PMBus revision 1.1 */
425
424
#define PMBUS_REV_12 0x22 /* PMBus revision 1.2 */
426
425
#define PMBUS_REV_13 0x33 /* PMBus revision 1.3 */
426
+
427
+
/* Operation type flags for pmbus_update_ts */
428
+
#define PMBUS_OP_WRITE BIT(0)
429
+
#define PMBUS_OP_PAGE_CHANGE BIT(1)
427
430
428
431
struct pmbus_driver_info {
429
432
int pages; /* Total number of pages */
···
546
541
547
542
void pmbus_clear_cache(struct i2c_client *client);
548
543
void pmbus_set_update(struct i2c_client *client, u8 reg, bool update);
544
+
void pmbus_wait(struct i2c_client *client);
545
+
void pmbus_update_ts(struct i2c_client *client, int op);
549
546
int pmbus_set_page(struct i2c_client *client, int page, int phase);
550
547
int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
551
548
u8 reg);
···
570
563
int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
571
564
enum pmbus_fan_mode mode);
572
565
int pmbus_lock_interruptible(struct i2c_client *client);
566
+
void pmbus_lock(struct i2c_client *client);
573
567
void pmbus_unlock(struct i2c_client *client);
568
+
569
+
DEFINE_GUARD(pmbus_lock, struct i2c_client *, pmbus_lock(_T), pmbus_unlock(_T))
570
+
574
571
int pmbus_update_fan(struct i2c_client *client, int page, int id,
575
572
u8 config, u8 mask, u16 command);
576
573
struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
+125
-175
drivers/hwmon/pmbus/pmbus_core.c
+125
-175
drivers/hwmon/pmbus/pmbus_core.c
···
37
37
* The type of operation used for picking the delay between
38
38
* successive pmbus operations.
39
39
*/
40
-
#define PMBUS_OP_WRITE BIT(0)
41
-
#define PMBUS_OP_PAGE_CHANGE BIT(1)
40
+
/* PMBUS_OP_WRITE and PMBUS_OP_PAGE_CHANGE are defined in pmbus.h */
42
41
43
42
static int wp = -1;
44
43
module_param(wp, int, 0444);
···
178
179
EXPORT_SYMBOL_NS_GPL(pmbus_set_update, "PMBUS");
179
180
180
181
/* Some chips need a delay between accesses. */
181
-
static void pmbus_wait(struct i2c_client *client)
182
+
void pmbus_wait(struct i2c_client *client)
182
183
{
183
184
struct pmbus_data *data = i2c_get_clientdata(client);
184
185
s64 delay = ktime_us_delta(data->next_access_backoff, ktime_get());
···
186
187
if (delay > 0)
187
188
fsleep(delay);
188
189
}
190
+
EXPORT_SYMBOL_NS_GPL(pmbus_wait, "PMBUS");
189
191
190
192
/* Sets the last operation timestamp for pmbus_wait */
191
-
static void pmbus_update_ts(struct i2c_client *client, int op)
193
+
void pmbus_update_ts(struct i2c_client *client, int op)
192
194
{
193
195
struct pmbus_data *data = i2c_get_clientdata(client);
194
196
const struct pmbus_driver_info *info = data->info;
···
203
203
if (delay > 0)
204
204
data->next_access_backoff = ktime_add_us(ktime_get(), delay);
205
205
}
206
+
EXPORT_SYMBOL_NS_GPL(pmbus_update_ts, "PMBUS");
206
207
207
208
int pmbus_set_page(struct i2c_client *client, int page, int phase)
208
209
{
···
892
891
if (val >= 0x0 && val <= 0xd8)
893
892
rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
894
893
break;
894
+
case nvidia195mv:
895
+
if (val >= 0x01)
896
+
rv = 195 + (val - 1) * 5; /* VID step is 5mv */
897
+
break;
895
898
}
896
899
return rv;
897
900
}
···
1161
1156
int ret, status;
1162
1157
u16 regval;
1163
1158
1164
-
mutex_lock(&data->update_lock);
1159
+
guard(pmbus_lock)(client);
1160
+
1165
1161
status = pmbus_get_status(client, page, reg);
1166
-
if (status < 0) {
1167
-
ret = status;
1168
-
goto unlock;
1169
-
}
1162
+
if (status < 0)
1163
+
return status;
1170
1164
1171
1165
if (s1)
1172
1166
pmbus_update_sensor_data(client, s1);
···
1177
1173
if (data->revision >= PMBUS_REV_12) {
1178
1174
ret = _pmbus_write_byte_data(client, page, reg, regval);
1179
1175
if (ret)
1180
-
goto unlock;
1176
+
return ret;
1181
1177
} else {
1182
1178
pmbus_clear_fault_page(client, page);
1183
1179
}
···
1185
1181
if (s1 && s2) {
1186
1182
s64 v1, v2;
1187
1183
1188
-
if (s1->data < 0) {
1189
-
ret = s1->data;
1190
-
goto unlock;
1191
-
}
1192
-
if (s2->data < 0) {
1193
-
ret = s2->data;
1194
-
goto unlock;
1195
-
}
1184
+
if (s1->data < 0)
1185
+
return s1->data;
1186
+
if (s2->data < 0)
1187
+
return s2->data;
1196
1188
1197
1189
v1 = pmbus_reg2data(data, s1);
1198
1190
v2 = pmbus_reg2data(data, s2);
···
1196
1196
} else {
1197
1197
ret = !!regval;
1198
1198
}
1199
-
unlock:
1200
-
mutex_unlock(&data->update_lock);
1201
1199
return ret;
1202
1200
}
1203
1201
···
1225
1227
struct i2c_client *client = to_i2c_client(dev->parent);
1226
1228
struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
1227
1229
struct pmbus_data *data = i2c_get_clientdata(client);
1228
-
ssize_t ret;
1230
+
s64 val;
1229
1231
1230
-
mutex_lock(&data->update_lock);
1231
-
pmbus_update_sensor_data(client, sensor);
1232
-
if (sensor->data < 0)
1233
-
ret = sensor->data;
1234
-
else
1235
-
ret = sysfs_emit(buf, "%lld\n", pmbus_reg2data(data, sensor));
1236
-
mutex_unlock(&data->update_lock);
1237
-
return ret;
1232
+
scoped_guard(pmbus_lock, client) {
1233
+
pmbus_update_sensor_data(client, sensor);
1234
+
if (sensor->data < 0)
1235
+
return sensor->data;
1236
+
val = pmbus_reg2data(data, sensor);
1237
+
}
1238
+
1239
+
return sysfs_emit(buf, "%lld\n", val);
1238
1240
}
1239
1241
1240
1242
static ssize_t pmbus_set_sensor(struct device *dev,
···
1244
1246
struct i2c_client *client = to_i2c_client(dev->parent);
1245
1247
struct pmbus_data *data = i2c_get_clientdata(client);
1246
1248
struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
1247
-
ssize_t rv = count;
1248
1249
s64 val;
1249
1250
int ret;
1250
1251
u16 regval;
···
1251
1254
if (kstrtos64(buf, 10, &val) < 0)
1252
1255
return -EINVAL;
1253
1256
1254
-
mutex_lock(&data->update_lock);
1257
+
guard(pmbus_lock)(client);
1258
+
1255
1259
regval = pmbus_data2reg(data, sensor, val);
1256
1260
ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval);
1257
1261
if (ret < 0)
1258
-
rv = ret;
1259
-
else
1260
-
sensor->data = -ENODATA;
1261
-
mutex_unlock(&data->update_lock);
1262
-
return rv;
1262
+
return ret;
1263
+
1264
+
sensor->data = -ENODATA;
1265
+
return count;
1263
1266
}
1264
1267
1265
1268
static ssize_t pmbus_show_label(struct device *dev,
···
1361
1364
struct pmbus_data *pmbus_data = tdata->pmbus_data;
1362
1365
struct i2c_client *client = to_i2c_client(pmbus_data->dev);
1363
1366
struct device *dev = pmbus_data->hwmon_dev;
1364
-
int ret = 0;
1367
+
int _temp;
1365
1368
1366
1369
if (!dev) {
1367
1370
/* May not even get to hwmon yet */
···
1369
1372
return 0;
1370
1373
}
1371
1374
1372
-
mutex_lock(&pmbus_data->update_lock);
1373
-
pmbus_update_sensor_data(client, sensor);
1374
-
if (sensor->data < 0)
1375
-
ret = sensor->data;
1376
-
else
1377
-
*temp = (int)pmbus_reg2data(pmbus_data, sensor);
1378
-
mutex_unlock(&pmbus_data->update_lock);
1375
+
scoped_guard(pmbus_lock, client) {
1376
+
pmbus_update_sensor_data(client, sensor);
1377
+
if (sensor->data < 0)
1378
+
return sensor->data;
1379
+
_temp = (int)pmbus_reg2data(pmbus_data, sensor);
1380
+
}
1379
1381
1380
-
return ret;
1382
+
*temp = _temp;
1383
+
return 0;
1381
1384
}
1382
1385
1383
1386
static const struct thermal_zone_device_ops pmbus_thermal_ops = {
···
2409
2412
int val;
2410
2413
struct i2c_client *client = to_i2c_client(dev->parent);
2411
2414
struct pmbus_samples_reg *reg = to_samples_reg(devattr);
2412
-
struct pmbus_data *data = i2c_get_clientdata(client);
2413
2415
2414
-
mutex_lock(&data->update_lock);
2415
-
val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
2416
-
mutex_unlock(&data->update_lock);
2417
-
if (val < 0)
2418
-
return val;
2416
+
scoped_guard(pmbus_lock, client) {
2417
+
val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
2418
+
if (val < 0)
2419
+
return val;
2420
+
}
2419
2421
2420
2422
return sysfs_emit(buf, "%d\n", val);
2421
2423
}
···
2427
2431
long val;
2428
2432
struct i2c_client *client = to_i2c_client(dev->parent);
2429
2433
struct pmbus_samples_reg *reg = to_samples_reg(devattr);
2430
-
struct pmbus_data *data = i2c_get_clientdata(client);
2431
2434
2432
2435
if (kstrtol(buf, 0, &val) < 0)
2433
2436
return -EINVAL;
2434
2437
2435
-
mutex_lock(&data->update_lock);
2438
+
guard(pmbus_lock)(client);
2439
+
2436
2440
ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val);
2437
-
mutex_unlock(&data->update_lock);
2438
2441
2439
2442
return ret ? : count;
2440
2443
}
···
2945
2950
2946
2951
static int __maybe_unused pmbus_is_enabled(struct i2c_client *client, u8 page)
2947
2952
{
2948
-
struct pmbus_data *data = i2c_get_clientdata(client);
2949
-
int ret;
2953
+
guard(pmbus_lock)(client);
2950
2954
2951
-
mutex_lock(&data->update_lock);
2952
-
ret = _pmbus_is_enabled(client, page);
2953
-
mutex_unlock(&data->update_lock);
2954
-
2955
-
return ret;
2955
+
return _pmbus_is_enabled(client, page);
2956
2956
}
2957
2957
2958
2958
#define to_dev_attr(_dev_attr) \
···
2977
2987
}
2978
2988
}
2979
2989
2980
-
static int _pmbus_get_flags(struct pmbus_data *data, u8 page, unsigned int *flags,
2990
+
static int _pmbus_get_flags(struct i2c_client *client, u8 page, unsigned int *flags,
2981
2991
unsigned int *event, bool notify)
2982
2992
{
2993
+
struct pmbus_data *data = i2c_get_clientdata(client);
2983
2994
int i, status;
2984
2995
const struct pmbus_status_category *cat;
2985
2996
const struct pmbus_status_assoc *bit;
2986
-
struct device *dev = data->dev;
2987
-
struct i2c_client *client = to_i2c_client(dev);
2988
2997
int func = data->info->func[page];
2989
2998
2990
2999
*flags = 0;
···
3059
3070
return 0;
3060
3071
}
3061
3072
3062
-
static int __maybe_unused pmbus_get_flags(struct pmbus_data *data, u8 page, unsigned int *flags,
3073
+
static int __maybe_unused pmbus_get_flags(struct i2c_client *client, u8 page, unsigned int *flags,
3063
3074
unsigned int *event, bool notify)
3064
3075
{
3065
-
int ret;
3076
+
guard(pmbus_lock)(client);
3066
3077
3067
-
mutex_lock(&data->update_lock);
3068
-
ret = _pmbus_get_flags(data, page, flags, event, notify);
3069
-
mutex_unlock(&data->update_lock);
3070
-
3071
-
return ret;
3078
+
return _pmbus_get_flags(client, page, flags, event, notify);
3072
3079
}
3073
3080
3074
3081
#if IS_ENABLED(CONFIG_REGULATOR)
···
3080
3095
{
3081
3096
struct device *dev = rdev_get_dev(rdev);
3082
3097
struct i2c_client *client = to_i2c_client(dev->parent);
3083
-
struct pmbus_data *data = i2c_get_clientdata(client);
3084
3098
u8 page = rdev_get_id(rdev);
3085
-
int ret;
3086
3099
3087
-
mutex_lock(&data->update_lock);
3088
-
ret = pmbus_update_byte_data(client, page, PMBUS_OPERATION,
3089
-
PB_OPERATION_CONTROL_ON,
3090
-
enable ? PB_OPERATION_CONTROL_ON : 0);
3091
-
mutex_unlock(&data->update_lock);
3100
+
guard(pmbus_lock)(client);
3092
3101
3093
-
return ret;
3102
+
return pmbus_update_byte_data(client, page, PMBUS_OPERATION,
3103
+
PB_OPERATION_CONTROL_ON,
3104
+
enable ? PB_OPERATION_CONTROL_ON : 0);
3094
3105
}
3095
3106
3096
3107
static int pmbus_regulator_enable(struct regulator_dev *rdev)
···
3103
3122
{
3104
3123
struct device *dev = rdev_get_dev(rdev);
3105
3124
struct i2c_client *client = to_i2c_client(dev->parent);
3106
-
struct pmbus_data *data = i2c_get_clientdata(client);
3107
3125
int event;
3108
3126
3109
-
return pmbus_get_flags(data, rdev_get_id(rdev), flags, &event, false);
3127
+
return pmbus_get_flags(client, rdev_get_id(rdev), flags, &event, false);
3110
3128
}
3111
3129
3112
3130
static int pmbus_regulator_get_status(struct regulator_dev *rdev)
3113
3131
{
3114
3132
struct device *dev = rdev_get_dev(rdev);
3115
3133
struct i2c_client *client = to_i2c_client(dev->parent);
3116
-
struct pmbus_data *data = i2c_get_clientdata(client);
3117
3134
u8 page = rdev_get_id(rdev);
3118
3135
int status, ret;
3119
3136
int event;
3120
3137
3121
-
mutex_lock(&data->update_lock);
3122
-
status = pmbus_get_status(client, page, PMBUS_STATUS_WORD);
3123
-
if (status < 0) {
3124
-
ret = status;
3125
-
goto unlock;
3126
-
}
3138
+
guard(pmbus_lock)(client);
3127
3139
3128
-
if (status & PB_STATUS_OFF) {
3129
-
ret = REGULATOR_STATUS_OFF;
3130
-
goto unlock;
3131
-
}
3140
+
status = pmbus_get_status(client, page, PMBUS_STATUS_WORD);
3141
+
if (status < 0)
3142
+
return status;
3143
+
3144
+
if (status & PB_STATUS_OFF)
3145
+
return REGULATOR_STATUS_OFF;
3132
3146
3133
3147
/* If regulator is ON & reports power good then return ON */
3134
-
if (!(status & PB_STATUS_POWER_GOOD_N)) {
3135
-
ret = REGULATOR_STATUS_ON;
3136
-
goto unlock;
3137
-
}
3148
+
if (!(status & PB_STATUS_POWER_GOOD_N))
3149
+
return REGULATOR_STATUS_ON;
3138
3150
3139
-
ret = _pmbus_get_flags(data, rdev_get_id(rdev), &status, &event, false);
3151
+
ret = _pmbus_get_flags(client, rdev_get_id(rdev), &status, &event, false);
3140
3152
if (ret)
3141
-
goto unlock;
3153
+
return ret;
3142
3154
3143
3155
if (status & (REGULATOR_ERROR_UNDER_VOLTAGE | REGULATOR_ERROR_OVER_CURRENT |
3144
-
REGULATOR_ERROR_REGULATION_OUT | REGULATOR_ERROR_FAIL | REGULATOR_ERROR_OVER_TEMP)) {
3145
-
ret = REGULATOR_STATUS_ERROR;
3146
-
goto unlock;
3147
-
}
3156
+
REGULATOR_ERROR_REGULATION_OUT | REGULATOR_ERROR_FAIL | REGULATOR_ERROR_OVER_TEMP))
3157
+
return REGULATOR_STATUS_ERROR;
3148
3158
3149
-
ret = REGULATOR_STATUS_UNDEFINED;
3150
-
3151
-
unlock:
3152
-
mutex_unlock(&data->update_lock);
3153
-
return ret;
3159
+
return REGULATOR_STATUS_UNDEFINED;
3154
3160
}
3155
3161
3156
3162
static int pmbus_regulator_get_low_margin(struct i2c_client *client, int page)
···
3202
3234
.class = PSC_VOLTAGE_OUT,
3203
3235
.convert = true,
3204
3236
};
3205
-
int ret;
3237
+
int voltage;
3206
3238
3207
-
mutex_lock(&data->update_lock);
3208
-
s.data = _pmbus_read_word_data(client, s.page, 0xff, PMBUS_READ_VOUT);
3209
-
if (s.data < 0) {
3210
-
ret = s.data;
3211
-
goto unlock;
3239
+
scoped_guard(pmbus_lock, client) {
3240
+
s.data = _pmbus_read_word_data(client, s.page, 0xff, PMBUS_READ_VOUT);
3241
+
if (s.data < 0)
3242
+
return s.data;
3243
+
voltage = (int)pmbus_reg2data(data, &s);
3212
3244
}
3213
3245
3214
-
ret = (int)pmbus_reg2data(data, &s) * 1000; /* unit is uV */
3215
-
unlock:
3216
-
mutex_unlock(&data->update_lock);
3217
-
return ret;
3246
+
return voltage * 1000; /* unit is uV */
3218
3247
}
3219
3248
3220
3249
static int pmbus_regulator_set_voltage(struct regulator_dev *rdev, int min_uv,
···
3228
3263
};
3229
3264
int val = DIV_ROUND_CLOSEST(min_uv, 1000); /* convert to mV */
3230
3265
int low, high;
3231
-
int ret;
3232
3266
3233
3267
*selector = 0;
3234
3268
3235
-
mutex_lock(&data->update_lock);
3269
+
guard(pmbus_lock)(client);
3270
+
3236
3271
low = pmbus_regulator_get_low_margin(client, s.page);
3237
-
if (low < 0) {
3238
-
ret = low;
3239
-
goto unlock;
3240
-
}
3272
+
if (low < 0)
3273
+
return low;
3241
3274
3242
3275
high = pmbus_regulator_get_high_margin(client, s.page);
3243
-
if (high < 0) {
3244
-
ret = high;
3245
-
goto unlock;
3246
-
}
3276
+
if (high < 0)
3277
+
return high;
3247
3278
3248
3279
/* Make sure we are within margins */
3249
3280
if (low > val)
···
3249
3288
3250
3289
val = pmbus_data2reg(data, &s, val);
3251
3290
3252
-
ret = _pmbus_write_word_data(client, s.page, PMBUS_VOUT_COMMAND, (u16)val);
3253
-
unlock:
3254
-
mutex_unlock(&data->update_lock);
3255
-
return ret;
3291
+
return _pmbus_write_word_data(client, s.page, PMBUS_VOUT_COMMAND, (u16)val);
3256
3292
}
3257
3293
3258
3294
static int pmbus_regulator_list_voltage(struct regulator_dev *rdev,
···
3259
3301
struct i2c_client *client = to_i2c_client(dev->parent);
3260
3302
struct pmbus_data *data = i2c_get_clientdata(client);
3261
3303
int val, low, high;
3262
-
int ret;
3263
3304
3264
3305
if (data->flags & PMBUS_VOUT_PROTECTED)
3265
3306
return 0;
···
3271
3314
val = DIV_ROUND_CLOSEST(rdev->desc->min_uV +
3272
3315
(rdev->desc->uV_step * selector), 1000); /* convert to mV */
3273
3316
3274
-
mutex_lock(&data->update_lock);
3317
+
guard(pmbus_lock)(client);
3275
3318
3276
3319
low = pmbus_regulator_get_low_margin(client, rdev_get_id(rdev));
3277
-
if (low < 0) {
3278
-
ret = low;
3279
-
goto unlock;
3280
-
}
3320
+
if (low < 0)
3321
+
return low;
3281
3322
3282
3323
high = pmbus_regulator_get_high_margin(client, rdev_get_id(rdev));
3283
-
if (high < 0) {
3284
-
ret = high;
3285
-
goto unlock;
3286
-
}
3324
+
if (high < 0)
3325
+
return high;
3287
3326
3288
-
if (val >= low && val <= high) {
3289
-
ret = val * 1000; /* unit is uV */
3290
-
goto unlock;
3291
-
}
3327
+
if (val >= low && val <= high)
3328
+
return val * 1000; /* unit is uV */
3292
3329
3293
-
ret = 0;
3294
-
unlock:
3295
-
mutex_unlock(&data->update_lock);
3296
-
return ret;
3330
+
return 0;
3297
3331
}
3298
3332
3299
3333
const struct regulator_ops pmbus_regulator_ops = {
···
3420
3472
struct i2c_client *client = to_i2c_client(data->dev);
3421
3473
int i, status, event;
3422
3474
3423
-
mutex_lock(&data->update_lock);
3475
+
guard(pmbus_lock)(client);
3476
+
3424
3477
for (i = 0; i < data->info->pages; i++) {
3425
-
_pmbus_get_flags(data, i, &status, &event, true);
3478
+
_pmbus_get_flags(client, i, &status, &event, true);
3426
3479
3427
3480
if (event)
3428
3481
pmbus_regulator_notify(data, i, event);
3429
3482
}
3430
3483
3431
3484
pmbus_clear_faults(client);
3432
-
mutex_unlock(&data->update_lock);
3433
3485
3434
3486
return IRQ_HANDLED;
3435
3487
}
···
3485
3537
3486
3538
static int pmbus_debugfs_get(void *data, u64 *val)
3487
3539
{
3488
-
int rc;
3489
3540
struct pmbus_debugfs_entry *entry = data;
3490
-
struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
3541
+
struct i2c_client *client = entry->client;
3542
+
int rc;
3491
3543
3492
-
rc = mutex_lock_interruptible(&pdata->update_lock);
3493
-
if (rc)
3494
-
return rc;
3495
-
rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg);
3496
-
mutex_unlock(&pdata->update_lock);
3544
+
guard(pmbus_lock)(client);
3545
+
3546
+
rc = _pmbus_read_byte_data(client, entry->page, entry->reg);
3497
3547
if (rc < 0)
3498
3548
return rc;
3499
3549
···
3504
3558
3505
3559
static int pmbus_debugfs_get_status(void *data, u64 *val)
3506
3560
{
3507
-
int rc;
3508
3561
struct pmbus_debugfs_entry *entry = data;
3509
-
struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
3562
+
struct i2c_client *client = entry->client;
3563
+
struct pmbus_data *pdata = i2c_get_clientdata(client);
3564
+
int rc;
3510
3565
3511
-
rc = mutex_lock_interruptible(&pdata->update_lock);
3512
-
if (rc)
3513
-
return rc;
3514
-
rc = pdata->read_status(entry->client, entry->page);
3515
-
mutex_unlock(&pdata->update_lock);
3566
+
guard(pmbus_lock)(client);
3567
+
3568
+
rc = pdata->read_status(client, entry->page);
3516
3569
if (rc < 0)
3517
3570
return rc;
3518
3571
···
3527
3582
{
3528
3583
int rc;
3529
3584
struct pmbus_debugfs_entry *entry = file->private_data;
3530
-
struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
3585
+
struct i2c_client *client = entry->client;
3531
3586
char data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
3532
3587
3533
-
rc = mutex_lock_interruptible(&pdata->update_lock);
3534
-
if (rc)
3535
-
return rc;
3536
-
rc = pmbus_read_block_data(entry->client, entry->page, entry->reg,
3537
-
data);
3538
-
mutex_unlock(&pdata->update_lock);
3539
-
if (rc < 0)
3540
-
return rc;
3588
+
scoped_guard(pmbus_lock, client) {
3589
+
rc = pmbus_read_block_data(client, entry->page, entry->reg, data);
3590
+
if (rc < 0)
3591
+
return rc;
3592
+
}
3541
3593
3542
3594
/* Add newline at the end of a read data */
3543
3595
data[rc] = '\n';
···
3812
3870
return client->debugfs;
3813
3871
}
3814
3872
EXPORT_SYMBOL_NS_GPL(pmbus_get_debugfs_dir, "PMBUS");
3873
+
3874
+
void pmbus_lock(struct i2c_client *client)
3875
+
{
3876
+
struct pmbus_data *data = i2c_get_clientdata(client);
3877
+
3878
+
mutex_lock(&data->update_lock);
3879
+
}
3880
+
EXPORT_SYMBOL_NS_GPL(pmbus_lock, "PMBUS");
3815
3881
3816
3882
int pmbus_lock_interruptible(struct i2c_client *client)
3817
3883
{
+16
-7
drivers/hwmon/pmbus/q54sj108a2.c
+16
-7
drivers/hwmon/pmbus/q54sj108a2.c
···
271
271
272
272
static const struct i2c_device_id q54sj108a2_id[] = {
273
273
{ "q54sj108a2", q54sj108a2 },
274
+
{ "q54sn120a1", q54sj108a2 },
275
+
{ "q54sw120a7", q54sj108a2 },
274
276
{ },
275
277
};
276
278
···
282
280
{
283
281
struct device *dev = &client->dev;
284
282
u8 buf[I2C_SMBUS_BLOCK_MAX + 1];
283
+
const struct i2c_device_id *mid;
285
284
enum chips chip_id;
286
285
int ret, i;
287
286
struct dentry *debugfs;
···
295
292
I2C_FUNC_SMBUS_BLOCK_DATA))
296
293
return -ENODEV;
297
294
298
-
if (client->dev.of_node)
299
-
chip_id = (enum chips)(unsigned long)of_device_get_match_data(dev);
300
-
else
301
-
chip_id = i2c_match_id(q54sj108a2_id, client)->driver_data;
295
+
chip_id = (enum chips)(uintptr_t)i2c_get_match_data(client);
302
296
303
297
ret = i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf);
304
298
if (ret < 0) {
···
316
316
dev_err(dev, "Failed to read Manufacturer Model\n");
317
317
return ret;
318
318
}
319
-
if (ret != 14 || strncmp(buf, "Q54SJ108A2", 10)) {
320
-
buf[ret] = '\0';
319
+
buf[ret] = '\0';
320
+
for (mid = q54sj108a2_id; mid->name[0]; mid++) {
321
+
if (!strncasecmp(mid->name, buf, strlen(mid->name)))
322
+
break;
323
+
}
324
+
if (!mid->name[0]) {
321
325
dev_err(dev, "Unsupported Manufacturer Model '%s'\n", buf);
322
326
return -ENODEV;
323
327
}
···
331
327
dev_err(dev, "Failed to read Manufacturer Revision\n");
332
328
return ret;
333
329
}
334
-
if (ret != 4 || buf[0] != 'S') {
330
+
/*
331
+
* accept manufacturer revision with optional NUL byte
332
+
*/
333
+
if (!(ret == 4 || ret == 5) || buf[0] != 'S') {
335
334
buf[ret] = '\0';
336
335
dev_err(dev, "Unsupported Manufacturer Revision '%s'\n", buf);
337
336
return -ENODEV;
···
411
404
412
405
static const struct of_device_id q54sj108a2_of_match[] = {
413
406
{ .compatible = "delta,q54sj108a2", .data = (void *)q54sj108a2 },
407
+
{ .compatible = "delta,q54sn120a1", .data = (void *)q54sj108a2 },
408
+
{ .compatible = "delta,q54sw120a7", .data = (void *)q54sj108a2 },
414
409
{ },
415
410
};
416
411
+10
-4
drivers/hwmon/pmbus/tps25990.c
+10
-4
drivers/hwmon/pmbus/tps25990.c
···
402
402
{
403
403
struct device *dev = &client->dev;
404
404
struct pmbus_driver_info *info;
405
-
u32 rimon = TPS25990_DEFAULT_RIMON;
405
+
const char *propname;
406
+
u32 rimon;
406
407
int ret;
407
408
408
-
ret = device_property_read_u32(dev, "ti,rimon-micro-ohms", &rimon);
409
-
if (ret < 0 && ret != -EINVAL)
410
-
return dev_err_probe(dev, ret, "failed to get rimon\n");
409
+
propname = "ti,rimon-micro-ohms";
410
+
if (device_property_present(dev, propname)) {
411
+
ret = device_property_read_u32(dev, propname, &rimon);
412
+
if (ret)
413
+
return dev_err_probe(dev, ret, "failed to get %s\n", propname);
414
+
} else {
415
+
rimon = TPS25990_DEFAULT_RIMON;
416
+
}
411
417
412
418
info = devm_kmemdup(dev, &tps25990_base_info, sizeof(*info), GFP_KERNEL);
413
419
if (!info)
+1
-4
drivers/hwmon/pmbus/tps53679.c
+1
-4
drivers/hwmon/pmbus/tps53679.c
···
253
253
struct pmbus_driver_info *info;
254
254
enum chips chip_id;
255
255
256
-
if (dev->of_node)
257
-
chip_id = (uintptr_t)of_device_get_match_data(dev);
258
-
else
259
-
chip_id = i2c_match_id(tps53679_id, client)->driver_data;
256
+
chip_id = (uintptr_t)i2c_get_match_data(client);
260
257
261
258
info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL);
262
259
if (!info)
+128
drivers/hwmon/pmbus/xdp720.c
+128
drivers/hwmon/pmbus/xdp720.c
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/*
3
+
* Hardware monitoring driver for Infineon XDP720 Digital eFuse Controller
4
+
*
5
+
* Copyright (c) 2026 Infineon Technologies. All rights reserved.
6
+
*/
7
+
8
+
#include <linux/i2c.h>
9
+
#include <linux/module.h>
10
+
#include <linux/init.h>
11
+
#include <linux/kernel.h>
12
+
#include <linux/of_device.h>
13
+
#include <linux/bitops.h>
14
+
#include <linux/math64.h>
15
+
#include "pmbus.h"
16
+
17
+
/*
18
+
* The IMON resistor required to generate the system overcurrent protection.
19
+
* Arbitrary default Rimon value: 2k Ohm
20
+
*/
21
+
#define XDP720_DEFAULT_RIMON 2000000000 /* 2k ohm */
22
+
#define XDP720_TELEMETRY_AVG 0xE9
23
+
24
+
static struct pmbus_driver_info xdp720_info = {
25
+
.pages = 1,
26
+
.format[PSC_VOLTAGE_IN] = direct,
27
+
.format[PSC_VOLTAGE_OUT] = direct,
28
+
.format[PSC_CURRENT_OUT] = direct,
29
+
.format[PSC_POWER] = direct,
30
+
.format[PSC_TEMPERATURE] = direct,
31
+
32
+
.m[PSC_VOLTAGE_IN] = 4653,
33
+
.b[PSC_VOLTAGE_IN] = 0,
34
+
.R[PSC_VOLTAGE_IN] = -2,
35
+
.m[PSC_VOLTAGE_OUT] = 4653,
36
+
.b[PSC_VOLTAGE_OUT] = 0,
37
+
.R[PSC_VOLTAGE_OUT] = -2,
38
+
/*
39
+
* Current and Power measurement depends on the RIMON (kOhm) and
40
+
* GIMON(microA/A) values.
41
+
*/
42
+
.m[PSC_CURRENT_OUT] = 24668,
43
+
.b[PSC_CURRENT_OUT] = 0,
44
+
.R[PSC_CURRENT_OUT] = -4,
45
+
.m[PSC_POWER] = 4486,
46
+
.b[PSC_POWER] = 0,
47
+
.R[PSC_POWER] = -1,
48
+
.m[PSC_TEMPERATURE] = 54,
49
+
.b[PSC_TEMPERATURE] = 22521,
50
+
.R[PSC_TEMPERATURE] = -1,
51
+
52
+
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_PIN |
53
+
PMBUS_HAVE_TEMP | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_INPUT |
54
+
PMBUS_HAVE_STATUS_TEMP,
55
+
};
56
+
57
+
static int xdp720_probe(struct i2c_client *client)
58
+
{
59
+
struct pmbus_driver_info *info;
60
+
int ret;
61
+
u32 rimon;
62
+
int gimon;
63
+
64
+
info = devm_kmemdup(&client->dev, &xdp720_info, sizeof(*info),
65
+
GFP_KERNEL);
66
+
if (!info)
67
+
return -ENOMEM;
68
+
69
+
ret = devm_regulator_get_enable(&client->dev, "vdd-vin");
70
+
if (ret)
71
+
return dev_err_probe(&client->dev, ret,
72
+
"failed to enable vdd-vin supply\n");
73
+
74
+
ret = i2c_smbus_read_word_data(client, XDP720_TELEMETRY_AVG);
75
+
if (ret < 0) {
76
+
dev_err(&client->dev, "Can't get TELEMETRY_AVG\n");
77
+
return ret;
78
+
}
79
+
80
+
ret >>= 10; /* 10th bit of TELEMETRY_AVG REG for GIMON Value */
81
+
ret &= GENMASK(0, 0);
82
+
if (ret == 1)
83
+
gimon = 18200; /* output gain 18.2 microA/A */
84
+
else
85
+
gimon = 9100; /* output gain 9.1 microA/A */
86
+
87
+
if (of_property_read_u32(client->dev.of_node,
88
+
"infineon,rimon-micro-ohms", &rimon))
89
+
rimon = XDP720_DEFAULT_RIMON; /* Default if not set via DT */
90
+
if (rimon == 0)
91
+
return -EINVAL;
92
+
93
+
/* Adapt the current and power scale for each instance */
94
+
info->m[PSC_CURRENT_OUT] = DIV64_U64_ROUND_CLOSEST((u64)
95
+
info->m[PSC_CURRENT_OUT] * rimon * gimon, 1000000000000ULL);
96
+
info->m[PSC_POWER] = DIV64_U64_ROUND_CLOSEST((u64)
97
+
info->m[PSC_POWER] * rimon * gimon, 1000000000000000ULL);
98
+
99
+
return pmbus_do_probe(client, info);
100
+
}
101
+
102
+
static const struct of_device_id xdp720_of_match[] = {
103
+
{ .compatible = "infineon,xdp720" },
104
+
{}
105
+
};
106
+
MODULE_DEVICE_TABLE(of, xdp720_of_match);
107
+
108
+
static const struct i2c_device_id xdp720_id[] = {
109
+
{ "xdp720" },
110
+
{}
111
+
};
112
+
MODULE_DEVICE_TABLE(i2c, xdp720_id);
113
+
114
+
static struct i2c_driver xdp720_driver = {
115
+
.driver = {
116
+
.name = "xdp720",
117
+
.of_match_table = xdp720_of_match,
118
+
},
119
+
.probe = xdp720_probe,
120
+
.id_table = xdp720_id,
121
+
};
122
+
123
+
module_i2c_driver(xdp720_driver);
124
+
125
+
MODULE_AUTHOR("Ashish Yadav <ashish.yadav@infineon.com>");
126
+
MODULE_DESCRIPTION("PMBus driver for Infineon XDP720 Digital eFuse Controller");
127
+
MODULE_LICENSE("GPL");
128
+
MODULE_IMPORT_NS("PMBUS");
+119
drivers/hwmon/pmbus/xdpe1a2g7b.c
+119
drivers/hwmon/pmbus/xdpe1a2g7b.c
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/*
3
+
* Hardware monitoring driver for Infineon Multi-phase Digital XDPE1A2G5B
4
+
* and XDPE1A2G7B Controllers
5
+
*
6
+
* Copyright (c) 2026 Infineon Technologies. All rights reserved.
7
+
*/
8
+
9
+
#include <linux/err.h>
10
+
#include <linux/i2c.h>
11
+
#include <linux/init.h>
12
+
#include <linux/kernel.h>
13
+
#include <linux/module.h>
14
+
#include "pmbus.h"
15
+
16
+
#define XDPE1A2G7B_PAGE_NUM 2
17
+
#define XDPE1A2G7B_NVIDIA_195MV 0x1E /* NVIDIA mode 1.95mV, VID step is 5mV */
18
+
19
+
static int xdpe1a2g7b_identify(struct i2c_client *client,
20
+
struct pmbus_driver_info *info)
21
+
{
22
+
u8 vout_params;
23
+
int vout_mode;
24
+
25
+
/*
26
+
* XDPE1A2G5B and XDPE1A2G7B support both Linear and NVIDIA PWM VID data
27
+
* formats via VOUT_MODE. Note that the device pages/loops are not fully
28
+
* independent: configuration is shared, so programming each page/loop
29
+
* separately is not supported.
30
+
*/
31
+
vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
32
+
if (vout_mode < 0)
33
+
return vout_mode;
34
+
35
+
switch (vout_mode >> 5) {
36
+
case 0:
37
+
info->format[PSC_VOLTAGE_OUT] = linear;
38
+
return 0;
39
+
case 1:
40
+
info->format[PSC_VOLTAGE_OUT] = vid;
41
+
vout_params = vout_mode & GENMASK(4, 0);
42
+
/* Check for VID Code Type */
43
+
switch (vout_params) {
44
+
case XDPE1A2G7B_NVIDIA_195MV:
45
+
/* VID vrm_version for PAGE0 and PAGE1 */
46
+
info->vrm_version[0] = nvidia195mv;
47
+
info->vrm_version[1] = nvidia195mv;
48
+
break;
49
+
default:
50
+
return -EINVAL;
51
+
}
52
+
break;
53
+
default:
54
+
return -ENODEV;
55
+
}
56
+
57
+
return 0;
58
+
}
59
+
60
+
static struct pmbus_driver_info xdpe1a2g7b_info = {
61
+
.pages = XDPE1A2G7B_PAGE_NUM,
62
+
.identify = xdpe1a2g7b_identify,
63
+
.format[PSC_VOLTAGE_IN] = linear,
64
+
.format[PSC_TEMPERATURE] = linear,
65
+
.format[PSC_CURRENT_IN] = linear,
66
+
.format[PSC_CURRENT_OUT] = linear,
67
+
.format[PSC_POWER] = linear,
68
+
.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
69
+
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
70
+
PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP |
71
+
PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
72
+
.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
73
+
PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
74
+
PMBUS_HAVE_PIN | PMBUS_HAVE_POUT | PMBUS_HAVE_STATUS_INPUT,
75
+
};
76
+
77
+
static int xdpe1a2g7b_probe(struct i2c_client *client)
78
+
{
79
+
struct pmbus_driver_info *info;
80
+
81
+
info = devm_kmemdup(&client->dev, &xdpe1a2g7b_info, sizeof(*info),
82
+
GFP_KERNEL);
83
+
if (!info)
84
+
return -ENOMEM;
85
+
86
+
return pmbus_do_probe(client, info);
87
+
}
88
+
89
+
static const struct i2c_device_id xdpe1a2g7b_id[] = {
90
+
{ "xdpe1a2g5b" },
91
+
{ "xdpe1a2g7b" },
92
+
{}
93
+
};
94
+
95
+
MODULE_DEVICE_TABLE(i2c, xdpe1a2g7b_id);
96
+
97
+
static const struct of_device_id __maybe_unused xdpe1a2g7b_of_match[] = {
98
+
{ .compatible = "infineon,xdpe1a2g5b" },
99
+
{ .compatible = "infineon,xdpe1a2g7b" },
100
+
{}
101
+
};
102
+
103
+
MODULE_DEVICE_TABLE(of, xdpe1a2g7b_of_match);
104
+
105
+
static struct i2c_driver xdpe1a2g7b_driver = {
106
+
.driver = {
107
+
.name = "xdpe1a2g7b",
108
+
.of_match_table = of_match_ptr(xdpe1a2g7b_of_match),
109
+
},
110
+
.probe = xdpe1a2g7b_probe,
111
+
.id_table = xdpe1a2g7b_id,
112
+
};
113
+
114
+
module_i2c_driver(xdpe1a2g7b_driver);
115
+
116
+
MODULE_AUTHOR("Ashish Yadav <ashish.yadav@infineon.com>");
117
+
MODULE_DESCRIPTION("PMBus driver for Infineon XDPE1A2G5B/7B");
118
+
MODULE_LICENSE("GPL");
119
+
MODULE_IMPORT_NS("PMBUS");
+19
-5
drivers/hwmon/powerz.c
+19
-5
drivers/hwmon/powerz.c
···
6
6
7
7
#include <linux/completion.h>
8
8
#include <linux/device.h>
9
+
#include <linux/dma-mapping.h>
9
10
#include <linux/hwmon.h>
10
11
#include <linux/module.h>
11
12
#include <linux/mutex.h>
···
34
33
} __packed;
35
34
36
35
struct powerz_priv {
37
-
char transfer_buffer[64]; /* first member to satisfy DMA alignment */
36
+
__dma_from_device_group_begin();
37
+
char transfer_buffer[64];
38
+
__dma_from_device_group_end();
38
39
struct mutex mutex;
39
40
struct completion completion;
40
41
struct urb *urb;
···
109
106
110
107
static int powerz_read_data(struct usb_device *udev, struct powerz_priv *priv)
111
108
{
109
+
long rc;
112
110
int ret;
111
+
112
+
if (!priv->urb)
113
+
return -ENODEV;
113
114
114
115
priv->status = -ETIMEDOUT;
115
116
reinit_completion(&priv->completion);
···
131
124
if (ret)
132
125
return ret;
133
126
134
-
if (!wait_for_completion_interruptible_timeout
135
-
(&priv->completion, msecs_to_jiffies(5))) {
127
+
rc = wait_for_completion_interruptible_timeout(&priv->completion,
128
+
msecs_to_jiffies(5));
129
+
if (rc < 0) {
130
+
usb_kill_urb(priv->urb);
131
+
return rc;
132
+
}
133
+
134
+
if (rc == 0) {
136
135
usb_kill_urb(priv->urb);
137
136
return -EIO;
138
137
}
···
237
224
mutex_init(&priv->mutex);
238
225
init_completion(&priv->completion);
239
226
227
+
usb_set_intfdata(intf, priv);
228
+
240
229
hwmon_dev =
241
230
devm_hwmon_device_register_with_info(parent, DRIVER_NAME, priv,
242
231
&powerz_chip_info, NULL);
···
246
231
usb_free_urb(priv->urb);
247
232
return PTR_ERR(hwmon_dev);
248
233
}
249
-
250
-
usb_set_intfdata(intf, priv);
251
234
252
235
return 0;
253
236
}
···
257
244
mutex_lock(&priv->mutex);
258
245
usb_kill_urb(priv->urb);
259
246
usb_free_urb(priv->urb);
247
+
priv->urb = NULL;
260
248
mutex_unlock(&priv->mutex);
261
249
}
262
250
+2
-2
drivers/hwmon/pt5161l.c
+2
-2
drivers/hwmon/pt5161l.c
···
121
121
int ret, tries;
122
122
u8 remain_len = len;
123
123
u8 curr_len;
124
-
u8 wbuf[16], rbuf[24];
124
+
u8 wbuf[16], rbuf[I2C_SMBUS_BLOCK_MAX];
125
125
u8 cmd = 0x08; /* [7]:pec_en, [4:2]:func, [1]:start, [0]:end */
126
126
u8 config = 0x00; /* [6]:cfg_type, [4:1]:burst_len, [0]:address bit16 */
127
127
···
151
151
break;
152
152
}
153
153
if (tries >= 3)
154
-
return ret;
154
+
return ret < 0 ? ret : -EIO;
155
155
156
156
memcpy(val, rbuf, curr_len);
157
157
val += curr_len;
+1
-1
drivers/hwmon/tc74.c
+1
-1
drivers/hwmon/tc74.c
+107
-21
drivers/hwmon/tmp102.c
+107
-21
drivers/hwmon/tmp102.c
···
50
50
51
51
#define CONVERSION_TIME_MS 35 /* in milli-seconds */
52
52
53
+
#define NUM_SAMPLE_TIMES 4
54
+
#define DEFAULT_SAMPLE_TIME_MS 250
55
+
static const unsigned int *sample_times = (const unsigned int []){ 125, 250, 1000, 4000 };
56
+
53
57
struct tmp102 {
54
58
const char *label;
55
59
struct regmap *regmap;
56
60
u16 config_orig;
57
61
unsigned long ready_time;
62
+
u16 sample_time;
58
63
};
59
64
60
65
/* convert left adjusted 13-bit TMP102 register value to milliCelsius */
···
84
79
return 0;
85
80
}
86
81
87
-
static int tmp102_read(struct device *dev, enum hwmon_sensor_types type,
88
-
u32 attr, int channel, long *temp)
82
+
static int tmp102_read_chip(struct device *dev, u32 attr, long *val)
83
+
{
84
+
struct tmp102 *tmp102 = dev_get_drvdata(dev);
85
+
86
+
switch (attr) {
87
+
case hwmon_chip_update_interval:
88
+
*val = tmp102->sample_time;
89
+
return 0;
90
+
default:
91
+
return -EOPNOTSUPP;
92
+
}
93
+
}
94
+
95
+
static int tmp102_read_temp(struct device *dev, u32 attr, long *val)
89
96
{
90
97
struct tmp102 *tmp102 = dev_get_drvdata(dev);
91
98
unsigned int regval;
···
125
108
err = regmap_read(tmp102->regmap, reg, ®val);
126
109
if (err < 0)
127
110
return err;
128
-
*temp = tmp102_reg_to_mC(regval);
111
+
112
+
*val = tmp102_reg_to_mC(regval);
129
113
130
114
return 0;
131
115
}
132
116
133
-
static int tmp102_write(struct device *dev, enum hwmon_sensor_types type,
134
-
u32 attr, int channel, long temp)
117
+
static int tmp102_read(struct device *dev, enum hwmon_sensor_types type,
118
+
u32 attr, int channel, long *val)
119
+
{
120
+
switch (type) {
121
+
case hwmon_chip:
122
+
return tmp102_read_chip(dev, attr, val);
123
+
case hwmon_temp:
124
+
return tmp102_read_temp(dev, attr, val);
125
+
default:
126
+
return -EOPNOTSUPP;
127
+
}
128
+
}
129
+
130
+
static int tmp102_update_interval(struct device *dev, long val)
131
+
{
132
+
struct tmp102 *tmp102 = dev_get_drvdata(dev);
133
+
u8 index;
134
+
s32 err;
135
+
136
+
index = find_closest(val, sample_times, NUM_SAMPLE_TIMES);
137
+
138
+
err = regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
139
+
(TMP102_CONF_CR1 | TMP102_CONF_CR0), (3 - index) << 6);
140
+
if (err < 0)
141
+
return err;
142
+
tmp102->sample_time = sample_times[index];
143
+
144
+
return 0;
145
+
}
146
+
147
+
static int tmp102_write_chip(struct device *dev, u32 attr, long val)
148
+
{
149
+
switch (attr) {
150
+
case hwmon_chip_update_interval:
151
+
return tmp102_update_interval(dev, val);
152
+
default:
153
+
return -EOPNOTSUPP;
154
+
}
155
+
return 0;
156
+
}
157
+
158
+
static int tmp102_write_temp(struct device *dev, u32 attr, long val)
135
159
{
136
160
struct tmp102 *tmp102 = dev_get_drvdata(dev);
137
161
int reg;
···
188
130
return -EOPNOTSUPP;
189
131
}
190
132
191
-
temp = clamp_val(temp, -256000, 255000);
192
-
return regmap_write(tmp102->regmap, reg, tmp102_mC_to_reg(temp));
133
+
val = clamp_val(val, -256000, 255000);
134
+
return regmap_write(tmp102->regmap, reg, tmp102_mC_to_reg(val));
135
+
}
136
+
137
+
static int tmp102_write(struct device *dev, enum hwmon_sensor_types type,
138
+
u32 attr, int channel, long val)
139
+
{
140
+
switch (type) {
141
+
case hwmon_chip:
142
+
return tmp102_write_chip(dev, attr, val);
143
+
case hwmon_temp:
144
+
return tmp102_write_temp(dev, attr, val);
145
+
default:
146
+
return -EOPNOTSUPP;
147
+
}
148
+
return 0;
193
149
}
194
150
195
151
static umode_t tmp102_is_visible(const void *data, enum hwmon_sensor_types type,
···
211
139
{
212
140
const struct tmp102 *tmp102 = data;
213
141
214
-
if (type != hwmon_temp)
215
-
return 0;
216
-
217
-
switch (attr) {
218
-
case hwmon_temp_input:
219
-
return 0444;
220
-
case hwmon_temp_label:
221
-
if (tmp102->label)
142
+
switch (type) {
143
+
case hwmon_chip:
144
+
switch (attr) {
145
+
case hwmon_chip_update_interval:
146
+
return 0644;
147
+
default:
148
+
break;
149
+
}
150
+
break;
151
+
case hwmon_temp:
152
+
switch (attr) {
153
+
case hwmon_temp_input:
222
154
return 0444;
223
-
return 0;
224
-
case hwmon_temp_max_hyst:
225
-
case hwmon_temp_max:
226
-
return 0644;
155
+
case hwmon_temp_label:
156
+
if (tmp102->label)
157
+
return 0444;
158
+
return 0;
159
+
case hwmon_temp_max_hyst:
160
+
case hwmon_temp_max:
161
+
return 0644;
162
+
default:
163
+
break;
164
+
}
165
+
break;
227
166
default:
228
-
return 0;
167
+
break;
229
168
}
169
+
return 0;
230
170
}
231
171
232
172
static const struct hwmon_channel_info * const tmp102_info[] = {
233
173
HWMON_CHANNEL_INFO(chip,
234
-
HWMON_C_REGISTER_TZ),
174
+
HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
235
175
HWMON_CHANNEL_INFO(temp,
236
176
HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX | HWMON_T_MAX_HYST),
237
177
NULL
···
320
236
tmp102->regmap = devm_regmap_init_i2c(client, &tmp102_regmap_config);
321
237
if (IS_ERR(tmp102->regmap))
322
238
return PTR_ERR(tmp102->regmap);
239
+
240
+
tmp102->sample_time = DEFAULT_SAMPLE_TIME_MS;
323
241
324
242
err = regmap_read(tmp102->regmap, TMP102_CONF_REG, ®val);
325
243
if (err < 0) {
+275
drivers/hwmon/yogafan.c
+275
drivers/hwmon/yogafan.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/**
3
+
* yoga_fan.c - Lenovo Yoga/Legion Fan Hardware Monitoring Driver
4
+
*
5
+
* Provides fan speed monitoring for Lenovo Yoga, Legion, and IdeaPad
6
+
* laptops by interfacing with the Embedded Controller (EC) via ACPI.
7
+
*
8
+
* The driver implements a passive discrete-time first-order lag filter
9
+
* with slew-rate limiting (RLLag). This addresses low-resolution
10
+
* tachometer sampling in the EC by smoothing RPM readings based on
11
+
* the time delta (dt) between userspace requests, ensuring physical
12
+
* consistency without background task overhead or race conditions.
13
+
* The filter implements multirate filtering with autoreset in case
14
+
* of large sampling time.
15
+
*
16
+
* Copyright (C) 2021-2026 Sergio Melas <sergiomelas@gmail.com>
17
+
*/
18
+
#include <linux/acpi.h>
19
+
#include <linux/dmi.h>
20
+
#include <linux/err.h>
21
+
#include <linux/hwmon.h>
22
+
#include <linux/ktime.h>
23
+
#include <linux/module.h>
24
+
#include <linux/platform_device.h>
25
+
#include <linux/slab.h>
26
+
#include <linux/math64.h>
27
+
28
+
/* Driver Configuration Constants */
29
+
#define DRVNAME "yogafan"
30
+
#define MAX_FANS 8
31
+
32
+
/* Filter Configuration Constants */
33
+
#define TAU_MS 1000 /* Time constant for the first-order lag (ms) */
34
+
#define MAX_SLEW_RPM_S 1500 /* Maximum allowed change in RPM per second */
35
+
#define MAX_SAMPLING 5000 /* Maximum allowed Ts for reset (ms) */
36
+
#define MIN_SAMPLING 100 /* Minimum interval between filter updates (ms) */
37
+
38
+
/* RPM Sanitation Constants */
39
+
#define RPM_FLOOR_LIMIT 50 /* Snap filtered value to 0 if raw is 0 */
40
+
41
+
struct yogafan_config {
42
+
int multiplier;
43
+
int fan_count;
44
+
const char *paths[2];
45
+
};
46
+
47
+
struct yoga_fan_data {
48
+
acpi_handle active_handles[MAX_FANS];
49
+
long filtered_val[MAX_FANS];
50
+
ktime_t last_sample[MAX_FANS];
51
+
int multiplier;
52
+
int fan_count;
53
+
};
54
+
55
+
/* Specific configurations mapped via DMI */
56
+
static const struct yogafan_config yoga_8bit_fans_cfg = {
57
+
.multiplier = 100,
58
+
.fan_count = 1,
59
+
.paths = { "\\_SB.PCI0.LPC0.EC0.FANS", NULL }
60
+
};
61
+
62
+
static const struct yogafan_config ideapad_8bit_fan0_cfg = {
63
+
.multiplier = 100,
64
+
.fan_count = 1,
65
+
.paths = { "\\_SB.PCI0.LPC0.EC0.FAN0", NULL }
66
+
};
67
+
68
+
static const struct yogafan_config legion_16bit_dual_cfg = {
69
+
.multiplier = 1,
70
+
.fan_count = 2,
71
+
.paths = { "\\_SB.PCI0.LPC0.EC0.FANS", "\\_SB.PCI0.LPC0.EC0.FA2S" }
72
+
};
73
+
74
+
static void apply_rllag_filter(struct yoga_fan_data *data, int idx, long raw_rpm)
75
+
{
76
+
ktime_t now = ktime_get_boottime();
77
+
s64 dt_ms = ktime_to_ms(ktime_sub(now, data->last_sample[idx]));
78
+
long delta, step, limit, alpha;
79
+
s64 temp_num;
80
+
81
+
if (raw_rpm < RPM_FLOOR_LIMIT) {
82
+
data->filtered_val[idx] = 0;
83
+
data->last_sample[idx] = now;
84
+
return;
85
+
}
86
+
87
+
if (data->last_sample[idx] == 0 || dt_ms > MAX_SAMPLING) {
88
+
data->filtered_val[idx] = raw_rpm;
89
+
data->last_sample[idx] = now;
90
+
return;
91
+
}
92
+
93
+
if (dt_ms < MIN_SAMPLING)
94
+
return;
95
+
96
+
delta = raw_rpm - data->filtered_val[idx];
97
+
if (delta == 0) {
98
+
data->last_sample[idx] = now;
99
+
return;
100
+
}
101
+
102
+
temp_num = dt_ms << 12;
103
+
alpha = (long)div64_s64(temp_num, (s64)(TAU_MS + dt_ms));
104
+
step = (delta * alpha) >> 12;
105
+
106
+
if (step == 0 && delta != 0)
107
+
step = (delta > 0) ? 1 : -1;
108
+
109
+
limit = (MAX_SLEW_RPM_S * (long)dt_ms) / 1000;
110
+
if (limit < 1)
111
+
limit = 1;
112
+
113
+
if (step > limit)
114
+
step = limit;
115
+
else if (step < -limit)
116
+
step = -limit;
117
+
118
+
data->filtered_val[idx] += step;
119
+
data->last_sample[idx] = now;
120
+
}
121
+
122
+
static int yoga_fan_read(struct device *dev, enum hwmon_sensor_types type,
123
+
u32 attr, int channel, long *val)
124
+
{
125
+
struct yoga_fan_data *data = dev_get_drvdata(dev);
126
+
unsigned long long raw_acpi;
127
+
acpi_status status;
128
+
129
+
if (type != hwmon_fan || attr != hwmon_fan_input)
130
+
return -EOPNOTSUPP;
131
+
132
+
status = acpi_evaluate_integer(data->active_handles[channel], NULL, NULL, &raw_acpi);
133
+
if (ACPI_FAILURE(status))
134
+
return -EIO;
135
+
136
+
apply_rllag_filter(data, channel, (long)raw_acpi * data->multiplier);
137
+
*val = data->filtered_val[channel];
138
+
139
+
return 0;
140
+
}
141
+
142
+
static umode_t yoga_fan_is_visible(const void *data, enum hwmon_sensor_types type,
143
+
u32 attr, int channel)
144
+
{
145
+
const struct yoga_fan_data *fan_data = data;
146
+
147
+
if (type == hwmon_fan && channel < fan_data->fan_count)
148
+
return 0444;
149
+
150
+
return 0;
151
+
}
152
+
153
+
static const struct hwmon_ops yoga_fan_hwmon_ops = {
154
+
.is_visible = yoga_fan_is_visible,
155
+
.read = yoga_fan_read,
156
+
};
157
+
158
+
static const struct hwmon_channel_info *yoga_fan_info[] = {
159
+
HWMON_CHANNEL_INFO(fan,
160
+
HWMON_F_INPUT, HWMON_F_INPUT,
161
+
HWMON_F_INPUT, HWMON_F_INPUT,
162
+
HWMON_F_INPUT, HWMON_F_INPUT,
163
+
HWMON_F_INPUT, HWMON_F_INPUT),
164
+
NULL
165
+
};
166
+
167
+
static const struct hwmon_chip_info yoga_fan_chip_info = {
168
+
.ops = &yoga_fan_hwmon_ops,
169
+
.info = yoga_fan_info,
170
+
};
171
+
172
+
static const struct dmi_system_id yogafan_quirks[] = {
173
+
{
174
+
.ident = "Lenovo Yoga",
175
+
.matches = {
176
+
DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
177
+
DMI_MATCH(DMI_PRODUCT_FAMILY, "Yoga"),
178
+
},
179
+
.driver_data = (void *)&yoga_8bit_fans_cfg,
180
+
},
181
+
{
182
+
.ident = "Lenovo Legion",
183
+
.matches = {
184
+
DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
185
+
DMI_MATCH(DMI_PRODUCT_FAMILY, "Legion"),
186
+
},
187
+
.driver_data = (void *)&legion_16bit_dual_cfg,
188
+
},
189
+
{
190
+
.ident = "Lenovo IdeaPad",
191
+
.matches = {
192
+
DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
193
+
DMI_MATCH(DMI_PRODUCT_FAMILY, "IdeaPad"),
194
+
},
195
+
.driver_data = (void *)&ideapad_8bit_fan0_cfg,
196
+
},
197
+
{ }
198
+
};
199
+
MODULE_DEVICE_TABLE(dmi, yogafan_quirks);
200
+
201
+
static int yoga_fan_probe(struct platform_device *pdev)
202
+
{
203
+
const struct dmi_system_id *dmi_id;
204
+
const struct yogafan_config *cfg;
205
+
struct yoga_fan_data *data;
206
+
struct device *hwmon_dev;
207
+
int i;
208
+
209
+
dmi_id = dmi_first_match(yogafan_quirks);
210
+
if (!dmi_id)
211
+
return -ENODEV;
212
+
213
+
cfg = dmi_id->driver_data;
214
+
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
215
+
if (!data)
216
+
return -ENOMEM;
217
+
218
+
data->multiplier = cfg->multiplier;
219
+
220
+
for (i = 0; i < cfg->fan_count; i++) {
221
+
acpi_status status;
222
+
223
+
status = acpi_get_handle(NULL, (char *)cfg->paths[i],
224
+
&data->active_handles[data->fan_count]);
225
+
if (ACPI_SUCCESS(status))
226
+
data->fan_count++;
227
+
}
228
+
229
+
if (data->fan_count == 0)
230
+
return -ENODEV;
231
+
232
+
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, DRVNAME,
233
+
data, &yoga_fan_chip_info, NULL);
234
+
235
+
return PTR_ERR_OR_ZERO(hwmon_dev);
236
+
}
237
+
238
+
static struct platform_driver yoga_fan_driver = {
239
+
.driver = { .name = DRVNAME },
240
+
.probe = yoga_fan_probe,
241
+
};
242
+
243
+
static struct platform_device *yoga_fan_device;
244
+
245
+
static int __init yoga_fan_init(void)
246
+
{
247
+
int ret;
248
+
249
+
if (!dmi_check_system(yogafan_quirks))
250
+
return -ENODEV;
251
+
252
+
ret = platform_driver_register(&yoga_fan_driver);
253
+
if (ret)
254
+
return ret;
255
+
256
+
yoga_fan_device = platform_device_register_simple(DRVNAME, -1, NULL, 0);
257
+
if (IS_ERR(yoga_fan_device)) {
258
+
platform_driver_unregister(&yoga_fan_driver);
259
+
return PTR_ERR(yoga_fan_device);
260
+
}
261
+
return 0;
262
+
}
263
+
264
+
static void __exit yoga_fan_exit(void)
265
+
{
266
+
platform_device_unregister(yoga_fan_device);
267
+
platform_driver_unregister(&yoga_fan_driver);
268
+
}
269
+
270
+
module_init(yoga_fan_init);
271
+
module_exit(yoga_fan_exit);
272
+
273
+
MODULE_AUTHOR("Sergio Melas <sergiomelas@gmail.com>");
274
+
MODULE_DESCRIPTION("Lenovo Yoga/Legion Fan Monitor Driver");
275
+
MODULE_LICENSE("GPL");
+2
-12
drivers/iio/adc/ina2xx-adc.c
+2
-12
drivers/iio/adc/ina2xx-adc.c
···
33
33
#include <linux/sched/task.h>
34
34
#include <linux/util_macros.h>
35
35
36
-
#include <linux/platform_data/ina2xx.h>
37
-
38
36
/* INA2XX registers definition */
39
37
#define INA2XX_CONFIG 0x00
40
38
#define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
···
978
980
979
981
mutex_init(&chip->state_lock);
980
982
981
-
if (of_property_read_u32(client->dev.of_node,
982
-
"shunt-resistor", &val) < 0) {
983
-
struct ina2xx_platform_data *pdata =
984
-
dev_get_platdata(&client->dev);
985
-
986
-
if (pdata)
987
-
val = pdata->shunt_uohms;
988
-
else
989
-
val = INA2XX_RSHUNT_DEFAULT;
990
-
}
983
+
if (of_property_read_u32(client->dev.of_node, "shunt-resistor", &val) < 0)
984
+
val = INA2XX_RSHUNT_DEFAULT;
991
985
992
986
ret = set_shunt_resistor(chip, val);
993
987
if (ret)
-16
include/linux/platform_data/ina2xx.h
-16
include/linux/platform_data/ina2xx.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0-only */
2
-
/*
3
-
* Driver for Texas Instruments INA219, INA226 power monitor chips
4
-
*
5
-
* Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com>
6
-
*
7
-
* For further information, see the Documentation/hwmon/ina2xx.rst file.
8
-
*/
9
-
10
-
/**
11
-
* struct ina2xx_platform_data - ina2xx info
12
-
* @shunt_uohms shunt resistance in microohms
13
-
*/
14
-
struct ina2xx_platform_data {
15
-
long shunt_uohms;
16
-
};