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dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices

Add indices for missing MUX clocks from PLLs in CMU_TOP.

Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20240806121157.479212-3-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

authored by

David Virag and committed by
Krzysztof Kozlowski 59baa83e abf3a3ea

+2
+2
include/dt-bindings/clock/exynos7885.h
··· 69 69 #define CLK_GOUT_FSYS_MMC_EMBD 58 70 70 #define CLK_GOUT_FSYS_MMC_SDIO 59 71 71 #define CLK_GOUT_FSYS_USB30DRD 60 72 + #define CLK_MOUT_SHARED0_PLL 61 73 + #define CLK_MOUT_SHARED1_PLL 62 72 74 73 75 /* CMU_CORE */ 74 76 #define CLK_MOUT_CORE_BUS_USER 1