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dt-bindings: phy: Convert apm,xgene-phy to DT schema

Convert the APM X-Gene PHY binding to DT schema format. It's a straight
forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212424.739972-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Rob Herring (Arm) and committed by
Vinod Koul
65ad0d06 77d2fa54

+169 -76
+169
Documentation/devicetree/bindings/phy/apm,xgene-phy.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/apm,xgene-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: APM X-Gene 15Gbps Multi-purpose PHY 8 + 9 + maintainers: 10 + - Khuong Dinh <khuong@os.amperecomputing.com> 11 + 12 + description: 13 + PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each 14 + PHY (pair of lanes) has its own node. 15 + 16 + properties: 17 + compatible: 18 + items: 19 + - const: apm,xgene-phy 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + '#phy-cells': 25 + description: 26 + Possible values are 0 (SATA), 1 (SGMII), 2 (PCIe), 3 (USB), and 4 (XFI). 27 + const: 1 28 + 29 + clocks: 30 + maxItems: 1 31 + 32 + apm,tx-eye-tuning: 33 + description: 34 + Manual control to fine tune the capture of the serial bit lines from the 35 + automatic calibrated position. Two set of 3-tuple setting for each 36 + supported link speed on the host. Range from 0 to 127 in unit of one bit 37 + period. 38 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 39 + minItems: 2 40 + maxItems: 2 41 + items: 42 + minItems: 3 43 + maxItems: 3 44 + items: 45 + minimum: 0 46 + maximum: 127 47 + default: 10 48 + 49 + apm,tx-eye-direction: 50 + description: 51 + Eye tuning manual control direction. 0 means sample data earlier than the 52 + nominal sampling point. 1 means sample data later than the nominal 53 + sampling point. Two set of 3-tuple setting for each supported link speed 54 + on the host. 55 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 56 + minItems: 2 57 + maxItems: 2 58 + items: 59 + minItems: 3 60 + maxItems: 3 61 + items: 62 + enum: [0, 1] 63 + default: 0 64 + 65 + apm,tx-boost-gain: 66 + description: 67 + Frequency boost AC (LSB 3-bit) and DC (2-bit) gain control. Two set of 68 + 3-tuple setting for each supported link speed on the host. Range is 69 + between 0 to 31 in unit of dB. Default is 3. 70 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 71 + minItems: 2 72 + maxItems: 2 73 + items: 74 + minItems: 3 75 + maxItems: 3 76 + items: 77 + minimum: 0 78 + maximum: 31 79 + 80 + apm,tx-amplitude: 81 + description: 82 + Amplitude control. Two set of 3-tuple setting for each supported link 83 + speed on the host. Range is between 0 to 199500 in unit of uV. 84 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 85 + minItems: 2 86 + maxItems: 2 87 + items: 88 + minItems: 3 89 + maxItems: 3 90 + items: 91 + minimum: 0 92 + maximum: 199500 93 + default: 199500 94 + 95 + apm,tx-pre-cursor1: 96 + description: 97 + 1st pre-cursor emphasis taps control. Two set of 3-tuple setting for 98 + each supported link speed on the host. Range is 0 to 273000 in unit of 99 + uV. 100 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 101 + minItems: 2 102 + maxItems: 2 103 + items: 104 + minItems: 3 105 + maxItems: 3 106 + items: 107 + minimum: 0 108 + maximum: 273000 109 + default: 0 110 + 111 + apm,tx-pre-cursor2: 112 + description: 113 + 2nd pre-cursor emphasis taps control. Two set of 3-tuple setting for 114 + each supported link speed on the host. Range is 0 to 127400 in unit uV. 115 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 116 + minItems: 2 117 + maxItems: 2 118 + items: 119 + minItems: 3 120 + maxItems: 3 121 + items: 122 + minimum: 0 123 + maximum: 127400 124 + default: 0 125 + 126 + apm,tx-post-cursor: 127 + description: | 128 + Post-cursor emphasis taps control. Two set of 3-tuple setting for Gen1, 129 + Gen2, and Gen3 link speeds. Range is between 0 to 31 in unit of 18.2mV. 130 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 131 + minItems: 2 132 + maxItems: 2 133 + items: 134 + minItems: 3 135 + maxItems: 3 136 + items: 137 + minimum: 0 138 + maximum: 31 139 + default: 0xf 140 + 141 + apm,tx-speed: 142 + description: > 143 + Tx operating speed. One set of 3-tuple for each supported link speed on 144 + the host: 145 + 146 + 0 = 1-2Gbps 147 + 1 = 2-4Gbps (1st tuple default) 148 + 2 = 4-8Gbps 149 + 3 = 8-15Gbps (2nd tuple default) 150 + 4 = 2.5-4Gbps 151 + 5 = 4-5Gbps 152 + 6 = 5-6Gbps 153 + 7 = 6-16Gbps (3rd tuple default). 154 + 155 + $ref: /schemas/types.yaml#/definitions/uint32-array 156 + minItems: 3 157 + maxItems: 3 158 + items: 159 + maximum: 7 160 + 161 + additionalProperties: false 162 + 163 + examples: 164 + - | 165 + phy@1f21a000 { 166 + compatible = "apm,xgene-phy"; 167 + reg = <0x1f21a000 0x100>; 168 + #phy-cells = <1>; 169 + };
-76
Documentation/devicetree/bindings/phy/apm-xgene-phy.txt
··· 1 - * APM X-Gene 15Gbps Multi-purpose PHY nodes 2 - 3 - PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each 4 - PHY (pair of lanes) has its own node. 5 - 6 - Required properties: 7 - - compatible : Shall be "apm,xgene-phy". 8 - - reg : PHY memory resource is the SDS PHY access resource. 9 - - #phy-cells : Shall be 1 as it expects one argument for setting 10 - the mode of the PHY. Possible values are 0 (SATA), 11 - 1 (SGMII), 2 (PCIe), 3 (USB), and 4 (XFI). 12 - 13 - Optional properties: 14 - - status : Shall be "ok" if enabled or "disabled" if disabled. 15 - Default is "ok". 16 - - clocks : Reference to the clock entry. 17 - - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial 18 - bit lines from the automatic calibrated position. 19 - Two set of 3-tuple setting for each (up to 3) 20 - supported link speed on the host. Range from 0 to 21 - 127 in unit of one bit period. Default is 10. 22 - - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample 23 - data earlier than the nominal sampling point. 1 means 24 - sample data later than the nominal sampling point. 25 - Two set of 3-tuple setting for each (up to 3) 26 - supported link speed on the host. Default is 0. 27 - - apm,tx-boost-gain : Frequency boost AC (LSB 3-bit) and DC (2-bit) 28 - gain control. Two set of 3-tuple setting for each 29 - (up to 3) supported link speed on the host. Range is 30 - between 0 to 31 in unit of dB. Default is 3. 31 - - apm,tx-amplitude : Amplitude control. Two set of 3-tuple setting for 32 - each (up to 3) supported link speed on the host. 33 - Range is between 0 to 199500 in unit of uV. 34 - Default is 199500 uV. 35 - - apm,tx-pre-cursor1 : 1st pre-cursor emphasis taps control. Two set of 36 - 3-tuple setting for each (up to 3) supported link 37 - speed on the host. Range is 0 to 273000 in unit of 38 - uV. Default is 0. 39 - - apm,tx-pre-cursor2 : 2nd pre-cursor emphasis taps control. Two set of 40 - 3-tuple setting for each (up to 3) supported link 41 - speed on the host. Range is 0 to 127400 in unit uV. 42 - Default is 0x0. 43 - - apm,tx-post-cursor : Post-cursor emphasis taps control. Two set of 44 - 3-tuple setting for Gen1, Gen2, and Gen3. Range is 45 - between 0 to 0x1f in unit of 18.2mV. Default is 0xf. 46 - - apm,tx-speed : Tx operating speed. One set of 3-tuple for each 47 - supported link speed on the host. 48 - 0 = 1-2Gbps 49 - 1 = 2-4Gbps (1st tuple default) 50 - 2 = 4-8Gbps 51 - 3 = 8-15Gbps (2nd tuple default) 52 - 4 = 2.5-4Gbps 53 - 5 = 4-5Gbps 54 - 6 = 5-6Gbps 55 - 7 = 6-16Gbps (3rd tuple default) 56 - 57 - NOTE: PHY override parameters are board specific setting. 58 - 59 - Example: 60 - phy1: phy@1f21a000 { 61 - compatible = "apm,xgene-phy"; 62 - reg = <0x0 0x1f21a000 0x0 0x100>; 63 - #phy-cells = <1>; 64 - }; 65 - 66 - phy2: phy@1f22a000 { 67 - compatible = "apm,xgene-phy"; 68 - reg = <0x0 0x1f22a000 0x0 0x100>; 69 - #phy-cells = <1>; 70 - }; 71 - 72 - phy3: phy@1f23a000 { 73 - compatible = "apm,xgene-phy"; 74 - reg = <0x0 0x1f23a000 0x0 0x100>; 75 - #phy-cells = <1>; 76 - };