Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'usb-4.4-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here are a number of USB fixes and new device ids for 4.4-rc2. All
have been in linux-next and the details are in the shortlog"
* tag 'usb-4.4-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (28 commits)
usblp: do not set TASK_INTERRUPTIBLE before lock
USB: MAINTAINERS: cxacru
usb: kconfig: fix warning of select USB_OTG
USB: option: add XS Stick W100-2 from 4G Systems
xhci: Fix a race in usb2 LPM resume, blocking U3 for usb2 devices
usb: xhci: fix checking ep busy for CFC
xhci: Workaround to get Intel xHCI reset working more reliably
usb: chipidea: imx: fix a possible NULL dereference
usb: chipidea: usbmisc_imx: fix a possible NULL dereference
usb: chipidea: otg: gadget module load and unload support
usb: chipidea: debug: disable usb irq while role switch
ARM: dts: imx27.dtsi: change the clock information for usb
usb: chipidea: imx: refine clock operations to adapt for all platforms
usb: gadget: atmel_usba_udc: Expose correct device speed
usb: musb: enable usb_dma parameter
usb: phy: phy-mxs-usb: fix a possible NULL dereference
usb: dwc3: gadget: let us set lower max_speed
usb: musb: fix tx fifo flush handling
usb: gadget: f_loopback: fix the warning during the enumeration
usb: dwc2: host: Fix remote wakeup when not in DWC2_L2
...
+343
-113
+1
-2
MAINTAINERS
+1
-2
MAINTAINERS
···
2931
2931
F: drivers/platform/x86/compal-laptop.c
2932
2932
2933
2933
CONEXANT ACCESSRUNNER USB DRIVER
2934
-
M: Simon Arlott <cxacru@fire.lp0.eu>
2935
2934
L: accessrunner-general@lists.sourceforge.net
2936
2935
W: http://accessrunner.sourceforge.net/
2937
-
S: Maintained
2936
+
S: Orphan
2938
2937
F: drivers/usb/atm/cxacru.c
2939
2938
2940
2939
CONFIGFS
+12
-4
arch/arm/boot/dts/imx27.dtsi
+12
-4
arch/arm/boot/dts/imx27.dtsi
···
486
486
compatible = "fsl,imx27-usb";
487
487
reg = <0x10024000 0x200>;
488
488
interrupts = <56>;
489
-
clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
489
+
clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
490
+
<&clks IMX27_CLK_USB_AHB_GATE>,
491
+
<&clks IMX27_CLK_USB_DIV>;
492
+
clock-names = "ipg", "ahb", "per";
490
493
fsl,usbmisc = <&usbmisc 0>;
491
494
status = "disabled";
492
495
};
···
498
495
compatible = "fsl,imx27-usb";
499
496
reg = <0x10024200 0x200>;
500
497
interrupts = <54>;
501
-
clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
498
+
clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
499
+
<&clks IMX27_CLK_USB_AHB_GATE>,
500
+
<&clks IMX27_CLK_USB_DIV>;
501
+
clock-names = "ipg", "ahb", "per";
502
502
fsl,usbmisc = <&usbmisc 1>;
503
503
dr_mode = "host";
504
504
status = "disabled";
···
511
505
compatible = "fsl,imx27-usb";
512
506
reg = <0x10024400 0x200>;
513
507
interrupts = <55>;
514
-
clocks = <&clks IMX27_CLK_USB_IPG_GATE>;
508
+
clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
509
+
<&clks IMX27_CLK_USB_AHB_GATE>,
510
+
<&clks IMX27_CLK_USB_DIV>;
511
+
clock-names = "ipg", "ahb", "per";
515
512
fsl,usbmisc = <&usbmisc 2>;
516
513
dr_mode = "host";
517
514
status = "disabled";
···
524
515
#index-cells = <1>;
525
516
compatible = "fsl,imx27-usbmisc";
526
517
reg = <0x10024600 0x200>;
527
-
clocks = <&clks IMX27_CLK_USB_AHB_GATE>;
528
518
};
529
519
530
520
sahara2: sahara@10025000 {
+122
-22
drivers/usb/chipidea/ci_hdrc_imx.c
+122
-22
drivers/usb/chipidea/ci_hdrc_imx.c
···
84
84
struct imx_usbmisc_data *usbmisc_data;
85
85
bool supports_runtime_pm;
86
86
bool in_lpm;
87
+
/* SoC before i.mx6 (except imx23/imx28) needs three clks */
88
+
bool need_three_clks;
89
+
struct clk *clk_ipg;
90
+
struct clk *clk_ahb;
91
+
struct clk *clk_per;
92
+
/* --------------------------------- */
87
93
};
88
94
89
95
/* Common functions shared by usbmisc drivers */
···
141
135
}
142
136
143
137
/* End of common functions shared by usbmisc drivers*/
138
+
static int imx_get_clks(struct device *dev)
139
+
{
140
+
struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
141
+
int ret = 0;
142
+
143
+
data->clk_ipg = devm_clk_get(dev, "ipg");
144
+
if (IS_ERR(data->clk_ipg)) {
145
+
/* If the platform only needs one clocks */
146
+
data->clk = devm_clk_get(dev, NULL);
147
+
if (IS_ERR(data->clk)) {
148
+
ret = PTR_ERR(data->clk);
149
+
dev_err(dev,
150
+
"Failed to get clks, err=%ld,%ld\n",
151
+
PTR_ERR(data->clk), PTR_ERR(data->clk_ipg));
152
+
return ret;
153
+
}
154
+
return ret;
155
+
}
156
+
157
+
data->clk_ahb = devm_clk_get(dev, "ahb");
158
+
if (IS_ERR(data->clk_ahb)) {
159
+
ret = PTR_ERR(data->clk_ahb);
160
+
dev_err(dev,
161
+
"Failed to get ahb clock, err=%d\n", ret);
162
+
return ret;
163
+
}
164
+
165
+
data->clk_per = devm_clk_get(dev, "per");
166
+
if (IS_ERR(data->clk_per)) {
167
+
ret = PTR_ERR(data->clk_per);
168
+
dev_err(dev,
169
+
"Failed to get per clock, err=%d\n", ret);
170
+
return ret;
171
+
}
172
+
173
+
data->need_three_clks = true;
174
+
return ret;
175
+
}
176
+
177
+
static int imx_prepare_enable_clks(struct device *dev)
178
+
{
179
+
struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
180
+
int ret = 0;
181
+
182
+
if (data->need_three_clks) {
183
+
ret = clk_prepare_enable(data->clk_ipg);
184
+
if (ret) {
185
+
dev_err(dev,
186
+
"Failed to prepare/enable ipg clk, err=%d\n",
187
+
ret);
188
+
return ret;
189
+
}
190
+
191
+
ret = clk_prepare_enable(data->clk_ahb);
192
+
if (ret) {
193
+
dev_err(dev,
194
+
"Failed to prepare/enable ahb clk, err=%d\n",
195
+
ret);
196
+
clk_disable_unprepare(data->clk_ipg);
197
+
return ret;
198
+
}
199
+
200
+
ret = clk_prepare_enable(data->clk_per);
201
+
if (ret) {
202
+
dev_err(dev,
203
+
"Failed to prepare/enable per clk, err=%d\n",
204
+
ret);
205
+
clk_disable_unprepare(data->clk_ahb);
206
+
clk_disable_unprepare(data->clk_ipg);
207
+
return ret;
208
+
}
209
+
} else {
210
+
ret = clk_prepare_enable(data->clk);
211
+
if (ret) {
212
+
dev_err(dev,
213
+
"Failed to prepare/enable clk, err=%d\n",
214
+
ret);
215
+
return ret;
216
+
}
217
+
}
218
+
219
+
return ret;
220
+
}
221
+
222
+
static void imx_disable_unprepare_clks(struct device *dev)
223
+
{
224
+
struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
225
+
226
+
if (data->need_three_clks) {
227
+
clk_disable_unprepare(data->clk_per);
228
+
clk_disable_unprepare(data->clk_ahb);
229
+
clk_disable_unprepare(data->clk_ipg);
230
+
} else {
231
+
clk_disable_unprepare(data->clk);
232
+
}
233
+
}
144
234
145
235
static int ci_hdrc_imx_probe(struct platform_device *pdev)
146
236
{
···
247
145
.flags = CI_HDRC_SET_NON_ZERO_TTHA,
248
146
};
249
147
int ret;
250
-
const struct of_device_id *of_id =
251
-
of_match_device(ci_hdrc_imx_dt_ids, &pdev->dev);
252
-
const struct ci_hdrc_imx_platform_flag *imx_platform_flag = of_id->data;
148
+
const struct of_device_id *of_id;
149
+
const struct ci_hdrc_imx_platform_flag *imx_platform_flag;
150
+
151
+
of_id = of_match_device(ci_hdrc_imx_dt_ids, &pdev->dev);
152
+
if (!of_id)
153
+
return -ENODEV;
154
+
155
+
imx_platform_flag = of_id->data;
253
156
254
157
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
255
158
if (!data)
256
159
return -ENOMEM;
257
160
161
+
platform_set_drvdata(pdev, data);
258
162
data->usbmisc_data = usbmisc_get_init_data(&pdev->dev);
259
163
if (IS_ERR(data->usbmisc_data))
260
164
return PTR_ERR(data->usbmisc_data);
261
165
262
-
data->clk = devm_clk_get(&pdev->dev, NULL);
263
-
if (IS_ERR(data->clk)) {
264
-
dev_err(&pdev->dev,
265
-
"Failed to get clock, err=%ld\n", PTR_ERR(data->clk));
266
-
return PTR_ERR(data->clk);
267
-
}
268
-
269
-
ret = clk_prepare_enable(data->clk);
270
-
if (ret) {
271
-
dev_err(&pdev->dev,
272
-
"Failed to prepare or enable clock, err=%d\n", ret);
166
+
ret = imx_get_clks(&pdev->dev);
167
+
if (ret)
273
168
return ret;
274
-
}
169
+
170
+
ret = imx_prepare_enable_clks(&pdev->dev);
171
+
if (ret)
172
+
return ret;
275
173
276
174
data->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "fsl,usbphy", 0);
277
175
if (IS_ERR(data->phy)) {
···
314
212
goto disable_device;
315
213
}
316
214
317
-
platform_set_drvdata(pdev, data);
318
-
319
215
if (data->supports_runtime_pm) {
320
216
pm_runtime_set_active(&pdev->dev);
321
217
pm_runtime_enable(&pdev->dev);
···
326
226
disable_device:
327
227
ci_hdrc_remove_device(data->ci_pdev);
328
228
err_clk:
329
-
clk_disable_unprepare(data->clk);
229
+
imx_disable_unprepare_clks(&pdev->dev);
330
230
return ret;
331
231
}
332
232
···
340
240
pm_runtime_put_noidle(&pdev->dev);
341
241
}
342
242
ci_hdrc_remove_device(data->ci_pdev);
343
-
clk_disable_unprepare(data->clk);
243
+
imx_disable_unprepare_clks(&pdev->dev);
344
244
345
245
return 0;
346
246
}
···
352
252
353
253
dev_dbg(dev, "at %s\n", __func__);
354
254
355
-
clk_disable_unprepare(data->clk);
255
+
imx_disable_unprepare_clks(dev);
356
256
data->in_lpm = true;
357
257
358
258
return 0;
···
370
270
return 0;
371
271
}
372
272
373
-
ret = clk_prepare_enable(data->clk);
273
+
ret = imx_prepare_enable_clks(dev);
374
274
if (ret)
375
275
return ret;
376
276
···
385
285
return 0;
386
286
387
287
clk_disable:
388
-
clk_disable_unprepare(data->clk);
288
+
imx_disable_unprepare_clks(dev);
389
289
return ret;
390
290
}
391
291
+2
drivers/usb/chipidea/debug.c
+2
drivers/usb/chipidea/debug.c
+17
drivers/usb/chipidea/udc.c
+17
drivers/usb/chipidea/udc.c
···
1751
1751
return retval;
1752
1752
}
1753
1753
1754
+
static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1755
+
{
1756
+
if (!ci_otg_is_fsm_mode(ci))
1757
+
return;
1758
+
1759
+
mutex_lock(&ci->fsm.lock);
1760
+
if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1761
+
ci->fsm.a_bidl_adis_tmout = 1;
1762
+
ci_hdrc_otg_fsm_start(ci);
1763
+
} else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1764
+
ci->fsm.protocol = PROTO_UNDEF;
1765
+
ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1766
+
}
1767
+
mutex_unlock(&ci->fsm.lock);
1768
+
}
1769
+
1754
1770
/**
1755
1771
* ci_udc_stop: unregister a gadget driver
1756
1772
*/
···
1791
1775
ci->driver = NULL;
1792
1776
spin_unlock_irqrestore(&ci->lock, flags);
1793
1777
1778
+
ci_udc_stop_for_otg_fsm(ci);
1794
1779
return 0;
1795
1780
}
1796
1781
+6
-4
drivers/usb/chipidea/usbmisc_imx.c
+6
-4
drivers/usb/chipidea/usbmisc_imx.c
···
500
500
{
501
501
struct resource *res;
502
502
struct imx_usbmisc *data;
503
-
struct of_device_id *tmp_dev;
503
+
const struct of_device_id *of_id;
504
+
505
+
of_id = of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
506
+
if (!of_id)
507
+
return -ENODEV;
504
508
505
509
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
506
510
if (!data)
···
517
513
if (IS_ERR(data->base))
518
514
return PTR_ERR(data->base);
519
515
520
-
tmp_dev = (struct of_device_id *)
521
-
of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
522
-
data->ops = (const struct usbmisc_ops *)tmp_dev->data;
516
+
data->ops = (const struct usbmisc_ops *)of_id->data;
523
517
platform_set_drvdata(pdev, data);
524
518
525
519
return 0;
+1
-1
drivers/usb/class/usblp.c
+1
-1
drivers/usb/class/usblp.c
···
884
884
885
885
add_wait_queue(&usblp->wwait, &waita);
886
886
for (;;) {
887
-
set_current_state(TASK_INTERRUPTIBLE);
888
887
if (mutex_lock_interruptible(&usblp->mut)) {
889
888
rc = -EINTR;
890
889
break;
891
890
}
891
+
set_current_state(TASK_INTERRUPTIBLE);
892
892
rc = usblp_wtest(usblp, nonblock);
893
893
mutex_unlock(&usblp->mut);
894
894
if (rc <= 0)
+1
-2
drivers/usb/core/Kconfig
+1
-2
drivers/usb/core/Kconfig
+5
-4
drivers/usb/dwc2/hcd.c
+5
-4
drivers/usb/dwc2/hcd.c
···
324
324
*/
325
325
static void dwc2_hcd_rem_wakeup(struct dwc2_hsotg *hsotg)
326
326
{
327
-
if (hsotg->lx_state == DWC2_L2) {
327
+
if (hsotg->bus_suspended) {
328
328
hsotg->flags.b.port_suspend_change = 1;
329
329
usb_hcd_resume_root_hub(hsotg->priv);
330
-
} else {
331
-
hsotg->flags.b.port_l1_change = 1;
332
330
}
331
+
332
+
if (hsotg->lx_state == DWC2_L1)
333
+
hsotg->flags.b.port_l1_change = 1;
333
334
}
334
335
335
336
/**
···
1429
1428
dev_dbg(hsotg->dev, "Clear Resume: HPRT0=%0x\n",
1430
1429
dwc2_readl(hsotg->regs + HPRT0));
1431
1430
1432
-
hsotg->bus_suspended = 0;
1433
1431
dwc2_hcd_rem_wakeup(hsotg);
1432
+
hsotg->bus_suspended = 0;
1434
1433
1435
1434
/* Change to L0 state */
1436
1435
hsotg->lx_state = DWC2_L0;
+2
-1
drivers/usb/dwc2/platform.c
+2
-1
drivers/usb/dwc2/platform.c
+4
drivers/usb/dwc3/dwc3-pci.c
+4
drivers/usb/dwc3/dwc3-pci.c
···
34
34
#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35
35
#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36
36
#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37
+
#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38
+
#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
37
39
38
40
static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
39
41
static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
···
212
210
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
213
211
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
214
212
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
213
+
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
214
+
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
215
215
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
216
216
{ } /* Terminating Entry */
217
217
};
+23
-1
drivers/usb/dwc3/gadget.c
+23
-1
drivers/usb/dwc3/gadget.c
···
2744
2744
}
2745
2745
2746
2746
dwc->gadget.ops = &dwc3_gadget_ops;
2747
-
dwc->gadget.max_speed = USB_SPEED_SUPER;
2748
2747
dwc->gadget.speed = USB_SPEED_UNKNOWN;
2749
2748
dwc->gadget.sg_supported = true;
2750
2749
dwc->gadget.name = "dwc3-gadget";
2750
+
2751
+
/*
2752
+
* FIXME We might be setting max_speed to <SUPER, however versions
2753
+
* <2.20a of dwc3 have an issue with metastability (documented
2754
+
* elsewhere in this driver) which tells us we can't set max speed to
2755
+
* anything lower than SUPER.
2756
+
*
2757
+
* Because gadget.max_speed is only used by composite.c and function
2758
+
* drivers (i.e. it won't go into dwc3's registers) we are allowing this
2759
+
* to happen so we avoid sending SuperSpeed Capability descriptor
2760
+
* together with our BOS descriptor as that could confuse host into
2761
+
* thinking we can handle super speed.
2762
+
*
2763
+
* Note that, in fact, we won't even support GetBOS requests when speed
2764
+
* is less than super speed because we don't have means, yet, to tell
2765
+
* composite.c that we are USB 2.0 + LPM ECN.
2766
+
*/
2767
+
if (dwc->revision < DWC3_REVISION_220A)
2768
+
dwc3_trace(trace_dwc3_gadget,
2769
+
"Changing max_speed on rev %08x\n",
2770
+
dwc->revision);
2771
+
2772
+
dwc->gadget.max_speed = dwc->maximum_speed;
2751
2773
2752
2774
/*
2753
2775
* Per databook, DWC3 needs buffer size to be aligned to MaxPacketSize
+1
-1
drivers/usb/gadget/function/f_loopback.c
+1
-1
drivers/usb/gadget/function/f_loopback.c
+1
-1
drivers/usb/gadget/udc/atmel_usba_udc.c
+1
-1
drivers/usb/gadget/udc/atmel_usba_udc.c
···
1633
1633
spin_lock(&udc->lock);
1634
1634
1635
1635
int_enb = usba_int_enb_get(udc);
1636
-
status = usba_readl(udc, INT_STA) & int_enb;
1636
+
status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1637
1637
DBG(DBG_INT, "irq, status=%#08x\n", status);
1638
1638
1639
1639
if (status & USBA_DET_SUSPEND) {
+9
-6
drivers/usb/host/xhci-hub.c
+9
-6
drivers/usb/host/xhci-hub.c
···
782
782
status |= USB_PORT_STAT_SUSPEND;
783
783
}
784
784
}
785
-
if ((raw_port_status & PORT_PLS_MASK) == XDEV_U0
786
-
&& (raw_port_status & PORT_POWER)
787
-
&& (bus_state->suspended_ports & (1 << wIndex))) {
788
-
bus_state->suspended_ports &= ~(1 << wIndex);
789
-
if (hcd->speed < HCD_USB3)
790
-
bus_state->port_c_suspend |= 1 << wIndex;
785
+
if ((raw_port_status & PORT_PLS_MASK) == XDEV_U0 &&
786
+
(raw_port_status & PORT_POWER)) {
787
+
if (bus_state->suspended_ports & (1 << wIndex)) {
788
+
bus_state->suspended_ports &= ~(1 << wIndex);
789
+
if (hcd->speed < HCD_USB3)
790
+
bus_state->port_c_suspend |= 1 << wIndex;
791
+
}
792
+
bus_state->resume_done[wIndex] = 0;
793
+
clear_bit(wIndex, &bus_state->resuming_ports);
791
794
}
792
795
if (raw_port_status & PORT_CONNECT) {
793
796
status |= USB_PORT_STAT_CONNECTION;
+6
-26
drivers/usb/host/xhci-ring.c
+6
-26
drivers/usb/host/xhci-ring.c
···
3896
3896
return ret;
3897
3897
}
3898
3898
3899
-
static int ep_ring_is_processing(struct xhci_hcd *xhci,
3900
-
int slot_id, unsigned int ep_index)
3901
-
{
3902
-
struct xhci_virt_device *xdev;
3903
-
struct xhci_ring *ep_ring;
3904
-
struct xhci_ep_ctx *ep_ctx;
3905
-
struct xhci_virt_ep *xep;
3906
-
dma_addr_t hw_deq;
3907
-
3908
-
xdev = xhci->devs[slot_id];
3909
-
xep = &xhci->devs[slot_id]->eps[ep_index];
3910
-
ep_ring = xep->ring;
3911
-
ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3912
-
3913
-
if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) != EP_STATE_RUNNING)
3914
-
return 0;
3915
-
3916
-
hw_deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;
3917
-
return (hw_deq !=
3918
-
xhci_trb_virt_to_dma(ep_ring->enq_seg, ep_ring->enqueue));
3919
-
}
3920
-
3921
3899
/*
3922
3900
* Check transfer ring to guarantee there is enough room for the urb.
3923
3901
* Update ISO URB start_frame and interval.
···
3961
3983
}
3962
3984
3963
3985
/* Calculate the start frame and put it in urb->start_frame. */
3964
-
if (HCC_CFC(xhci->hcc_params) &&
3965
-
ep_ring_is_processing(xhci, slot_id, ep_index)) {
3966
-
urb->start_frame = xep->next_frame_id;
3967
-
goto skip_start_over;
3986
+
if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
3987
+
if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
3988
+
EP_STATE_RUNNING) {
3989
+
urb->start_frame = xep->next_frame_id;
3990
+
goto skip_start_over;
3991
+
}
3968
3992
}
3969
3993
3970
3994
start_frame = readl(&xhci->run_regs->microframe_index);
+10
drivers/usb/host/xhci.c
+10
drivers/usb/host/xhci.c
···
175
175
command |= CMD_RESET;
176
176
writel(command, &xhci->op_regs->command);
177
177
178
+
/* Existing Intel xHCI controllers require a delay of 1 mS,
179
+
* after setting the CMD_RESET bit, and before accessing any
180
+
* HC registers. This allows the HC to complete the
181
+
* reset operation and be ready for HC register access.
182
+
* Without this delay, the subsequent HC register access,
183
+
* may result in a system hang very rarely.
184
+
*/
185
+
if (xhci->quirks & XHCI_INTEL_HOST)
186
+
udelay(1000);
187
+
178
188
ret = xhci_handshake(&xhci->op_regs->command,
179
189
CMD_RESET, 0, 10 * 1000 * 1000);
180
190
if (ret)
+6
-6
drivers/usb/musb/musb_core.c
+6
-6
drivers/usb/musb/musb_core.c
···
132
132
/*-------------------------------------------------------------------------*/
133
133
134
134
#ifndef CONFIG_BLACKFIN
135
-
static int musb_ulpi_read(struct usb_phy *phy, u32 offset)
135
+
static int musb_ulpi_read(struct usb_phy *phy, u32 reg)
136
136
{
137
137
void __iomem *addr = phy->io_priv;
138
138
int i = 0;
···
151
151
* ULPICarKitControlDisableUTMI after clearing POWER_SUSPENDM.
152
152
*/
153
153
154
-
musb_writeb(addr, MUSB_ULPI_REG_ADDR, (u8)offset);
154
+
musb_writeb(addr, MUSB_ULPI_REG_ADDR, (u8)reg);
155
155
musb_writeb(addr, MUSB_ULPI_REG_CONTROL,
156
156
MUSB_ULPI_REG_REQ | MUSB_ULPI_RDN_WR);
157
157
···
176
176
return ret;
177
177
}
178
178
179
-
static int musb_ulpi_write(struct usb_phy *phy, u32 offset, u32 data)
179
+
static int musb_ulpi_write(struct usb_phy *phy, u32 val, u32 reg)
180
180
{
181
181
void __iomem *addr = phy->io_priv;
182
182
int i = 0;
···
191
191
power &= ~MUSB_POWER_SUSPENDM;
192
192
musb_writeb(addr, MUSB_POWER, power);
193
193
194
-
musb_writeb(addr, MUSB_ULPI_REG_ADDR, (u8)offset);
195
-
musb_writeb(addr, MUSB_ULPI_REG_DATA, (u8)data);
194
+
musb_writeb(addr, MUSB_ULPI_REG_ADDR, (u8)reg);
195
+
musb_writeb(addr, MUSB_ULPI_REG_DATA, (u8)val);
196
196
musb_writeb(addr, MUSB_ULPI_REG_CONTROL, MUSB_ULPI_REG_REQ);
197
197
198
198
while (!(musb_readb(addr, MUSB_ULPI_REG_CONTROL)
···
1668
1668
static bool use_dma = 1;
1669
1669
1670
1670
/* "modprobe ... use_dma=0" etc */
1671
-
module_param(use_dma, bool, 0);
1671
+
module_param(use_dma, bool, 0644);
1672
1672
MODULE_PARM_DESC(use_dma, "enable/disable use of DMA");
1673
1673
1674
1674
void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)
+16
-6
drivers/usb/musb/musb_host.c
+16
-6
drivers/usb/musb/musb_host.c
···
112
112
struct musb *musb = ep->musb;
113
113
void __iomem *epio = ep->regs;
114
114
u16 csr;
115
-
u16 lastcsr = 0;
116
115
int retries = 1000;
117
116
118
117
csr = musb_readw(epio, MUSB_TXCSR);
119
118
while (csr & MUSB_TXCSR_FIFONOTEMPTY) {
120
-
if (csr != lastcsr)
121
-
dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr);
122
-
lastcsr = csr;
123
119
csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_TXPKTRDY;
124
120
musb_writew(epio, MUSB_TXCSR, csr);
125
121
csr = musb_readw(epio, MUSB_TXCSR);
126
-
if (WARN(retries-- < 1,
122
+
123
+
/*
124
+
* FIXME: sometimes the tx fifo flush failed, it has been
125
+
* observed during device disconnect on AM335x.
126
+
*
127
+
* To reproduce the issue, ensure tx urb(s) are queued when
128
+
* unplug the usb device which is connected to AM335x usb
129
+
* host port.
130
+
*
131
+
* I found using a usb-ethernet device and running iperf
132
+
* (client on AM335x) has very high chance to trigger it.
133
+
*
134
+
* Better to turn on dev_dbg() in musb_cleanup_urb() with
135
+
* CPPI enabled to see the issue when aborting the tx channel.
136
+
*/
137
+
if (dev_WARN_ONCE(musb->controller, retries-- < 1,
127
138
"Could not flush host TX%d fifo: csr: %04x\n",
128
139
ep->epnum, csr))
129
140
return;
130
-
mdelay(1);
131
141
}
132
142
}
133
143
+1
-3
drivers/usb/phy/Kconfig
+1
-3
drivers/usb/phy/Kconfig
···
21
21
config FSL_USB2_OTG
22
22
bool "Freescale USB OTG Transceiver Driver"
23
23
depends on USB_EHCI_FSL && USB_FSL_USB2 && USB_OTG_FSM && PM
24
-
select USB_OTG
25
24
select USB_PHY
26
25
help
27
26
Enable this to support Freescale USB OTG transceiver.
···
167
168
168
169
config USB_MV_OTG
169
170
tristate "Marvell USB OTG support"
170
-
depends on USB_EHCI_MV && USB_MV_UDC && PM
171
-
select USB_OTG
171
+
depends on USB_EHCI_MV && USB_MV_UDC && PM && USB_OTG
172
172
select USB_PHY
173
173
help
174
174
Say Y here if you want to build Marvell USB OTG transciever
+5
-2
drivers/usb/phy/phy-mxs-usb.c
+5
-2
drivers/usb/phy/phy-mxs-usb.c
···
452
452
struct clk *clk;
453
453
struct mxs_phy *mxs_phy;
454
454
int ret;
455
-
const struct of_device_id *of_id =
456
-
of_match_device(mxs_phy_dt_ids, &pdev->dev);
455
+
const struct of_device_id *of_id;
457
456
struct device_node *np = pdev->dev.of_node;
457
+
458
+
of_id = of_match_device(mxs_phy_dt_ids, &pdev->dev);
459
+
if (!of_id)
460
+
return -ENODEV;
458
461
459
462
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
460
463
base = devm_ioremap_resource(&pdev->dev, res);
+1
-1
drivers/usb/phy/phy-omap-otg.c
+1
-1
drivers/usb/phy/phy-omap-otg.c
···
105
105
extcon = extcon_get_extcon_dev(config->extcon);
106
106
if (!extcon)
107
107
return -EPROBE_DEFER;
108
-
otg_dev->extcon = extcon;
109
108
110
109
otg_dev = devm_kzalloc(&pdev->dev, sizeof(*otg_dev), GFP_KERNEL);
111
110
if (!otg_dev)
···
114
115
if (IS_ERR(otg_dev->base))
115
116
return PTR_ERR(otg_dev->base);
116
117
118
+
otg_dev->extcon = extcon;
117
119
otg_dev->id_nb.notifier_call = omap_otg_id_notifier;
118
120
otg_dev->vbus_nb.notifier_call = omap_otg_vbus_notifier;
119
121
+11
drivers/usb/serial/option.c
+11
drivers/usb/serial/option.c
···
161
161
#define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_HIGHSPEED 0x9001
162
162
#define NOVATELWIRELESS_PRODUCT_E362 0x9010
163
163
#define NOVATELWIRELESS_PRODUCT_E371 0x9011
164
+
#define NOVATELWIRELESS_PRODUCT_U620L 0x9022
164
165
#define NOVATELWIRELESS_PRODUCT_G2 0xA010
165
166
#define NOVATELWIRELESS_PRODUCT_MC551 0xB001
166
167
···
355
354
/* This is the 4G XS Stick W14 a.k.a. Mobilcom Debitel Surf-Stick *
356
355
* It seems to contain a Qualcomm QSC6240/6290 chipset */
357
356
#define FOUR_G_SYSTEMS_PRODUCT_W14 0x9603
357
+
#define FOUR_G_SYSTEMS_PRODUCT_W100 0x9b01
358
358
359
359
/* iBall 3.5G connect wireless modem */
360
360
#define IBALL_3_5G_CONNECT 0x9605
···
519
517
520
518
static const struct option_blacklist_info four_g_w14_blacklist = {
521
519
.sendsetup = BIT(0) | BIT(1),
520
+
};
521
+
522
+
static const struct option_blacklist_info four_g_w100_blacklist = {
523
+
.sendsetup = BIT(1) | BIT(2),
524
+
.reserved = BIT(3),
522
525
};
523
526
524
527
static const struct option_blacklist_info alcatel_x200_blacklist = {
···
1059
1052
{ USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC551, 0xff, 0xff, 0xff) },
1060
1053
{ USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_E362, 0xff, 0xff, 0xff) },
1061
1054
{ USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_E371, 0xff, 0xff, 0xff) },
1055
+
{ USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_U620L, 0xff, 0x00, 0x00) },
1062
1056
1063
1057
{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01) },
1064
1058
{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01A) },
···
1649
1641
{ USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14),
1650
1642
.driver_info = (kernel_ulong_t)&four_g_w14_blacklist
1651
1643
},
1644
+
{ USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W100),
1645
+
.driver_info = (kernel_ulong_t)&four_g_w100_blacklist
1646
+
},
1652
1647
{ USB_DEVICE_INTERFACE_CLASS(LONGCHEER_VENDOR_ID, SPEEDUP_PRODUCT_SU9800, 0xff) },
1653
1648
{ USB_DEVICE(LONGCHEER_VENDOR_ID, ZOOM_PRODUCT_4597) },
1654
1649
{ USB_DEVICE(LONGCHEER_VENDOR_ID, IBALL_3_5G_CONNECT) },
+74
-20
drivers/usb/serial/qcserial.c
+74
-20
drivers/usb/serial/qcserial.c
···
22
22
#define DRIVER_AUTHOR "Qualcomm Inc"
23
23
#define DRIVER_DESC "Qualcomm USB Serial driver"
24
24
25
+
#define QUECTEL_EC20_PID 0x9215
26
+
25
27
/* standard device layouts supported by this driver */
26
28
enum qcserial_layouts {
27
29
QCSERIAL_G2K = 0, /* Gobi 2000 */
···
173
171
};
174
172
MODULE_DEVICE_TABLE(usb, id_table);
175
173
174
+
static int handle_quectel_ec20(struct device *dev, int ifnum)
175
+
{
176
+
int altsetting = 0;
177
+
178
+
/*
179
+
* Quectel EC20 Mini PCIe LTE module layout:
180
+
* 0: DM/DIAG (use libqcdm from ModemManager for communication)
181
+
* 1: NMEA
182
+
* 2: AT-capable modem port
183
+
* 3: Modem interface
184
+
* 4: NDIS
185
+
*/
186
+
switch (ifnum) {
187
+
case 0:
188
+
dev_dbg(dev, "Quectel EC20 DM/DIAG interface found\n");
189
+
break;
190
+
case 1:
191
+
dev_dbg(dev, "Quectel EC20 NMEA GPS interface found\n");
192
+
break;
193
+
case 2:
194
+
case 3:
195
+
dev_dbg(dev, "Quectel EC20 Modem port found\n");
196
+
break;
197
+
case 4:
198
+
/* Don't claim the QMI/net interface */
199
+
altsetting = -1;
200
+
break;
201
+
}
202
+
203
+
return altsetting;
204
+
}
205
+
176
206
static int qcprobe(struct usb_serial *serial, const struct usb_device_id *id)
177
207
{
178
208
struct usb_host_interface *intf = serial->interface->cur_altsetting;
···
214
180
__u8 ifnum;
215
181
int altsetting = -1;
216
182
bool sendsetup = false;
183
+
184
+
/* we only support vendor specific functions */
185
+
if (intf->desc.bInterfaceClass != USB_CLASS_VENDOR_SPEC)
186
+
goto done;
217
187
218
188
nintf = serial->dev->actconfig->desc.bNumInterfaces;
219
189
dev_dbg(dev, "Num Interfaces = %d\n", nintf);
···
278
240
altsetting = -1;
279
241
break;
280
242
case QCSERIAL_G2K:
243
+
/* handle non-standard layouts */
244
+
if (nintf == 5 && id->idProduct == QUECTEL_EC20_PID) {
245
+
altsetting = handle_quectel_ec20(dev, ifnum);
246
+
goto done;
247
+
}
248
+
281
249
/*
282
250
* Gobi 2K+ USB layout:
283
251
* 0: QMI/net
···
345
301
break;
346
302
case QCSERIAL_HWI:
347
303
/*
348
-
* Huawei layout:
349
-
* 0: AT-capable modem port
350
-
* 1: DM/DIAG
351
-
* 2: AT-capable modem port
352
-
* 3: CCID-compatible PCSC interface
353
-
* 4: QMI/net
354
-
* 5: NMEA
304
+
* Huawei devices map functions by subclass + protocol
305
+
* instead of interface numbers. The protocol identify
306
+
* a specific function, while the subclass indicate a
307
+
* specific firmware source
308
+
*
309
+
* This is a blacklist of functions known to be
310
+
* non-serial. The rest are assumed to be serial and
311
+
* will be handled by this driver
355
312
*/
356
-
switch (ifnum) {
357
-
case 0:
358
-
case 2:
359
-
dev_dbg(dev, "Modem port found\n");
360
-
break;
361
-
case 1:
362
-
dev_dbg(dev, "DM/DIAG interface found\n");
363
-
break;
364
-
case 5:
365
-
dev_dbg(dev, "NMEA GPS interface found\n");
366
-
break;
367
-
default:
368
-
/* don't claim any unsupported interface */
313
+
switch (intf->desc.bInterfaceProtocol) {
314
+
/* QMI combined (qmi_wwan) */
315
+
case 0x07:
316
+
case 0x37:
317
+
case 0x67:
318
+
/* QMI data (qmi_wwan) */
319
+
case 0x08:
320
+
case 0x38:
321
+
case 0x68:
322
+
/* QMI control (qmi_wwan) */
323
+
case 0x09:
324
+
case 0x39:
325
+
case 0x69:
326
+
/* NCM like (huawei_cdc_ncm) */
327
+
case 0x16:
328
+
case 0x46:
329
+
case 0x76:
369
330
altsetting = -1;
370
331
break;
332
+
default:
333
+
dev_dbg(dev, "Huawei type serial port found (%02x/%02x/%02x)\n",
334
+
intf->desc.bInterfaceClass,
335
+
intf->desc.bInterfaceSubClass,
336
+
intf->desc.bInterfaceProtocol);
371
337
}
372
338
break;
373
339
default:
+2
drivers/usb/serial/ti_usb_3410_5052.c
+2
drivers/usb/serial/ti_usb_3410_5052.c
···
159
159
{ USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_STEREO_PLUG_ID) },
160
160
{ USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_STRIP_PORT_ID) },
161
161
{ USB_DEVICE(TI_VENDOR_ID, FRI2_PRODUCT_ID) },
162
+
{ USB_DEVICE(HONEYWELL_VENDOR_ID, HONEYWELL_HGI80_PRODUCT_ID) },
162
163
{ } /* terminator */
163
164
};
164
165
···
192
191
{ USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_PRODUCT_ID) },
193
192
{ USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_STRIP_PORT_ID) },
194
193
{ USB_DEVICE(TI_VENDOR_ID, FRI2_PRODUCT_ID) },
194
+
{ USB_DEVICE(HONEYWELL_VENDOR_ID, HONEYWELL_HGI80_PRODUCT_ID) },
195
195
{ } /* terminator */
196
196
};
197
197
+4
drivers/usb/serial/ti_usb_3410_5052.h
+4
drivers/usb/serial/ti_usb_3410_5052.h
···
56
56
#define ABBOTT_PRODUCT_ID ABBOTT_STEREO_PLUG_ID
57
57
#define ABBOTT_STRIP_PORT_ID 0x3420
58
58
59
+
/* Honeywell vendor and product IDs */
60
+
#define HONEYWELL_VENDOR_ID 0x10ac
61
+
#define HONEYWELL_HGI80_PRODUCT_ID 0x0102 /* Honeywell HGI80 */
62
+
59
63
/* Commands */
60
64
#define TI_GET_VERSION 0x01
61
65
#define TI_GET_PORT_STATUS 0x02