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drm/i915/lt_phy: Replace crtc compute clock

The existing DPLL compute clock callback for the XE3PLPD platform
(`xe3plpd_crtc_compute_clock`) was specific to that platform. Replace it
with the more generic Haswell (`hsw_crtc_compute_clock`) implementation
so that the compute clock path does not rely on the XE3PLPD hook.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-25-mika.kahola@intel.com

+1 -24
+1 -24
drivers/gpu/drm/i915/display/intel_dpll.c
··· 1212 1212 return 0; 1213 1213 } 1214 1214 1215 - static int xe3plpd_crtc_compute_clock(struct intel_atomic_state *state, 1216 - struct intel_crtc *crtc) 1217 - { 1218 - struct intel_crtc_state *crtc_state = 1219 - intel_atomic_get_new_crtc_state(state, crtc); 1220 - struct intel_encoder *encoder = 1221 - intel_get_crtc_new_encoder(state, crtc_state); 1222 - struct intel_display *display = to_intel_display(encoder); 1223 - int ret; 1224 - 1225 - ret = intel_lt_phy_pll_calc_state(crtc_state, encoder, &crtc_state->dpll_hw_state); 1226 - if (ret) 1227 - return ret; 1228 - 1229 - /* TODO: Do the readback via intel_compute_shared_dplls() */ 1230 - crtc_state->port_clock = 1231 - intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll); 1232 - 1233 - crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state); 1234 - 1235 - return 0; 1236 - } 1237 - 1238 1215 static int ilk_fb_cb_factor(const struct intel_crtc_state *crtc_state) 1239 1216 { 1240 1217 struct intel_display *display = to_intel_display(crtc_state); ··· 1672 1695 } 1673 1696 1674 1697 static const struct intel_dpll_global_funcs xe3plpd_dpll_funcs = { 1675 - .crtc_compute_clock = xe3plpd_crtc_compute_clock, 1698 + .crtc_compute_clock = hsw_crtc_compute_clock, 1676 1699 .crtc_get_dpll = hsw_crtc_get_dpll, 1677 1700 }; 1678 1701