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ASoC: codecs: lpass-rx-macro: fix mute_stream affecting all paths

The current mute_steam() implementation affects all paths instead of
only those in use by the DAI.

For example, playing to 2 DAIs simultaneously with mixing, stopping
one will mute the other.

Rework to use the same logic as hw_params() to mute only the relevant paths.
(also, use "rx->main_clk_users[j] > 0" instead of dsm_reg, which is
equivalent. I also don't think the clock enable should be in this function,
but that's a change for another patch)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Link: https://patch.msgid.link/20251117051523.16462-9-jonathan@marek.ca
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Jonathan Marek and committed by
Mark Brown
bdf96e91 50c28498

+34 -38
+34 -38
sound/soc/codecs/lpass-rx-macro.c
··· 1905 1905 { 1906 1906 struct snd_soc_component *component = dai->component; 1907 1907 struct rx_macro *rx = snd_soc_component_get_drvdata(component); 1908 - uint16_t j, reg, mix_reg, dsm_reg; 1909 - u16 int_mux_cfg0, int_mux_cfg1; 1908 + u32 port, j, reg, mix_reg, int_mux_cfg0, int_mux_cfg1; 1909 + u32 mask, val; 1910 1910 u8 int_mux_cfg0_val, int_mux_cfg1_val; 1911 1911 1912 - switch (dai->id) { 1913 - case RX_MACRO_AIF1_PB: 1914 - case RX_MACRO_AIF2_PB: 1915 - case RX_MACRO_AIF3_PB: 1916 - case RX_MACRO_AIF4_PB: 1917 - for (j = 0; j < INTERP_MAX; j++) { 1918 - reg = CDC_RX_RXn_RX_PATH_CTL(rx, j); 1919 - mix_reg = CDC_RX_RXn_RX_PATH_MIX_CTL(rx, j); 1920 - dsm_reg = CDC_RX_RXn_RX_PATH_DSM_CTL(rx, j); 1912 + if (stream != SNDRV_PCM_STREAM_PLAYBACK) 1913 + return 0; 1921 1914 1922 - if (mute) { 1923 - snd_soc_component_update_bits(component, reg, 1924 - CDC_RX_PATH_PGA_MUTE_MASK, 1925 - CDC_RX_PATH_PGA_MUTE_ENABLE); 1926 - snd_soc_component_update_bits(component, mix_reg, 1927 - CDC_RX_PATH_PGA_MUTE_MASK, 1928 - CDC_RX_PATH_PGA_MUTE_ENABLE); 1929 - } else { 1930 - snd_soc_component_update_bits(component, reg, 1931 - CDC_RX_PATH_PGA_MUTE_MASK, 0x0); 1932 - snd_soc_component_update_bits(component, mix_reg, 1933 - CDC_RX_PATH_PGA_MUTE_MASK, 0x0); 1915 + for (j = 0; j < INTERP_MAX; j++) { 1916 + reg = CDC_RX_RXn_RX_PATH_CTL(rx, j); 1917 + mix_reg = CDC_RX_RXn_RX_PATH_MIX_CTL(rx, j); 1918 + 1919 + mask = CDC_RX_PATH_PGA_MUTE_MASK; 1920 + val = 0; 1921 + if (mute) 1922 + val |= CDC_RX_PATH_PGA_MUTE_ENABLE; 1923 + if (rx->main_clk_users[j] > 0) { 1924 + mask |= CDC_RX_PATH_CLK_EN_MASK; 1925 + val |= CDC_RX_PATH_CLK_ENABLE; 1926 + } 1927 + 1928 + int_mux_cfg0 = CDC_RX_INP_MUX_RX_INT0_CFG0 + j * 8; 1929 + int_mux_cfg1 = int_mux_cfg0 + 4; 1930 + int_mux_cfg0_val = snd_soc_component_read(component, int_mux_cfg0); 1931 + int_mux_cfg1_val = snd_soc_component_read(component, int_mux_cfg1); 1932 + 1933 + for_each_set_bit(port, &rx->active_ch_mask[dai->id], RX_MACRO_PORTS_MAX) { 1934 + if (((int_mux_cfg0_val & 0x0f) == port + INTn_1_INP_SEL_RX0) || 1935 + ((int_mux_cfg0_val >> 4) == port + INTn_1_INP_SEL_RX0) || 1936 + ((int_mux_cfg1_val >> 4) == port + INTn_1_INP_SEL_RX0)) { 1937 + snd_soc_component_update_bits(component, reg, mask, val); 1934 1938 } 1935 1939 1936 - int_mux_cfg0 = CDC_RX_INP_MUX_RX_INT0_CFG0 + j * 8; 1937 - int_mux_cfg1 = int_mux_cfg0 + 4; 1938 - int_mux_cfg0_val = snd_soc_component_read(component, int_mux_cfg0); 1939 - int_mux_cfg1_val = snd_soc_component_read(component, int_mux_cfg1); 1940 - 1941 - if (snd_soc_component_read(component, dsm_reg) & 0x01) { 1942 - if (int_mux_cfg0_val || (int_mux_cfg1_val & 0xF0)) 1943 - snd_soc_component_update_bits(component, reg, 0x20, 0x20); 1944 - if (int_mux_cfg1_val & 0x0F) { 1945 - snd_soc_component_update_bits(component, reg, 0x20, 0x20); 1946 - snd_soc_component_update_bits(component, mix_reg, 0x20, 1947 - 0x20); 1940 + if ((int_mux_cfg1_val & 0x0f) == port + INTn_2_INP_SEL_RX0) { 1941 + snd_soc_component_update_bits(component, mix_reg, mask, val); 1942 + /* main clock needs to be enabled for mix to be useful: */ 1943 + if (rx->main_clk_users[j] > 0) { 1944 + snd_soc_component_update_bits(component, reg, 1945 + CDC_RX_PATH_CLK_EN_MASK, 1946 + CDC_RX_PATH_CLK_ENABLE); 1948 1947 } 1949 1948 } 1950 1949 } 1951 - break; 1952 - default: 1953 - break; 1954 1950 } 1955 1951 return 0; 1956 1952 }