Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/amdgpu: allow use kiq to do hdp flush under sriov
when use cpu to do page table update under sriov runtime, since mmio
access is blocked, kiq has to be used to flush hdp.
change WREG32_NO_KIQ to WREG32 to allow kiq.
Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Victor Zhao
and committed by
Alex Deucher
bf2bc616
c69b07f7
+4
-4
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
···
41
41
struct amdgpu_ring *ring)
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{
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if (!ring || !ring->funcs->emit_wreg)
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-
WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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+
WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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else
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amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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}
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c
···
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struct amdgpu_ring *ring)
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{
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if (!ring || !ring->funcs->emit_wreg)
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-
WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
35
+
WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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else
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amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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}
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c
···
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struct amdgpu_ring *ring)
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{
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if (!ring || !ring->funcs->emit_wreg)
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-
WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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+
WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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else
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amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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}
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
+1
-1
drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
···
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struct amdgpu_ring *ring)
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{
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if (!ring || !ring->funcs->emit_wreg)
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-
WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
35
+
WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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else
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amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
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}