Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/display: add a debugfs interface for the DMUB trace mask
For features that are implemented primarily in DMUB (e.g. PSR), it is
useful to be able to trace them at a DMUB level from the kernel,
especially when debugging issues. So, introduce a debugfs interface that
is able to read and set the DMUB trace mask dynamically at runtime and
document how to use it.
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Hamza Mahfooz
and committed by
Alex Deucher
c41028a2
fcfc6cee
+209
-2
+41
Documentation/gpu/amdgpu/display/dc-debug.rst
+41
Documentation/gpu/amdgpu/display/dc-debug.rst
···
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When reporting a bug related to DC, consider attaching this log before and
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after you reproduce the bug.
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+
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DMUB Firmware Debug
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===================
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Sometimes, dmesg logs aren't enough. This is especially true if a feature is
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implemented primarily in DMUB firmware. In such cases, all we see in dmesg when
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an issue arises is some generic timeout error. So, to get more relevant
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information, we can trace DMUB commands by enabling the relevant bits in
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`amdgpu_dm_dmub_trace_mask`.
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Currently, we support the tracing of the following groups:
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Trace Groups
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------------
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.. csv-table::
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:header-rows: 1
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:widths: 1, 1
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:file: ./trace-groups-table.csv
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**Note: Not all ASICs support all of the listed trace groups**
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So, to enable just PSR tracing you can use the following command::
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# echo 0x8020 > /sys/kernel/debug/dri/0/amdgpu_dm_dmub_trace_mask
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Then, you need to enable logging trace events to the buffer, which you can do
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using the following::
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# echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_en
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Lastly, after you are able to reproduce the issue you are trying to debug,
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you can disable tracing and read the trace log by using the following::
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# echo 0 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_en
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# cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_tracebuffer
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So, when reporting bugs related to features such as PSR and ABM, consider
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enabling the relevant bits in the mask before reproducing the issue and
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attach the log that you obtain from the trace buffer in any bug reports that you
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create.
+29
Documentation/gpu/amdgpu/display/trace-groups-table.csv
+29
Documentation/gpu/amdgpu/display/trace-groups-table.csv
···
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Name, Mask Value
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INFO, 0x1
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IRQ SVC, 0x2
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VBIOS, 0x4
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REGISTER, 0x8
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PHY DBG, 0x10
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PSR, 0x20
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AUX, 0x40
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SMU, 0x80
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MALL, 0x100
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ABM, 0x200
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ALPM, 0x400
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TIMER, 0x800
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HW LOCK MGR, 0x1000
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INBOX1, 0x2000
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PHY SEQ, 0x4000
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PSR STATE, 0x8000
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ZSTATE, 0x10000
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TRANSMITTER CTL, 0x20000
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PANEL CNTL, 0x40000
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FAMS, 0x80000
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DPIA, 0x100000
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SUBVP, 0x200000
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+
INBOX0, 0x400000
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SDP, 0x4000000
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REPLAY, 0x8000000
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REPLAY RESIDENCY, 0x20000000
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CURSOR INFO, 0x80000000
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IPS, 0x100000000
+101
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+101
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
···
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return 0;
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}
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static int dmub_trace_mask_set(void *data, u64 val)
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{
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struct amdgpu_device *adev = data;
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struct dmub_srv *srv = adev->dm.dc->ctx->dmub_srv->dmub;
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enum dmub_gpint_command cmd;
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enum dmub_status status;
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u64 mask = 0xffff;
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u8 shift = 0;
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u32 res;
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int i;
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if (!srv->fw_version)
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return -EINVAL;
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+
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for (i = 0; i < 4; i++) {
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res = (val & mask) >> shift;
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switch (i) {
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case 0:
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cmd = DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD0;
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break;
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case 1:
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cmd = DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD1;
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break;
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case 2:
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cmd = DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD2;
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break;
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case 3:
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cmd = DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD3;
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break;
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}
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status = dmub_srv_send_gpint_command(srv, cmd, res, 30);
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if (status == DMUB_STATUS_TIMEOUT)
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return -ETIMEDOUT;
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else if (status == DMUB_STATUS_INVALID)
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return -EINVAL;
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else if (status != DMUB_STATUS_OK)
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return -EIO;
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usleep_range(100, 1000);
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mask <<= 16;
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shift += 16;
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}
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return 0;
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}
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static int dmub_trace_mask_show(void *data, u64 *val)
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{
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enum dmub_gpint_command cmd = DMUB_GPINT__GET_TRACE_BUFFER_MASK_WORD0;
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struct amdgpu_device *adev = data;
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struct dmub_srv *srv = adev->dm.dc->ctx->dmub_srv->dmub;
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enum dmub_status status;
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u8 shift = 0;
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u64 raw = 0;
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u64 res = 0;
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int i = 0;
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if (!srv->fw_version)
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return -EINVAL;
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while (i < 4) {
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status = dmub_srv_send_gpint_command(srv, cmd, 0, 30);
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if (status == DMUB_STATUS_OK) {
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status = dmub_srv_get_gpint_response(srv, (u32 *) &raw);
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if (status == DMUB_STATUS_INVALID)
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return -EINVAL;
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else if (status != DMUB_STATUS_OK)
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return -EIO;
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} else if (status == DMUB_STATUS_TIMEOUT) {
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return -ETIMEDOUT;
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} else if (status == DMUB_STATUS_INVALID) {
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return -EINVAL;
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} else {
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return -EIO;
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}
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usleep_range(100, 1000);
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cmd++;
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res |= (raw << shift);
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shift += 16;
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i++;
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}
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*val = res;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(dmub_trace_mask_fops, dmub_trace_mask_show,
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dmub_trace_mask_set, "0x%llx\n");
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/*
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* Set dmcub trace event IRQ enable or disable.
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* Usage to enable dmcub trace event IRQ: echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_en
···
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debugfs_create_file_unsafe("amdgpu_dm_force_timing_sync", 0644, root,
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adev, &force_timing_sync_ops);
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debugfs_create_file_unsafe("amdgpu_dm_dmub_trace_mask", 0644, root,
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adev, &dmub_trace_mask_fops);
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debugfs_create_file_unsafe("amdgpu_dm_dmcub_trace_event_en", 0644, root,
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adev, &dmcub_trace_event_state_fops);
+38
-2
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+38
-2
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
···
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* RETURN: Lower 32-bit mask.
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*/
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DMUB_GPINT__UPDATE_TRACE_BUFFER_MASK = 101,
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/**
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* DESC: Updates the trace buffer lower 32-bit mask.
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* DESC: Updates the trace buffer mask bit0~bit15.
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* ARGS: The new mask
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* RETURN: Lower 32-bit mask.
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*/
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DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD0 = 102,
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/**
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* DESC: Updates the trace buffer mask bi0~bit15.
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* DESC: Updates the trace buffer mask bit16~bit31.
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* ARGS: The new mask
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* RETURN: Lower 32-bit mask.
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*/
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DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD1 = 103,
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/**
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* DESC: Updates the trace buffer mask bit32~bit47.
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* ARGS: The new mask
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* RETURN: Lower 32-bit mask.
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*/
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DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD2 = 114,
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+
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/**
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* DESC: Updates the trace buffer mask bit48~bit63.
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* ARGS: The new mask
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* RETURN: Lower 32-bit mask.
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*/
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DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD3 = 115,
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/**
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* DESC: Read the trace buffer mask bi0~bit15.
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*/
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DMUB_GPINT__GET_TRACE_BUFFER_MASK_WORD0 = 116,
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+
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/**
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* DESC: Read the trace buffer mask bit16~bit31.
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*/
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DMUB_GPINT__GET_TRACE_BUFFER_MASK_WORD1 = 117,
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+
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/**
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* DESC: Read the trace buffer mask bi32~bit47.
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*/
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DMUB_GPINT__GET_TRACE_BUFFER_MASK_WORD2 = 118,
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/**
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* DESC: Updates the trace buffer mask bit32~bit63.
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*/
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DMUB_GPINT__GET_TRACE_BUFFER_MASK_WORD3 = 119,
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};
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/**