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drm/i915: move GEN7_ERR_INT snapshot to display irq code

The error interrupt register GEN7_ERR_INT is a display irq
register. Move its GPU error capture to display irq snapshot.

Cc: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260122123759.1701492-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

+5 -7
+5
drivers/gpu/drm/i915/display/intel_display_irq.c
··· 2472 2472 2473 2473 struct intel_display_irq_snapshot { 2474 2474 u32 derrmr; 2475 + u32 err_int; 2475 2476 }; 2476 2477 2477 2478 struct intel_display_irq_snapshot * ··· 2487 2486 if (DISPLAY_VER(display) >= 6 && DISPLAY_VER(display) < 20 && !HAS_GMCH(display)) 2488 2487 snapshot->derrmr = intel_de_read(display, DERRMR); 2489 2488 2489 + if (DISPLAY_VER(display) == 7) 2490 + snapshot->err_int = intel_de_read(display, GEN7_ERR_INT); 2491 + 2490 2492 return snapshot; 2491 2493 } 2492 2494 ··· 2500 2496 return; 2501 2497 2502 2498 drm_printf(p, "DERRMR: 0x%08x\n", snapshot->derrmr); 2499 + drm_printf(p, "ERR_INT: 0x%08x\n", snapshot->err_int); 2503 2500 }
-6
drivers/gpu/drm/i915/i915_gpu_error.c
··· 824 824 err_printf(m, "FAULT_TLB_DATA: 0x%08x 0x%08x\n", 825 825 gt->fault_data1, gt->fault_data0); 826 826 827 - if (GRAPHICS_VER(m->i915) == 7) 828 - err_printf(m, "ERR_INT: 0x%08x\n", gt->err_int); 829 - 830 827 if (IS_GRAPHICS_VER(m->i915, 8, 11)) 831 828 err_printf(m, "GTT_CACHE_EN: 0x%08x\n", gt->gtt_cache); 832 829 ··· 1925 1928 /* 1: Registers specific to a single generation */ 1926 1929 if (IS_VALLEYVIEW(i915)) 1927 1930 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV); 1928 - 1929 - if (GRAPHICS_VER(i915) == 7) 1930 - gt->err_int = intel_uncore_read(uncore, GEN7_ERR_INT); 1931 1931 1932 1932 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) { 1933 1933 gt->fault_data0 = intel_gt_mcr_read_any((struct intel_gt *)gt->_gt,
-1
drivers/gpu/drm/i915/i915_gpu_error.h
··· 149 149 u32 gtier[6], ngtier; 150 150 u32 forcewake; 151 151 u32 error; /* gen6+ */ 152 - u32 err_int; /* gen7 */ 153 152 u32 fault_data0; /* gen8, gen9 */ 154 153 u32 fault_data1; /* gen8, gen9 */ 155 154 u32 done_reg;