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ASoC: ti: davinci-mcasp: Disambiguate mcasp_is_synchronous function

The current mcasp_is_synchronous() function does more than what it
proclaims, it also checks if McASP is a frame producer.

Therefore split the original function into two separate ones and
replace all occurrences with the new equivalent logic.

Signed-off-by: Sen Wang <sen@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Tested-by: Paresh Bhagat <p-bhagat@ti.com>
Link: https://patch.msgid.link/20260203003703.2334443-3-sen@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Sen Wang and committed by
Mark Brown e683cb08 f1ef70a4

+14 -7
+14 -7
sound/soc/ti/davinci-mcasp.c
··· 180 180 181 181 static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp) 182 182 { 183 - u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); 184 183 u32 aclkxctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_ACLKXCTL_REG); 185 184 186 - return !(aclkxctl & TX_ASYNC) && rxfmctl & AFSRE; 185 + return !(aclkxctl & TX_ASYNC); 186 + } 187 + 188 + static bool mcasp_is_frame_producer(struct davinci_mcasp *mcasp) 189 + { 190 + u32 rxfmctl = mcasp_get_reg(mcasp, DAVINCI_MCASP_RXFMCTL_REG); 191 + 192 + return rxfmctl & AFSRE; 187 193 } 188 194 189 195 static inline void mcasp_set_clk_pdir(struct davinci_mcasp *mcasp, bool enable) ··· 233 227 * synchronously from the transmit clock and frame sync. We need to make 234 228 * sure that the TX signlas are enabled when starting reception. 235 229 */ 236 - if (mcasp_is_synchronous(mcasp)) { 230 + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp)) { 237 231 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); 238 232 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); 239 233 mcasp_set_clk_pdir(mcasp, true); ··· 246 240 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); 247 241 /* Release Frame Sync generator */ 248 242 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); 249 - if (mcasp_is_synchronous(mcasp)) 243 + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp)) 250 244 mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); 251 245 252 246 /* enable receive IRQs */ ··· 312 306 * In synchronous mode stop the TX clocks if no other stream is 313 307 * running 314 308 */ 315 - if (mcasp_is_synchronous(mcasp) && !mcasp->streams) { 309 + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && !mcasp->streams) { 316 310 mcasp_set_clk_pdir(mcasp, false); 317 311 mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, 0); 318 312 } ··· 339 333 * In synchronous mode keep TX clocks running if the capture stream is 340 334 * still running. 341 335 */ 342 - if (mcasp_is_synchronous(mcasp) && mcasp->streams) 336 + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && mcasp->streams) 343 337 val = TXHCLKRST | TXCLKRST | TXFSRST; 344 338 else 345 339 mcasp_set_clk_pdir(mcasp, false); ··· 1048 1042 * not running already we need to configure the TX slots in 1049 1043 * order to have correct FSX on the bus 1050 1044 */ 1051 - if (mcasp_is_synchronous(mcasp) && !mcasp->channels) 1045 + if (mcasp_is_frame_producer(mcasp) && mcasp_is_synchronous(mcasp) && 1046 + !mcasp->channels) 1052 1047 mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, 1053 1048 FSXMOD(total_slots), FSXMOD(0x1FF)); 1054 1049 }