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dt-bindings: clock: Add SC7280 VideoCC clock binding

Add device tree bindings for video clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-7-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Taniya Das and committed by
Stephen Boyd
f1f5a303 3e0f01d6

+31 -2
+4 -2
Documentation/devicetree/bindings/clock/qcom,videocc.yaml
··· 1 - # SPDX-License-Identifier: GPL-2.0-only 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 2 %YAML 1.2 3 3 --- 4 4 $id: http://devicetree.org/schemas/clock/qcom,videocc.yaml# ··· 11 11 12 12 description: | 13 13 Qualcomm video clock control module which supports the clocks, resets and 14 - power domains on SDM845/SC7180/SM8150/SM8250. 14 + power domains on Qualcomm SoCs. 15 15 16 16 See also: 17 17 dt-bindings/clock/qcom,videocc-sc7180.h 18 + dt-bindings/clock/qcom,videocc-sc7280.h 18 19 dt-bindings/clock/qcom,videocc-sdm845.h 19 20 dt-bindings/clock/qcom,videocc-sm8150.h 20 21 dt-bindings/clock/qcom,videocc-sm8250.h ··· 24 23 compatible: 25 24 enum: 26 25 - qcom,sc7180-videocc 26 + - qcom,sc7280-videocc 27 27 - qcom,sdm845-videocc 28 28 - qcom,sm8150-videocc 29 29 - qcom,sm8250-videocc
+27
include/dt-bindings/clock/qcom,videocc-sc7280.h
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 + /* 3 + * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SC7280_H 7 + #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SC7280_H 8 + 9 + /* VIDEO_CC clocks */ 10 + #define VIDEO_PLL0 0 11 + #define VIDEO_CC_IRIS_AHB_CLK 1 12 + #define VIDEO_CC_IRIS_CLK_SRC 2 13 + #define VIDEO_CC_MVS0_AXI_CLK 3 14 + #define VIDEO_CC_MVS0_CORE_CLK 4 15 + #define VIDEO_CC_MVSC_CORE_CLK 5 16 + #define VIDEO_CC_MVSC_CTL_AXI_CLK 6 17 + #define VIDEO_CC_SLEEP_CLK 7 18 + #define VIDEO_CC_SLEEP_CLK_SRC 8 19 + #define VIDEO_CC_VENUS_AHB_CLK 9 20 + #define VIDEO_CC_XO_CLK 10 21 + #define VIDEO_CC_XO_CLK_SRC 11 22 + 23 + /* VIDEO_CC power domains */ 24 + #define MVS0_GDSC 0 25 + #define MVSC_GDSC 1 26 + 27 + #endif