+6

Changes

reviewed

··· 38 38 39 39 ### Internal/compiler-libs changes: 40 40 41 41 + - #12216, #12248: Prevent reordering of atomic loads during instruction 42 42 + scheduling. This is for reference, as instruction scheduling is currently 43 43 + unused in OCaml 5. 44 44 + (Xavier Leroy, report by Luc Maranget and KC Sivaramakrishnan, 45 45 + review by Nicolás Ojeda Bär) 46 46 + 41 47 ### Build system: 42 48 43 49 ### Bug fixes:

+6 -1

asmcomp/schedgen.ml

reviewed

··· 181 181 Can be overridden for some processors to signal specific 182 182 load or store instructions (e.g. on the I386). *) 183 183 184 184 + (* Stores are not reordered with other stores nor with loads. 185 185 + Loads can be reordered with other loads, but not with stores. 186 186 + Atomic loads must not be reordered, so we treat them like stores. *) 187 187 + 184 188 method is_store = function 185 189 Istore(_, _, _) -> true 190 190 + | Iload {is_atomic = true} -> true 186 191 | _ -> false 187 192 188 193 method is_load = function 189 189 - Iload _ -> true 194 194 + Iload {is_atomic = false} -> true 190 195 | _ -> false 191 196 192 197 method is_checkbound = function

+3 -2

asmcomp/schedgen.mli

reviewed

··· 37 37 method oper_in_basic_block : Mach.operation -> bool 38 38 (* Says whether the given operation terminates a basic block *) 39 39 method is_store : Mach.operation -> bool 40 40 - (* Says whether the given operation is a memory store *) 40 40 + (* Says whether the given operation is a memory store 41 41 + or an atomic load. *) 41 42 method is_load : Mach.operation -> bool 42 42 - (* Says whether the given operation is a memory load *) 43 43 + (* Says whether the given operation is a non-atomic memory load *) 43 44 method is_checkbound : Mach.operation -> bool 44 45 (* Says whether the given operation is a checkbound *) 45 46 (* Entry point *)