fork of PCE focusing on macplus, supporting DaynaPort SCSI network emulation
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powerpc: Make the new ESR and DEAR available to the exception callback

+51 -20
+48 -20
src/cpu/ppc405/ppc405.c
··· 523 523 p405_set_srr (c, 0, p405_get_pc (c) + pcofs); 524 524 p405_set_srr (c, 1, p405_get_msr (c)); 525 525 526 + p405_set_esr (c, c->exception_esr); 527 + p405_set_dear (c, c->exception_dear); 528 + 526 529 c->msr &= ~P405_EXCPT_MSR; 527 530 528 531 p405_set_pc (c, (p405_get_evpr (c) & 0xffff0000) | ofs); ··· 534 537 535 538 void p405_exception_data_store (p405_t *c, uint32_t ea, int store, int zone) 536 539 { 537 - if (p405_exception (c, 0x300, 0)) { 538 - return; 539 - } 540 - 541 - p405_set_dear (c, ea); 542 - 543 - c->esr &= P405_ESR_MCI; 540 + c->exception_esr = p405_get_esr (c) & P405_ESR_MCI; 544 541 545 542 if (store) { 546 - c->esr |= P405_ESR_DST; 543 + c->exception_esr |= P405_ESR_DST; 547 544 } 548 545 549 546 if (zone) { 550 - c->esr |= P405_ESR_DIZ; 547 + c->exception_esr |= P405_ESR_DIZ; 548 + } 549 + 550 + c->exception_dear = ea; 551 + 552 + if (p405_exception (c, 0x300, 0)) { 553 + return; 551 554 } 552 555 } 553 556 554 557 void p405_exception_instr_store (p405_t *c, int zone) 555 558 { 556 - if (p405_exception (c, 0x400, 0)) { 557 - return; 559 + c->exception_esr = p405_get_esr (c) & P405_ESR_MCI; 560 + 561 + if (zone) { 562 + c->exception_esr |= P405_ESR_DIZ; 558 563 } 559 564 560 - c->esr &= P405_ESR_MCI; 565 + c->exception_dear = p405_get_dear (c); 561 566 562 - if (zone) { 563 - c->esr |= P405_ESR_DIZ; 567 + if (p405_exception (c, 0x400, 0)) { 568 + return; 564 569 } 565 570 } 566 571 567 572 void p405_exception_external (p405_t *c) 568 573 { 574 + c->exception_esr = p405_get_esr (c); 575 + c->exception_dear = p405_get_dear (c); 576 + 569 577 if (p405_exception (c, 0x500, 0)) { 570 578 return; 571 579 } ··· 573 581 574 582 void p405_exception_program (p405_t *c, uint32_t esr) 575 583 { 584 + c->exception_esr = (p405_get_esr (c) & P405_ESR_MCI) | (esr & ~P405_ESR_MCI); 585 + c->exception_dear = p405_get_dear (c); 586 + 576 587 if (p405_exception (c, 0x700, 0)) { 577 588 return; 578 589 } 579 - 580 - p405_set_esr (c, (c->esr & P405_ESR_MCI) | (esr & ~P405_ESR_MCI)); 581 590 } 582 591 583 592 void p405_exception_program_fpu (p405_t *c) ··· 587 596 588 597 void p405_exception_syscall (p405_t *c) 589 598 { 599 + c->exception_esr = p405_get_esr (c); 600 + c->exception_dear = p405_get_dear (c); 601 + 590 602 if (p405_exception (c, 0xc00, 4)) { 591 603 p405_set_pc (c, (p405_get_pc (c) + 4)); 592 604 return; ··· 595 607 596 608 void p405_exception_pit (p405_t *c) 597 609 { 610 + c->exception_esr = p405_get_esr (c); 611 + c->exception_dear = p405_get_dear (c); 612 + 598 613 if (p405_exception (c, 0x1000, 0)) { 599 614 return; 600 615 } ··· 602 617 603 618 void p405_exception_fit (p405_t *c) 604 619 { 620 + c->exception_esr = p405_get_esr (c); 621 + c->exception_dear = p405_get_dear (c); 622 + 605 623 if (p405_exception (c, 0x1010, 0)) { 606 624 return; 607 625 } ··· 609 627 610 628 void p405_exception_tlb_miss_data (p405_t *c, uint32_t ea, int store) 611 629 { 612 - if (p405_exception (c, 0x1100, 0)) { 613 - return; 630 + c->exception_esr = p405_get_esr (c) & P405_ESR_MCI; 631 + 632 + if (store) { 633 + c->exception_esr |= P405_ESR_DST; 614 634 } 615 635 616 - p405_set_dear (c, ea); 636 + c->exception_dear = ea; 617 637 618 - c->esr = (c->esr & P405_ESR_MCI) | ((store) ? P405_ESR_DST : 0); 638 + if (p405_exception (c, 0x1100, 0)) { 639 + return; 640 + } 619 641 } 620 642 621 643 void p405_exception_tlb_miss_instr (p405_t *c) 622 644 { 645 + c->exception_esr = p405_get_esr (c); 646 + c->exception_dear = p405_get_dear (c); 647 + 623 648 if (p405_exception (c, 0x1200, 0)) { 624 649 return; 625 650 } ··· 680 705 c->zpr = 0; 681 706 682 707 c->ir = 0; 708 + 709 + c->exception_esr = 0; 710 + c->exception_dear = 0; 683 711 684 712 c->fit_mask = 0x100; 685 713
+3
src/cpu/ppc405/ppc405.h
··· 404 404 405 405 uint32_t ir; 406 406 407 + uint32_t exception_esr; 408 + uint32_t exception_dear; 409 + 407 410 uint32_t fit_mask; 408 411 409 412 char reserve;