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ACPI: Examine bit width in Generic address structure before asserting

Also, the switch-case flow is simplified for IO access within a Generic
address strucuture's handling.

authored by

Liav A and committed by
Andreas Kling
b13417dd 5d7855ad

+35 -16
+11 -16
Kernel/ACPI/ACPIStaticParser.cpp
··· 154 154 { 155 155 switch (structure.address_space) { 156 156 case (u8)GenericAddressStructure::AddressSpace::SystemIO: { 157 - dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << IOAddress(structure.address); 157 + IOAddress address(structure.address); 158 + dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << address; 158 159 switch (structure.access_size) { 159 - case (u8)GenericAddressStructure::AccessSize::Byte: { 160 - IO::out8(structure.address, value); 161 - break; 162 - } 163 - case (u8)GenericAddressStructure::AccessSize::Word: { 164 - IO::out16(structure.address, value); 165 - break; 166 - } 167 - case (u8)GenericAddressStructure::AccessSize::DWord: { 168 - IO::out32(structure.address, value); 169 - break; 170 - } 171 160 case (u8)GenericAddressStructure::AccessSize::QWord: { 172 161 dbg() << "Trying to send QWord to IO port"; 173 162 ASSERT_NOT_REACHED(); 174 163 break; 175 164 } 165 + case (u8)GenericAddressStructure::AccessSize::Undefined: { 166 + dbg() << "ACPI Warning: Unknown access size " << structure.access_size; 167 + ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::QWord); 168 + ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::Undefined); 169 + dbg() << "ACPI: Bit Width - " << structure.bit_width << " bits"; 170 + address.out(value, structure.bit_width); 171 + break; 172 + } 176 173 default: 177 - // FIXME: Determine if for reset register we can actually determine the right IO operation. 178 - dbg() << "ACPI Warning: Unknown access size " << structure.access_size; 179 - IO::out8(structure.address, value); 174 + address.out(value, (8 << (structure.access_size - 1))); 180 175 break; 181 176 } 182 177 return;
+7
Kernel/ACPI/Definitions.h
··· 122 122 DWord = 3, 123 123 QWord = 4 124 124 }; 125 + enum class BitWidth { 126 + Undefined = 0, 127 + Byte = 8, 128 + Word = 16, 129 + DWord = 32, 130 + QWord = 64 131 + }; 125 132 } 126 133 127 134 namespace Structures {
+17
Libraries/LibBareMetal/IO.h
··· 147 147 ASSERT_NOT_REACHED(); 148 148 } 149 149 150 + inline void out(u32 value, u8 bit_width) 151 + { 152 + if (bit_width == 32) { 153 + IO::out32(get(), value); 154 + return; 155 + } 156 + if (bit_width == 16) { 157 + IO::out16(get(), value); 158 + return; 159 + } 160 + if (bit_width == 8) { 161 + IO::out8(get(), value); 162 + return; 163 + } 164 + ASSERT_NOT_REACHED(); 165 + } 166 + 150 167 bool is_null() const { return m_address == 0; } 151 168 152 169 bool operator==(const IOAddress& other) const { return m_address == other.m_address; }