Serenity Operating System
ACPI: Examine bit width in Generic address structure before asserting
Also, the switch-case flow is simplified for IO access within a Generic
address strucuture's handling.
authored by
Liav A
and committed by
Andreas Kling
b13417dd
5d7855ad
+35
-16
+11
-16
Kernel/ACPI/ACPIStaticParser.cpp
+11
-16
Kernel/ACPI/ACPIStaticParser.cpp
···
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{
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switch (structure.address_space) {
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case (u8)GenericAddressStructure::AddressSpace::SystemIO: {
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dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << IOAddress(structure.address);
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IOAddress address(structure.address);
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dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << address;
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switch (structure.access_size) {
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case (u8)GenericAddressStructure::AccessSize::Byte: {
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IO::out8(structure.address, value);
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break;
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}
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case (u8)GenericAddressStructure::AccessSize::Word: {
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IO::out16(structure.address, value);
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break;
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}
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case (u8)GenericAddressStructure::AccessSize::DWord: {
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IO::out32(structure.address, value);
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break;
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}
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case (u8)GenericAddressStructure::AccessSize::QWord: {
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dbg() << "Trying to send QWord to IO port";
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ASSERT_NOT_REACHED();
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break;
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}
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case (u8)GenericAddressStructure::AccessSize::Undefined: {
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dbg() << "ACPI Warning: Unknown access size " << structure.access_size;
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ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::QWord);
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ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::Undefined);
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dbg() << "ACPI: Bit Width - " << structure.bit_width << " bits";
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address.out(value, structure.bit_width);
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break;
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}
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default:
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// FIXME: Determine if for reset register we can actually determine the right IO operation.
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dbg() << "ACPI Warning: Unknown access size " << structure.access_size;
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IO::out8(structure.address, value);
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address.out(value, (8 << (structure.access_size - 1)));
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break;
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}
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return;
+7
Kernel/ACPI/Definitions.h
+7
Kernel/ACPI/Definitions.h
+17
Libraries/LibBareMetal/IO.h
+17
Libraries/LibBareMetal/IO.h
···
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ASSERT_NOT_REACHED();
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}
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inline void out(u32 value, u8 bit_width)
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{
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if (bit_width == 32) {
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IO::out32(get(), value);
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return;
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}
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if (bit_width == 16) {
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IO::out16(get(), value);
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return;
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}
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if (bit_width == 8) {
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IO::out8(get(), value);
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return;
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}
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ASSERT_NOT_REACHED();
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}
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bool is_null() const { return m_address == 0; }
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bool operator==(const IOAddress& other) const { return m_address == other.m_address; }