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spi: cadence-quadspi: fix potential malfunction after ~49 days uptime

The get_timer function returns an unsigned long which may be calculated
from the ARM system counter. This counter is reset only on a cold reset.
U-boot divides this counter down to a 1000 Hz counter that will cross
the 32bit barrier after a bit more than 49 days. Assigning the value to
an unsigned int will truncate it on 64bit systems.
Passing this truncated value back to the get_timer function will return
a very large value that is certainly larger than the timeout and so will
go down the error path and besides stopping U-Boot will lead to messages
like

"SPI: QSPI is still busy after poll for 5000 ms."

Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>

authored by

Ronald Wahl and committed by
Tom Rini 3d729838 82d262ae

+3 -3
+3 -3
drivers/spi/cadence_qspi_apb.c
··· 151 151 /* Return 1 if idle, otherwise return 0 (busy). */ 152 152 static unsigned int cadence_qspi_wait_idle(void *reg_base) 153 153 { 154 - unsigned int start, count = 0; 154 + unsigned long start, count = 0; 155 155 /* timeout in unit of ms */ 156 - unsigned int timeout = 5000; 156 + unsigned long timeout = 5000; 157 157 158 158 start = get_timer(0); 159 159 for ( ; get_timer(start) < timeout ; ) { ··· 170 170 } 171 171 172 172 /* Timeout, still in busy mode. */ 173 - printf("QSPI: QSPI is still busy after poll for %d ms.\n", timeout); 173 + printf("QSPI: QSPI is still busy after poll for %lu ms.\n", timeout); 174 174 return 0; 175 175 } 176 176