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arm: rockchip: Fix RK3128 grf register offsets

GRF registers from soc_con0 onwards are currently unusable because of a missing
offset before these, which is currently compensated by a to big reserved space
after those registers (to make check_member happy).

Signed-off-by: Alex Bee <knaerzche@gmail.com>

authored by

Alex Bee and committed by
joshua stein
8657fc04 c03b3979

+2 -1
+2 -1
arch/arm/include/asm/arch-rockchip/grf_rk3128.h
··· 36 36 unsigned int gpio3l_pull; 37 37 unsigned int gpio3h_pull; 38 38 unsigned int reserved2; 39 + unsigned int acodec_con; 39 40 unsigned int soc_con0; 40 41 unsigned int soc_con1; 41 42 unsigned int soc_con2; ··· 43 44 unsigned int reserved3[6]; 44 45 unsigned int mac_con0; 45 46 unsigned int mac_con1; 46 - unsigned int reserved4[4]; 47 + unsigned int reserved4[3]; 47 48 unsigned int uoc0_con0; 48 49 unsigned int reserved5; 49 50 unsigned int uoc1_con1;