A Modern GPGPU API & wip linux RDNA2+ Driver
rdna
driver
linux
gpu
amdgpu: command processor encoder
+79
+53
drivers/amdgpu/cp_encoder.cpp
+53
drivers/amdgpu/cp_encoder.cpp
···
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#include "cp_encoder.h"
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#include "cmdstream.h"
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#include "gpuinfo.h"
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CPEncoder::CPEncoder(GpuInfo &info, uint8_t ip_type, CommandStream &cs) : info(info), ip_type(ip_type), cs(cs) {}
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void CPEncoder::wait_mem(WaitMemOp op, uint64_t va, uint32_t ref, uint32_t mask) {
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cs.emit(PKT3(PKT3_WAIT_REG_MEM, 5, 0));
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cs.emit(WAIT_REG_MEM_MEM_SPACE(1) | (uint32_t)op);
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cs.emit(va);
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cs.emit(va >> 32);
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cs.emit(ref);
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cs.emit(mask);
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cs.emit(4);
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}
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void CPEncoder::release_mem(uint32_t event,
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uint32_t event_flags, uint32_t dst_sel,
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uint32_t int_sel, uint32_t data_sel, uint64_t va,
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uint32_t new_fence) {
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assert(info.gfx_level >= GfxLevel::GFX12 || !event_flags || (event != V_028A90_PS_DONE &&
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event != V_028A90_CS_DONE), "release_mem: only gfx12+ support gcr ops with PS_DONE & CS_DONE.");
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const uint32_t op = EVENT_TYPE(event) |
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EVENT_INDEX(event == V_028A90_CS_DONE || event == V_028A90_PS_DONE ? 6 : 5) |
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event_flags;
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const uint32_t sel = EOP_DST_SEL(dst_sel) |
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EOP_INT_SEL(int_sel) |
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EOP_DATA_SEL(data_sel);
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cs.emit(PKT3(PKT3_RELEASE_MEM, 6, false));
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cs.emit(op);
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cs.emit(sel);
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cs.emit(va);
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cs.emit(va >> 32);
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cs.emit(new_fence); /* immediate data lo */
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cs.emit(0); /* immediate data hi */
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cs.emit(0);
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}
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void CPEncoder::atomic_mem(AtomicOp op, uint32_t atomic_cmd, uint64_t va, uint64_t data, uint64_t compare_data) {
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cs.emit(PKT3(PKT3_ATOMIC_MEM, 7, 0));
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cs.emit(ATOMIC_OP((uint32_t)op) |
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ATOMIC_COMMAND(atomic_cmd));
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cs.emit(va);
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cs.emit(va >> 32);
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cs.emit(data);
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cs.emit(data >> 32);
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cs.emit(compare_data);
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cs.emit(compare_data >> 32);
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cs.emit(10); /* loop interval */
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}
+26
drivers/amdgpu/cp_encoder.h
+26
drivers/amdgpu/cp_encoder.h
···
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#pragma once
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#include "cmdstream.h"
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#include "gpuinfo.h"
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#include "impl.h"
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/**
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* Command Processor command encoder
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*/
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class CPEncoder {
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public:
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CPEncoder(GpuInfo &info, uint8_t ip_type, CommandStream &cs);
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void wait_mem(WaitMemOp op, uint64_t va, uint32_t ref, uint32_t mask);
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void release_mem(uint32_t event,
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uint32_t event_flags, uint32_t dst_sel,
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uint32_t int_sel, uint32_t data_sel, uint64_t va,
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uint32_t new_fence);
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void atomic_mem(AtomicOp op, uint32_t atomic_cmd, uint64_t va, uint64_t data, uint64_t compare_data);
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private:
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GpuInfo &info;
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uint8_t ip_type;
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CommandStream &cs;
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};