Add SC/RL SPICE netlists and parameterised SPICE test helper
sim/tline-sc.sp — short circuit (Vsc B GND 0, ΓL=−1)
sim/tline-rl.sp — resistive load (RL=100Ω param, ΓL=+1/3)
sim/run.sh — runs all *.sp files from sim/ directory
physics.test.js: replace one-off OC test with spiceCompare() helper that
- reads from sim/<tsvFile>
- skips with a clear message if the TSV hasn't been generated yet
- is called for OC, SC, and RL in one line each
To activate the new tests: cd sim && sh run.sh
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>