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[mldr] Implement WIP ARM64 Support
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src/startup/mldr/commpage.c
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src/startup/mldr/commpage.c
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static uint64_t get_cpu_caps(void);
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int PAGE_SIZE;
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#define CGET(p) (commpage + ((p)-_COMM_PAGE_START_ADDRESS))
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void commpage_setup(bool _64bit)
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uint8_t *physcpus, *logcpus;
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uint8_t *user_page_shift, *kernel_page_shift;
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struct sysinfo si;
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PAGE_SIZE = sysconf(_SC_PAGESIZE);
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commpage = (uint8_t*) mmap((void*)(_64bit ? _COMM_PAGE64_BASE_ADDRESS : _COMM_PAGE32_BASE_ADDRESS),
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_64bit ? _COMM_PAGE64_AREA_LENGTH : _COMM_PAGE32_AREA_LENGTH, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
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// as a substitute for log2().
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user_page_shift = (uint8_t*)CGET(_64bit ? _COMM_PAGE_USER_PAGE_SHIFT_64 : _COMM_PAGE_USER_PAGE_SHIFT_32);
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kernel_page_shift = (uint8_t*)CGET(_COMM_PAGE_KERNEL_PAGE_SHIFT);
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*kernel_page_shift = *user_page_shift = (uint8_t)__builtin_ctzl(sysconf(_SC_PAGESIZE));
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*kernel_page_shift = *user_page_shift = (uint8_t)__builtin_ctzl(PAGE_SIZE);
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my_caps = get_cpu_caps();
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if (*ncpus == 1)
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return _64bit ? _COMM_PAGE64_BASE_ADDRESS : _COMM_PAGE32_BASE_ADDRESS;
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}
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#ifdef __aarch64__
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vm_address_t _get_commpage_priv_address(void) {
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// Not sure if this is correct...
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return _COMM_PAGE64_BASE_ADDRESS;
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}
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#endif
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src/startup/mldr/elfcalls/threads.c
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src/startup/mldr/elfcalls/threads.c
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register uintptr_t arg6 asm("r9") = args.arg3;
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#elif __i386__
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uintptr_t arg3 = args.real_entry_point;
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#elif __aarch64__
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register void* arg1 asm("x0") = args.pth;
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register int arg2 asm("w1") = args.port;
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register uintptr_t arg3 asm("x2") = args.real_entry_point;
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register uintptr_t arg4 asm("x3") = args.arg1;
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register uintptr_t arg5 asm("x4") = args.arg2;
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register uintptr_t arg6 asm("x5") = args.arg3;
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#endif
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if (arg3 == 0) {
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// Function arguments to push to the stack.
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[args] "r"(&args), [arg3]"r"(arg3),
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[entry_point] "r"(args.entry_point),
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[stack_ptr] "r"(stack_ptr)
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);
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#elif defined(__aarch64__)
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asm volatile(
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// Zero out the frame base register.
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"mov fp, #0\n"
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// Switch to the new stack.
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"mov %[stack_ptr], sp\n"
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// Push a fake return address.
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"mov lr, #0\n"
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// Jump to the entry point.
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"br %[entry_point]" ::
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// Function arguments
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"r"(arg1),"r"(arg2),"r"(arg3),"r"(arg4),"r"(arg5),"r"(arg6),
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[entry_point] "r"(args.entry_point),
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[stack_ptr] "r"(stack_ptr)
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);
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src/startup/mldr/mldr.c
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src/startup/mldr/mldr.c
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if (arch.cputype == CPU_TYPE_X86)
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best_arch = arch;
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#elif defined (__aarch64__)
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#error TODO: arm
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if (arch.cputype == CPU_TYPE_ARM64)
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best_arch = arch;
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#else
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#error Unsupported CPU architecture
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#endif
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}
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};
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#ifdef __x86_64__
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#if defined(__x86_64__ ) || defined(__aarch64__)
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#define GEN_64BIT
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#include "loader.c"
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#include "stack.c"
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// Using the default stack top would cause the stack to be placed just above the commpage
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// and would collide with it eventually.
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// Instead, we manually allocate a new stack below the commpage.
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#if __x86_64__
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#if defined(__x86_64__) || defined(__aarch64__)
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lr->stack_top = commpage_address(true);
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#elif __i386__
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#elif defined(__i386__)
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lr->stack_top = commpage_address(false);
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#else
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#error Unsupported architecture
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__asm__ volatile(
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"mov sp, %1\n"
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"bx %0"
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::
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"r"(lr->entry_point),
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"r"(lr->stack_top)
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:
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);
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#elif defined(__aarch64__)
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__asm__ volatile(
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"mov sp, %1\n"
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"br %0"
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::
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"r"(lr->entry_point),
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"r"(lr->stack_top)