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hisi_acc_vfio_pci: Fix device data address combination problem

The queue address of the accelerator device should be combined into
a dma address in a way of combining the low and high bits.
The previous combination is wrong and needs to be modified.

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Link: https://lore.kernel.org/r/20220926093332.28824-3-liulongfang@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>

authored by

Longfang Liu and committed by
Alex Williamson 008e5e99 948f5ada

+4 -4
+4 -4
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
··· 520 520 return -EINVAL; 521 521 522 522 /* Every reg is 32 bit, the dma address is 64 bit. */ 523 - vf_data->eqe_dma = vf_data->qm_eqc_dw[2]; 523 + vf_data->eqe_dma = vf_data->qm_eqc_dw[1]; 524 524 vf_data->eqe_dma <<= QM_XQC_ADDR_OFFSET; 525 - vf_data->eqe_dma |= vf_data->qm_eqc_dw[1]; 526 - vf_data->aeqe_dma = vf_data->qm_aeqc_dw[2]; 525 + vf_data->eqe_dma |= vf_data->qm_eqc_dw[0]; 526 + vf_data->aeqe_dma = vf_data->qm_aeqc_dw[1]; 527 527 vf_data->aeqe_dma <<= QM_XQC_ADDR_OFFSET; 528 - vf_data->aeqe_dma |= vf_data->qm_aeqc_dw[1]; 528 + vf_data->aeqe_dma |= vf_data->qm_aeqc_dw[0]; 529 529 530 530 /* Through SQC_BT/CQC_BT to get sqc and cqc address */ 531 531 ret = qm_get_sqc(vf_qm, &vf_data->sqc_dma);