tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'riscv-for-linus-6.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:

- LTO fix for clang when building with CONFIG_CMODEL_MEDLOW

- Fix for ACPI CPPC CSR read/write return values

- Several fixes for incorrect access widths in thread_info.cpu reads

- Fix an issue in __put_user_nocheck() that was causing the glibc
tst-socket-timestamp test to fail

- Initialize struct kexec_buf records in several kexec-related
functions, which were generating UBSAN warnings

- Two fixes for sparse warnings

* tag 'riscv-for-linus-6.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Fix sparse warning about different address spaces
riscv: Fix sparse warning in __get_user_error()
riscv: kexec: Initialize kexec_buf struct
riscv: use lw when reading int cpu in asm_per_cpu
riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id
riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG
riscv: uaccess: fix __put_user_nocheck for unaligned accesses
riscv: use lw when reading int cpu in new_vmalloc_check
ACPI: RISC-V: Fix FFH_CPPC_CSR error handling
riscv: Only allow LTO with CMODEL_MEDANY

Linus Torvalds 00e69828 b2369207

+15 -15
+1 -1
arch/riscv/Kconfig
··· 65 65 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 66 66 select ARCH_SUPPORTS_HUGETLBFS if MMU 67 67 # LLD >= 14: https://github.com/llvm/llvm-project/issues/50505 68 - select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000 68 + select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000 && CMODEL_MEDANY 69 69 select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000 70 70 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU 71 71 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
+1 -1
arch/riscv/include/asm/asm.h
··· 91 91 #endif 92 92 93 93 .macro asm_per_cpu dst sym tmp 94 - REG_L \tmp, TASK_TI_CPU_NUM(tp) 94 + lw \tmp, TASK_TI_CPU_NUM(tp) 95 95 slli \tmp, \tmp, PER_CPU_OFFSET_SHIFT 96 96 la \dst, __per_cpu_offset 97 97 add \dst, \dst, \tmp
+4 -4
arch/riscv/include/asm/uaccess.h
··· 209 209 err = 0; \ 210 210 break; \ 211 211 __gu_failed: \ 212 - x = 0; \ 212 + x = (__typeof__(x))0; \ 213 213 err = -EFAULT; \ 214 214 } while (0) 215 215 ··· 311 311 do { \ 312 312 if (!IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) && \ 313 313 !IS_ALIGNED((uintptr_t)__gu_ptr, sizeof(*__gu_ptr))) { \ 314 - __inttype(x) ___val = (__inttype(x))x; \ 314 + __typeof__(*(__gu_ptr)) ___val = (x); \ 315 315 if (__asm_copy_to_user_sum_enabled(__gu_ptr, &(___val), sizeof(*__gu_ptr))) \ 316 316 goto label; \ 317 317 break; \ ··· 438 438 } 439 439 440 440 #define __get_kernel_nofault(dst, src, type, err_label) \ 441 - __get_user_nocheck(*((type *)(dst)), (type *)(src), err_label) 441 + __get_user_nocheck(*((type *)(dst)), (__force __user type *)(src), err_label) 442 442 443 443 #define __put_kernel_nofault(dst, src, type, err_label) \ 444 - __put_user_nocheck(*((type *)(src)), (type *)(dst), err_label) 444 + __put_user_nocheck(*((type *)(src)), (__force __user type *)(dst), err_label) 445 445 446 446 static __must_check __always_inline bool user_access_begin(const void __user *ptr, size_t len) 447 447 {
+1 -1
arch/riscv/kernel/entry.S
··· 46 46 * a0 = &new_vmalloc[BIT_WORD(cpu)] 47 47 * a1 = BIT_MASK(cpu) 48 48 */ 49 - REG_L a2, TASK_TI_CPU(tp) 49 + lw a2, TASK_TI_CPU(tp) 50 50 /* 51 51 * Compute the new_vmalloc element position: 52 52 * (cpu / 64) * 8 = (cpu >> 6) << 3
+2 -2
arch/riscv/kernel/kexec_elf.c
··· 28 28 int i; 29 29 int ret = 0; 30 30 size_t size; 31 - struct kexec_buf kbuf; 31 + struct kexec_buf kbuf = {}; 32 32 const struct elf_phdr *phdr; 33 33 34 34 kbuf.image = image; ··· 66 66 { 67 67 int i; 68 68 int ret; 69 - struct kexec_buf kbuf; 69 + struct kexec_buf kbuf = {}; 70 70 const struct elf_phdr *phdr; 71 71 unsigned long lowest_paddr = ULONG_MAX; 72 72 unsigned long lowest_vaddr = ULONG_MAX;
+1 -1
arch/riscv/kernel/kexec_image.c
··· 41 41 struct riscv_image_header *h; 42 42 u64 flags; 43 43 bool be_image, be_kernel; 44 - struct kexec_buf kbuf; 44 + struct kexec_buf kbuf = {}; 45 45 int ret; 46 46 47 47 /* Check Image header */
+1 -1
arch/riscv/kernel/machine_kexec_file.c
··· 261 261 int ret; 262 262 void *fdt; 263 263 unsigned long initrd_pbase = 0UL; 264 - struct kexec_buf kbuf; 264 + struct kexec_buf kbuf = {}; 265 265 char *modified_cmdline = NULL; 266 266 267 267 kbuf.image = image;
+2 -2
arch/riscv/net/bpf_jit_comp64.c
··· 1356 1356 emit_mv(rd, rs, ctx); 1357 1357 #ifdef CONFIG_SMP 1358 1358 /* Load current CPU number in T1 */ 1359 - emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu), 1359 + emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu), 1360 1360 RV_REG_TP, ctx); 1361 1361 /* Load address of __per_cpu_offset array in T2 */ 1362 1362 emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx); ··· 1763 1763 */ 1764 1764 if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) { 1765 1765 /* Load current CPU number in R0 */ 1766 - emit_ld(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu), 1766 + emit_lw(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu), 1767 1767 RV_REG_TP, ctx); 1768 1768 break; 1769 1769 }
+2 -2
drivers/acpi/riscv/cppc.c
··· 119 119 120 120 *val = data.ret.value; 121 121 122 - return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0; 122 + return data.ret.error; 123 123 } 124 124 125 125 return -EINVAL; ··· 148 148 149 149 smp_call_function_single(cpu, cppc_ffh_csr_write, &data, 1); 150 150 151 - return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0; 151 + return data.ret.error; 152 152 } 153 153 154 154 return -EINVAL;