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Merge branch 'net-ftgmac100-add-soc-reset-support-for-rmii-mode'

Jacky Chou says:

====================
net: ftgmac100: Add SoC reset support for RMII mode

This patch series adds support for an optional reset line to the
ftgmac100 ethernet controller, as used on Aspeed SoCs. On these SoCs,
the internal MAC reset is not sufficient to reset the RMII interface.
By providing a SoC-level reset via the device tree "resets" property,
the driver can properly reset both the MAC and RMII logic, ensuring
correct operation in RMII mode.

The series includes:
- Device tree binding update to document the new "resets" property.
- Addition of MAC1/2/3/4 reset definitions for AST2600.
- Driver changes to assert/deassert the reset line as needed.

This improves reliability and initialization of the MAC in RMII mode
on Aspeed platforms.
====================

Link: https://patch.msgid.link/20250709070809.2560688-1-jacky_chou@aspeedtech.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Jakub Kicinski 0106424a 380a8891

+46 -3
+18 -3
Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
··· 6 6 7 7 title: Faraday Technology FTGMAC100 gigabit ethernet controller 8 8 9 - allOf: 10 - - $ref: ethernet-controller.yaml# 11 - 12 9 maintainers: 13 10 - Po-Yu Chuang <ratbert@faraday-tech.com> 14 11 ··· 31 34 items: 32 35 - description: MAC IP clock 33 36 - description: RMII RCLK gate for AST2500/2600 37 + 38 + resets: 39 + maxItems: 1 34 40 35 41 clock-names: 36 42 minItems: 1 ··· 73 73 - compatible 74 74 - reg 75 75 - interrupts 76 + 77 + allOf: 78 + - $ref: ethernet-controller.yaml# 79 + - if: 80 + properties: 81 + compatible: 82 + contains: 83 + enum: 84 + - aspeed,ast2600-mac 85 + then: 86 + properties: 87 + resets: true 88 + else: 89 + properties: 90 + resets: false 76 91 77 92 unevaluatedProperties: false 78 93
+26
drivers/net/ethernet/faraday/ftgmac100.c
··· 9 9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 10 10 11 11 #include <linux/clk.h> 12 + #include <linux/reset.h> 12 13 #include <linux/dma-mapping.h> 13 14 #include <linux/etherdevice.h> 14 15 #include <linux/ethtool.h> ··· 102 101 103 102 /* AST2500/AST2600 RMII ref clock gate */ 104 103 struct clk *rclk; 104 + /* Aspeed reset control */ 105 + struct reset_control *rst; 105 106 106 107 /* Link management */ 107 108 int cur_speed; ··· 150 147 static int ftgmac100_reset_and_config_mac(struct ftgmac100 *priv) 151 148 { 152 149 u32 maccr = 0; 150 + 151 + /* Aspeed RMII needs SCU reset to clear status */ 152 + if (priv->is_aspeed && priv->netdev->phydev->interface == PHY_INTERFACE_MODE_RMII) { 153 + int err; 154 + 155 + err = reset_control_assert(priv->rst); 156 + if (err) { 157 + dev_err(priv->dev, "Failed to reset mac (%d)\n", err); 158 + return err; 159 + } 160 + usleep_range(10000, 20000); 161 + err = reset_control_deassert(priv->rst); 162 + if (err) { 163 + dev_err(priv->dev, "Failed to deassert mac reset (%d)\n", err); 164 + return err; 165 + } 166 + } 153 167 154 168 switch (priv->cur_speed) { 155 169 case SPEED_10: ··· 1986 1966 goto err_ncsi_dev; 1987 1967 } 1988 1968 1969 + } 1970 + 1971 + priv->rst = devm_reset_control_get_optional_exclusive(priv->dev, NULL); 1972 + if (IS_ERR(priv->rst)) { 1973 + err = PTR_ERR(priv->rst); 1974 + goto err_phy_connect; 1989 1975 } 1990 1976 1991 1977 if (priv->is_aspeed) {
+2
include/dt-bindings/clock/ast2600-clock.h
··· 122 122 #define ASPEED_RESET_PCIE_DEV_OEN 20 123 123 #define ASPEED_RESET_PCIE_RC_O 19 124 124 #define ASPEED_RESET_PCIE_RC_OEN 18 125 + #define ASPEED_RESET_MAC2 12 126 + #define ASPEED_RESET_MAC1 11 125 127 #define ASPEED_RESET_PCI_DP 5 126 128 #define ASPEED_RESET_HACE 4 127 129 #define ASPEED_RESET_AHB 1