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riscv: Move cpufeature.h macros into their own header

asm/cmpxchg.h will soon need riscv_has_extension_unlikely() macros and
then needs to include asm/cpufeature.h which introduces a lot of header
circular dependencies.

So move the riscv_has_extension_XXX() macros into their own header which
prevents such circular dependencies by including a restricted number of
headers.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Link: https://lore.kernel.org/r/20241103145153.105097-2-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

authored by

Alexandre Ghiti and committed by
Palmer Dabbelt
010e12aa 81983758

+70 -57
+66
arch/riscv/include/asm/cpufeature-macros.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright 2022-2024 Rivos, Inc 4 + */ 5 + 6 + #ifndef _ASM_CPUFEATURE_MACROS_H 7 + #define _ASM_CPUFEATURE_MACROS_H 8 + 9 + #include <asm/hwcap.h> 10 + #include <asm/alternative-macros.h> 11 + 12 + #define STANDARD_EXT 0 13 + 14 + bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit); 15 + #define riscv_isa_extension_available(isa_bitmap, ext) \ 16 + __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) 17 + 18 + static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor, 19 + const unsigned long ext) 20 + { 21 + asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) 22 + : 23 + : [vendor] "i" (vendor), [ext] "i" (ext) 24 + : 25 + : l_no); 26 + 27 + return true; 28 + l_no: 29 + return false; 30 + } 31 + 32 + static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor, 33 + const unsigned long ext) 34 + { 35 + asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) 36 + : 37 + : [vendor] "i" (vendor), [ext] "i" (ext) 38 + : 39 + : l_yes); 40 + 41 + return false; 42 + l_yes: 43 + return true; 44 + } 45 + 46 + static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext) 47 + { 48 + compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); 49 + 50 + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) 51 + return __riscv_has_extension_unlikely(STANDARD_EXT, ext); 52 + 53 + return __riscv_isa_extension_available(NULL, ext); 54 + } 55 + 56 + static __always_inline bool riscv_has_extension_likely(const unsigned long ext) 57 + { 58 + compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); 59 + 60 + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) 61 + return __riscv_has_extension_likely(STANDARD_EXT, ext); 62 + 63 + return __riscv_isa_extension_available(NULL, ext); 64 + } 65 + 66 + #endif /* _ASM_CPUFEATURE_MACROS_H */
+4 -57
arch/riscv/include/asm/cpufeature.h
··· 8 8 9 9 #include <linux/bitmap.h> 10 10 #include <linux/jump_label.h> 11 + #include <linux/kconfig.h> 12 + #include <linux/percpu-defs.h> 13 + #include <linux/threads.h> 11 14 #include <asm/hwcap.h> 12 - #include <asm/alternative-macros.h> 13 - #include <asm/errno.h> 15 + #include <asm/cpufeature-macros.h> 14 16 15 17 /* 16 18 * These are probed via a device_initcall(), via either the SBI or directly ··· 105 103 extern bool riscv_isa_fallback; 106 104 107 105 unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); 108 - 109 - #define STANDARD_EXT 0 110 - 111 - bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit); 112 - #define riscv_isa_extension_available(isa_bitmap, ext) \ 113 - __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) 114 - 115 - static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor, 116 - const unsigned long ext) 117 - { 118 - asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) 119 - : 120 - : [vendor] "i" (vendor), [ext] "i" (ext) 121 - : 122 - : l_no); 123 - 124 - return true; 125 - l_no: 126 - return false; 127 - } 128 - 129 - static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor, 130 - const unsigned long ext) 131 - { 132 - asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) 133 - : 134 - : [vendor] "i" (vendor), [ext] "i" (ext) 135 - : 136 - : l_yes); 137 - 138 - return false; 139 - l_yes: 140 - return true; 141 - } 142 - 143 - static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext) 144 - { 145 - compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); 146 - 147 - if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) 148 - return __riscv_has_extension_unlikely(STANDARD_EXT, ext); 149 - 150 - return __riscv_isa_extension_available(NULL, ext); 151 - } 152 - 153 - static __always_inline bool riscv_has_extension_likely(const unsigned long ext) 154 - { 155 - compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); 156 - 157 - if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) 158 - return __riscv_has_extension_likely(STANDARD_EXT, ext); 159 - 160 - return __riscv_isa_extension_available(NULL, ext); 161 - } 162 - 163 106 static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext) 164 107 { 165 108 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");