Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'riscv-for-linus-6.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
- A handful of fixes for the Microchip device trees
- A pair of fixes to eliminate build warnings
* tag 'riscv-for-linus-6.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: dts: microchip: mpfs: remove pci axi address translation property
riscv: dts: microchip: mpfs: remove bogus card-detect-delay
riscv: dts: microchip: mpfs: remove ti,fifo-depth property
riscv: dts: microchip: mpfs: fix incorrect pcie child node name
riscv: traps: add missing prototype
riscv: signal: fix missing prototype warning
riscv: dts: microchip: correct L2 cache interrupts
+19
-10
-3
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
-3
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
···
84
84
85
85
phy1: ethernet-phy@9 {
86
86
reg = <9>;
87
-
ti,fifo-depth = <0x1>;
88
87
};
89
88
90
89
phy0: ethernet-phy@8 {
91
90
reg = <8>;
92
-
ti,fifo-depth = <0x1>;
93
91
};
94
92
};
95
93
···
100
102
disable-wp;
101
103
cap-sd-highspeed;
102
104
cap-mmc-highspeed;
103
-
card-detect-delay = <200>;
104
105
mmc-ddr-1_8v;
105
106
mmc-hs200-1_8v;
106
107
sd-uhs-sdr12;
-3
arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
-3
arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
···
54
54
55
55
phy1: ethernet-phy@5 {
56
56
reg = <5>;
57
-
ti,fifo-depth = <0x01>;
58
57
};
59
58
60
59
phy0: ethernet-phy@4 {
61
60
reg = <4>;
62
-
ti,fifo-depth = <0x01>;
63
61
};
64
62
};
65
63
···
70
72
disable-wp;
71
73
cap-sd-highspeed;
72
74
cap-mmc-highspeed;
73
-
card-detect-delay = <200>;
74
75
mmc-ddr-1_8v;
75
76
mmc-hs200-1_8v;
76
77
sd-uhs-sdr12;
+2
-3
arch/riscv/boot/dts/microchip/mpfs.dtsi
+2
-3
arch/riscv/boot/dts/microchip/mpfs.dtsi
···
193
193
cache-size = <2097152>;
194
194
cache-unified;
195
195
interrupt-parent = <&plic>;
196
-
interrupts = <1>, <2>, <3>;
196
+
interrupts = <1>, <3>, <4>, <2>;
197
197
};
198
198
199
199
clint: clint@2000000 {
···
485
485
ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
486
486
msi-parent = <&pcie>;
487
487
msi-controller;
488
-
microchip,axi-m-atr0 = <0x10 0x0>;
489
488
status = "disabled";
490
-
pcie_intc: legacy-interrupt-controller {
489
+
pcie_intc: interrupt-controller {
491
490
#address-cells = <0>;
492
491
#interrupt-cells = <1>;
493
492
interrupt-controller;
+12
arch/riscv/include/asm/signal.h
+12
arch/riscv/include/asm/signal.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only */
2
+
3
+
#ifndef __ASM_SIGNAL_H
4
+
#define __ASM_SIGNAL_H
5
+
6
+
#include <uapi/asm/signal.h>
7
+
#include <uapi/asm/ptrace.h>
8
+
9
+
asmlinkage __visible
10
+
void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags);
11
+
12
+
#endif
+2
arch/riscv/include/asm/thread_info.h
+2
arch/riscv/include/asm/thread_info.h
+1
arch/riscv/kernel/signal.c
+1
arch/riscv/kernel/signal.c
+2
-1
arch/riscv/kernel/traps.c
+2
-1
arch/riscv/kernel/traps.c