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Merge tag 'sound-6.8-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
"A collection of fixes, mostly device-specific ones:

- Minor PCM core fix for name strings

- ASoC Qualcomm fixes, including DAI support extensions

- ASoC AMD platform updates

- ASoC Allwinner platform updates

- Various ASoC codec fixes for WSA, WCD, ES8326 drivers

- Various HD-audio and USB-audio fixes and quirks

- A series of fixes for Cirrus CS35L56 codecs"

* tag 'sound-6.8-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (63 commits)
ALSA: usb-audio: Ignore clock selector errors for single connection
ALSA: hda/realtek: Enable headset mic on Vaio VJFE-ADL
ALSA: hda: cs35l56: Remove unused test stub function
ALSA: hda: cs35l56: Firmware file must match the version of preloaded firmware
ALSA: hda: cs35l56: Fix filename string field layout
ALSA: hda: cs35l56: Fix order of searching for firmware files
ASoC: cs35l56: Allow more time for firmware to boot
ASoC: cs35l56: Load tunings for the correct speaker models
ASoC: cs35l56: Firmware file must match the version of preloaded firmware
ASoC: cs35l56: Fix misuse of wm_adsp 'part' string for silicon revision
ASoC: cs35l56: Fix for initializing ASP1 mixer registers
ALSA: hda: cs35l56: Initialize all ASP1 registers
ASoC: cs35l56: Fix default SDW TX mixer registers
ASoC: cs35l56: Fix to ensure ASP1 registers match cache
ASoC: cs35l56: Remove buggy checks from cs35l56_is_fw_reload_needed()
ASoC: cs35l56: Don't add the same register patch multiple times
ASoC: cs35l56: cs35l56_component_remove() must clean up wm_adsp
ASoC: cs35l56: cs35l56_component_remove() must clear cs35l56->component
ASoC: wm_adsp: Don't overwrite fwf_name with the default
ASoC: wm_adsp: Fix firmware file search order
...

+801 -274
+4 -1
Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
··· 22 22 - const: allwinner,sun6i-a31-spdif 23 23 - const: allwinner,sun8i-h3-spdif 24 24 - const: allwinner,sun50i-h6-spdif 25 + - const: allwinner,sun50i-h616-spdif 25 26 - items: 26 27 - const: allwinner,sun8i-a83t-spdif 27 28 - const: allwinner,sun8i-h3-spdif ··· 63 62 enum: 64 63 - allwinner,sun6i-a31-spdif 65 64 - allwinner,sun8i-h3-spdif 65 + - allwinner,sun50i-h6-spdif 66 + - allwinner,sun50i-h616-spdif 66 67 67 68 then: 68 69 required: ··· 76 73 contains: 77 74 enum: 78 75 - allwinner,sun8i-h3-spdif 79 - - allwinner,sun50i-h6-spdif 76 + - allwinner,sun50i-h616-spdif 80 77 81 78 then: 82 79 properties:
+6 -1
include/sound/cs35l56.h
··· 75 75 #define CS35L56_DSP1_AHBM_WINDOW_DEBUG_0 0x25E2040 76 76 #define CS35L56_DSP1_AHBM_WINDOW_DEBUG_1 0x25E2044 77 77 #define CS35L56_DSP1_XMEM_UNPACKED24_0 0x2800000 78 + #define CS35L56_DSP1_FW_VER 0x2800010 78 79 #define CS35L56_DSP1_HALO_STATE_A1 0x2801E58 79 80 #define CS35L56_DSP1_HALO_STATE 0x28021E0 80 81 #define CS35L56_DSP1_PM_CUR_STATE_A1 0x2804000 ··· 242 241 243 242 #define CS35L56_CONTROL_PORT_READY_US 2200 244 243 #define CS35L56_HALO_STATE_POLL_US 1000 245 - #define CS35L56_HALO_STATE_TIMEOUT_US 50000 244 + #define CS35L56_HALO_STATE_TIMEOUT_US 250000 246 245 #define CS35L56_RESET_PULSE_MIN_US 1100 247 246 #define CS35L56_WAKE_HOLD_TIME_US 1000 248 247 ··· 273 272 extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC]; 274 273 275 274 int cs35l56_set_patch(struct cs35l56_base *cs35l56_base); 275 + int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base); 276 276 int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command); 277 277 int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base); 278 278 int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base); ··· 286 284 int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base); 287 285 int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire); 288 286 void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp); 287 + int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base, 288 + bool *fw_missing, unsigned int *fw_version); 289 289 int cs35l56_hw_init(struct cs35l56_base *cs35l56_base); 290 + int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base); 290 291 int cs35l56_get_bclk_freq_id(unsigned int freq); 291 292 void cs35l56_fill_supply_names(struct regulator_bulk_data *data); 292 293
+4
sound/core/pcm.c
··· 211 211 FORMAT(DSD_U32_LE), 212 212 FORMAT(DSD_U16_BE), 213 213 FORMAT(DSD_U32_BE), 214 + FORMAT(S20_LE), 215 + FORMAT(S20_BE), 216 + FORMAT(U20_LE), 217 + FORMAT(U20_BE), 214 218 }; 215 219 216 220 /**
+4
sound/pci/hda/cs35l41_hda_property.c
··· 76 76 { "10431533", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 1000, 4500, 24 }, 77 77 { "10431573", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 1000, 4500, 24 }, 78 78 { "10431663", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, -1, 0, 1000, 4500, 24 }, 79 + { "10431683", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 0, 0, 0 }, 80 + { "104316A3", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 0, 0, 0 }, 79 81 { "104316D3", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 0, 0, 0 }, 80 82 { "104316F3", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 0, 0, 0 }, 81 83 { "104317F3", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 1000, 4500, 24 }, ··· 412 410 { "CSC3551", "10431533", generic_dsd_config }, 413 411 { "CSC3551", "10431573", generic_dsd_config }, 414 412 { "CSC3551", "10431663", generic_dsd_config }, 413 + { "CSC3551", "10431683", generic_dsd_config }, 414 + { "CSC3551", "104316A3", generic_dsd_config }, 415 415 { "CSC3551", "104316D3", generic_dsd_config }, 416 416 { "CSC3551", "104316F3", generic_dsd_config }, 417 417 { "CSC3551", "104317F3", generic_dsd_config },
+78 -60
sound/pci/hda/cs35l56_hda.c
··· 30 30 * ASP1_RX_WL = 24 bits per sample 31 31 * ASP1_TX_WL = 24 bits per sample 32 32 * ASP1_RXn_EN 1..3 and ASP1_TXn_EN 1..4 disabled 33 + * 34 + * Override any Windows-specific mixer settings applied by the firmware. 33 35 */ 34 36 static const struct reg_sequence cs35l56_hda_dai_config[] = { 35 37 { CS35L56_ASP1_CONTROL1, 0x00000021 }, 36 38 { CS35L56_ASP1_CONTROL2, 0x20200200 }, 37 39 { CS35L56_ASP1_CONTROL3, 0x00000003 }, 40 + { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 }, 41 + { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 }, 38 42 { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 }, 39 43 { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 }, 40 44 { CS35L56_ASP1_ENABLES1, 0x00000000 }, 45 + { CS35L56_ASP1TX1_INPUT, 0x00000018 }, 46 + { CS35L56_ASP1TX2_INPUT, 0x00000019 }, 47 + { CS35L56_ASP1TX3_INPUT, 0x00000020 }, 48 + { CS35L56_ASP1TX4_INPUT, 0x00000028 }, 49 + 41 50 }; 42 51 43 52 static void cs35l56_hda_play(struct cs35l56_hda *cs35l56) ··· 141 132 goto err; 142 133 } 143 134 } 135 + 136 + ret = cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base); 137 + if (ret) 138 + goto err; 144 139 145 140 return 0; 146 141 ··· 397 384 398 385 static int cs35l56_hda_request_firmware_file(struct cs35l56_hda *cs35l56, 399 386 const struct firmware **firmware, char **filename, 400 - const char *dir, const char *system_name, 387 + const char *base_name, const char *system_name, 401 388 const char *amp_name, 402 389 const char *filetype) 403 390 { ··· 405 392 int ret = 0; 406 393 407 394 if (system_name && amp_name) 408 - *filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc-%s-%s.%s", dir, 409 - cs35l56->base.secured ? "s" : "", cs35l56->base.rev, 395 + *filename = kasprintf(GFP_KERNEL, "%s-%s-%s.%s", base_name, 410 396 system_name, amp_name, filetype); 411 397 else if (system_name) 412 - *filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc-%s.%s", dir, 413 - cs35l56->base.secured ? "s" : "", cs35l56->base.rev, 398 + *filename = kasprintf(GFP_KERNEL, "%s-%s.%s", base_name, 414 399 system_name, filetype); 415 400 else 416 - *filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc.%s", dir, 417 - cs35l56->base.secured ? "s" : "", cs35l56->base.rev, 418 - filetype); 401 + *filename = kasprintf(GFP_KERNEL, "%s.%s", base_name, filetype); 419 402 420 403 if (!*filename) 421 404 return -ENOMEM; ··· 444 435 return 0; 445 436 } 446 437 447 - static const char cirrus_dir[] = "cirrus/"; 448 438 static void cs35l56_hda_request_firmware_files(struct cs35l56_hda *cs35l56, 439 + unsigned int preloaded_fw_ver, 449 440 const struct firmware **wmfw_firmware, 450 441 char **wmfw_filename, 451 442 const struct firmware **coeff_firmware, ··· 453 444 { 454 445 const char *system_name = cs35l56->system_name; 455 446 const char *amp_name = cs35l56->amp_name; 447 + char base_name[37]; 456 448 int ret; 449 + 450 + if (preloaded_fw_ver) { 451 + snprintf(base_name, sizeof(base_name), 452 + "cirrus/cs35l56-%02x%s-%06x-dsp1-misc", 453 + cs35l56->base.rev, 454 + cs35l56->base.secured ? "-s" : "", 455 + preloaded_fw_ver & 0xffffff); 456 + } else { 457 + snprintf(base_name, sizeof(base_name), 458 + "cirrus/cs35l56-%02x%s-dsp1-misc", 459 + cs35l56->base.rev, 460 + cs35l56->base.secured ? "-s" : ""); 461 + } 457 462 458 463 if (system_name && amp_name) { 459 464 if (!cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename, 460 - cirrus_dir, system_name, amp_name, "wmfw")) { 465 + base_name, system_name, amp_name, "wmfw")) { 461 466 cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 462 - cirrus_dir, system_name, amp_name, "bin"); 467 + base_name, system_name, amp_name, "bin"); 463 468 return; 464 469 } 465 470 } 466 471 467 472 if (system_name) { 468 473 if (!cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename, 469 - cirrus_dir, system_name, NULL, "wmfw")) { 474 + base_name, system_name, NULL, "wmfw")) { 470 475 if (amp_name) 471 476 cs35l56_hda_request_firmware_file(cs35l56, 472 477 coeff_firmware, coeff_filename, 473 - cirrus_dir, system_name, 478 + base_name, system_name, 474 479 amp_name, "bin"); 475 480 if (!*coeff_firmware) 476 481 cs35l56_hda_request_firmware_file(cs35l56, 477 482 coeff_firmware, coeff_filename, 478 - cirrus_dir, system_name, 483 + base_name, system_name, 479 484 NULL, "bin"); 480 485 return; 481 486 } 487 + 488 + /* 489 + * Check for system-specific bin files without wmfw before 490 + * falling back to generic firmware 491 + */ 492 + if (amp_name) 493 + cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 494 + base_name, system_name, amp_name, "bin"); 495 + if (!*coeff_firmware) 496 + cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 497 + base_name, system_name, NULL, "bin"); 498 + 499 + if (*coeff_firmware) 500 + return; 482 501 } 483 502 484 503 ret = cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename, 485 - cirrus_dir, NULL, NULL, "wmfw"); 504 + base_name, NULL, NULL, "wmfw"); 486 505 if (!ret) { 487 506 cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 488 - cirrus_dir, NULL, NULL, "bin"); 507 + base_name, NULL, NULL, "bin"); 489 508 return; 490 - } 491 - 492 - /* When a firmware file is not found must still search for the coeff files */ 493 - if (system_name) { 494 - if (amp_name) 495 - cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 496 - cirrus_dir, system_name, amp_name, "bin"); 497 - if (!*coeff_firmware) 498 - cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 499 - cirrus_dir, system_name, NULL, "bin"); 500 509 } 501 510 502 511 if (!*coeff_firmware) 503 512 cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename, 504 - cirrus_dir, NULL, NULL, "bin"); 513 + base_name, NULL, NULL, "bin"); 505 514 } 506 515 507 516 static void cs35l56_hda_release_firmware_files(const struct firmware *wmfw_firmware, ··· 553 526 const struct firmware *wmfw_firmware = NULL; 554 527 char *coeff_filename = NULL; 555 528 char *wmfw_filename = NULL; 556 - unsigned int firmware_missing; 529 + unsigned int preloaded_fw_ver; 530 + bool firmware_missing; 557 531 int ret = 0; 558 532 559 533 /* Prepare for a new DSP power-up */ ··· 565 537 566 538 pm_runtime_get_sync(cs35l56->base.dev); 567 539 568 - ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing); 569 - if (ret) { 570 - dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret); 571 - goto err_pm_put; 572 - } 573 - 574 - firmware_missing &= CS35L56_FIRMWARE_MISSING; 575 - 576 540 /* 577 - * Firmware can only be downloaded if the CS35L56 is secured or is 578 - * running from the built-in ROM. If it is secured the BIOS will have 579 - * downloaded firmware, and the wmfw/bin files will only contain 580 - * tunings that are safe to download with the firmware running. 541 + * The firmware can only be upgraded if it is currently running 542 + * from the built-in ROM. If not, the wmfw/bin must be for the 543 + * version of firmware that is running on the chip. 581 544 */ 582 - if (cs35l56->base.secured || firmware_missing) { 583 - cs35l56_hda_request_firmware_files(cs35l56, &wmfw_firmware, &wmfw_filename, 584 - &coeff_firmware, &coeff_filename); 585 - } 545 + ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &preloaded_fw_ver); 546 + if (ret) 547 + goto err_pm_put; 548 + 549 + if (firmware_missing) 550 + preloaded_fw_ver = 0; 551 + 552 + cs35l56_hda_request_firmware_files(cs35l56, preloaded_fw_ver, 553 + &wmfw_firmware, &wmfw_filename, 554 + &coeff_firmware, &coeff_filename); 586 555 587 556 /* 588 557 * If the BIOS didn't patch the firmware a bin file is mandatory to ··· 594 569 mutex_lock(&cs35l56->base.irq_lock); 595 570 596 571 /* 597 - * When the device is running in secure mode the firmware files can 598 - * only contain insecure tunings and therefore we do not need to 599 - * shutdown the firmware to apply them and can use the lower cost 600 - * reinit sequence instead. 572 + * If the firmware hasn't been patched it must be shutdown before 573 + * doing a full patch and reset afterwards. If it is already 574 + * running a patched version the firmware files only contain 575 + * tunings and we can use the lower cost reinit sequence instead. 601 576 */ 602 - if (!cs35l56->base.secured && (wmfw_firmware || coeff_firmware)) { 577 + if (firmware_missing && (wmfw_firmware || coeff_firmware)) { 603 578 ret = cs35l56_firmware_shutdown(&cs35l56->base); 604 579 if (ret) 605 580 goto err; ··· 618 593 if (coeff_filename) 619 594 dev_dbg(cs35l56->base.dev, "Loaded Coefficients: %s\n", coeff_filename); 620 595 621 - if (cs35l56->base.secured) { 596 + if (!firmware_missing) { 622 597 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); 623 598 if (ret) 624 599 goto err_powered_up; ··· 1001 976 1002 977 regmap_multi_reg_write(cs35l56->base.regmap, cs35l56_hda_dai_config, 1003 978 ARRAY_SIZE(cs35l56_hda_dai_config)); 979 + ret = cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base); 980 + if (ret) 981 + goto err; 1004 982 1005 983 /* 1006 984 * By default only enable one ASP1TXn, where n=amplifier index, ··· 1062 1034 cs35l56_hda_system_resume_no_irq) 1063 1035 }; 1064 1036 EXPORT_SYMBOL_NS_GPL(cs35l56_hda_pm_ops, SND_HDA_SCODEC_CS35L56); 1065 - 1066 - #if IS_ENABLED(CONFIG_SND_HDA_SCODEC_CS35L56_KUNIT_TEST) 1067 - /* Hooks to export static function to KUnit test */ 1068 - 1069 - int cs35l56_hda_test_hook_get_speaker_id(struct device *dev, int amp_index, int num_amps) 1070 - { 1071 - return cs35l56_hda_get_speaker_id(dev, amp_index, num_amps); 1072 - } 1073 - EXPORT_SYMBOL_NS_GPL(cs35l56_hda_test_hook_get_speaker_id, SND_HDA_SCODEC_CS35L56); 1074 - #endif 1075 1037 1076 1038 MODULE_DESCRIPTION("CS35L56 HDA Driver"); 1077 1039 MODULE_IMPORT_NS(SND_HDA_CIRRUS_SCODEC);
+4 -2
sound/pci/hda/hda_intel.c
··· 1729 1729 /* some exceptions: Atoms seem problematic with value 1 */ 1730 1730 if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) { 1731 1731 switch (chip->pci->device) { 1732 - case 0x0f04: /* Baytrail */ 1733 - case 0x2284: /* Braswell */ 1732 + case PCI_DEVICE_ID_INTEL_HDA_BYT: 1733 + case PCI_DEVICE_ID_INTEL_HDA_BSW: 1734 1734 return 32; 1735 + case PCI_DEVICE_ID_INTEL_HDA_APL: 1736 + return 64; 1735 1737 } 1736 1738 } 1737 1739
+1
sound/pci/hda/patch_cs8409.c
··· 1371 1371 spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1; 1372 1372 spec->scodecs[CS8409_CODEC1]->codec = codec; 1373 1373 spec->num_scodecs = 2; 1374 + spec->gen.suppress_vmaster = 1; 1374 1375 1375 1376 codec->patch_ops = cs8409_dolphin_patch_ops; 1376 1377
+13 -3
sound/pci/hda/patch_realtek.c
··· 439 439 alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000); 440 440 fallthrough; 441 441 case 0x10ec0215: 442 + case 0x10ec0285: 443 + case 0x10ec0289: 444 + alc_update_coef_idx(codec, 0x36, 1<<13, 0); 445 + fallthrough; 442 446 case 0x10ec0230: 443 447 case 0x10ec0233: 444 448 case 0x10ec0235: ··· 456 452 case 0x10ec0283: 457 453 case 0x10ec0286: 458 454 case 0x10ec0288: 459 - case 0x10ec0285: 460 455 case 0x10ec0298: 461 - case 0x10ec0289: 462 456 case 0x10ec0300: 463 457 alc_update_coef_idx(codec, 0x10, 1<<9, 0); 464 458 break; ··· 9579 9577 .type = HDA_FIXUP_FUNC, 9580 9578 .v.func = cs35l41_fixup_i2c_two, 9581 9579 .chained = true, 9582 - .chain_id = ALC269_FIXUP_THINKPAD_ACPI, 9580 + .chain_id = ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK, 9583 9581 }, 9584 9582 [ALC287_FIXUP_TAS2781_I2C] = { 9585 9583 .type = HDA_FIXUP_FUNC, ··· 9606 9604 [ALC287_FIXUP_THINKPAD_I2S_SPK] = { 9607 9605 .type = HDA_FIXUP_FUNC, 9608 9606 .v.func = alc287_fixup_bind_dacs, 9607 + .chained = true, 9608 + .chain_id = ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK, 9609 9609 }, 9610 9610 [ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD] = { 9611 9611 .type = HDA_FIXUP_FUNC, ··· 9657 9653 SND_PCI_QUIRK(0x1025, 0x1247, "Acer vCopperbox", ALC269VC_FIXUP_ACER_VCOPPERBOX_PINS), 9658 9654 SND_PCI_QUIRK(0x1025, 0x1248, "Acer Veriton N4660G", ALC269VC_FIXUP_ACER_MIC_NO_PRESENCE), 9659 9655 SND_PCI_QUIRK(0x1025, 0x1269, "Acer SWIFT SF314-54", ALC256_FIXUP_ACER_HEADSET_MIC), 9656 + SND_PCI_QUIRK(0x1025, 0x126a, "Acer Swift SF114-32", ALC256_FIXUP_ACER_MIC_NO_PRESENCE), 9660 9657 SND_PCI_QUIRK(0x1025, 0x128f, "Acer Veriton Z6860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), 9661 9658 SND_PCI_QUIRK(0x1025, 0x1290, "Acer Veriton Z4860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), 9662 9659 SND_PCI_QUIRK(0x1025, 0x1291, "Acer Veriton Z4660G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC), ··· 9737 9732 SND_PCI_QUIRK(0x1028, 0x0b71, "Dell Inspiron 16 Plus 7620", ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS), 9738 9733 SND_PCI_QUIRK(0x1028, 0x0beb, "Dell XPS 15 9530 (2023)", ALC289_FIXUP_DELL_CS35L41_SPI_2), 9739 9734 SND_PCI_QUIRK(0x1028, 0x0c03, "Dell Precision 5340", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE), 9735 + SND_PCI_QUIRK(0x1028, 0x0c0d, "Dell Oasis", ALC289_FIXUP_RTK_AMP_DUAL_SPK), 9740 9736 SND_PCI_QUIRK(0x1028, 0x0c19, "Dell Precision 3340", ALC236_FIXUP_DELL_DUAL_CODECS), 9741 9737 SND_PCI_QUIRK(0x1028, 0x0c1a, "Dell Precision 3340", ALC236_FIXUP_DELL_DUAL_CODECS), 9742 9738 SND_PCI_QUIRK(0x1028, 0x0c1b, "Dell Precision 3440", ALC236_FIXUP_DELL_DUAL_CODECS), ··· 9858 9852 SND_PCI_QUIRK(0x103c, 0x8786, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED), 9859 9853 SND_PCI_QUIRK(0x103c, 0x8787, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED), 9860 9854 SND_PCI_QUIRK(0x103c, 0x8788, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED), 9855 + SND_PCI_QUIRK(0x103c, 0x87b7, "HP Laptop 14-fq0xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), 9861 9856 SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED), 9862 9857 SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), 9863 9858 SND_PCI_QUIRK(0x103c, 0x87e7, "HP ProBook 450 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), ··· 9964 9957 SND_PCI_QUIRK(0x103c, 0x8c72, "HP EliteBook 865 G11", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED), 9965 9958 SND_PCI_QUIRK(0x103c, 0x8c96, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 9966 9959 SND_PCI_QUIRK(0x103c, 0x8c97, "HP ZBook", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 9960 + SND_PCI_QUIRK(0x103c, 0x8ca1, "HP ZBook Power", ALC236_FIXUP_HP_GPIO_LED), 9961 + SND_PCI_QUIRK(0x103c, 0x8ca2, "HP ZBook Power", ALC236_FIXUP_HP_GPIO_LED), 9967 9962 SND_PCI_QUIRK(0x103c, 0x8ca4, "HP ZBook Fury", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), 9968 9963 SND_PCI_QUIRK(0x103c, 0x8ca7, "HP ZBook Fury", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), 9969 9964 SND_PCI_QUIRK(0x103c, 0x8cf5, "HP ZBook Studio 16", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED), ··· 10331 10322 SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC), 10332 10323 SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC), 10333 10324 SND_PCI_QUIRK(0x2782, 0x0232, "CHUWI CoreBook XPro", ALC269VB_FIXUP_CHUWI_COREBOOK_XPRO), 10325 + SND_PCI_QUIRK(0x2782, 0x1707, "Vaio VJFE-ADL", ALC298_FIXUP_SPK_VOLUME), 10334 10326 SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC), 10335 10327 SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED), 10336 10328 SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", ALC256_FIXUP_INTEL_NUC10),
+14 -2
sound/soc/amd/acp/acp-mach-common.c
··· 505 505 506 506 clk_set_rate(drvdata->wclk, srate); 507 507 clk_set_rate(drvdata->bclk, srate * ch * format); 508 + if (!drvdata->soc_mclk) { 509 + ret = acp_clk_enable(drvdata, srate, ch * format); 510 + if (ret < 0) { 511 + dev_err(rtd->card->dev, "Failed to enable HS clk: %d\n", ret); 512 + return ret; 513 + } 514 + } 508 515 509 516 return 0; 510 517 } ··· 1471 1464 if (drv_data->amp_cpu_id == I2S_SP) { 1472 1465 links[i].name = "acp-amp-codec"; 1473 1466 links[i].id = AMP_BE_ID; 1474 - links[i].cpus = sof_sp_virtual; 1475 - links[i].num_cpus = ARRAY_SIZE(sof_sp_virtual); 1467 + if (drv_data->platform == RENOIR) { 1468 + links[i].cpus = sof_sp; 1469 + links[i].num_cpus = ARRAY_SIZE(sof_sp); 1470 + } else { 1471 + links[i].cpus = sof_sp_virtual; 1472 + links[i].num_cpus = ARRAY_SIZE(sof_sp_virtual); 1473 + } 1476 1474 links[i].platforms = sof_component; 1477 1475 links[i].num_platforms = ARRAY_SIZE(sof_component); 1478 1476 links[i].dpcm_playback = 1;
+4
sound/soc/amd/acp/acp-sof-mach.c
··· 48 48 .hs_codec_id = RT5682S, 49 49 .amp_codec_id = RT1019, 50 50 .dmic_codec_id = DMIC, 51 + .platform = RENOIR, 51 52 .tdm_mode = false, 52 53 }; 53 54 ··· 59 58 .hs_codec_id = RT5682S, 60 59 .amp_codec_id = MAX98360A, 61 60 .dmic_codec_id = DMIC, 61 + .platform = RENOIR, 62 62 .tdm_mode = false, 63 63 }; 64 64 ··· 70 68 .hs_codec_id = NAU8825, 71 69 .amp_codec_id = MAX98360A, 72 70 .dmic_codec_id = DMIC, 71 + .platform = REMBRANDT, 73 72 .soc_mclk = true, 74 73 .tdm_mode = false, 75 74 }; ··· 82 79 .hs_codec_id = RT5682S, 83 80 .amp_codec_id = RT1019, 84 81 .dmic_codec_id = DMIC, 82 + .platform = REMBRANDT, 85 83 .soc_mclk = true, 86 84 .tdm_mode = false, 87 85 };
+8
sound/soc/amd/acp/acp3x-es83xx/acp3x-es83xx.c
··· 358 358 .matches = { 359 359 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"), 360 360 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HVY-WXX9"), 361 + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "M1010"), 362 + }, 363 + .driver_data = (void *)(ES83XX_ENABLE_DMIC), 364 + }, 365 + { 366 + .matches = { 367 + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"), 368 + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HVY-WXX9"), 361 369 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "M1020"), 362 370 }, 363 371 .driver_data = (void *)(ES83XX_ENABLE_DMIC),
+7
sound/soc/amd/yc/acp6x-mach.c
··· 300 300 { 301 301 .driver_data = &acp6x_card, 302 302 .matches = { 303 + DMI_MATCH(DMI_BOARD_VENDOR, "Micro-Star International Co., Ltd."), 304 + DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 C7VF"), 305 + } 306 + }, 307 + { 308 + .driver_data = &acp6x_card, 309 + .matches = { 303 310 DMI_MATCH(DMI_BOARD_VENDOR, "Alienware"), 304 311 DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m17 R5 AMD"), 305 312 }
+122 -18
sound/soc/codecs/cs35l56-shared.c
··· 5 5 // Copyright (C) 2023 Cirrus Logic, Inc. and 6 6 // Cirrus Logic International Semiconductor Ltd. 7 7 8 + #include <linux/gpio/consumer.h> 8 9 #include <linux/regmap.h> 9 10 #include <linux/regulator/consumer.h> 10 11 #include <linux/types.h> ··· 13 12 #include "cs35l56.h" 14 13 15 14 static const struct reg_sequence cs35l56_patch[] = { 15 + /* 16 + * Firmware can change these to non-defaults to satisfy SDCA. 17 + * Ensure that they are at known defaults. 18 + */ 19 + { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 }, 20 + { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 }, 21 + { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 }, 22 + { CS35L56_SWIRE_DP3_CH4_INPUT, 0x00000028 }, 23 + 16 24 /* These are not reset by a soft-reset, so patch to defaults. */ 17 25 { CS35L56_MAIN_RENDER_USER_MUTE, 0x00000000 }, 18 26 { CS35L56_MAIN_RENDER_USER_VOLUME, 0x00000000 }, ··· 44 34 { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 }, 45 35 { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 }, 46 36 { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 }, 47 - { CS35L56_ASP1TX1_INPUT, 0x00000018 }, 48 - { CS35L56_ASP1TX2_INPUT, 0x00000019 }, 49 - { CS35L56_ASP1TX3_INPUT, 0x00000020 }, 50 - { CS35L56_ASP1TX4_INPUT, 0x00000028 }, 37 + 38 + /* no defaults for ASP1TX mixer */ 39 + 51 40 { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 }, 52 41 { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 }, 53 42 { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 }, ··· 203 194 return cs35l56_is_dsp_memory(reg); 204 195 } 205 196 } 197 + 198 + /* 199 + * The firmware boot sequence can overwrite the ASP1 config registers so that 200 + * they don't match regmap's view of their values. Rewrite the values from the 201 + * regmap cache into the hardware registers. 202 + */ 203 + int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base) 204 + { 205 + struct reg_sequence asp1_regs[] = { 206 + { .reg = CS35L56_ASP1_ENABLES1 }, 207 + { .reg = CS35L56_ASP1_CONTROL1 }, 208 + { .reg = CS35L56_ASP1_CONTROL2 }, 209 + { .reg = CS35L56_ASP1_CONTROL3 }, 210 + { .reg = CS35L56_ASP1_FRAME_CONTROL1 }, 211 + { .reg = CS35L56_ASP1_FRAME_CONTROL5 }, 212 + { .reg = CS35L56_ASP1_DATA_CONTROL1 }, 213 + { .reg = CS35L56_ASP1_DATA_CONTROL5 }, 214 + }; 215 + int i, ret; 216 + 217 + /* Read values from regmap cache into a write sequence */ 218 + for (i = 0; i < ARRAY_SIZE(asp1_regs); ++i) { 219 + ret = regmap_read(cs35l56_base->regmap, asp1_regs[i].reg, &asp1_regs[i].def); 220 + if (ret) 221 + goto err; 222 + } 223 + 224 + /* Write the values cache-bypassed so that they will be written to silicon */ 225 + ret = regmap_multi_reg_write_bypassed(cs35l56_base->regmap, asp1_regs, 226 + ARRAY_SIZE(asp1_regs)); 227 + if (ret) 228 + goto err; 229 + 230 + return 0; 231 + 232 + err: 233 + dev_err(cs35l56_base->dev, "Failed to sync ASP1 registers: %d\n", ret); 234 + 235 + return ret; 236 + } 237 + EXPORT_SYMBOL_NS_GPL(cs35l56_force_sync_asp1_registers_from_cache, SND_SOC_CS35L56_SHARED); 206 238 207 239 int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command) 208 240 { ··· 450 400 unsigned int val; 451 401 int ret; 452 402 453 - /* Nothing to re-patch if we haven't done any patching yet. */ 454 - if (!cs35l56_base->fw_patched) 455 - return false; 456 - 457 - /* 458 - * If we have control of RESET we will have asserted it so the firmware 459 - * will need re-patching. 460 - */ 461 - if (cs35l56_base->reset_gpio) 462 - return true; 463 - 464 403 /* 465 404 * In secure mode FIRMWARE_MISSING is cleared by the BIOS loader so 466 405 * can't be used here to test for memory retention. ··· 629 590 } 630 591 EXPORT_SYMBOL_NS_GPL(cs35l56_init_cs_dsp, SND_SOC_CS35L56_SHARED); 631 592 593 + int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base, 594 + bool *fw_missing, unsigned int *fw_version) 595 + { 596 + unsigned int prot_status; 597 + int ret; 598 + 599 + ret = regmap_read(cs35l56_base->regmap, CS35L56_PROTECTION_STATUS, &prot_status); 600 + if (ret) { 601 + dev_err(cs35l56_base->dev, "Get PROTECTION_STATUS failed: %d\n", ret); 602 + return ret; 603 + } 604 + 605 + *fw_missing = !!(prot_status & CS35L56_FIRMWARE_MISSING); 606 + 607 + ret = regmap_read(cs35l56_base->regmap, CS35L56_DSP1_FW_VER, fw_version); 608 + if (ret) { 609 + dev_err(cs35l56_base->dev, "Get FW VER failed: %d\n", ret); 610 + return ret; 611 + } 612 + 613 + return 0; 614 + } 615 + EXPORT_SYMBOL_NS_GPL(cs35l56_read_prot_status, SND_SOC_CS35L56_SHARED); 616 + 632 617 int cs35l56_hw_init(struct cs35l56_base *cs35l56_base) 633 618 { 634 619 int ret; 635 - unsigned int devid, revid, otpid, secured; 620 + unsigned int devid, revid, otpid, secured, fw_ver; 621 + bool fw_missing; 636 622 637 623 /* 638 624 * When the system is not using a reset_gpio ensure the device is ··· 716 652 return ret; 717 653 } 718 654 719 - dev_info(cs35l56_base->dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d\n", 720 - cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid); 655 + ret = cs35l56_read_prot_status(cs35l56_base, &fw_missing, &fw_ver); 656 + if (ret) 657 + return ret; 658 + 659 + dev_info(cs35l56_base->dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d fw:%d.%d.%d (patched=%u)\n", 660 + cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid, 661 + fw_ver >> 16, (fw_ver >> 8) & 0xff, fw_ver & 0xff, !fw_missing); 721 662 722 663 /* Wake source and *_BLOCKED interrupts default to unmasked, so mask them */ 723 664 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff); ··· 736 667 return 0; 737 668 } 738 669 EXPORT_SYMBOL_NS_GPL(cs35l56_hw_init, SND_SOC_CS35L56_SHARED); 670 + 671 + int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base) 672 + { 673 + struct gpio_descs *descs; 674 + int speaker_id; 675 + int i, ret; 676 + 677 + /* Read the speaker type qualifier from the motherboard GPIOs */ 678 + descs = gpiod_get_array_optional(cs35l56_base->dev, "spk-id", GPIOD_IN); 679 + if (!descs) { 680 + return -ENOENT; 681 + } else if (IS_ERR(descs)) { 682 + ret = PTR_ERR(descs); 683 + return dev_err_probe(cs35l56_base->dev, ret, "Failed to get spk-id-gpios\n"); 684 + } 685 + 686 + speaker_id = 0; 687 + for (i = 0; i < descs->ndescs; i++) { 688 + ret = gpiod_get_value_cansleep(descs->desc[i]); 689 + if (ret < 0) { 690 + dev_err_probe(cs35l56_base->dev, ret, "Failed to read spk-id[%d]\n", i); 691 + goto err; 692 + } 693 + 694 + speaker_id |= (ret << i); 695 + } 696 + 697 + dev_dbg(cs35l56_base->dev, "Speaker ID = %d\n", speaker_id); 698 + ret = speaker_id; 699 + err: 700 + gpiod_put_array(descs); 701 + 702 + return ret; 703 + } 704 + EXPORT_SYMBOL_NS_GPL(cs35l56_get_speaker_id, SND_SOC_CS35L56_SHARED); 739 705 740 706 static const u32 cs35l56_bclk_valid_for_pll_freq_table[] = { 741 707 [0x0C] = 128000,
+259 -48
sound/soc/codecs/cs35l56.c
··· 59 59 return snd_soc_put_volsw(kcontrol, ucontrol); 60 60 } 61 61 62 + static const unsigned short cs35l56_asp1_mixer_regs[] = { 63 + CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX2_INPUT, 64 + CS35L56_ASP1TX3_INPUT, CS35L56_ASP1TX4_INPUT, 65 + }; 66 + 67 + static const char * const cs35l56_asp1_mux_control_names[] = { 68 + "ASP1 TX1 Source", "ASP1 TX2 Source", "ASP1 TX3 Source", "ASP1 TX4 Source" 69 + }; 70 + 71 + static int cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol, 72 + struct snd_ctl_elem_value *ucontrol) 73 + { 74 + struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); 75 + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 76 + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 77 + int index = e->shift_l; 78 + unsigned int addr, val; 79 + int ret; 80 + 81 + /* Wait for mux to be initialized */ 82 + cs35l56_wait_dsp_ready(cs35l56); 83 + flush_work(&cs35l56->mux_init_work); 84 + 85 + addr = cs35l56_asp1_mixer_regs[index]; 86 + ret = regmap_read(cs35l56->base.regmap, addr, &val); 87 + if (ret) 88 + return ret; 89 + 90 + val &= CS35L56_ASP_TXn_SRC_MASK; 91 + ucontrol->value.enumerated.item[0] = snd_soc_enum_val_to_item(e, val); 92 + 93 + return 0; 94 + } 95 + 96 + static int cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol, 97 + struct snd_ctl_elem_value *ucontrol) 98 + { 99 + struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); 100 + struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); 101 + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 102 + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 103 + int item = ucontrol->value.enumerated.item[0]; 104 + int index = e->shift_l; 105 + unsigned int addr, val; 106 + bool changed; 107 + int ret; 108 + 109 + /* Wait for mux to be initialized */ 110 + cs35l56_wait_dsp_ready(cs35l56); 111 + flush_work(&cs35l56->mux_init_work); 112 + 113 + addr = cs35l56_asp1_mixer_regs[index]; 114 + val = snd_soc_enum_item_to_val(e, item); 115 + 116 + ret = regmap_update_bits_check(cs35l56->base.regmap, addr, 117 + CS35L56_ASP_TXn_SRC_MASK, val, &changed); 118 + if (!ret) 119 + return ret; 120 + 121 + if (changed) 122 + snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL); 123 + 124 + return changed; 125 + } 126 + 127 + static void cs35l56_mark_asp1_mixer_widgets_dirty(struct cs35l56_private *cs35l56) 128 + { 129 + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component); 130 + const char *prefix = cs35l56->component->name_prefix; 131 + char full_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 132 + const char *name; 133 + struct snd_kcontrol *kcontrol; 134 + struct soc_enum *e; 135 + unsigned int val[4]; 136 + int i, item, ret; 137 + 138 + /* 139 + * Resume so we can read the registers from silicon if the regmap 140 + * cache has not yet been populated. 141 + */ 142 + ret = pm_runtime_resume_and_get(cs35l56->base.dev); 143 + if (ret < 0) 144 + return; 145 + 146 + ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, 147 + val, ARRAY_SIZE(val)); 148 + 149 + pm_runtime_mark_last_busy(cs35l56->base.dev); 150 + pm_runtime_put_autosuspend(cs35l56->base.dev); 151 + 152 + if (ret) { 153 + dev_err(cs35l56->base.dev, "Failed to read ASP1 mixer regs: %d\n", ret); 154 + return; 155 + } 156 + 157 + snd_soc_card_mutex_lock(dapm->card); 158 + WARN_ON(!dapm->card->instantiated); 159 + 160 + for (i = 0; i < ARRAY_SIZE(cs35l56_asp1_mux_control_names); ++i) { 161 + name = cs35l56_asp1_mux_control_names[i]; 162 + 163 + if (prefix) { 164 + snprintf(full_name, sizeof(full_name), "%s %s", prefix, name); 165 + name = full_name; 166 + } 167 + 168 + kcontrol = snd_soc_card_get_kcontrol(dapm->card, name); 169 + if (!kcontrol) { 170 + dev_warn(cs35l56->base.dev, "Could not find control %s\n", name); 171 + continue; 172 + } 173 + 174 + e = (struct soc_enum *)kcontrol->private_value; 175 + item = snd_soc_enum_val_to_item(e, val[i] & CS35L56_ASP_TXn_SRC_MASK); 176 + snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL); 177 + } 178 + 179 + snd_soc_card_mutex_unlock(dapm->card); 180 + } 181 + 182 + static void cs35l56_mux_init_work(struct work_struct *work) 183 + { 184 + struct cs35l56_private *cs35l56 = container_of(work, 185 + struct cs35l56_private, 186 + mux_init_work); 187 + 188 + cs35l56_mark_asp1_mixer_widgets_dirty(cs35l56); 189 + } 190 + 62 191 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0); 63 192 64 193 static const struct snd_kcontrol_new cs35l56_controls[] = { ··· 206 77 }; 207 78 208 79 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum, 209 - CS35L56_ASP1TX1_INPUT, 210 - 0, CS35L56_ASP_TXn_SRC_MASK, 80 + SND_SOC_NOPM, 81 + 0, 0, 211 82 cs35l56_tx_input_texts, 212 83 cs35l56_tx_input_values); 213 84 214 85 static const struct snd_kcontrol_new asp1_tx1_mux = 215 - SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum); 86 + SOC_DAPM_ENUM_EXT("ASP1TX1 SRC", cs35l56_asp1tx1_enum, 87 + cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 216 88 217 89 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum, 218 - CS35L56_ASP1TX2_INPUT, 219 - 0, CS35L56_ASP_TXn_SRC_MASK, 90 + SND_SOC_NOPM, 91 + 1, 0, 220 92 cs35l56_tx_input_texts, 221 93 cs35l56_tx_input_values); 222 94 223 95 static const struct snd_kcontrol_new asp1_tx2_mux = 224 - SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum); 96 + SOC_DAPM_ENUM_EXT("ASP1TX2 SRC", cs35l56_asp1tx2_enum, 97 + cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 225 98 226 99 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum, 227 - CS35L56_ASP1TX3_INPUT, 228 - 0, CS35L56_ASP_TXn_SRC_MASK, 100 + SND_SOC_NOPM, 101 + 2, 0, 229 102 cs35l56_tx_input_texts, 230 103 cs35l56_tx_input_values); 231 104 232 105 static const struct snd_kcontrol_new asp1_tx3_mux = 233 - SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum); 106 + SOC_DAPM_ENUM_EXT("ASP1TX3 SRC", cs35l56_asp1tx3_enum, 107 + cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 234 108 235 109 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum, 236 - CS35L56_ASP1TX4_INPUT, 237 - 0, CS35L56_ASP_TXn_SRC_MASK, 110 + SND_SOC_NOPM, 111 + 3, 0, 238 112 cs35l56_tx_input_texts, 239 113 cs35l56_tx_input_values); 240 114 241 115 static const struct snd_kcontrol_new asp1_tx4_mux = 242 - SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum); 116 + SOC_DAPM_ENUM_EXT("ASP1TX4 SRC", cs35l56_asp1tx4_enum, 117 + cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); 243 118 244 119 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum, 245 120 CS35L56_SWIRE_DP3_CH1_INPUT, ··· 281 148 static const struct snd_kcontrol_new sdw1_tx4_mux = 282 149 SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum); 283 150 151 + static int cs35l56_asp1_cfg_event(struct snd_soc_dapm_widget *w, 152 + struct snd_kcontrol *kcontrol, int event) 153 + { 154 + struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 155 + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 156 + 157 + switch (event) { 158 + case SND_SOC_DAPM_PRE_PMU: 159 + /* Override register values set by firmware boot */ 160 + return cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base); 161 + default: 162 + return 0; 163 + } 164 + } 165 + 284 166 static int cs35l56_play_event(struct snd_soc_dapm_widget *w, 285 167 struct snd_kcontrol *kcontrol, int event) 286 168 { ··· 331 183 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = { 332 184 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0), 333 185 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0), 186 + 187 + SND_SOC_DAPM_SUPPLY("ASP1 CFG", SND_SOC_NOPM, 0, 0, cs35l56_asp1_cfg_event, 188 + SND_SOC_DAPM_PRE_PMU), 334 189 335 190 SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event, 336 191 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), ··· 401 250 static const struct snd_soc_dapm_route cs35l56_audio_map[] = { 402 251 { "AMP", NULL, "VDD_B" }, 403 252 { "AMP", NULL, "VDD_AMP" }, 253 + 254 + { "ASP1 Playback", NULL, "ASP1 CFG" }, 255 + { "ASP1 Capture", NULL, "ASP1 CFG" }, 404 256 405 257 { "ASP1 Playback", NULL, "PLAY" }, 406 258 { "SDW1 Playback", NULL, "PLAY" }, ··· 804 650 } 805 651 }; 806 652 807 - static void cs35l56_secure_patch(struct cs35l56_private *cs35l56) 653 + static void cs35l56_reinit_patch(struct cs35l56_private *cs35l56) 808 654 { 809 655 int ret; 810 656 ··· 816 662 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT); 817 663 } 818 664 819 - static void cs35l56_patch(struct cs35l56_private *cs35l56) 665 + static void cs35l56_patch(struct cs35l56_private *cs35l56, bool firmware_missing) 820 666 { 821 - unsigned int firmware_missing; 822 667 int ret; 823 - 824 - ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing); 825 - if (ret) { 826 - dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret); 827 - return; 828 - } 829 - 830 - firmware_missing &= CS35L56_FIRMWARE_MISSING; 831 668 832 669 /* 833 670 * Disable SoundWire interrupts to prevent race with IRQ work. ··· 892 747 struct cs35l56_private *cs35l56 = container_of(work, 893 748 struct cs35l56_private, 894 749 dsp_work); 750 + unsigned int firmware_version; 751 + bool firmware_missing; 752 + int ret; 895 753 896 754 if (!cs35l56->base.init_done) 897 755 return; 898 756 899 757 pm_runtime_get_sync(cs35l56->base.dev); 900 758 901 - /* 902 - * When the device is running in secure mode the firmware files can 903 - * only contain insecure tunings and therefore we do not need to 904 - * shutdown the firmware to apply them and can use the lower cost 905 - * reinit sequence instead. 906 - */ 907 - if (cs35l56->base.secured) 908 - cs35l56_secure_patch(cs35l56); 909 - else 910 - cs35l56_patch(cs35l56); 759 + ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &firmware_version); 760 + if (ret) 761 + goto err; 911 762 763 + /* Populate fw file qualifier with the revision and security state */ 764 + kfree(cs35l56->dsp.fwf_name); 765 + if (firmware_missing) { 766 + cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x-dsp1", cs35l56->base.rev); 767 + } else { 768 + /* Firmware files must match the running firmware version */ 769 + cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, 770 + "%02x%s-%06x-dsp1", 771 + cs35l56->base.rev, 772 + cs35l56->base.secured ? "-s" : "", 773 + firmware_version); 774 + } 775 + 776 + if (!cs35l56->dsp.fwf_name) 777 + goto err; 778 + 779 + dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n", 780 + cs35l56->dsp.fwf_name, cs35l56->dsp.system_name); 781 + 782 + /* 783 + * The firmware cannot be patched if it is already running from 784 + * patch RAM. In this case the firmware files are versioned to 785 + * match the running firmware version and will only contain 786 + * tunings. We do not need to shutdown the firmware to apply 787 + * tunings so can use the lower cost reinit sequence instead. 788 + */ 789 + if (!firmware_missing) 790 + cs35l56_reinit_patch(cs35l56); 791 + else 792 + cs35l56_patch(cs35l56, firmware_missing); 793 + 794 + 795 + /* 796 + * Set starting value of ASP1 mux widgets. Updating a mux takes 797 + * the DAPM mutex. Post this to a separate job so that DAPM 798 + * power-up can wait for dsp_work to complete without deadlocking 799 + * on the DAPM mutex. 800 + */ 801 + queue_work(cs35l56->dsp_wq, &cs35l56->mux_init_work); 802 + err: 912 803 pm_runtime_mark_last_busy(cs35l56->base.dev); 913 804 pm_runtime_put_autosuspend(cs35l56->base.dev); 914 805 } ··· 959 778 960 779 if (!cs35l56->dsp.system_name && 961 780 (snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) { 962 - cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 963 - GFP_KERNEL, 964 - "%04x%04x", 965 - vendor, device); 781 + /* Append a speaker qualifier if there is a speaker ID */ 782 + if (cs35l56->speaker_id >= 0) { 783 + cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 784 + GFP_KERNEL, 785 + "%04x%04x-spkid%d", 786 + vendor, device, 787 + cs35l56->speaker_id); 788 + } else { 789 + cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev, 790 + GFP_KERNEL, 791 + "%04x%04x", 792 + vendor, device); 793 + } 966 794 if (!cs35l56->dsp.system_name) 967 795 return -ENOMEM; 968 796 } ··· 999 809 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); 1000 810 1001 811 cancel_work_sync(&cs35l56->dsp_work); 812 + cancel_work_sync(&cs35l56->mux_init_work); 813 + 814 + if (cs35l56->dsp.cs_dsp.booted) 815 + wm_adsp_power_down(&cs35l56->dsp); 816 + 817 + wm_adsp2_component_remove(&cs35l56->dsp, component); 818 + 819 + kfree(cs35l56->dsp.fwf_name); 820 + cs35l56->dsp.fwf_name = NULL; 821 + 822 + cs35l56->component = NULL; 1002 823 } 1003 824 1004 825 static int cs35l56_set_bias_level(struct snd_soc_component *component, ··· 1070 869 1071 870 dev_dbg(dev, "system_suspend\n"); 1072 871 1073 - if (cs35l56->component) 872 + if (cs35l56->component) { 1074 873 flush_work(&cs35l56->dsp_work); 874 + cancel_work_sync(&cs35l56->mux_init_work); 875 + } 1075 876 1076 877 /* 1077 878 * The interrupt line is normally shared, but after we start suspending ··· 1224 1021 return -ENOMEM; 1225 1022 1226 1023 INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work); 1024 + INIT_WORK(&cs35l56->mux_init_work, cs35l56_mux_init_work); 1227 1025 1228 1026 dsp = &cs35l56->dsp; 1229 1027 cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp); ··· 1254 1050 if (ret < 0) 1255 1051 return 0; 1256 1052 1257 - cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL); 1053 + /* Append a speaker qualifier if there is a speaker ID */ 1054 + if (cs35l56->speaker_id >= 0) 1055 + cs35l56->dsp.system_name = devm_kasprintf(dev, GFP_KERNEL, "%s-spkid%d", 1056 + prop, cs35l56->speaker_id); 1057 + else 1058 + cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL); 1059 + 1258 1060 if (cs35l56->dsp.system_name == NULL) 1259 1061 return -ENOMEM; 1260 1062 ··· 1275 1065 1276 1066 init_completion(&cs35l56->init_completion); 1277 1067 mutex_init(&cs35l56->base.irq_lock); 1068 + cs35l56->speaker_id = -ENOENT; 1278 1069 1279 1070 dev_set_drvdata(cs35l56->base.dev, cs35l56); 1280 1071 ··· 1311 1100 cs35l56_wait_min_reset_pulse(); 1312 1101 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1); 1313 1102 } 1103 + 1104 + ret = cs35l56_get_speaker_id(&cs35l56->base); 1105 + if ((ret < 0) && (ret != -ENOENT)) 1106 + goto err; 1107 + 1108 + cs35l56->speaker_id = ret; 1314 1109 1315 1110 ret = cs35l56_get_firmware_uid(cs35l56); 1316 1111 if (ret != 0) ··· 1369 1152 if (ret < 0) 1370 1153 return ret; 1371 1154 1372 - /* Populate the DSP information with the revision and security state */ 1373 - cs35l56->dsp.part = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, "cs35l56%s-%02x", 1374 - cs35l56->base.secured ? "s" : "", cs35l56->base.rev); 1375 - if (!cs35l56->dsp.part) 1376 - return -ENOMEM; 1155 + ret = cs35l56_set_patch(&cs35l56->base); 1156 + if (ret) 1157 + return ret; 1377 1158 1378 1159 if (!cs35l56->base.reset_gpio) { 1379 1160 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n"); ··· 1402 1187 1403 1188 /* Disable auto-hibernate so that runtime_pm has control */ 1404 1189 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE); 1405 - if (ret) 1406 - return ret; 1407 - 1408 - ret = cs35l56_set_patch(&cs35l56->base); 1409 1190 if (ret) 1410 1191 return ret; 1411 1192
+2
sound/soc/codecs/cs35l56.h
··· 34 34 struct wm_adsp dsp; /* must be first member */ 35 35 struct cs35l56_base base; 36 36 struct work_struct dsp_work; 37 + struct work_struct mux_init_work; 37 38 struct workqueue_struct *dsp_wq; 38 39 struct snd_soc_component *component; 39 40 struct regulator_bulk_data supplies[CS35L56_NUM_BULK_SUPPLIES]; ··· 45 44 bool sdw_attached; 46 45 struct completion init_completion; 47 46 47 + int speaker_id; 48 48 u32 rx_mask; 49 49 u32 tx_mask; 50 50 u8 asp_slot_width;
+139 -47
sound/soc/codecs/es8326.c
··· 45 45 int jack_remove_retry; 46 46 }; 47 47 48 + static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol, 49 + struct snd_ctl_elem_value *ucontrol) 50 + { 51 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 52 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 53 + unsigned int crosstalk_h, crosstalk_l; 54 + unsigned int crosstalk; 55 + 56 + regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); 57 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 58 + crosstalk_h &= 0x20; 59 + crosstalk_l &= 0xf0; 60 + crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4; 61 + ucontrol->value.integer.value[0] = crosstalk; 62 + 63 + return 0; 64 + } 65 + 66 + static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol, 67 + struct snd_ctl_elem_value *ucontrol) 68 + { 69 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 70 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 71 + unsigned int crosstalk_h, crosstalk_l; 72 + unsigned int crosstalk; 73 + 74 + crosstalk = ucontrol->value.integer.value[0]; 75 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 76 + crosstalk_h = (crosstalk & 0x10) << 1; 77 + crosstalk_l &= 0x0f; 78 + crosstalk_l |= (crosstalk & 0x0f) << 4; 79 + regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, 80 + 0x20, crosstalk_h); 81 + regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); 82 + 83 + return 0; 84 + } 85 + 86 + static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol, 87 + struct snd_ctl_elem_value *ucontrol) 88 + { 89 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 90 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 91 + unsigned int crosstalk_h, crosstalk_l; 92 + unsigned int crosstalk; 93 + 94 + regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); 95 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 96 + crosstalk_h &= 0x10; 97 + crosstalk_l &= 0x0f; 98 + crosstalk = crosstalk_h | crosstalk_l; 99 + ucontrol->value.integer.value[0] = crosstalk; 100 + 101 + return 0; 102 + } 103 + 104 + static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol, 105 + struct snd_ctl_elem_value *ucontrol) 106 + { 107 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 108 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 109 + unsigned int crosstalk_h, crosstalk_l; 110 + unsigned int crosstalk; 111 + 112 + crosstalk = ucontrol->value.integer.value[0]; 113 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 114 + crosstalk_h = crosstalk & 0x10; 115 + crosstalk_l &= 0xf0; 116 + crosstalk_l |= crosstalk & 0x0f; 117 + regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, 118 + 0x10, crosstalk_h); 119 + regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); 120 + 121 + return 0; 122 + } 123 + 48 124 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 49 125 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 50 126 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); ··· 178 102 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 179 103 0, 0x0f, 0, drc_target_tlv), 180 104 105 + SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0, 106 + es8326_crosstalk1_get, es8326_crosstalk1_set), 107 + SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0, 108 + es8326_crosstalk2_get, es8326_crosstalk2_set), 181 109 }; 182 110 183 111 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { ··· 196 116 /* Digital Interface */ 197 117 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 198 118 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 199 - 200 - /* ADC Digital Mute */ 201 - SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0), 202 - SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0), 203 - SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0), 204 - SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0), 205 119 206 120 /* Analog Power Supply*/ 207 121 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), ··· 216 142 }; 217 143 218 144 static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 219 - {"ADC L1", NULL, "MIC1"}, 220 - {"ADC R1", NULL, "MIC2"}, 221 - {"ADC L2", NULL, "MIC3"}, 222 - {"ADC R2", NULL, "MIC4"}, 223 - 224 - {"ADC L", NULL, "ADC L1"}, 225 - {"ADC R", NULL, "ADC R1"}, 226 - {"ADC L", NULL, "ADC L2"}, 227 - {"ADC R", NULL, "ADC R2"}, 145 + {"ADC L", NULL, "MIC1"}, 146 + {"ADC R", NULL, "MIC2"}, 147 + {"ADC L", NULL, "MIC3"}, 148 + {"ADC R", NULL, "MIC4"}, 228 149 229 150 {"I2S OUT", NULL, "ADC L"}, 230 151 {"I2S OUT", NULL, "ADC R"}, ··· 509 440 unsigned int offset_l, offset_r; 510 441 511 442 if (mute) { 512 - regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 513 - regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 514 - ES8326_MUTE_MASK, ES8326_MUTE); 515 - regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0); 443 + if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 444 + regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 445 + regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 446 + ES8326_MUTE_MASK, ES8326_MUTE); 447 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 448 + 0x30, 0x00); 449 + } else { 450 + regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE, 451 + 0x0F, 0x0F); 452 + } 516 453 } else { 517 454 if (!es8326->calibrated) { 518 455 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL); ··· 531 456 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r); 532 457 es8326->calibrated = true; 533 458 } 534 - regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 535 - regmap_write(es8326->regmap, ES8326_HP_VOL, 0x91); 536 - regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 537 - regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 538 - ES8326_MUTE_MASK, ~(ES8326_MUTE)); 459 + if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 460 + regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01); 461 + usleep_range(1000, 5000); 462 + regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00); 463 + usleep_range(1000, 5000); 464 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20); 465 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30); 466 + regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 467 + regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 468 + regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 469 + ES8326_MUTE_MASK, ~(ES8326_MUTE)); 470 + } else { 471 + msleep(300); 472 + regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE, 473 + 0x0F, 0x00); 474 + } 539 475 } 540 476 return 0; 541 477 } ··· 563 477 if (ret) 564 478 return ret; 565 479 566 - regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00); 480 + regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02); 481 + usleep_range(5000, 10000); 567 482 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 568 483 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 569 484 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 570 - regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 571 485 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 572 486 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 573 487 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20); 574 - 575 - regmap_update_bits(es8326->regmap, ES8326_RESET, 576 - ES8326_CSM_ON, ES8326_CSM_ON); 488 + regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00); 577 489 break; 578 490 case SND_SOC_BIAS_PREPARE: 579 491 break; 580 492 case SND_SOC_BIAS_STANDBY: 581 493 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 582 - regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); 583 494 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00); 584 495 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 585 496 break; ··· 596 513 .set_fmt = es8326_set_dai_fmt, 597 514 .set_sysclk = es8326_set_dai_sysclk, 598 515 .mute_stream = es8326_mute, 599 - .no_capture_mute = 1, 516 + .no_capture_mute = 0, 600 517 }; 601 518 602 519 static struct snd_soc_dai_driver es8326_dai = { ··· 755 672 es8326->hp = 0; 756 673 } 757 674 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 675 + regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a); 676 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03); 758 677 /* 759 678 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event 760 679 */ ··· 780 695 * Don't report jack status. 781 696 */ 782 697 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 698 + es8326_enable_micbias(es8326->component); 783 699 usleep_range(50000, 70000); 784 700 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 701 + regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f); 702 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08); 785 703 queue_delayed_work(system_wq, &es8326->jack_detect_work, 786 704 msecs_to_jiffies(400)); 787 705 es8326->hp = 1; ··· 824 736 static irqreturn_t es8326_irq(int irq, void *dev_id) 825 737 { 826 738 struct es8326_priv *es8326 = dev_id; 827 - struct snd_soc_component *comp = es8326->component; 828 739 829 740 if (!es8326->jack) 830 741 goto out; 831 - 832 - es8326_enable_micbias(comp); 833 742 834 743 if (es8326->jack->status & SND_JACK_HEADSET) 835 744 queue_delayed_work(system_wq, &es8326->jack_detect_work, ··· 851 766 if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) { 852 767 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n"); 853 768 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0); 854 - regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01); 769 + regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03); 855 770 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30); 856 771 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed); 857 772 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08); 858 773 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1); 859 774 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03); 860 775 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f); 861 - regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03); 776 + regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23); 862 777 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88); 863 778 usleep_range(15000, 20000); 864 779 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); ··· 899 814 /* reset internal clock state */ 900 815 regmap_write(es8326->regmap, ES8326_RESET, 0x1f); 901 816 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 817 + regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0); 902 818 usleep_range(10000, 15000); 903 819 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9); 904 - regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4b); 820 + regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb); 905 821 /* set headphone default type and detect pin */ 906 822 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83); 907 823 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 908 - regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30); 909 824 910 825 /* set internal oscillator as clock source of headpone cp */ 911 826 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89); ··· 913 828 /* clock manager reset release */ 914 829 regmap_write(es8326->regmap, ES8326_RESET, 0x17); 915 830 /* set headphone detection as half scan mode */ 916 - regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30); 831 + regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d); 917 832 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00); 918 833 919 834 /* enable headphone driver */ 835 + regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4); 920 836 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7); 921 837 usleep_range(2000, 5000); 922 - regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xa3); 923 - regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xb3); 838 + regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23); 839 + regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33); 924 840 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 925 841 926 842 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); ··· 930 844 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00); 931 845 /* calibrate for B version */ 932 846 es8326_calibrate(component); 847 + regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa); 848 + regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00); 933 849 /* turn off headphone out */ 934 850 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00); 935 851 /* set ADC and DAC in low power mode */ ··· 944 856 regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08); 945 857 regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15); 946 858 859 + regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 | 860 + ((es8326->version == ES8326_VERSION_B) ? 861 + (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) : 862 + (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04))); 863 + usleep_range(5000, 10000); 864 + es8326_enable_micbias(es8326->component); 865 + usleep_range(50000, 70000); 866 + regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 947 867 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 948 868 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON)); 949 869 regmap_write(es8326->regmap, ES8326_INTOUT_IO, ··· 960 864 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 961 865 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 962 866 963 - regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 867 + regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 964 868 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 965 869 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK, 966 870 ES8326_MIC1_SEL); ··· 968 872 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK, 969 873 ES8326_MUTE); 970 874 971 - regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 | 972 - ((es8326->version == ES8326_VERSION_B) ? 973 - (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) : 974 - (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04))); 975 - regmap_write(es8326->regmap, ES8326_HP_VOL, 0x11); 875 + regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f); 976 876 977 877 es8326->jack_remove_retry = 0; 978 878 es8326->hp = 0;
+2 -1
sound/soc/codecs/es8326.h
··· 72 72 #define ES8326_DAC_VOL 0x50 73 73 #define ES8326_DRC_RECOVERY 0x53 74 74 #define ES8326_DRC_WINSIZE 0x54 75 + #define ES8326_DAC_CROSSTALK 0x55 75 76 #define ES8326_HPJACK_TIMER 0x56 76 77 #define ES8326_HPDET_TYPE 0x57 77 78 #define ES8326_INT_SOURCE 0x58 ··· 101 100 #define ES8326_MUTE (3 << 0) 102 101 103 102 /* ES8326_CLK_CTL */ 104 - #define ES8326_CLK_ON (0x7f << 0) 103 + #define ES8326_CLK_ON (0x7e << 0) 105 104 #define ES8326_CLK_OFF (0 << 0) 106 105 107 106 /* ES8326_CLK_INV */
-7
sound/soc/codecs/lpass-wsa-macro.c
··· 1584 1584 u16 gain_reg; 1585 1585 u16 reg; 1586 1586 int val; 1587 - int offset_val = 0; 1588 1587 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); 1589 1588 1590 1589 if (w->shift == WSA_MACRO_COMP1) { ··· 1622 1623 CDC_WSA_RX1_RX_PATH_MIX_SEC0, 1623 1624 CDC_WSA_RX_PGA_HALF_DB_MASK, 1624 1625 CDC_WSA_RX_PGA_HALF_DB_ENABLE); 1625 - offset_val = -2; 1626 1626 } 1627 1627 val = snd_soc_component_read(component, gain_reg); 1628 - val += offset_val; 1629 1628 snd_soc_component_write(component, gain_reg, val); 1630 1629 wsa_macro_config_ear_spkr_gain(component, wsa, 1631 1630 event, gain_reg); ··· 1651 1654 CDC_WSA_RX1_RX_PATH_MIX_SEC0, 1652 1655 CDC_WSA_RX_PGA_HALF_DB_MASK, 1653 1656 CDC_WSA_RX_PGA_HALF_DB_DISABLE); 1654 - offset_val = 2; 1655 - val = snd_soc_component_read(component, gain_reg); 1656 - val += offset_val; 1657 - snd_soc_component_write(component, gain_reg, val); 1658 1657 } 1659 1658 wsa_macro_config_ear_spkr_gain(component, wsa, 1660 1659 event, gain_reg);
-4
sound/soc/codecs/wcd9335.c
··· 3033 3033 { 3034 3034 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); 3035 3035 u16 gain_reg; 3036 - int offset_val = 0; 3037 3036 int val = 0; 3038 3037 3039 3038 switch (w->reg) { ··· 3072 3073 switch (event) { 3073 3074 case SND_SOC_DAPM_POST_PMU: 3074 3075 val = snd_soc_component_read(comp, gain_reg); 3075 - val += offset_val; 3076 3076 snd_soc_component_write(comp, gain_reg, val); 3077 3077 break; 3078 3078 case SND_SOC_DAPM_POST_PMD: ··· 3292 3294 u16 gain_reg; 3293 3295 u16 reg; 3294 3296 int val; 3295 - int offset_val = 0; 3296 3297 3297 3298 if (!(snd_soc_dapm_widget_name_cmp(w, "RX INT0 INTERP"))) { 3298 3299 reg = WCD9335_CDC_RX0_RX_PATH_CTL; ··· 3334 3337 case SND_SOC_DAPM_POST_PMU: 3335 3338 wcd9335_config_compander(comp, w->shift, event); 3336 3339 val = snd_soc_component_read(comp, gain_reg); 3337 - val += offset_val; 3338 3340 snd_soc_component_write(comp, gain_reg, val); 3339 3341 break; 3340 3342 case SND_SOC_DAPM_POST_PMD:
-1
sound/soc/codecs/wcd934x.c
··· 13 13 #include <linux/of.h> 14 14 #include <linux/platform_device.h> 15 15 #include <linux/regmap.h> 16 - #include <linux/regulator/consumer.h> 17 16 #include <linux/slab.h> 18 17 #include <linux/slimbus.h> 19 18 #include <sound/pcm_params.h>
+3 -5
sound/soc/codecs/wcd938x.c
··· 210 210 }; 211 211 212 212 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800); 213 - static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, -3000); 213 + static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, 0); 214 214 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(analog_gain, 0, 3000); 215 215 216 216 struct wcd938x_mbhc_zdet_param { ··· 3587 3587 mutex_init(&wcd938x->micb_lock); 3588 3588 3589 3589 ret = wcd938x_populate_dt_data(wcd938x, dev); 3590 - if (ret) { 3591 - dev_err(dev, "%s: Fail to obtain platform data\n", __func__); 3592 - return -EINVAL; 3593 - } 3590 + if (ret) 3591 + return ret; 3594 3592 3595 3593 ret = wcd938x_add_slave_components(wcd938x, dev, &match); 3596 3594 if (ret)
+31 -42
sound/soc/codecs/wm_adsp.c
··· 739 739 const char *filetype) 740 740 { 741 741 struct cs_dsp *cs_dsp = &dsp->cs_dsp; 742 + const char *fwf; 742 743 char *s, c; 743 744 int ret = 0; 744 745 746 + if (dsp->fwf_name) 747 + fwf = dsp->fwf_name; 748 + else 749 + fwf = dsp->cs_dsp.name; 750 + 745 751 if (system_name && asoc_component_prefix) 746 752 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, dsp->part, 747 - dsp->fwf_name, wm_adsp_fw[dsp->fw].file, system_name, 753 + fwf, wm_adsp_fw[dsp->fw].file, system_name, 748 754 asoc_component_prefix, filetype); 749 755 else if (system_name) 750 756 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, dsp->part, 751 - dsp->fwf_name, wm_adsp_fw[dsp->fw].file, system_name, 757 + fwf, wm_adsp_fw[dsp->fw].file, system_name, 752 758 filetype); 753 759 else 754 - *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, dsp->part, dsp->fwf_name, 760 + *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, dsp->part, fwf, 755 761 wm_adsp_fw[dsp->fw].file, filetype); 756 762 757 763 if (*filename == NULL) ··· 829 823 } 830 824 } 831 825 826 + /* Check system-specific bin without wmfw before falling back to generic */ 827 + if (dsp->wmfw_optional && system_name) { 828 + if (asoc_component_prefix) 829 + wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 830 + cirrus_dir, system_name, 831 + asoc_component_prefix, "bin"); 832 + 833 + if (!*coeff_firmware) 834 + wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 835 + cirrus_dir, system_name, 836 + NULL, "bin"); 837 + 838 + if (*coeff_firmware) 839 + return 0; 840 + } 841 + 842 + /* Check legacy location */ 832 843 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename, 833 844 "", NULL, NULL, "wmfw")) { 834 845 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, ··· 853 830 return 0; 854 831 } 855 832 833 + /* Fall back to generic wmfw and optional matching bin */ 856 834 ret = wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename, 857 835 cirrus_dir, NULL, NULL, "wmfw"); 858 - if (!ret) { 836 + if (!ret || dsp->wmfw_optional) { 859 837 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 860 838 cirrus_dir, NULL, NULL, "bin"); 861 839 return 0; 862 840 } 863 841 864 - if (dsp->wmfw_optional) { 865 - if (system_name) { 866 - if (asoc_component_prefix) 867 - wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 868 - cirrus_dir, system_name, 869 - asoc_component_prefix, "bin"); 870 - 871 - if (!*coeff_firmware) 872 - wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 873 - cirrus_dir, system_name, 874 - NULL, "bin"); 875 - } 876 - 877 - if (!*coeff_firmware) 878 - wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 879 - "", NULL, NULL, "bin"); 880 - 881 - if (!*coeff_firmware) 882 - wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename, 883 - cirrus_dir, NULL, NULL, "bin"); 884 - 885 - return 0; 886 - } 887 - 888 842 adsp_err(dsp, "Failed to request firmware <%s>%s-%s-%s<-%s<%s>>.wmfw\n", 889 - cirrus_dir, dsp->part, dsp->fwf_name, wm_adsp_fw[dsp->fw].file, 890 - system_name, asoc_component_prefix); 843 + cirrus_dir, dsp->part, 844 + dsp->fwf_name ? dsp->fwf_name : dsp->cs_dsp.name, 845 + wm_adsp_fw[dsp->fw].file, system_name, asoc_component_prefix); 891 846 892 847 return -ENOENT; 893 848 } 894 849 895 850 static int wm_adsp_common_init(struct wm_adsp *dsp) 896 851 { 897 - char *p; 898 - 899 852 INIT_LIST_HEAD(&dsp->compr_list); 900 853 INIT_LIST_HEAD(&dsp->buffer_list); 901 - 902 - if (!dsp->fwf_name) { 903 - p = devm_kstrdup(dsp->cs_dsp.dev, dsp->cs_dsp.name, GFP_KERNEL); 904 - if (!p) 905 - return -ENOMEM; 906 - 907 - dsp->fwf_name = p; 908 - for (; *p != 0; ++p) 909 - *p = tolower(*p); 910 - } 911 854 912 855 return 0; 913 856 }
+5 -1
sound/soc/codecs/wsa883x.c
··· 1098 1098 return 1; 1099 1099 } 1100 1100 1101 - static const DECLARE_TLV_DB_SCALE(pa_gain, -300, 150, -300); 1101 + static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(pa_gain, 1102 + 0, 14, TLV_DB_SCALE_ITEM(-300, 0, 0), 1103 + 15, 29, TLV_DB_SCALE_ITEM(-300, 150, 0), 1104 + 30, 31, TLV_DB_SCALE_ITEM(1800, 0, 0), 1105 + ); 1102 1106 1103 1107 static int wsa883x_get_swr_port(struct snd_kcontrol *kcontrol, 1104 1108 struct snd_ctl_elem_value *ucontrol)
+7 -5
sound/soc/qcom/sc8280xp.c
··· 32 32 case WSA_CODEC_DMA_RX_0: 33 33 case WSA_CODEC_DMA_RX_1: 34 34 /* 35 - * set limit of 0dB on Digital Volume for Speakers, 36 - * this can prevent damage of speakers to some extent without 37 - * active speaker protection 35 + * Set limit of -3 dB on Digital Volume and 0 dB on PA Volume 36 + * to reduce the risk of speaker damage until we have active 37 + * speaker protection in place. 38 38 */ 39 - snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 84); 40 - snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 84); 39 + snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 81); 40 + snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 81); 41 + snd_soc_limit_volume(card, "SpkrLeft PA Volume", 17); 42 + snd_soc_limit_volume(card, "SpkrRight PA Volume", 17); 41 43 break; 42 44 default: 43 45 break;
+4 -1
sound/soc/soc-core.c
··· 1037 1037 return -EINVAL; 1038 1038 } 1039 1039 1040 - #define MAX_DEFAULT_CH_MAP_SIZE 7 1040 + #define MAX_DEFAULT_CH_MAP_SIZE 8 1041 1041 static struct snd_soc_dai_link_ch_map default_ch_map_sync[MAX_DEFAULT_CH_MAP_SIZE] = { 1042 1042 { .cpu = 0, .codec = 0 }, 1043 1043 { .cpu = 1, .codec = 1 }, ··· 1046 1046 { .cpu = 4, .codec = 4 }, 1047 1047 { .cpu = 5, .codec = 5 }, 1048 1048 { .cpu = 6, .codec = 6 }, 1049 + { .cpu = 7, .codec = 7 }, 1049 1050 }; 1050 1051 static struct snd_soc_dai_link_ch_map default_ch_map_1cpu[MAX_DEFAULT_CH_MAP_SIZE] = { 1051 1052 { .cpu = 0, .codec = 0 }, ··· 1056 1055 { .cpu = 0, .codec = 4 }, 1057 1056 { .cpu = 0, .codec = 5 }, 1058 1057 { .cpu = 0, .codec = 6 }, 1058 + { .cpu = 0, .codec = 7 }, 1059 1059 }; 1060 1060 static struct snd_soc_dai_link_ch_map default_ch_map_1codec[MAX_DEFAULT_CH_MAP_SIZE] = { 1061 1061 { .cpu = 0, .codec = 0 }, ··· 1066 1064 { .cpu = 4, .codec = 0 }, 1067 1065 { .cpu = 5, .codec = 0 }, 1068 1066 { .cpu = 6, .codec = 0 }, 1067 + { .cpu = 7, .codec = 0 }, 1069 1068 }; 1070 1069 static int snd_soc_compensate_channel_connection_map(struct snd_soc_card *card, 1071 1070 struct snd_soc_dai_link *dai_link)
+5
sound/soc/sunxi/sun4i-spdif.c
··· 577 577 .compatible = "allwinner,sun50i-h6-spdif", 578 578 .data = &sun50i_h6_spdif_quirks, 579 579 }, 580 + { 581 + .compatible = "allwinner,sun50i-h616-spdif", 582 + /* Essentially the same as the H6, but without RX */ 583 + .data = &sun50i_h6_spdif_quirks, 584 + }, 580 585 { /* sentinel */ } 581 586 }; 582 587 MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
+32 -2
sound/usb/clock.c
··· 261 261 int ret, i, cur, err, pins, clock_id; 262 262 const u8 *sources; 263 263 int proto = fmt->protocol; 264 + bool readable, writeable; 265 + u32 bmControls; 264 266 265 267 entity_id &= 0xff; 266 268 ··· 294 292 sources = GET_VAL(selector, proto, baCSourceID); 295 293 cur = 0; 296 294 295 + if (proto == UAC_VERSION_3) 296 + bmControls = le32_to_cpu(*(__le32 *)(&selector->v3.baCSourceID[0] + pins)); 297 + else 298 + bmControls = *(__u8 *)(&selector->v2.baCSourceID[0] + pins); 299 + 300 + readable = uac_v2v3_control_is_readable(bmControls, 301 + UAC2_CX_CLOCK_SELECTOR); 302 + writeable = uac_v2v3_control_is_writeable(bmControls, 303 + UAC2_CX_CLOCK_SELECTOR); 304 + 297 305 if (pins == 1) { 298 306 ret = 1; 299 307 goto find_source; 300 308 } 309 + 310 + /* for now just warn about buggy device */ 311 + if (!readable) 312 + usb_audio_warn(chip, 313 + "%s(): clock selector control is not readable, id %d\n", 314 + __func__, clock_id); 301 315 302 316 /* the entity ID we are looking at is a selector. 303 317 * find out what it currently selects */ ··· 343 325 visited, validate); 344 326 if (ret > 0) { 345 327 /* Skip setting clock selector again for some devices */ 346 - if (chip->quirk_flags & QUIRK_FLAG_SKIP_CLOCK_SELECTOR) 328 + if (chip->quirk_flags & QUIRK_FLAG_SKIP_CLOCK_SELECTOR || 329 + !writeable) 347 330 return ret; 348 331 err = uac_clock_selector_set_val(chip, entity_id, cur); 349 - if (err < 0) 332 + if (err < 0) { 333 + if (pins == 1) { 334 + usb_audio_dbg(chip, 335 + "%s(): selector returned an error, " 336 + "assuming a firmware bug, id %d, ret %d\n", 337 + __func__, clock_id, err); 338 + return ret; 339 + } 350 340 return err; 341 + } 351 342 } 352 343 353 344 if (!validate || ret > 0 || !chip->autoclock) 354 345 return ret; 355 346 356 347 find_others: 348 + if (!writeable) 349 + return -ENXIO; 350 + 357 351 /* The current clock source is invalid, try others. */ 358 352 for (i = 1; i <= pins; i++) { 359 353 if (i == cur)
+20
sound/usb/format.c
··· 470 470 int clock) 471 471 { 472 472 struct usb_device *dev = chip->dev; 473 + struct usb_host_interface *alts; 473 474 unsigned int *table; 474 475 unsigned int nr_rates; 475 476 int i, err; 477 + u32 bmControls; 476 478 477 479 /* performing the rate verification may lead to unexpected USB bus 478 480 * behavior afterwards by some unknown reason. Do this only for the ··· 482 480 */ 483 481 if (!(chip->quirk_flags & QUIRK_FLAG_VALIDATE_RATES)) 484 482 return 0; /* don't perform the validation as default */ 483 + 484 + alts = snd_usb_get_host_interface(chip, fp->iface, fp->altsetting); 485 + if (!alts) 486 + return 0; 487 + 488 + if (fp->protocol == UAC_VERSION_3) { 489 + struct uac3_as_header_descriptor *as = snd_usb_find_csint_desc( 490 + alts->extra, alts->extralen, NULL, UAC_AS_GENERAL); 491 + bmControls = le32_to_cpu(as->bmControls); 492 + } else { 493 + struct uac2_as_header_descriptor *as = snd_usb_find_csint_desc( 494 + alts->extra, alts->extralen, NULL, UAC_AS_GENERAL); 495 + bmControls = as->bmControls; 496 + } 497 + 498 + if (!uac_v2v3_control_is_readable(bmControls, 499 + UAC2_AS_VAL_ALT_SETTINGS)) 500 + return 0; 485 501 486 502 table = kcalloc(fp->nr_rates, sizeof(*table), GFP_KERNEL); 487 503 if (!table)
+1 -1
sound/usb/midi2.c
··· 1085 1085 } 1086 1086 if ((quirk && quirk->type != QUIRK_MIDI_STANDARD_INTERFACE) || 1087 1087 iface->num_altsetting < 2) { 1088 - usb_audio_info(chip, "Quirk or no altest; falling back to MIDI 1.0\n"); 1088 + usb_audio_info(chip, "Quirk or no altset; falling back to MIDI 1.0\n"); 1089 1089 goto fallback_to_midi1; 1090 1090 } 1091 1091 hostif = &iface->altsetting[1];
+22 -16
sound/usb/quirks.c
··· 2031 2031 QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_IGNORE_CTL_ERROR), 2032 2032 DEVICE_FLG(0x0499, 0x1509, /* Steinberg UR22 */ 2033 2033 QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2034 + DEVICE_FLG(0x0499, 0x3108, /* Yamaha YIT-W12TX */ 2035 + QUIRK_FLAG_GET_SAMPLE_RATE), 2034 2036 DEVICE_FLG(0x04d8, 0xfeea, /* Benchmark DAC1 Pre */ 2035 2037 QUIRK_FLAG_GET_SAMPLE_RATE), 2036 2038 DEVICE_FLG(0x04e8, 0xa051, /* Samsung USBC Headset (AKG) */ 2037 2039 QUIRK_FLAG_SKIP_CLOCK_SELECTOR | QUIRK_FLAG_CTL_MSG_DELAY_5M), 2040 + DEVICE_FLG(0x0525, 0xa4ad, /* Hamedal C20 usb camero */ 2041 + QUIRK_FLAG_IFACE_SKIP_CLOSE), 2038 2042 DEVICE_FLG(0x054c, 0x0b8c, /* Sony WALKMAN NW-A45 DAC */ 2039 2043 QUIRK_FLAG_SET_IFACE_FIRST), 2040 2044 DEVICE_FLG(0x0556, 0x0014, /* Phoenix Audio TMX320VC */ ··· 2077 2073 QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2078 2074 DEVICE_FLG(0x0763, 0x2031, /* M-Audio Fast Track C600 */ 2079 2075 QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2076 + DEVICE_FLG(0x07fd, 0x000b, /* MOTU M Series 2nd hardware revision */ 2077 + QUIRK_FLAG_CTL_MSG_DELAY_1M), 2080 2078 DEVICE_FLG(0x08bb, 0x2702, /* LineX FM Transmitter */ 2081 2079 QUIRK_FLAG_IGNORE_CTL_ERROR), 2082 2080 DEVICE_FLG(0x0951, 0x16ad, /* Kingston HyperX */ 2083 2081 QUIRK_FLAG_CTL_MSG_DELAY_1M), 2084 2082 DEVICE_FLG(0x0b0e, 0x0349, /* Jabra 550a */ 2085 2083 QUIRK_FLAG_CTL_MSG_DELAY_1M), 2084 + DEVICE_FLG(0x0ecb, 0x205c, /* JBL Quantum610 Wireless */ 2085 + QUIRK_FLAG_FIXED_RATE), 2086 + DEVICE_FLG(0x0ecb, 0x2069, /* JBL Quantum810 Wireless */ 2087 + QUIRK_FLAG_FIXED_RATE), 2086 2088 DEVICE_FLG(0x0fd9, 0x0008, /* Hauppauge HVR-950Q */ 2087 2089 QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER), 2090 + DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */ 2091 + QUIRK_FLAG_GET_SAMPLE_RATE), 2088 2092 DEVICE_FLG(0x1395, 0x740a, /* Sennheiser DECT */ 2089 2093 QUIRK_FLAG_GET_SAMPLE_RATE), 2090 2094 DEVICE_FLG(0x1397, 0x0507, /* Behringer UMC202HD */ ··· 2124 2112 DEVICE_FLG(0x1852, 0x5065, /* Luxman DA-06 */ 2125 2113 QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY), 2126 2114 DEVICE_FLG(0x1901, 0x0191, /* GE B850V3 CP2114 audio interface */ 2115 + QUIRK_FLAG_GET_SAMPLE_RATE), 2116 + DEVICE_FLG(0x19f7, 0x0035, /* RODE NT-USB+ */ 2117 + QUIRK_FLAG_GET_SAMPLE_RATE), 2118 + DEVICE_FLG(0x1bcf, 0x2283, /* NexiGo N930AF FHD Webcam */ 2127 2119 QUIRK_FLAG_GET_SAMPLE_RATE), 2128 2120 DEVICE_FLG(0x2040, 0x7200, /* Hauppauge HVR-950Q */ 2129 2121 QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER), ··· 2171 2155 QUIRK_FLAG_IGNORE_CTL_ERROR), 2172 2156 DEVICE_FLG(0x2912, 0x30c8, /* Audioengine D1 */ 2173 2157 QUIRK_FLAG_GET_SAMPLE_RATE), 2158 + DEVICE_FLG(0x2b53, 0x0023, /* Fiero SC-01 (firmware v1.0.0 @ 48 kHz) */ 2159 + QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2160 + DEVICE_FLG(0x2b53, 0x0024, /* Fiero SC-01 (firmware v1.0.0 @ 96 kHz) */ 2161 + QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2162 + DEVICE_FLG(0x2b53, 0x0031, /* Fiero SC-01 (firmware v1.1.0) */ 2163 + QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2174 2164 DEVICE_FLG(0x30be, 0x0101, /* Schiit Hel */ 2175 2165 QUIRK_FLAG_IGNORE_CTL_ERROR), 2176 2166 DEVICE_FLG(0x413c, 0xa506, /* Dell AE515 sound bar */ ··· 2185 2163 QUIRK_FLAG_ALIGN_TRANSFER), 2186 2164 DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */ 2187 2165 QUIRK_FLAG_ALIGN_TRANSFER), 2188 - DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */ 2189 - QUIRK_FLAG_GET_SAMPLE_RATE), 2190 - DEVICE_FLG(0x2b53, 0x0023, /* Fiero SC-01 (firmware v1.0.0 @ 48 kHz) */ 2191 - QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2192 - DEVICE_FLG(0x2b53, 0x0024, /* Fiero SC-01 (firmware v1.0.0 @ 96 kHz) */ 2193 - QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2194 - DEVICE_FLG(0x2b53, 0x0031, /* Fiero SC-01 (firmware v1.1.0) */ 2195 - QUIRK_FLAG_GENERIC_IMPLICIT_FB), 2196 - DEVICE_FLG(0x0525, 0xa4ad, /* Hamedal C20 usb camero */ 2197 - QUIRK_FLAG_IFACE_SKIP_CLOSE), 2198 - DEVICE_FLG(0x0ecb, 0x205c, /* JBL Quantum610 Wireless */ 2199 - QUIRK_FLAG_FIXED_RATE), 2200 - DEVICE_FLG(0x0ecb, 0x2069, /* JBL Quantum810 Wireless */ 2201 - QUIRK_FLAG_FIXED_RATE), 2202 - DEVICE_FLG(0x1bcf, 0x2283, /* NexiGo N930AF FHD Webcam */ 2203 - QUIRK_FLAG_GET_SAMPLE_RATE), 2204 2166 2205 2167 /* Vendor matches */ 2206 2168 VENDOR_FLG(0x045e, /* MS Lifecam */
-2
sound/virtio/virtio_card.c
··· 91 91 virtsnd_event_dispatch(snd, event); 92 92 virtsnd_event_send(vqueue, event, true, GFP_ATOMIC); 93 93 } 94 - if (unlikely(virtqueue_is_broken(vqueue))) 95 - break; 96 94 } while (!virtqueue_enable_cb(vqueue)); 97 95 spin_unlock_irqrestore(&queue->lock, flags); 98 96 }
-2
sound/virtio/virtio_ctl_msg.c
··· 303 303 virtqueue_disable_cb(vqueue); 304 304 while ((msg = virtqueue_get_buf(vqueue, &length))) 305 305 virtsnd_ctl_msg_complete(msg); 306 - if (unlikely(virtqueue_is_broken(vqueue))) 307 - break; 308 306 } while (!virtqueue_enable_cb(vqueue)); 309 307 spin_unlock_irqrestore(&queue->lock, flags); 310 308 }
-2
sound/virtio/virtio_pcm_msg.c
··· 358 358 virtqueue_disable_cb(queue->vqueue); 359 359 while ((msg = virtqueue_get_buf(queue->vqueue, &written_bytes))) 360 360 virtsnd_pcm_msg_complete(msg, written_bytes); 361 - if (unlikely(virtqueue_is_broken(queue->vqueue))) 362 - break; 363 361 } while (!virtqueue_enable_cb(queue->vqueue)); 364 362 spin_unlock_irqrestore(&queue->lock, flags); 365 363 }