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arm64: dts: renesas: r8a779f0: Add HSCIF nodes

Extracted from a bigger patch in the BSP, rebased and DMA
properties added.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220614095109.8175-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Linh Phung and committed by
Geert Uytterhoeven
01a787f7 c62872a6

+68
+68
arch/arm64/boot/dts/renesas/r8a779f0.dtsi
··· 436 436 status = "disabled"; 437 437 }; 438 438 439 + hscif0: serial@e6540000 { 440 + compatible = "renesas,hscif-r8a779f0", 441 + "renesas,rcar-gen4-hscif", "renesas,hscif"; 442 + reg = <0 0xe6540000 0 0x60>; 443 + interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 444 + clocks = <&cpg CPG_MOD 514>, 445 + <&cpg CPG_CORE R8A779F0_CLK_S0D3>, 446 + <&scif_clk>; 447 + clock-names = "fck", "brg_int", "scif_clk"; 448 + dmas = <&dmac0 0x31>, <&dmac0 0x30>, 449 + <&dmac1 0x31>, <&dmac1 0x30>; 450 + dma-names = "tx", "rx", "tx", "rx"; 451 + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 452 + resets = <&cpg 514>; 453 + status = "disabled"; 454 + }; 455 + 456 + hscif1: serial@e6550000 { 457 + compatible = "renesas,hscif-r8a779f0", 458 + "renesas,rcar-gen4-hscif", "renesas,hscif"; 459 + reg = <0 0xe6550000 0 0x60>; 460 + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 461 + clocks = <&cpg CPG_MOD 515>, 462 + <&cpg CPG_CORE R8A779F0_CLK_S0D3>, 463 + <&scif_clk>; 464 + clock-names = "fck", "brg_int", "scif_clk"; 465 + dmas = <&dmac0 0x33>, <&dmac0 0x32>, 466 + <&dmac1 0x33>, <&dmac1 0x32>; 467 + dma-names = "tx", "rx", "tx", "rx"; 468 + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 469 + resets = <&cpg 515>; 470 + status = "disabled"; 471 + }; 472 + 473 + hscif2: serial@e6560000 { 474 + compatible = "renesas,hscif-r8a779f0", 475 + "renesas,rcar-gen4-hscif", "renesas,hscif"; 476 + reg = <0 0xe6560000 0 0x60>; 477 + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 478 + clocks = <&cpg CPG_MOD 516>, 479 + <&cpg CPG_CORE R8A779F0_CLK_S0D3>, 480 + <&scif_clk>; 481 + clock-names = "fck", "brg_int", "scif_clk"; 482 + dmas = <&dmac0 0x35>, <&dmac0 0x34>, 483 + <&dmac1 0x35>, <&dmac1 0x34>; 484 + dma-names = "tx", "rx", "tx", "rx"; 485 + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 486 + resets = <&cpg 516>; 487 + status = "disabled"; 488 + }; 489 + 490 + hscif3: serial@e66a0000 { 491 + compatible = "renesas,hscif-r8a779f0", 492 + "renesas,rcar-gen4-hscif", "renesas,hscif"; 493 + reg = <0 0xe66a0000 0 0x60>; 494 + interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 495 + clocks = <&cpg CPG_MOD 517>, 496 + <&cpg CPG_CORE R8A779F0_CLK_S0D3>, 497 + <&scif_clk>; 498 + clock-names = "fck", "brg_int", "scif_clk"; 499 + dmas = <&dmac0 0x37>, <&dmac0 0x36>, 500 + <&dmac1 0x37>, <&dmac1 0x36>; 501 + dma-names = "tx", "rx", "tx", "rx"; 502 + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 503 + resets = <&cpg 517>; 504 + status = "disabled"; 505 + }; 506 + 439 507 ufs: ufs@e6860000 { 440 508 compatible = "renesas,r8a779f0-ufs"; 441 509 reg = <0 0xe6860000 0 0x100>;