Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
- fix unwinder for uleb128 case
- fix kernel-doc warnings for HP Jornada 7xx
- fix unbalanced stack on vfp success path
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 9297/1: vfp: avoid unbalanced stack on 'success' return path
ARM: 9296/1: HP Jornada 7XX: fix kernel-doc warnings
ARM: 9295/1: unwind:fix unwind abort for uleb128 case
+37
-6
+24
-1
arch/arm/kernel/unwind.c
+24
-1
arch/arm/kernel/unwind.c
···
308
308
return URC_OK;
309
309
}
310
310
311
+
static unsigned long unwind_decode_uleb128(struct unwind_ctrl_block *ctrl)
312
+
{
313
+
unsigned long bytes = 0;
314
+
unsigned long insn;
315
+
unsigned long result = 0;
316
+
317
+
/*
318
+
* unwind_get_byte() will advance `ctrl` one instruction at a time, so
319
+
* loop until we get an instruction byte where bit 7 is not set.
320
+
*
321
+
* Note: This decodes a maximum of 4 bytes to output 28 bits data where
322
+
* max is 0xfffffff: that will cover a vsp increment of 1073742336, hence
323
+
* it is sufficient for unwinding the stack.
324
+
*/
325
+
do {
326
+
insn = unwind_get_byte(ctrl);
327
+
result |= (insn & 0x7f) << (bytes * 7);
328
+
bytes++;
329
+
} while (!!(insn & 0x80) && (bytes != sizeof(result)));
330
+
331
+
return result;
332
+
}
333
+
311
334
/*
312
335
* Execute the current unwind instruction.
313
336
*/
···
384
361
if (ret)
385
362
goto error;
386
363
} else if (insn == 0xb2) {
387
-
unsigned long uleb128 = unwind_get_byte(ctrl);
364
+
unsigned long uleb128 = unwind_decode_uleb128(ctrl);
388
365
389
366
ctrl->vrs[SP] += 0x204 + (uleb128 << 2);
390
367
} else {
+4
-1
arch/arm/mach-sa1100/jornada720_ssp.c
+4
-1
arch/arm/mach-sa1100/jornada720_ssp.c
···
1
1
// SPDX-License-Identifier: GPL-2.0-only
2
-
/**
2
+
/*
3
3
* arch/arm/mac-sa1100/jornada720_ssp.c
4
4
*
5
5
* Copyright (C) 2006/2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
···
26
26
27
27
/**
28
28
* jornada_ssp_reverse - reverses input byte
29
+
* @byte: input byte to reverse
29
30
*
30
31
* we need to reverse all data we receive from the mcu due to its physical location
31
32
* returns : 01110111 -> 11101110
···
47
46
48
47
/**
49
48
* jornada_ssp_byte - waits for ready ssp bus and sends byte
49
+
* @byte: input byte to transmit
50
50
*
51
51
* waits for fifo buffer to clear and then transmits, if it doesn't then we will
52
52
* timeout after <timeout> rounds. Needs mcu running before its called.
···
79
77
80
78
/**
81
79
* jornada_ssp_inout - decide if input is command or trading byte
80
+
* @byte: input byte to send (may be %TXDUMMY)
82
81
*
83
82
* returns : (jornada_ssp_byte(byte)) on success
84
83
* : %-ETIMEDOUT on timeout failure
+5
-2
arch/arm/vfp/entry.S
+5
-2
arch/arm/vfp/entry.S
+4
-2
arch/arm/vfp/vfphw.S
+4
-2
arch/arm/vfp/vfphw.S
···
172
172
@ out before setting an FPEXC that
173
173
@ stops us reading stuff
174
174
VFPFMXR FPEXC, r1 @ Restore FPEXC last
175
+
mov sp, r3 @ we think we have handled things
176
+
pop {lr}
175
177
sub r2, r2, #4 @ Retry current instruction - if Thumb
176
178
str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,
177
179
@ else it's one 32-bit instruction, so
178
180
@ always subtract 4 from the following
179
181
@ instruction address.
180
182
181
-
mov lr, r3 @ we think we have handled things
182
183
local_bh_enable_and_ret:
183
184
adr r0, .
184
185
mov r1, #SOFTIRQ_DISABLE_OFFSET
···
210
209
211
210
process_exception:
212
211
DBGSTR "bounce"
212
+
mov sp, r3 @ setup for a return to the user code.
213
+
pop {lr}
213
214
mov r2, sp @ nothing stacked - regdump is at TOS
214
-
mov lr, r3 @ setup for a return to the user code.
215
215
216
216
@ Now call the C code to package up the bounce to the support code
217
217
@ r0 holds the trigger instruction