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coresight: Add label sysfs node support

For some coresight components like CTI and TPDM, there could be
numerous of them. From the node name, we can only get the type and
register address of the component. We can't identify the HW or the
system the component belongs to. Add label sysfs node support for
showing the intuitive name of the device.

Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250816072529.3716968-3-quic_jinlmao@quicinc.com

authored by

Mao Jinlong and committed by
Suzuki K Poulose
01f96b81 1ad38ef4

+129 -2
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-cti
··· 239 239 KernelVersion: 5.7 240 240 Contact: Mike Leach or Mathieu Poirier 241 241 Description: (Write) Clear all channel / trigger programming. 242 + 243 + What: /sys/bus/coresight/devices/<cti-name>/label 244 + Date: Aug 2025 245 + KernelVersion 6.18 246 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 247 + Description: (Read) Show hardware context information of device.
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source
··· 13 13 Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 14 14 Description: (R) Show the trace ID that will appear in the trace stream 15 15 coming from this trace entity. 16 + 17 + What: /sys/bus/coresight/devices/dummy_source<N>/label 18 + Date: Aug 2025 19 + KernelVersion 6.18 20 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 21 + Description: (Read) Show hardware context information of device.
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10
··· 19 19 into the Trace RAM following the trigger event is equal to the 20 20 value stored in this register+1 (from ARM ETB-TRM). 21 21 22 + What: /sys/bus/coresight/devices/<memory_map>.etb/label 23 + Date: Aug 2025 24 + KernelVersion 6.18 25 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 26 + Description: (Read) Show hardware context information of device. 27 + 22 28 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp 23 29 Date: March 2016 24 30 KernelVersion: 4.7
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
··· 251 251 Contact: Mathieu Poirier <mathieu.poirier@linaro.org> 252 252 Description: (RO) Holds the cpu number this tracer is affined to. 253 253 254 + What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/label 255 + Date: Aug 2025 256 + KernelVersion 6.18 257 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 258 + Description: (Read) Show hardware context information of device. 259 + 254 260 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/mgmt/etmccr 255 261 Date: September 2015 256 262 KernelVersion: 4.4
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
··· 329 329 Description: (RW) Access the selected single show PE comparator control 330 330 register. 331 331 332 + What: /sys/bus/coresight/devices/etm<N>/label 333 + Date: Aug 2025 334 + KernelVersion 6.18 335 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 336 + Description: (Read) Show hardware context information of device. 337 + 332 338 What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr 333 339 Date: April 2015 334 340 KernelVersion: 4.01
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel
··· 10 10 KernelVersion: 3.19 11 11 Contact: Mathieu Poirier <mathieu.poirier@linaro.org> 12 12 Description: (RW) Defines input port priority order. 13 + 14 + What: /sys/bus/coresight/devices/<memory_map>.funnel/label 15 + Date: Aug 2025 16 + KernelVersion 6.18 17 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 18 + Description: (Read) Show hardware context information of device.
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-stm
··· 51 51 Contact: Mathieu Poirier <mathieu.poirier@linaro.org> 52 52 Description: (RW) Holds the trace ID that will appear in the trace stream 53 53 coming from this trace entity. 54 + 55 + What: /sys/bus/coresight/devices/<memory_map>.stm/label 56 + Date: Aug 2025 57 + KernelVersion 6.18 58 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 59 + Description: (Read) Show hardware context information of device.
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc
··· 107 107 Description: (RW) Current Coresight TMC-ETR buffer mode selected. But user could 108 108 only provide a mode which is supported for a given ETR device. This 109 109 file is available only for TMC ETR devices. 110 + 111 + What: /sys/bus/coresight/devices/<memory_map>.tmc/label 112 + Date: Aug 2025 113 + KernelVersion 6.18 114 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 115 + Description: (Read) Show hardware context information of device.
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
··· 272 272 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 273 273 Description: 274 274 (RW) Set/Get the enablement of the individual lane. 275 + 276 + What: /sys/bus/coresight/devices/<tpdm-name>/label 277 + Date: Aug 2025 278 + KernelVersion 6.18 279 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 280 + Description: (Read) Show hardware context information of device.
+6
Documentation/ABI/testing/sysfs-bus-coresight-devices-trbe
··· 12 12 Description: (Read) Shows if TRBE updates in the memory are with access 13 13 and dirty flag updates as well. This value is fetched from 14 14 the TRBIDR register. 15 + 16 + What: /sys/bus/coresight/devices/trbe<cpu>/label 17 + Date: Aug 2025 18 + KernelVersion 6.18 19 + Contact: Mao Jinlong <quic_jinlmao@quicinc.com> 20 + Description: (Read) Show hardware context information of device.
+69 -2
drivers/hwtracing/coresight/coresight-sysfs.c
··· 7 7 #include <linux/device.h> 8 8 #include <linux/idr.h> 9 9 #include <linux/kernel.h> 10 + #include <linux/property.h> 10 11 11 12 #include "coresight-priv.h" 12 13 #include "coresight-trace-id.h" ··· 372 371 } 373 372 static DEVICE_ATTR_RW(enable_source); 374 373 374 + static ssize_t label_show(struct device *dev, 375 + struct device_attribute *attr, char *buf) 376 + { 377 + 378 + const char *str; 379 + int ret; 380 + 381 + ret = fwnode_property_read_string(dev_fwnode(dev), "label", &str); 382 + if (ret == 0) 383 + return sysfs_emit(buf, "%s\n", str); 384 + else 385 + return ret; 386 + } 387 + static DEVICE_ATTR_RO(label); 388 + 389 + static umode_t label_is_visible(struct kobject *kobj, 390 + struct attribute *attr, int n) 391 + { 392 + struct device *dev = kobj_to_dev(kobj); 393 + 394 + if (attr == &dev_attr_label.attr) { 395 + if (fwnode_property_present(dev_fwnode(dev), "label")) 396 + return attr->mode; 397 + else 398 + return 0; 399 + } 400 + 401 + return attr->mode; 402 + } 403 + 375 404 static struct attribute *coresight_sink_attrs[] = { 376 405 &dev_attr_enable_sink.attr, 406 + &dev_attr_label.attr, 377 407 NULL, 378 408 }; 379 - ATTRIBUTE_GROUPS(coresight_sink); 409 + 410 + static struct attribute_group coresight_sink_group = { 411 + .attrs = coresight_sink_attrs, 412 + .is_visible = label_is_visible, 413 + }; 414 + __ATTRIBUTE_GROUPS(coresight_sink); 380 415 381 416 static struct attribute *coresight_source_attrs[] = { 382 417 &dev_attr_enable_source.attr, 418 + &dev_attr_label.attr, 383 419 NULL, 384 420 }; 385 - ATTRIBUTE_GROUPS(coresight_source); 421 + 422 + static struct attribute_group coresight_source_group = { 423 + .attrs = coresight_source_attrs, 424 + .is_visible = label_is_visible, 425 + }; 426 + __ATTRIBUTE_GROUPS(coresight_source); 427 + 428 + static struct attribute *coresight_link_attrs[] = { 429 + &dev_attr_label.attr, 430 + NULL, 431 + }; 432 + 433 + static struct attribute_group coresight_link_group = { 434 + .attrs = coresight_link_attrs, 435 + .is_visible = label_is_visible, 436 + }; 437 + __ATTRIBUTE_GROUPS(coresight_link); 438 + 439 + static struct attribute *coresight_helper_attrs[] = { 440 + &dev_attr_label.attr, 441 + NULL, 442 + }; 443 + 444 + static struct attribute_group coresight_helper_group = { 445 + .attrs = coresight_helper_attrs, 446 + .is_visible = label_is_visible, 447 + }; 448 + __ATTRIBUTE_GROUPS(coresight_helper); 386 449 387 450 const struct device_type coresight_dev_type[] = { 388 451 [CORESIGHT_DEV_TYPE_SINK] = { ··· 455 390 }, 456 391 [CORESIGHT_DEV_TYPE_LINK] = { 457 392 .name = "link", 393 + .groups = coresight_link_groups, 458 394 }, 459 395 [CORESIGHT_DEV_TYPE_LINKSINK] = { 460 396 .name = "linksink", ··· 467 401 }, 468 402 [CORESIGHT_DEV_TYPE_HELPER] = { 469 403 .name = "helper", 404 + .groups = coresight_helper_groups, 470 405 } 471 406 }; 472 407 /* Ensure the enum matches the names and groups */