Merge tag 'iommu-fixes-v6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux

+5 -27

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

··· 487 487 488 488 /* VCMDQ Resource Helpers */ 489 489 490 - static void tegra241_vcmdq_free_smmu_cmdq(struct tegra241_vcmdq *vcmdq) 491 - { 492 - struct arm_smmu_queue *q = &vcmdq->cmdq.q; 493 - size_t nents = 1 << q->llq.max_n_shift; 494 - size_t qsz = nents << CMDQ_ENT_SZ_SHIFT; 495 - 496 - if (!q->base) 497 - return; 498 - dmam_free_coherent(vcmdq->cmdqv->smmu.dev, qsz, q->base, q->base_dma); 499 - } 500 - 501 490 static int tegra241_vcmdq_alloc_smmu_cmdq(struct tegra241_vcmdq *vcmdq) 502 491 { 503 492 struct arm_smmu_device *smmu = &vcmdq->cmdqv->smmu; ··· 549 560 struct tegra241_vcmdq *vcmdq = vintf->lvcmdqs[lidx]; 550 561 char header[64]; 551 562 552 - tegra241_vcmdq_free_smmu_cmdq(vcmdq); 563 + /* Note that the lvcmdq queue memory space is managed by devres */ 564 + 553 565 tegra241_vintf_deinit_lvcmdq(vintf, lidx); 554 566 555 567 dev_dbg(vintf->cmdqv->dev, ··· 758 768 759 769 vintf = kzalloc(sizeof(*vintf), GFP_KERNEL); 760 770 if (!vintf) 761 - goto out_fallback; 771 + return -ENOMEM; 762 772 763 773 /* Init VINTF0 for in-kernel use */ 764 774 ret = tegra241_cmdqv_init_vintf(cmdqv, 0, vintf); 765 775 if (ret) { 766 776 dev_err(cmdqv->dev, "failed to init vintf0: %d\n", ret); 767 - goto free_vintf; 777 + return ret; 768 778 } 769 779 770 780 /* Preallocate logical VCMDQs to VINTF0 */ ··· 773 783 774 784 vcmdq = tegra241_vintf_alloc_lvcmdq(vintf, lidx); 775 785 if (IS_ERR(vcmdq)) 776 - goto free_lvcmdq; 786 + return PTR_ERR(vcmdq); 777 787 } 778 788 779 789 /* Now, we are ready to run all the impl ops */ 780 790 smmu->impl_ops = &tegra241_cmdqv_impl_ops; 781 - return 0; 782 - 783 - free_lvcmdq: 784 - for (lidx--; lidx >= 0; lidx--) 785 - tegra241_vintf_free_lvcmdq(vintf, lidx); 786 - tegra241_cmdqv_deinit_vintf(cmdqv, vintf->idx); 787 - free_vintf: 788 - kfree(vintf); 789 - out_fallback: 790 - dev_info(smmu->impl_dev, "Falling back to standard SMMU CMDQ\n"); 791 - smmu->options &= ~ARM_SMMU_OPT_TEGRA241_CMDQV; 792 - tegra241_cmdqv_remove(smmu); 793 791 return 0; 794 792 } 795 793

+2 -2

drivers/iommu/dma-iommu.c

··· 1754 1754 return PAGE_SIZE; 1755 1755 default: 1756 1756 BUG(); 1757 - }; 1757 + } 1758 1758 } 1759 1759 1760 1760 static struct list_head *cookie_msi_pages(const struct iommu_domain *domain) ··· 1766 1766 return &domain->msi_cookie->msi_page_list; 1767 1767 default: 1768 1768 BUG(); 1769 - }; 1769 + } 1770 1770 } 1771 1771 1772 1772 static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev,

+2 -2

drivers/iommu/exynos-iommu.c

··· 832 832 struct exynos_iommu_owner *owner = dev_iommu_priv_get(master); 833 833 834 834 mutex_lock(&owner->rpm_lock); 835 - if (&data->domain->domain != &exynos_identity_domain) { 835 + if (data->domain) { 836 836 dev_dbg(data->sysmmu, "saving state\n"); 837 837 __sysmmu_disable(data); 838 838 } ··· 850 850 struct exynos_iommu_owner *owner = dev_iommu_priv_get(master); 851 851 852 852 mutex_lock(&owner->rpm_lock); 853 - if (&data->domain->domain != &exynos_identity_domain) { 853 + if (data->domain) { 854 854 dev_dbg(data->sysmmu, "restoring state\n"); 855 855 __sysmmu_enable(data); 856 856 }

-1

drivers/iommu/intel/iommu.c

··· 3835 3835 intel_pasid_free_table(dev); 3836 3836 intel_iommu_debugfs_remove_dev(info); 3837 3837 kfree(info); 3838 - set_dma_ops(dev, NULL); 3839 3838 } 3840 3839 3841 3840 static void intel_iommu_get_resv_regions(struct device *device,

+15 -14

drivers/iommu/intel/irq_remapping.c

··· 1287 1287 }; 1288 1288 1289 1289 /* 1290 - * With posted MSIs, all vectors are multiplexed into a single notification 1291 - * vector. Devices MSIs are then dispatched in a demux loop where 1292 - * EOIs can be coalesced as well. 1290 + * With posted MSIs, the MSI vectors are multiplexed into a single notification 1291 + * vector, and only the notification vector is sent to the APIC IRR. Device 1292 + * MSIs are then dispatched in a demux loop that harvests the MSIs from the 1293 + * CPU's Posted Interrupt Request bitmap. I.e. Posted MSIs never get sent to 1294 + * the APIC IRR, and thus do not need an EOI. The notification handler instead 1295 + * performs a single EOI after processing the PIR. 1293 1296 * 1294 - * "INTEL-IR-POST" IRQ chip does not do EOI on ACK, thus the dummy irq_ack() 1295 - * function. Instead EOI is performed by the posted interrupt notification 1296 - * handler. 1297 + * Note! Pending SMP/CPU affinity changes, which are per MSI, must still be 1298 + * honored, only the APIC EOI is omitted. 1297 1299 * 1298 1300 * For the example below, 3 MSIs are coalesced into one CPU notification. Only 1299 - * one apic_eoi() is needed. 1301 + * one apic_eoi() is needed, but each MSI needs to process pending changes to 1302 + * its CPU affinity. 1300 1303 * 1301 1304 * __sysvec_posted_msi_notification() 1302 1305 * irq_enter(); 1303 1306 * handle_edge_irq() 1304 1307 * irq_chip_ack_parent() 1305 - * dummy(); // No EOI 1308 + * irq_move_irq(); // No EOI 1306 1309 * handle_irq_event() 1307 1310 * driver_handler() 1308 1311 * handle_edge_irq() 1309 1312 * irq_chip_ack_parent() 1310 - * dummy(); // No EOI 1313 + * irq_move_irq(); // No EOI 1311 1314 * handle_irq_event() 1312 1315 * driver_handler() 1313 1316 * handle_edge_irq() 1314 1317 * irq_chip_ack_parent() 1315 - * dummy(); // No EOI 1318 + * irq_move_irq(); // No EOI 1316 1319 * handle_irq_event() 1317 1320 * driver_handler() 1318 1321 * apic_eoi() 1319 1322 * irq_exit() 1323 + * 1320 1324 */ 1321 - 1322 - static void dummy_ack(struct irq_data *d) { } 1323 - 1324 1325 static struct irq_chip intel_ir_chip_post_msi = { 1325 1326 .name = "INTEL-IR-POST", 1326 - .irq_ack = dummy_ack, 1327 + .irq_ack = irq_move_irq, 1327 1328 .irq_set_affinity = intel_ir_set_affinity, 1328 1329 .irq_compose_msi_msg = intel_ir_compose_msi_msg, 1329 1330 .irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,

+5 -1

drivers/iommu/iommu.c

··· 538 538 dev->iommu_group = NULL; 539 539 module_put(ops->owner); 540 540 dev_iommu_free(dev); 541 + #ifdef CONFIG_IOMMU_DMA 542 + dev->dma_iommu = false; 543 + #endif 541 544 } 542 545 543 546 static struct iommu_domain *pasid_array_entry_to_domain(void *entry) ··· 2720 2717 * if upper layers showed interest and installed a fault handler, 2721 2718 * invoke it. 2722 2719 */ 2723 - if (domain->handler) 2720 + if (domain->cookie_type == IOMMU_COOKIE_FAULT_HANDLER && 2721 + domain->handler) 2724 2722 ret = domain->handler(domain, dev, iova, flags, 2725 2723 domain->handler_token); 2726 2724

+10 -17

drivers/iommu/ipmmu-vmsa.c

··· 1081 1081 } 1082 1082 } 1083 1083 1084 + platform_set_drvdata(pdev, mmu); 1084 1085 /* 1085 1086 * Register the IPMMU to the IOMMU subsystem in the following cases: 1086 1087 * - R-Car Gen2 IPMMU (all devices registered) 1087 1088 * - R-Car Gen3 IPMMU (leaf devices only - skip root IPMMU-MM device) 1088 1089 */ 1089 - if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) { 1090 - ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL, 1091 - dev_name(&pdev->dev)); 1092 - if (ret) 1093 - return ret; 1090 + if (mmu->features->has_cache_leaf_nodes && ipmmu_is_root(mmu)) 1091 + return 0; 1094 1092 1095 - ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev); 1096 - if (ret) 1097 - return ret; 1098 - } 1093 + ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL, dev_name(&pdev->dev)); 1094 + if (ret) 1095 + return ret; 1099 1096 1100 - /* 1101 - * We can't create the ARM mapping here as it requires the bus to have 1102 - * an IOMMU, which only happens when bus_set_iommu() is called in 1103 - * ipmmu_init() after the probe function returns. 1104 - */ 1097 + ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev); 1098 + if (ret) 1099 + iommu_device_sysfs_remove(&mmu->iommu); 1105 1100 1106 - platform_set_drvdata(pdev, mmu); 1107 - 1108 - return 0; 1101 + return ret; 1109 1102 } 1110 1103 1111 1104 static void ipmmu_remove(struct platform_device *pdev)

+13 -13

drivers/iommu/mtk_iommu.c

··· 1372 1372 platform_set_drvdata(pdev, data); 1373 1373 mutex_init(&data->mutex); 1374 1374 1375 - ret = iommu_device_sysfs_add(&data->iommu, dev, NULL, 1376 - "mtk-iommu.%pa", &ioaddr); 1377 - if (ret) 1378 - goto out_link_remove; 1379 - 1380 - ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev); 1381 - if (ret) 1382 - goto out_sysfs_remove; 1383 - 1384 1375 if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE)) { 1385 1376 list_add_tail(&data->list, data->plat_data->hw_list); 1386 1377 data->hw_list = data->plat_data->hw_list; ··· 1381 1390 data->hw_list = &data->hw_list_head; 1382 1391 } 1383 1392 1393 + ret = iommu_device_sysfs_add(&data->iommu, dev, NULL, 1394 + "mtk-iommu.%pa", &ioaddr); 1395 + if (ret) 1396 + goto out_list_del; 1397 + 1398 + ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev); 1399 + if (ret) 1400 + goto out_sysfs_remove; 1401 + 1384 1402 if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) { 1385 1403 ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match); 1386 1404 if (ret) 1387 - goto out_list_del; 1405 + goto out_device_unregister; 1388 1406 } 1389 1407 return ret; 1390 1408 1391 - out_list_del: 1392 - list_del(&data->list); 1409 + out_device_unregister: 1393 1410 iommu_device_unregister(&data->iommu); 1394 1411 out_sysfs_remove: 1395 1412 iommu_device_sysfs_remove(&data->iommu); 1396 - out_link_remove: 1413 + out_list_del: 1414 + list_del(&data->list); 1397 1415 if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) 1398 1416 device_link_remove(data->smicomm_dev, dev); 1399 1417 out_runtime_disable:

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