tjh.dev / kernel
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drm/i915/dp_tunnel: Simplify detection of link BW change

update_tunnel_state() checks whether a tunnel state change (e.g.
available tunnel bandwidth) affects the list of valid modes for the
sink connected through the tunnel. If so, its caller sends a hotplug
event so userspace can re-enumerate the modes.

A change in tunnel bandwidth does not affect the mode list if the
bandwidth was above the sink's DPRX bandwidth both before and after the
update, since in that case the effective bandwidth remains limited by
the DPRX.

As get_current_link_bw() via intel_dp_max_link_data_rate() already
returns bandwidth values clamped to the DPRX limit, the condition for
detecting a mode list change can be simplified to:

old_bw != new_bw

Remove the explicit checks for whether the bandwidth was below the
maximum DPRX bandwidth before and after the update, and rely on the
clamped bandwidth values instead.

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260219182823.926702-3-imre.deak@intel.com

Imre Deak 02feab82 afe3f747

+5 -13
+5 -13
drivers/gpu/drm/i915/display/intel_dp_tunnel.c
··· 54 54 return DIV_ROUND_UP(kbytes * 8, 1000); 55 55 } 56 56 57 - static int get_current_link_bw(struct intel_dp *intel_dp, 58 - bool *below_dprx_bw) 57 + static int get_current_link_bw(struct intel_dp *intel_dp) 59 58 { 60 59 int rate = intel_dp_max_common_rate(intel_dp); 61 60 int lane_count = intel_dp_max_common_lane_count(intel_dp); 62 - int bw; 63 61 64 - bw = intel_dp_max_link_data_rate(intel_dp, rate, lane_count); 65 - *below_dprx_bw = bw < drm_dp_max_dprx_data_rate(rate, lane_count); 66 - 67 - return bw; 62 + return intel_dp_max_link_data_rate(intel_dp, rate, lane_count); 68 63 } 69 64 70 65 static int update_tunnel_state(struct intel_dp *intel_dp) 71 66 { 72 67 struct intel_display *display = to_intel_display(intel_dp); 73 68 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; 74 - bool old_bw_below_dprx; 75 - bool new_bw_below_dprx; 76 69 int old_bw; 77 70 int new_bw; 78 71 int ret; 79 72 80 - old_bw = get_current_link_bw(intel_dp, &old_bw_below_dprx); 73 + old_bw = get_current_link_bw(intel_dp); 81 74 82 75 ret = drm_dp_tunnel_update_state(intel_dp->tunnel); 83 76 if (ret < 0) { ··· 89 96 90 97 intel_dp_update_sink_caps(intel_dp); 91 98 92 - new_bw = get_current_link_bw(intel_dp, &new_bw_below_dprx); 99 + new_bw = get_current_link_bw(intel_dp); 93 100 94 101 /* Suppress the notification if the mode list can't change due to bw. */ 95 - if (old_bw_below_dprx == new_bw_below_dprx && 96 - !new_bw_below_dprx) 102 + if (old_bw == new_bw) 97 103 return 0; 98 104 99 105 drm_dbg_kms(display->drm,