Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'linux-watchdog-6.9-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:
- Remove usage of the deprecated ida_simple_xx() API
- Add kernel-doc for wdt_set_timeout()
- Add support for R-Car V4M, StarFive's JH8100 and sam9x7-wdt
- Fixes and small improvements
* tag 'linux-watchdog-6.9-rc1' of git://www.linux-watchdog.org/linux-watchdog:
watchdog: intel-mid_wdt: Get platform data via dev_get_platdata()
watchdog: intel-mid_wdt: Don't use "proxy" headers
watchdog: intel-mid_wdt: Remove unused intel-mid.h
dt-bindings: watchdog: sama5d4-wdt: add compatible for sam9x7-wdt
dt-bindings: watchdog: sprd,sp9860-wdt: convert to YAML
dt-bindings: watchdog: starfive,jh7100-wdt: Add compatible for JH8100
watchdog: stm32_iwdg: initialize default timeout
dt-bindings: watchdog: arm,sp805: document the reset signal
watchdog: sp805_wdt: deassert the reset if available
watchdog/hpwdt: Support Suspend and Resume
dt-bindings: watchdog: renesas-wdt: Add support for R-Car V4M
watchdog: starfive: check watchdog status before enabling in system resume
watchdog: starfive: Check pm_runtime_enabled() before decrementing usage counter
watchdog: qcom: fine tune the max timeout value calculation
watchdog: Add kernel-doc for wdt_set_timeout()
watchdog: core: Remove usage of the deprecated ida_simple_xx() API
+182
-48
+5
Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
+5
Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
···
50
50
- const: wdog_clk
51
51
- const: apb_pclk
52
52
53
+
resets:
54
+
maxItems: 1
55
+
description: WDOGRESn input reset signal for sp805 module.
56
+
53
57
required:
54
58
- compatible
55
59
- reg
···
71
67
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
72
68
clocks = <&wdt_clk>, <&apb_pclk>;
73
69
clock-names = "wdog_clk", "apb_pclk";
70
+
resets = <&wdt_rst>;
74
71
};
+8
-4
Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml
+8
-4
Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml
···
14
14
15
15
properties:
16
16
compatible:
17
-
enum:
18
-
- atmel,sama5d4-wdt
19
-
- microchip,sam9x60-wdt
20
-
- microchip,sama7g5-wdt
17
+
oneOf:
18
+
- enum:
19
+
- atmel,sama5d4-wdt
20
+
- microchip,sam9x60-wdt
21
+
- microchip,sama7g5-wdt
22
+
- items:
23
+
- const: microchip,sam9x7-wdt
24
+
- const: microchip,sam9x60-wdt
21
25
22
26
reg:
23
27
maxItems: 1
+1
Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
+1
Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
+64
Documentation/devicetree/bindings/watchdog/sprd,sp9860-wdt.yaml
+64
Documentation/devicetree/bindings/watchdog/sprd,sp9860-wdt.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/watchdog/sprd,sp9860-wdt.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Spreadtrum SP9860 watchdog timer
8
+
9
+
maintainers:
10
+
- Orson Zhai <orsonzhai@gmail.com>
11
+
- Baolin Wang <baolin.wang7@gmail.com>
12
+
- Chunyan Zhang <zhang.lyra@gmail.com>
13
+
14
+
allOf:
15
+
- $ref: watchdog.yaml#
16
+
17
+
properties:
18
+
compatible:
19
+
const: sprd,sp9860-wdt
20
+
21
+
reg:
22
+
maxItems: 1
23
+
24
+
interrupts:
25
+
maxItems: 1
26
+
27
+
clocks:
28
+
maxItems: 2
29
+
30
+
clock-names:
31
+
items:
32
+
- const: enable
33
+
- const: rtc_enable
34
+
35
+
required:
36
+
- compatible
37
+
- reg
38
+
- interrupts
39
+
- clocks
40
+
- clock-names
41
+
- timeout-sec
42
+
43
+
unevaluatedProperties: false
44
+
45
+
examples:
46
+
- |
47
+
#include <dt-bindings/clock/sprd,sc9860-clk.h>
48
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
49
+
#include <dt-bindings/interrupt-controller/irq.h>
50
+
51
+
soc {
52
+
#address-cells = <2>;
53
+
#size-cells = <2>;
54
+
55
+
watchdog@40310000 {
56
+
compatible = "sprd,sp9860-wdt";
57
+
reg = <0 0x40310000 0 0x1000>;
58
+
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
59
+
clocks = <&aon_gate CLK_APCPU_WDG_EB>, <&aon_gate CLK_AP_WDG_RTC_EB>;
60
+
clock-names = "enable", "rtc_enable";
61
+
timeout-sec = <12>;
62
+
};
63
+
};
64
+
...
-19
Documentation/devicetree/bindings/watchdog/sprd-wdt.txt
-19
Documentation/devicetree/bindings/watchdog/sprd-wdt.txt
···
1
-
Spreadtrum SoCs Watchdog timer
2
-
3
-
Required properties:
4
-
- compatible : Should be "sprd,sp9860-wdt".
5
-
- reg : Specifies base physical address and size of the registers.
6
-
- interrupts : Exactly one interrupt specifier.
7
-
- timeout-sec : Contain the default watchdog timeout in seconds.
8
-
- clock-names : Contain the input clock names.
9
-
- clocks : Phandles to input clocks.
10
-
11
-
Example:
12
-
watchdog: watchdog@40310000 {
13
-
compatible = "sprd,sp9860-wdt";
14
-
reg = <0 0x40310000 0 0x1000>;
15
-
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
16
-
timeout-sec = <12>;
17
-
clock-names = "enable", "rtc_enable";
18
-
clocks = <&clk_aon_apb_gates1 8>, <&clk_aon_apb_rtc_gates 9>;
19
-
};
+31
-9
Documentation/devicetree/bindings/watchdog/starfive,jh7100-wdt.yaml
+31
-9
Documentation/devicetree/bindings/watchdog/starfive,jh7100-wdt.yaml
···
19
19
isn't cleared, the watchdog will reset the system unless the watchdog
20
20
reset is disabled.
21
21
22
-
allOf:
23
-
- $ref: watchdog.yaml#
24
-
25
22
properties:
26
23
compatible:
27
-
enum:
28
-
- starfive,jh7100-wdt
29
-
- starfive,jh7110-wdt
24
+
oneOf:
25
+
- enum:
26
+
- starfive,jh7100-wdt
27
+
- starfive,jh7110-wdt
28
+
- items:
29
+
- enum:
30
+
- starfive,jh8100-wdt
31
+
- const: starfive,jh7110-wdt
30
32
31
33
reg:
32
34
maxItems: 1
···
47
45
- const: core
48
46
49
47
resets:
50
-
items:
51
-
- description: APB reset
52
-
- description: Core reset
48
+
minItems: 1
49
+
maxItems: 2
53
50
54
51
required:
55
52
- compatible
···
56
55
- clocks
57
56
- clock-names
58
57
- resets
58
+
59
+
allOf:
60
+
- $ref: watchdog.yaml#
61
+
62
+
- if:
63
+
properties:
64
+
compatible:
65
+
contains:
66
+
enum:
67
+
- starfive,jh8100-wdt
68
+
then:
69
+
properties:
70
+
resets:
71
+
items:
72
+
- description: Core reset
73
+
else:
74
+
properties:
75
+
resets:
76
+
items:
77
+
- description: APB reset
78
+
- description: Core reset
59
79
60
80
unevaluatedProperties: false
61
81
+25
drivers/watchdog/hpwdt.c
+25
drivers/watchdog/hpwdt.c
···
378
378
pci_disable_device(dev);
379
379
}
380
380
381
+
static int hpwdt_suspend(struct device *dev)
382
+
{
383
+
if (watchdog_active(&hpwdt_dev))
384
+
hpwdt_stop();
385
+
386
+
return 0;
387
+
}
388
+
389
+
static int hpwdt_resume(struct device *dev)
390
+
{
391
+
if (watchdog_active(&hpwdt_dev))
392
+
hpwdt_start(&hpwdt_dev);
393
+
394
+
return 0;
395
+
}
396
+
397
+
static const struct dev_pm_ops hpwdt_pm_ops = {
398
+
LATE_SYSTEM_SLEEP_PM_OPS(hpwdt_suspend, hpwdt_resume)
399
+
};
400
+
381
401
static struct pci_driver hpwdt_driver = {
382
402
.name = "hpwdt",
383
403
.id_table = hpwdt_devices,
384
404
.probe = hpwdt_init_one,
385
405
.remove = hpwdt_exit,
406
+
407
+
.driver = {
408
+
.name = "hpwdt",
409
+
.pm = &hpwdt_pm_ops,
410
+
}
386
411
};
387
412
388
413
MODULE_AUTHOR("Tom Mingarelli");
+8
-3
drivers/watchdog/intel-mid_wdt.c
+8
-3
drivers/watchdog/intel-mid_wdt.c
···
9
9
* Contact: David Cohen <david.a.cohen@linux.intel.com>
10
10
*/
11
11
12
+
#include <linux/bitops.h>
13
+
#include <linux/device.h>
14
+
#include <linux/errno.h>
12
15
#include <linux/interrupt.h>
16
+
#include <linux/math.h>
13
17
#include <linux/module.h>
14
-
#include <linux/nmi.h>
18
+
#include <linux/panic.h>
15
19
#include <linux/platform_device.h>
20
+
#include <linux/types.h>
16
21
#include <linux/watchdog.h>
22
+
17
23
#include <linux/platform_data/intel-mid_wdt.h>
18
24
19
25
#include <asm/intel_scu_ipc.h>
20
-
#include <asm/intel-mid.h>
21
26
22
27
#define IPC_WATCHDOG 0xf8
23
28
···
127
122
{
128
123
struct device *dev = &pdev->dev;
129
124
struct watchdog_device *wdt_dev;
130
-
struct intel_mid_wdt_pdata *pdata = dev->platform_data;
125
+
struct intel_mid_wdt_pdata *pdata = dev_get_platdata(dev);
131
126
struct mid_wdt *mid;
132
127
int ret;
133
128
+4
drivers/watchdog/it87_wdt.c
+4
drivers/watchdog/it87_wdt.c
···
213
213
214
214
/**
215
215
* wdt_set_timeout - set a new timeout value with watchdog ioctl
216
+
* @wdd: pointer to the watchdog_device structure
216
217
* @t: timeout value in seconds
217
218
*
218
219
* The hardware device has a 8 or 16 bit watchdog timer (depends on
219
220
* chip version) that can be configured to count seconds or minutes.
220
221
*
221
222
* Used within WDIOC_SETTIMEOUT watchdog device ioctl.
223
+
*
224
+
* Return: 0 if the timeout was set successfully, or a negative error code on
225
+
* failure.
222
226
*/
223
227
224
228
static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
+5
-2
drivers/watchdog/qcom-wdt.c
+5
-2
drivers/watchdog/qcom-wdt.c
···
41
41
struct qcom_wdt_match_data {
42
42
const u32 *offset;
43
43
bool pretimeout;
44
+
u32 max_tick_count;
44
45
};
45
46
46
47
struct qcom_wdt {
···
178
177
static const struct qcom_wdt_match_data match_data_apcs_tmr = {
179
178
.offset = reg_offset_data_apcs_tmr,
180
179
.pretimeout = false,
180
+
.max_tick_count = 0x10000000U,
181
181
};
182
182
183
183
static const struct qcom_wdt_match_data match_data_kpss = {
184
184
.offset = reg_offset_data_kpss,
185
185
.pretimeout = true,
186
+
.max_tick_count = 0xFFFFFU,
186
187
};
187
188
188
189
static int qcom_wdt_probe(struct platform_device *pdev)
···
239
236
*/
240
237
wdt->rate = clk_get_rate(clk);
241
238
if (wdt->rate == 0 ||
242
-
wdt->rate > 0x10000000U) {
239
+
wdt->rate > data->max_tick_count) {
243
240
dev_err(dev, "invalid clock rate\n");
244
241
return -EINVAL;
245
242
}
···
263
260
264
261
wdt->wdd.ops = &qcom_wdt_ops;
265
262
wdt->wdd.min_timeout = 1;
266
-
wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
263
+
wdt->wdd.max_timeout = data->max_tick_count / wdt->rate;
267
264
wdt->wdd.parent = dev;
268
265
wdt->layout = data->offset;
269
266
+8
drivers/watchdog/sp805_wdt.c
+8
drivers/watchdog/sp805_wdt.c
···
25
25
#include <linux/moduleparam.h>
26
26
#include <linux/pm.h>
27
27
#include <linux/property.h>
28
+
#include <linux/reset.h>
28
29
#include <linux/slab.h>
29
30
#include <linux/spinlock.h>
30
31
#include <linux/types.h>
···
233
232
sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
234
233
{
235
234
struct sp805_wdt *wdt;
235
+
struct reset_control *rst;
236
236
u64 rate = 0;
237
237
int ret = 0;
238
238
···
265
263
dev_err(&adev->dev, "no clock-frequency property\n");
266
264
return -ENODEV;
267
265
}
266
+
267
+
rst = devm_reset_control_get_optional_exclusive(&adev->dev, NULL);
268
+
if (IS_ERR(rst))
269
+
return dev_err_probe(&adev->dev, PTR_ERR(rst), "Can not get reset\n");
270
+
271
+
reset_control_deassert(rst);
268
272
269
273
wdt->adev = adev;
270
274
wdt->wdd.info = &wdt_info;
+11
-3
drivers/watchdog/starfive-wdt.c
+11
-3
drivers/watchdog/starfive-wdt.c
···
494
494
if (ret)
495
495
goto err_exit;
496
496
497
-
if (!early_enable)
498
-
pm_runtime_put_sync(&pdev->dev);
497
+
if (!early_enable) {
498
+
if (pm_runtime_enabled(&pdev->dev)) {
499
+
ret = pm_runtime_put_sync(&pdev->dev);
500
+
if (ret)
501
+
goto err_exit;
502
+
}
503
+
}
499
504
500
505
return 0;
501
506
···
559
554
starfive_wdt_set_reload_count(wdt, wdt->reload);
560
555
starfive_wdt_lock(wdt);
561
556
562
-
return starfive_wdt_start(wdt);
557
+
if (watchdog_active(&wdt->wdd))
558
+
return starfive_wdt_start(wdt);
559
+
560
+
return 0;
563
561
}
564
562
565
563
static int starfive_wdt_runtime_suspend(struct device *dev)
+3
drivers/watchdog/stm32_iwdg.c
+3
drivers/watchdog/stm32_iwdg.c
···
20
20
#include <linux/platform_device.h>
21
21
#include <linux/watchdog.h>
22
22
23
+
#define DEFAULT_TIMEOUT 10
24
+
23
25
/* IWDG registers */
24
26
#define IWDG_KR 0x00 /* Key register */
25
27
#define IWDG_PR 0x04 /* Prescaler Register */
···
250
248
wdd->parent = dev;
251
249
wdd->info = &stm32_iwdg_info;
252
250
wdd->ops = &stm32_iwdg_ops;
251
+
wdd->timeout = DEFAULT_TIMEOUT;
253
252
wdd->min_timeout = DIV_ROUND_UP((RLR_MIN + 1) * PR_MIN, wdt->rate);
254
253
wdd->max_hw_heartbeat_ms = ((RLR_MAX + 1) * wdt->data->max_prescaler *
255
254
1000) / wdt->rate;
+9
-8
drivers/watchdog/watchdog_core.c
+9
-8
drivers/watchdog/watchdog_core.c
···
260
260
if (wdd->parent) {
261
261
ret = of_alias_get_id(wdd->parent->of_node, "watchdog");
262
262
if (ret >= 0)
263
-
id = ida_simple_get(&watchdog_ida, ret,
264
-
ret + 1, GFP_KERNEL);
263
+
id = ida_alloc_range(&watchdog_ida, ret, ret,
264
+
GFP_KERNEL);
265
265
}
266
266
267
267
if (id < 0)
268
-
id = ida_simple_get(&watchdog_ida, 0, MAX_DOGS, GFP_KERNEL);
268
+
id = ida_alloc_max(&watchdog_ida, MAX_DOGS - 1, GFP_KERNEL);
269
269
270
270
if (id < 0)
271
271
return id;
···
273
273
274
274
ret = watchdog_dev_register(wdd);
275
275
if (ret) {
276
-
ida_simple_remove(&watchdog_ida, id);
276
+
ida_free(&watchdog_ida, id);
277
277
if (!(id == 0 && ret == -EBUSY))
278
278
return ret;
279
279
280
280
/* Retry in case a legacy watchdog module exists */
281
-
id = ida_simple_get(&watchdog_ida, 1, MAX_DOGS, GFP_KERNEL);
281
+
id = ida_alloc_range(&watchdog_ida, 1, MAX_DOGS - 1,
282
+
GFP_KERNEL);
282
283
if (id < 0)
283
284
return id;
284
285
wdd->id = id;
285
286
286
287
ret = watchdog_dev_register(wdd);
287
288
if (ret) {
288
-
ida_simple_remove(&watchdog_ida, id);
289
+
ida_free(&watchdog_ida, id);
289
290
return ret;
290
291
}
291
292
}
···
310
309
pr_err("watchdog%d: Cannot register reboot notifier (%d)\n",
311
310
wdd->id, ret);
312
311
watchdog_dev_unregister(wdd);
313
-
ida_simple_remove(&watchdog_ida, id);
312
+
ida_free(&watchdog_ida, id);
314
313
return ret;
315
314
}
316
315
}
···
383
382
unregister_reboot_notifier(&wdd->reboot_nb);
384
383
385
384
watchdog_dev_unregister(wdd);
386
-
ida_simple_remove(&watchdog_ida, wdd->id);
385
+
ida_free(&watchdog_ida, wdd->id);
387
386
}
388
387
389
388
/**