tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Will Deacon:
"Not too much here, but we've addressed a couple of nasty issues in the
dma-mapping code as well as adding the halfword and byte variants of
load_acquire/store_release following on from the CSD locking bug that
you fixed in the core.

- fix perf devicetree warnings at probe time

- fix memory leak in __dma_free()

- ensure DMA buffers are always zeroed

- show IRQ trigger in /proc/interrupts (for parity with ARM)

- implement byte and halfword access for smp_{load_acquire,store_release}"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: perf: Fix the pmu node name in warning message
arm64: perf: don't warn about missing interrupt-affinity property for PPIs
arm64: add missing PAGE_ALIGN() to __dma_free()
arm64: dma-mapping: always clear allocated buffers
ARM64: Enable CONFIG_GENERIC_IRQ_SHOW_LEVEL
arm64: add missing data types in smp_load_acquire/smp_store_release

Linus Torvalds 036f351e 4a152c39

+28 -7
+1
arch/arm64/Kconfig
··· 31 31 select GENERIC_EARLY_IOREMAP 32 32 select GENERIC_IRQ_PROBE 33 33 select GENERIC_IRQ_SHOW 34 + select GENERIC_IRQ_SHOW_LEVEL 34 35 select GENERIC_PCI_IOMAP 35 36 select GENERIC_SCHED_CLOCK 36 37 select GENERIC_SMP_IDLE_THREAD
+16
arch/arm64/include/asm/barrier.h
··· 65 65 do { \ 66 66 compiletime_assert_atomic_type(*p); \ 67 67 switch (sizeof(*p)) { \ 68 + case 1: \ 69 + asm volatile ("stlrb %w1, %0" \ 70 + : "=Q" (*p) : "r" (v) : "memory"); \ 71 + break; \ 72 + case 2: \ 73 + asm volatile ("stlrh %w1, %0" \ 74 + : "=Q" (*p) : "r" (v) : "memory"); \ 75 + break; \ 68 76 case 4: \ 69 77 asm volatile ("stlr %w1, %0" \ 70 78 : "=Q" (*p) : "r" (v) : "memory"); \ ··· 89 81 typeof(*p) ___p1; \ 90 82 compiletime_assert_atomic_type(*p); \ 91 83 switch (sizeof(*p)) { \ 84 + case 1: \ 85 + asm volatile ("ldarb %w0, %1" \ 86 + : "=r" (___p1) : "Q" (*p) : "memory"); \ 87 + break; \ 88 + case 2: \ 89 + asm volatile ("ldarh %w0, %1" \ 90 + : "=r" (___p1) : "Q" (*p) : "memory"); \ 91 + break; \ 92 92 case 4: \ 93 93 asm volatile ("ldar %w0, %1" \ 94 94 : "=r" (___p1) : "Q" (*p) : "memory"); \
+7 -2
arch/arm64/kernel/perf_event.c
··· 1310 1310 1311 1311 static int armpmu_device_probe(struct platform_device *pdev) 1312 1312 { 1313 - int i, *irqs; 1313 + int i, irq, *irqs; 1314 1314 1315 1315 if (!cpu_pmu) 1316 1316 return -ENODEV; ··· 1318 1318 irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL); 1319 1319 if (!irqs) 1320 1320 return -ENOMEM; 1321 + 1322 + /* Don't bother with PPIs; they're already affine */ 1323 + irq = platform_get_irq(pdev, 0); 1324 + if (irq >= 0 && irq_is_percpu(irq)) 1325 + return 0; 1321 1326 1322 1327 for (i = 0; i < pdev->num_resources; ++i) { 1323 1328 struct device_node *dn; ··· 1332 1327 i); 1333 1328 if (!dn) { 1334 1329 pr_warn("Failed to parse %s/interrupt-affinity[%d]\n", 1335 - of_node_full_name(dn), i); 1330 + of_node_full_name(pdev->dev.of_node), i); 1336 1331 break; 1337 1332 } 1338 1333
+4 -5
arch/arm64/mm/dma-mapping.c
··· 67 67 68 68 *ret_page = phys_to_page(phys); 69 69 ptr = (void *)val; 70 - if (flags & __GFP_ZERO) 71 - memset(ptr, 0, size); 70 + memset(ptr, 0, size); 72 71 } 73 72 74 73 return ptr; ··· 104 105 struct page *page; 105 106 void *addr; 106 107 107 - size = PAGE_ALIGN(size); 108 108 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT, 109 109 get_order(size)); 110 110 if (!page) ··· 111 113 112 114 *dma_handle = phys_to_dma(dev, page_to_phys(page)); 113 115 addr = page_address(page); 114 - if (flags & __GFP_ZERO) 115 - memset(addr, 0, size); 116 + memset(addr, 0, size); 116 117 return addr; 117 118 } else { 118 119 return swiotlb_alloc_coherent(dev, size, dma_handle, flags); ··· 191 194 struct dma_attrs *attrs) 192 195 { 193 196 void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle)); 197 + 198 + size = PAGE_ALIGN(size); 194 199 195 200 if (!is_device_dma_coherent(dev)) { 196 201 if (__free_from_pool(vaddr, size))