Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: imx-jpeg: Add encoder ops layer for hardware abstraction
Introduce mxc_jpeg_enc_ops function pointer structure to abstract
encoder configuration differences between hardware versions.
Extract the existing two-phase manual configuration into dedicated
functions (enter_config_mode/exit_config_mode) for v0 hardware.
Add setup_desc callback placeholder for future v1 hardware support
which will use descriptor-based configuration.
Store the extended sequential mode flag in the context to avoid
recalculating it during configuration phases.
No functional change.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Ming Qian <ming.qian@oss.nxp.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
authored by
Ming Qian
and committed by
Hans Verkuil
03b5048a
80930797
+58
-9
+47
-9
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
+47
-9
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
···
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#include "mxc-jpeg-hw.h"
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#include "mxc-jpeg.h"
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#define call_void_jpeg_enc_ops(jpeg, op, args...) \
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do { \
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if ((jpeg)->enc_cfg_ops && (jpeg)->enc_cfg_ops->op) \
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(jpeg)->enc_cfg_ops->op(args); \
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} while (0)
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static const struct mxc_jpeg_fmt mxc_formats[] = {
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{
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.name = "JPEG",
···
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if (jpeg->mode == MXC_JPEG_ENCODE &&
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ctx->enc_state == MXC_JPEG_ENC_CONF) {
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q_data = mxc_jpeg_get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
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ctx->enc_state = MXC_JPEG_ENCODING;
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dev_dbg(dev, "Encoder config finished. Start encoding...\n");
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mxc_jpeg_enc_set_quality(dev, reg, ctx->jpeg_quality);
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mxc_jpeg_enc_mode_go(dev, reg, mxc_jpeg_is_extended_sequential(q_data->fmt));
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call_void_jpeg_enc_ops(jpeg, exit_config_mode, ctx);
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goto job_unlock;
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}
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if (jpeg->mode == MXC_JPEG_DECODE && jpeg_src_buf->dht_needed &&
···
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jpeg_src_buf = vb2_to_mxc_buf(src_buf);
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+
ctx->extseq = mxc_jpeg_is_extended_sequential(jpeg_src_buf->fmt);
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/* setup the decoding descriptor */
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desc->next_descpt_ptr = 0; /* end of chain */
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q_data_cap = mxc_jpeg_get_q_data(ctx, cap_type);
···
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struct mxc_jpeg_q_data *q_data;
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enum mxc_jpeg_image_format img_fmt;
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int w, h;
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bool extseq;
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q_data = mxc_jpeg_get_q_data(ctx, src_buf->vb2_queue->type);
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extseq = mxc_jpeg_is_extended_sequential(q_data->fmt);
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ctx->extseq = extseq;
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memset(desc, 0, sizeof(struct mxc_jpeg_desc));
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memset(cfg_desc, 0, sizeof(struct mxc_jpeg_desc));
···
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desc->stm_ctrl = STM_CTRL_CONFIG_MOD(0) |
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STM_CTRL_IMAGE_FORMAT(img_fmt);
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desc->stm_ctrl |= STM_CTRL_BITBUF_PTR_CLR(1);
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if (mxc_jpeg_is_extended_sequential(q_data->fmt))
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if (extseq)
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desc->stm_ctrl |= STM_CTRL_PIXEL_PRECISION;
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else
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desc->stm_ctrl &= ~STM_CTRL_PIXEL_PRECISION;
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mxc_jpeg_addrs(desc, src_buf, dst_buf, 0);
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+
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call_void_jpeg_enc_ops(jpeg, setup_desc, ctx);
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dev_dbg(jpeg->dev, "cfg_desc:\n");
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print_descriptor_info(jpeg->dev, cfg_desc);
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dev_dbg(jpeg->dev, "enc desc:\n");
···
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/* validate the configuration descriptor */
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mxc_jpeg_set_desc(cfg_desc_handle, reg, slot);
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}
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static void mxc_jpeg_enc_start_config_manually(struct mxc_jpeg_ctx *ctx)
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{
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struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg;
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void __iomem *reg = jpeg->base_reg;
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struct device *dev = jpeg->dev;
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ctx->enc_state = MXC_JPEG_ENC_CONF;
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mxc_jpeg_enc_mode_conf(dev, reg, ctx->extseq);
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}
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static void mxc_jpeg_enc_finish_config_manually(struct mxc_jpeg_ctx *ctx)
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{
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struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg;
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void __iomem *reg = jpeg->base_reg;
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struct device *dev = jpeg->dev;
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ctx->enc_state = MXC_JPEG_ENCODING;
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dev_dbg(dev, "Encoder config finished. Start encoding...\n");
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mxc_jpeg_enc_set_quality(dev, reg, ctx->jpeg_quality);
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mxc_jpeg_enc_mode_go(dev, reg, ctx->extseq);
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}
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static const struct mxc_jpeg_enc_ops mxc_jpeg_enc_cfg_ops_v0 = {
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.enter_config_mode = mxc_jpeg_enc_start_config_manually,
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.exit_config_mode = mxc_jpeg_enc_finish_config_manually
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};
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static const struct mxc_jpeg_fmt *mxc_jpeg_get_sibling_format(const struct mxc_jpeg_fmt *fmt)
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{
···
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if (jpeg->mode == MXC_JPEG_ENCODE) {
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dev_dbg(dev, "Encoding on slot %d\n", ctx->slot);
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ctx->enc_state = MXC_JPEG_ENC_CONF;
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mxc_jpeg_config_enc_desc(&dst_buf->vb2_buf, ctx,
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&src_buf->vb2_buf, &dst_buf->vb2_buf);
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/* start config phase */
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mxc_jpeg_enc_mode_conf(dev, reg,
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mxc_jpeg_is_extended_sequential(q_data_out->fmt));
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call_void_jpeg_enc_ops(jpeg, enter_config_mode, ctx);
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} else {
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dev_dbg(dev, "Decoding on slot %d\n", ctx->slot);
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print_mxc_buf(jpeg, &src_buf->vb2_buf, 0);
···
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dev_err(dev, "Failed to enable runtime PM: %d\n", ret);
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goto err_pm;
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}
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if (mode == MXC_JPEG_ENCODE)
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jpeg->enc_cfg_ops = &mxc_jpeg_enc_cfg_ops_v0;
3014
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3015
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return 0;
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+11
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.h
+11
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.h
···
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unsigned int source_change;
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bool need_initial_source_change_evt;
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bool header_parsed;
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bool extseq;
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struct v4l2_ctrl_handler ctrl_handler;
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u8 jpeg_quality;
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struct delayed_work task_timer;
···
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dma_addr_t cfg_dec_daddr;
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};
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struct mxc_jpeg_enc_ops {
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/* Manual configuration (v0 hardware) - two-phase process */
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void (*enter_config_mode)(struct mxc_jpeg_ctx *ctx);
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void (*exit_config_mode)(struct mxc_jpeg_ctx *ctx);
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/* Descriptor-based configuration (v1 hardware) - single-phase */
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void (*setup_desc)(struct mxc_jpeg_ctx *ctx);
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};
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struct mxc_jpeg_dev {
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spinlock_t hw_lock; /* hardware access lock */
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unsigned int mode;
···
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struct device **pd_dev;
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struct device_link **pd_link;
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struct gen_pool *sram_pool;
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const struct mxc_jpeg_enc_ops *enc_cfg_ops;
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};
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/**