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ASoC: spacemit: adjust FIFO trigger threshold to half FIFO size

Set both TX and RX FIFO trigger thresholds (TFT/RFT) to 0xF (half of
the 32-entry FIFO) instead of 5. This provides better DMA efficiency
by allowing more data to accumulate before triggering a DMA request,
reducing the number of DMA transactions needed.

Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://patch.msgid.link/20260429-k3-i2s-v1-3-2fe99db11ecb@linux.spacemit.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Troy Mitchell and committed by
Mark Brown 03dcb5b6 6b4afbaa

+2 -2
+2 -2
sound/soc/spacemit/k1_i2s.c
··· 93 93 u32 sscr_val, sspsp_val, ssfcr_val, ssrwt_val; 94 94 95 95 sscr_val = SSCR_TRAIL | SSCR_FRF_PSP; 96 - ssfcr_val = FIELD_PREP(SSFCR_FIELD_TFT, 5) | 97 - FIELD_PREP(SSFCR_FIELD_RFT, 5) | 96 + ssfcr_val = FIELD_PREP(SSFCR_FIELD_TFT, 0xF) | 97 + FIELD_PREP(SSFCR_FIELD_RFT, 0xF) | 98 98 SSFCR_RSRE | SSFCR_TSRE; 99 99 ssrwt_val = SSRWT_RWOT; 100 100 sspsp_val = SSPSP_SFRMP;