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clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs

GPUCC has its own GPLL0 legs - one for 1-1 and one for div-2 output.
Add .name lookup to make sure older DTs consume the correct clock.

Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Tested-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-5-6222fbc2916b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Konrad Dybcio and committed by
Bjorn Andersson 03f1b83d 932d8c56

+1 -1
+1 -1
drivers/clk/qcom/gpucc-msm8998.c
··· 98 98 99 99 static const struct clk_parent_data gpu_xo_gpll0[] = { 100 100 { .hw = &gpucc_cxo_clk.clkr.hw }, 101 - { .fw_name = "gpll0" }, 101 + { .fw_name = "gpll0", .name = "gcc_gpu_gpll0_clk" }, 102 102 }; 103 103 104 104 static const struct parent_map gpu_xo_gpupll0_map[] = {