Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
soc: qcom: llcc-qcom: Add support for Glymur
Add system cache table(SCT) and configs for Glymur SoC
Updated the list of usecase id's to enable additional clients for Glymur
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251211-glymur_llcc_enablement-v3-2-43457b354b0d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
authored by
Pankaj Patil
and committed by
Bjorn Andersson
04185925
bd0b8028
+211
+207
drivers/soc/qcom/llcc-qcom.c
+207
drivers/soc/qcom/llcc-qcom.c
···
182
182
LLCC_TRP_WRS_CACHEABLE_EN,
183
183
};
184
184
185
+
static const struct llcc_slice_config glymur_data[] = {
186
+
{
187
+
.usecase_id = LLCC_CPUSS,
188
+
.slice_id = 1,
189
+
.max_cap = 7680,
190
+
.priority = 1,
191
+
.bonus_ways = 0xFFF,
192
+
.res_ways = 0x0,
193
+
.vict_prio = true,
194
+
.activate_on_init = true,
195
+
}, {
196
+
.usecase_id = LLCC_VIDSC0,
197
+
.slice_id = 2,
198
+
.max_cap = 512,
199
+
.priority = 3,
200
+
.fixed_size = true,
201
+
.bonus_ways = 0xFFF,
202
+
.res_ways = 0x0,
203
+
.vict_prio = true,
204
+
}, {
205
+
.usecase_id = LLCC_AUDIO,
206
+
.slice_id = 6,
207
+
.max_cap = 1024,
208
+
.priority = 1,
209
+
.fixed_size = true,
210
+
.bonus_ways = 0xFFF,
211
+
.res_ways = 0x0,
212
+
.vict_prio = true,
213
+
}, {
214
+
.usecase_id = LLCC_VIDSC1,
215
+
.slice_id = 4,
216
+
.max_cap = 512,
217
+
.priority = 3,
218
+
.fixed_size = true,
219
+
.bonus_ways = 0xFFF,
220
+
.res_ways = 0x0,
221
+
.vict_prio = true,
222
+
}, {
223
+
.usecase_id = LLCC_CMPT,
224
+
.slice_id = 10,
225
+
.max_cap = 7680,
226
+
.priority = 1,
227
+
.fixed_size = true,
228
+
.bonus_ways = 0xFFF,
229
+
.res_ways = 0x0,
230
+
.vict_prio = true,
231
+
}, {
232
+
.usecase_id = LLCC_GPUHTW,
233
+
.slice_id = 11,
234
+
.max_cap = 512,
235
+
.priority = 1,
236
+
.fixed_size = true,
237
+
.bonus_ways = 0xFFF,
238
+
.res_ways = 0x0,
239
+
.vict_prio = true,
240
+
}, {
241
+
.usecase_id = LLCC_GPU,
242
+
.slice_id = 9,
243
+
.max_cap = 7680,
244
+
.priority = 1,
245
+
.bonus_ways = 0xFFF,
246
+
.res_ways = 0x0,
247
+
.write_scid_en = true,
248
+
.write_scid_cacheable_en = true,
249
+
.stale_en = true,
250
+
.vict_prio = true,
251
+
}, {
252
+
.usecase_id = LLCC_MMUHWT,
253
+
.slice_id = 18,
254
+
.max_cap = 768,
255
+
.priority = 1,
256
+
.fixed_size = true,
257
+
.bonus_ways = 0xFFF,
258
+
.res_ways = 0x0,
259
+
.vict_prio = true,
260
+
.activate_on_init = true,
261
+
}, {
262
+
.usecase_id = LLCC_AUDHW,
263
+
.slice_id = 22,
264
+
.max_cap = 1024,
265
+
.priority = 1,
266
+
.fixed_size = true,
267
+
.bonus_ways = 0xFFF,
268
+
.res_ways = 0x0,
269
+
.vict_prio = true,
270
+
}, {
271
+
.usecase_id = LLCC_CVP,
272
+
.slice_id = 8,
273
+
.max_cap = 64,
274
+
.priority = 3,
275
+
.fixed_size = true,
276
+
.bonus_ways = 0xFFF,
277
+
.res_ways = 0x0,
278
+
.vict_prio = true,
279
+
}, {
280
+
.usecase_id = LLCC_WRCACHE,
281
+
.slice_id = 31,
282
+
.max_cap = 1536,
283
+
.priority = 1,
284
+
.fixed_size = true,
285
+
.bonus_ways = 0xFFF,
286
+
.res_ways = 0x0,
287
+
.vict_prio = true,
288
+
.activate_on_init = true,
289
+
}, {
290
+
.usecase_id = LLCC_CMPTHCP,
291
+
.slice_id = 17,
292
+
.max_cap = 256,
293
+
.priority = 3,
294
+
.fixed_size = true,
295
+
.bonus_ways = 0xFFF,
296
+
.res_ways = 0x0,
297
+
.vict_prio = true,
298
+
}, {
299
+
.usecase_id = LLCC_LCPDARE,
300
+
.slice_id = 30,
301
+
.max_cap = 768,
302
+
.priority = 3,
303
+
.fixed_size = true,
304
+
.bonus_ways = 0xFFF,
305
+
.res_ways = 0x0,
306
+
.alloc_oneway_en = true,
307
+
.vict_prio = true,
308
+
.activate_on_init = true,
309
+
}, {
310
+
.usecase_id = LLCC_AENPU,
311
+
.slice_id = 3,
312
+
.max_cap = 3072,
313
+
.priority = 1,
314
+
.fixed_size = true,
315
+
.bonus_ways = 0xFFF,
316
+
.res_ways = 0x0,
317
+
.cache_mode = 2,
318
+
.vict_prio = true,
319
+
}, {
320
+
.usecase_id = LLCC_ISLAND1,
321
+
.slice_id = 12,
322
+
.max_cap = 5632,
323
+
.priority = 7,
324
+
.fixed_size = true,
325
+
.bonus_ways = 0x0,
326
+
.res_ways = 0x7FF,
327
+
.vict_prio = true,
328
+
}, {
329
+
.usecase_id = LLCC_VIDVSP,
330
+
.slice_id = 28,
331
+
.max_cap = 256,
332
+
.priority = 3,
333
+
.fixed_size = true,
334
+
.bonus_ways = 0xFFF,
335
+
.res_ways = 0x0,
336
+
.vict_prio = true,
337
+
}, {
338
+
.usecase_id = LLCC_OOBM_NS,
339
+
.slice_id = 5,
340
+
.max_cap = 512,
341
+
.priority = 1,
342
+
.bonus_ways = 0xFFF,
343
+
.res_ways = 0x0,
344
+
.vict_prio = true,
345
+
}, {
346
+
.usecase_id = LLCC_CPUSS_OPP,
347
+
.slice_id = 32,
348
+
.max_cap = 0,
349
+
.fixed_size = true,
350
+
.bonus_ways = 0x0,
351
+
.res_ways = 0x0,
352
+
.vict_prio = true,
353
+
.activate_on_init = true,
354
+
}, {
355
+
.usecase_id = LLCC_PCIE_TCU,
356
+
.slice_id = 19,
357
+
.max_cap = 256,
358
+
.priority = 1,
359
+
.fixed_size = true,
360
+
.bonus_ways = 0xFFF,
361
+
.res_ways = 0x0,
362
+
.vict_prio = true,
363
+
.activate_on_init = true,
364
+
}, {
365
+
.usecase_id = LLCC_VIDSC_VSP1,
366
+
.slice_id = 29,
367
+
.max_cap = 256,
368
+
.priority = 3,
369
+
.fixed_size = true,
370
+
.bonus_ways = 0xFFF,
371
+
.res_ways = 0x0,
372
+
.vict_prio = true,
373
+
}
374
+
};
375
+
185
376
static const struct llcc_slice_config ipq5424_data[] = {
186
377
{
187
378
.usecase_id = LLCC_CPUSS,
···
4063
3872
},
4064
3873
};
4065
3874
3875
+
static const struct qcom_llcc_config glymur_cfg[] = {
3876
+
{
3877
+
.sct_data = glymur_data,
3878
+
.size = ARRAY_SIZE(glymur_data),
3879
+
.reg_offset = llcc_v6_reg_offset,
3880
+
.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3881
+
.no_edac = true,
3882
+
},
3883
+
};
3884
+
4066
3885
static const struct qcom_llcc_config qcs615_cfg[] = {
4067
3886
{
4068
3887
.sct_data = qcs615_data,
···
4302
4101
static const struct qcom_sct_config kaanapali_cfgs = {
4303
4102
.llcc_config = kaanapali_cfg,
4304
4103
.num_config = ARRAY_SIZE(kaanapali_cfg),
4104
+
};
4105
+
4106
+
static const struct qcom_sct_config glymur_cfgs = {
4107
+
.llcc_config = glymur_cfg,
4108
+
.num_config = ARRAY_SIZE(glymur_cfg),
4305
4109
};
4306
4110
4307
4111
static const struct qcom_sct_config qcs615_cfgs = {
···
5147
4941
}
5148
4942
5149
4943
static const struct of_device_id qcom_llcc_of_match[] = {
4944
+
{ .compatible = "qcom,glymur-llcc", .data = &glymur_cfgs },
5150
4945
{ .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
5151
4946
{ .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs},
5152
4947
{ .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
+4
include/linux/soc/qcom/llcc-qcom.h
+4
include/linux/soc/qcom/llcc-qcom.h
···
74
74
#define LLCC_CAMSRTIP 73
75
75
#define LLCC_CAMRTRF 74
76
76
#define LLCC_CAMSRTRF 75
77
+
#define LLCC_OOBM_NS 81
78
+
#define LLCC_OOBM_S 82
77
79
#define LLCC_VIDEO_APV 83
78
80
#define LLCC_COMPUTE1 87
79
81
#define LLCC_CPUSS_OPP 88
80
82
#define LLCC_CPUSSMPAM 89
83
+
#define LLCC_VIDSC_VSP1 91
81
84
#define LLCC_CAM_IPE_STROV 92
82
85
#define LLCC_CAM_OFE_STROV 93
83
86
#define LLCC_CPUSS_HEU 94
87
+
#define LLCC_PCIE_TCU 97
84
88
#define LLCC_MDM_PNG_FIXED 100
85
89
86
90
/**